Silicon-based back incidence position sensitive detector

Abstract

The invention relates to a silicon-based back incidence position sensitive detector, which belongs to the technical field of photoelectric detectors, and is characterized in that the silicon-based back incidence position sensitive detector is an array formed by a plurality of back incidence PSD units, the upper layers of the back incidence PSD units share one cathode, and an innovative structure capable of generating a better photoelectric effect is adopted; a common cathode layer, a P-type heavily doped layer used for ohmic contact, a high-resistance silicon substrate layer and a silicon dioxide substrate layer are sequentially arranged along the direction of incident light, a photosensitive area, a frame area and an isolation area are sequentially arranged on the lower portion of the high-resistance silicon substrate layer from inside to outside, and metal anodes are implanted in the positions of four end points of the silicon dioxide substrate in contrast with the frame area. The structure greatly reduces the PSD array gap, eliminates the sampling blind area, has the advantages of simple signal processing, higher detection rate, high integration level, low cost, simple process and the like, and can be widely applied to the fields of wavefront detection, pose detection and the like to meet the various requirements of manufacturing super-large target surface, high-speed and high-density detectors and the like.

Description

Technical Field

[0001] The present invention relates to the technical field of photoelectric position detectors, and in particular to a silicon-based back-incident position sensitive detector. Background Art

[0002] Position sensitive detectors detect the position of the incident light spot based on the lateral photoelectric effect of semiconductor materials. Position sensitive detectors have the advantages of high position resolution, fast response speed, and simple signal processing. They are conducive to replacing the CCD in the Shack-Hartmann wavefront sensor as its core component, which can improve the rate of wavefront detection and the accuracy of wavefront restoration. At the same time, they are also one of the most competitive and promising detectors in six-degree-of-freedom posture measurement.

[0003] Existing position sensitive detectors are basically normal incidence devices, that is, light is incident from the side where the photosensitive surface is located. When forming an array, the anode needs to be wired to the pad on the PCB substrate through wire bonding, so the area where the lead passes will sacrifice the sampling area, resulting in a sampling blind area; while the back-incident structure is adopted, the light is incident from the side where the cathode is located, and the anode is rearranged through the redistribution wiring (RDL) technology, and then connected to the PCB substrate through flip-chip bonding (Flip-Chip), which can greatly reduce the spacing between adjacent PSDs, thereby eliminating the sampling blind area. At present, the spacing between adjacent PSDs in the normal incidence PSD array is about 0.6mm. After adopting the back-incident array, the spacing between adjacent devices can be reduced to less than 20μm, and the filling factor can reach more than 99.17%, which is 1.25 times higher than the normal incidence. Therefore, the back-incident position sensitive detector (PSD) is a necessary condition for the production of ultra-large target surface, high-speed, high-density wavefront detectors, which can effectively eliminate the sampling blind area. Currently, there is no silicon-based back-incident position-sensitive detection device with no blind spots, high precision, small system size, and fast data transmission rate. Summary of the invention

[0004] In view of the above analysis, an embodiment of the present invention aims to provide a silicon-based back-incident position sensitive detector to solve the problems of large sampling blind area, complex process, low integration and high cost of existing detectors.

[0005] On the one hand, an embodiment of the present invention provides a silicon-based back-incident position sensitive detector, wherein the detector is an array composed of a plurality of back-incident PSD units, wherein the plurality of PSD units share a cathode; the PSD units include the following arranged in sequence along the light incident direction:

[0006] The first metal layer is used for light transmission and signal extraction and serves as a common cathode of the PSD array;

[0007] The second layer is a P-type heavily doped layer, used for ohmic contact;

[0008] The third layer is a high-resistance silicon substrate layer, which is used to absorb light and generate photogenerated carriers;

[0009] The fourth layer is a silicon dioxide substrate, and metal anodes are implanted in the silicon dioxide substrate at positions corresponding to the four end points of the border area;

[0010] A photosensitive area is provided at the bottom of the high-resistance silicon substrate layer, a frame area is provided at the periphery of the photosensitive area, and an isolation area is provided outside the frame area, wherein:

[0011] The photosensitive area is used as a movable area of ​​the light spot to produce a lateral photoelectric effect, generating electron-hole pairs.

[0012] The border area is used to absorb electrons.

[0013] Isolation region, used to suppress carrier diffusion.

[0014] Based on the further improvement of the above silicon-based back-incident position sensitive detector, the first metal layer is made of ITO transparent material.

[0015] Based on the further improvement of the above silicon-based back-incident position sensitive detector, the P-type heavily doped layer is implanted at the bottom of the high-resistance silicon substrate with a concentration range of 1e19-1e20cm -3 formed by doping with boron ions.

[0016] Based on the further improvement of the above silicon-based back-incident position sensitive detector, the high-resistance silicon substrate adopts P-type boron-doped high-resistance silicon material with a resistivity range of 2000-5000 ohm·cm. The substrate thickness is adjusted according to the wavelength of the incident light to completely absorb the incident light, satisfying the following conditions:

[0017] x = 1 / α, where

[0018] x is the distance that light enters the semiconductor, that is, the thickness of the high-resistance silicon substrate.

[0019] α is the absorption coefficient.

[0020] Based on the further improvement of the above silicon-based back-incident position-sensitive detector, the border area and the photosensitive area have the following relationship according to Gear's theorem:

[0021] In the formula,

[0022] a is the curvature radius of the border area, where the size of the square of the effective light spot collection area is pre-set in the photosensitive area, and the curvature radius of the four identical circles that are tangent to the outside of the center points of each side line of the square and tangent to each other is the minimum value of the curvature radius of the border.

[0023] b is the width of the border area, which shall not exceed 100 μm.

[0024] r1 is the block resistance of the border area,

[0025] r2 is the sheet resistance of the photosensitive area.

[0026] Based on the further improvement of the above silicon-based back-incident position-sensitive detector, the injection doping concentration range is 1e19-1e20cm -3 Phosphorus ions are used for N-type heavy doping.

[0027] Based on the further improvement of the above-mentioned silicon-based back-incident position-sensitive detector, the photosensitive area is injected with phosphorus ions for N-type light doping, and its doping concentration range depends on the block resistance of the border area and the photosensitive area, as well as the doping concentration of the border area. Specifically, the ratio of the block resistance of the border area to the block resistance of the photosensitive area is approximately equal to the ratio of the doping concentration of the border area to the doping concentration of the photosensitive area.

[0028] Based on the further improvement of the above silicon-based back-incident position sensitive detector, the isolation region has an injection doping concentration range of 1e19-1e20cm -3 Boron ions are used for P-type heavy doping.

[0029] Based on the further improvement of the above silicon-based back-incident position-sensitive detector, the metal anode is made of aluminum.

[0030] On the other hand, an embodiment of the present invention provides a method for preparing a silicon-based back-incident position sensitive detector, the method comprising the following steps:

[0031] Performing P-type heavy doping on the top of the high-resistance silicon substrate to form a P-type heavy doped layer;

[0032] P-type heavy doping is performed on the peripheral area of ​​the front surface at the bottom of the high-resistance silicon substrate to form an isolation region;

[0033] Performing N-type heavy doping inside the isolation region to form a border region;

[0034] N-type light doping is performed in the middle area of ​​the border area to form a photosensitive area;

[0035] A silicon dioxide protective layer is grown on the bottom of a high-resistance silicon substrate using the PECVD process, and lead holes are photoetched;

[0036] Photolithography of electrode patterns on the bottom silicon dioxide protective layer and evaporation of aluminum as an anode;

[0037] The silicon dioxide protective layer on the top of the high-resistance silicon substrate is evaporated, and an ITO transparent electrode is magnetron sputtered as a common electrode;

[0038] Dissociation completes device fabrication.

[0039] Compared with the prior art, the present invention can achieve at least one of the following beneficial effects:

[0040] 1. The PSD is a silicon-based device that can be integrated in a single chip using standard CMOS technology. The working principle of the PSD can be equivalent to a non-uniform irradiation model. If the photosensitive surface of the pn junction is non-uniformly irradiated, when the doping concentration of the p region is much smaller than that of the n region, the photogenerated electrons in the illuminated area can easily diffuse in the n region to achieve uniform distribution. However, due to the large resistivity of the p region, the photogenerated holes are partially accumulated in the illuminated area and are non-uniformly distributed in the direction parallel to the junction plane, which destroys the original junction balance and forms a transverse electric field in the direction parallel to the junction plane. If the photosensitive surface of the PSD is non-uniformly irradiated, the current values ​​collected by the four anodes are I1, I2, I3, and I4 respectively. The position coordinates X, Y of the light spot can be calculated by formula (1). Compared with traditional CCD devices, the position information of the light spot can be obtained directly through the current, the signal processing is simple, and the detection rate is high.

[0041] 2. Starting from the principle level of the device, a silicon-based back-incident position-sensitive detector is designed to meet the needs of making ultra-large target area, high-speed, and high-density detectors in the field of wavefront detection and posture detection. Compared with the normal incidence array, the sampling blind area in the array PSD is eliminated; compared with detectors of other material systems, the silicon-based PSD device has a mature process and high yield; this PSD has a simple structure and compact design, which is very conducive to large-scale integration. Compared with CCD devices, large target area integration can be performed. Therefore, this silicon-based back-incident position-sensitive detector has many advantages such as eliminating sampling blind areas, simple process, high integration, and low cost.

[0042] In the present invention, the above-mentioned technical solutions can also be combined with each other to achieve more preferred combination solutions. Other features and advantages of the present invention will be described in the subsequent description, and some advantages can become obvious from the description, or can be understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained through the contents particularly pointed out in the description and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] The accompanying drawings are only used for the purpose of illustrating specific embodiments and are not to be considered as limiting the present invention. In the entire drawings, the same reference symbols represent the same components;

[0044] Figure 1 This is a cross-sectional view of the silicon-based back-incident PSD of the present invention;

[0045] Figure 2 A schematic diagram of a method for determining a minimum value of a curvature radius of a border area according to the present invention;

[0046] Figure 3 Schematic diagram of the bottom structure (photosensitive area, frame area, metal anode, isolation area) of the silicon-based back-incident PSD of the present invention;

[0047] Figure 4 A schematic diagram comparing the silicon-based back-incident PSD array of the present invention and the silicon-based normal-incident PSD array in the prior art;

[0048] Figure 5 This is a flow chart for preparing the silicon-based back-incident PSD of the present invention;

[0049] Figure 6 This is a schematic diagram of the device structure corresponding to the first step of the silicon-based back-incident PSD preparation process of the present invention;

[0050] Figure 7 This is a schematic diagram of the device structure corresponding to the second step of the silicon-based back-incident PSD preparation process of the present invention;

[0051] Figure 8 This is a schematic diagram of the device structure corresponding to the third step of the silicon-based back-incident PSD preparation process of the present invention;

[0052] Fig. 9 This is a schematic diagram of the device structure corresponding to the fourth step of the silicon-based back-incident PSD preparation process of the present invention;

[0053] Fig.10 This is a schematic diagram of the device structure corresponding to the fifth step of the silicon-based back-incident PSD preparation process of the present invention;

[0054] Fig.11 This is a schematic diagram of the device structure corresponding to the sixth step of the silicon-based back-incident PSD preparation process of the present invention.

[0055] Reference numerals:

[0056] 1-photosensitive area; 2-frame area; 3-isolation area; 4-metal anode; 5-silicon dioxide (SiO 2 ) substrate; 6-P-type heavily doped region; 7-first metal layer (ITO transparent electrode); 8-high-resistance silicon substrate. DETAILED DESCRIPTION

[0057] The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings, wherein the accompanying drawings constitute a part of this application and are used together with the embodiments of the present invention to illustrate the principles of the present invention, but are not used to limit the scope of the present invention.

[0058] A specific embodiment of the present invention discloses a silicon-based back-incident position sensitive detector, wherein the detector is an array composed of a plurality of back-incident PSD units, wherein the plurality of PSD units share a cathode; the PSD units include the following arranged in sequence along the light incident direction:

[0059] The first metal layer is used for light transmission and signal extraction and serves as a common cathode of the PSD array;

[0060] The second layer is a P-type heavily doped layer, used for ohmic contact;

[0061] The third layer is a high-resistance silicon substrate layer, which is used to absorb light and generate photogenerated carriers;

[0062] The fourth layer is a silicon dioxide substrate, and metal anodes are implanted in the silicon dioxide substrate at positions corresponding to the four end points of the border area;

[0063] A photosensitive area is provided at the bottom of the high-resistance silicon substrate layer, a frame area is provided at the periphery of the photosensitive area, and an isolation area is provided outside the frame area, wherein:

[0064] The photosensitive area is used as a movable area of ​​the light spot to produce a lateral photoelectric effect, generating electron-hole pairs.

[0065] The border area is used to absorb electrons.

[0066] Isolation region, used to suppress carrier diffusion.

[0067] Specifically, Figure 1 As shown, this embodiment adopts a typical PIN type photodiode structure, including: a photosensitive area 1, a frame area 2, an isolation area 3, a metal anode 4, a silicon dioxide substrate 5, a P-type heavily doped layer 6, a first metal layer (ITO transparent electrode) 7, and a high-resistance silicon substrate layer 8.

[0068] Furthermore, the first metal layer is made of ITO transparent material and covers the uppermost layer of PSD.

[0069] Specifically, the first metal layer is used as the cathode on the surface of the PSD device that receives the incident light. A transparent electrode of indium tin oxide (ITO) with a thickness of about 100 nm is used for light transmission and signal extraction.

[0070] Furthermore, the P-type heavily doped layer has an injection concentration range of 1e19-1e20cm -3 of boron ion doping.

[0071] Specifically, a doping concentration of about 1e19 cm is implanted on the upper part of the high-resistance silicon substrate on the front side. -3 The above boron ions form a P-type heavily doped layer 6 for forming an ohmic contact. The P-type heavily doped layer 6 is adjacent to the ITO transparent electrode 7, which is conducive to better signal extraction.

[0072] Furthermore, the high-resistance silicon substrate is made of P-type boron ion-doped high-resistance silicon material with a resistivity range of 2000-5000 ohm·cm. The thickness is adjusted according to the wavelength of the incident light to completely absorb the incident light, satisfying the following conditions:

[0073] x = 1 / α, where

[0074] x is the distance the light travels into the semiconductor,

[0075] α is the absorption coefficient.

[0076] Preferably, the silicon substrate is a P-type boron-doped high-resistance silicon material with a resistivity of about 2000-5000Ω·cm. The high-resistance silicon material has few defects and a small dark current. Preferably, the thickness of silicon is 300-500μm, and its function is to absorb light and generate photogenerated carriers. Specifically, since the absorption coefficient of silicon at a wavelength of 1μm is small, a thicker substrate is required to absorb as much light as possible to ensure the responsiveness performance. At a working wavelength of 1μm, it is generally not less than 300μm. As the wavelength decreases, the thickness can be reduced at 400-900nm.

[0077] Specifically, the intensity of absorbed light is often expressed by the absorption coefficient α, which is a parameter that describes how fast light decays in a semiconductor. There is a relationship:

[0078] x = 1 / α, where α is the absorption coefficient in cm -1 , x is the distance that light propagates in the semiconductor, that is, the thickness of the substrate required to completely absorb the light. Preferably, according to the absorption coefficient of single crystal silicon at a wavelength of 1030nm being about 0.002189, that is, its absorption depth is about 456μm, a 500μm thick silicon substrate is required to completely absorb the light. Reducing the thickness can improve the response time and reduce the array crosstalk. The specific thickness can be determined based on simulation under the condition of ensuring a certain responsiveness.

[0079] Furthermore, the isolation region is formed by injecting a doping concentration of 1e19-1e20cm at the bottom of the high-resistance silicon substrate. -3 It is formed by heavy P-type doping with boron ions.

[0080] Specifically, the purpose of the isolation region 3 is to isolate the devices and inhibit the diffusion of carriers. Therefore, a high-resistance silicon substrate 8 is formed by injecting a concentration of about 1e19 cm -3 The above boron ions are heavily doped with P type to form an isolation region 3 .

[0081] Furthermore, according to Gear's theorem, the border area and the photosensitive area have the following relationship:

[0082] In the formula,

[0083] a is the curvature radius of the border area, where the size of the square of the effective light spot collection area is pre-set in the photosensitive area, and the curvature radius of the four identical circles that are tangent to the outside of the center points of each side line of the square and tangent to each other is the minimum value of the curvature radius of the border;

[0084] b is the width of the border area, which shall not exceed 100 μm.

[0085] r1 is the block resistance of the border area,

[0086] r2 is the sheet resistance of the photosensitive area.

[0087] Specifically, the pillow-shaped structure PSD is proposed based on Gear's theorem. In 1969, Gear proposed a boundary condition that does not affect the electric field distribution in a large area, which is later called Gear's theorem. According to Gear's theorem, the border area curvature radius a, border area width b, border area square resistance r1, and photosensitive area square resistance r2 of the pillow-shaped PSD have the following relationship:

[0088]

[0089] The measured two-dimensional position coordinates can be output without distortion.

[0090] Preferably, according to the content of Gear's theorem, when designing a PSD, the width b of the border area generally does not exceed 100 μm, otherwise the current transmission efficiency is affected, resulting in a deterioration in the linearity of the device output result.

[0091] Preferably, after determining the border area width b, the border area curvature radius a is given (not too small, otherwise the invalid device area will increase). Figure 2 As shown in the figure, the central dotted square area represents the effective spot collection area required by the device application, and the side length of the square is a preset value. Draw four lines of the same radius on the four sides of the square, which are tangent to each other and tangent to the center point of one side of the square respectively, then Figure 2 The radius a of any circle in is the minimum value of the curvature radius a of the border area. The four tangent arcs form a quadrilateral, which is the border area 2 with the minimum curvature radius. The line width b of the border area is the width of the border area.

[0092] Preferably, in this example, the border area curvature radius a is taken as 1 cm, and the ratio of the border area curvature radius a to the border area width b is 100, that is, the ratio of the square resistance of the border area 2 and the photosensitive area 3 is 100.

[0093] Furthermore, the doping concentration range of the border region is 1e19-1e20cm -3 Phosphorus ions are used for N-type heavy doping.

[0094] Specifically, the concentration injected along the inner boundary of isolation zone 3 is about 1e19 cm -3 The border region 2 is formed by heavy N-type phosphorus ion doping with a width not exceeding 100 μm, which is conducive to better absorption of photogenerated carriers.

[0095] Furthermore, the photosensitive area is injected with phosphorus ions for N-type light doping, and its doping concentration range depends on the block resistance of the border area and the photosensitive area, and the doping concentration of the border area. Specifically, the ratio of the block resistance of the border area to the block resistance of the photosensitive area is approximately equal to the ratio of the doping concentration of the border area to the doping concentration of the photosensitive area.

[0096] Preferably, the doping concentration of the border region 2 is set to 1e19 cm -3 The above is adjusted according to the 100-fold square resistance relationship to obtain the doping concentration of the photosensitive region 1, so that it ranges from 1e15 to 1e17 cm -3 ,The performance can then be further optimized by combining simulation and experiment.

[0097] Preferably, the concentration of the injected gas in the middle area of ​​the border region 2 is about 1e15-1e17 cm -3 The phosphorus ions in the interval are lightly doped with N-type to form a photosensitive region 1, thereby forming a concentration difference with the P-type heavily doped layer 6, generating a lateral photoelectric effect. The photosensitive region 1 is an area where the light spot can move. When the light spot is irradiated to the photosensitive region 1, electron-hole pairs are generated in the radiation area. The actual position of the light spot can be calculated from the current values ​​at the four corners of the border region 2 using the lateral photoelectric effect.

[0098] Specifically, Figure 3 As shown, in one embodiment of the present invention, the bottom of the back-incident PSD is a photosensitive area 1, surrounded by a pillow-shaped frame area 2, and the current values ​​collected by the four anodes are I1, I2, I3, and I4 respectively. The position coordinates X, Y of the light spot can be calculated by the following formula:

[0099]

[0100] Compared with traditional CCD devices, it can directly obtain the position information of the light spot through current, with simple signal processing and high detection rate.

[0101] Furthermore, the metal anode is made of aluminum.

[0102] Specifically, there is a metal anode 4 on the back of the PSD device, which is an aluminum electrode with a thickness of about 300 nm and is used for current extraction.

[0103] Specifically, when applied, the metal anode is rearranged through redistribution wiring (RDL) and then connected to the PCB substrate through flip-chip bonding; specifically, a layer of epoxy resin is laid at the bottom of the PSD array, and a metal line pattern is photoetched according to the position of the fan-out line of each anode point of each PSD, and one end of each line is connected to an anode of the corresponding PSD, and the other end is connected to a corresponding bump, and all bumps are bonded to the PCB board, thereby realizing the bump bonding of the PSD array and the PCB board. The purpose of this is to solve the problem that the positions of adjacent PSD anodes in the PSD array are too close, and direct connection of bumps is prone to bump contact, and the uniform arrangement of bumps is achieved through redistribution technology. The corresponding bumps are passed under the PSD anode to guide the current into the signal processing circuit below. This three-dimensional packaging method of bump bonding does not require additional lead fan-out in a two-dimensional plane, which significantly reduces the gap between each PSD.

[0104] The embodiments of the present invention cleverly eliminate the sampling blind spots that exist in applications in the fields of wavefront detection and posture detection while realizing position detection. The design method is simple, the structure is compact, and it is very practical. It is compatible with CMOS technology, has excellent performance, and has low process difficulty. It can be used for large-scale PSD integrated chips.

[0105] Figure 4 The comparison structure of the back-incident PSD array and the normal-incident PSD array is shown. The normal-incident PSD array at the bottom needs to occupy a large number of gap fan-out leads due to process and structural reasons, which increases the sampling blind area. The back-incident PSD array at the top shares a cathode. The anode is rearranged through the redistribution wiring (RDL) technology and then connected to the PCB substrate through flip-chip bonding. The PSDs are almost seamlessly arranged, which greatly reduces the device gap, thereby reducing the sampling blind area and greatly improving the duty cycle.

[0106] Compared with the prior art, the silicon-based back-incident position-sensitive detector provided in this embodiment can meet the requirements of making ultra-large target area, high-speed, and high-density detectors in the field of wavefront detection and posture detection from the principle level of the device, and eliminate the sampling blind area in the normal incidence array PSD; compared with detectors of other material systems, the silicon-based PSD device has a mature process and high yield; this PSD has a simple structure and compact design, which is very conducive to large-scale integration. Compared with CCD devices, large target area integration can be performed. Therefore, this silicon-based back-incident position-sensitive detector has the following advantages: elimination of sampling blind areas, simple process, high integration and low cost. .

[0107] Another embodiment of the present invention, as Figure 5 As shown, a method for preparing a silicon-based back-incident position sensitive detector is disclosed, and the process is as follows:

[0108] Step S1: performing P-type heavy doping on the top of the high-resistance silicon substrate to form a P-type heavily doped layer as an ohmic contact region;

[0109] Step S2: performing P-type heavy doping on the peripheral area of ​​the front surface of the bottom of the high-resistance silicon substrate to form an isolation region;

[0110] Step S3: performing N-type heavy doping on the inner side of the isolation region to form a border region;

[0111] Step S4: performing N-type light doping in the middle area of ​​the border area to form a photosensitive area;

[0112] Step S5: using a PECVD process to grow a silicon dioxide protective layer at the bottom of the high-resistance silicon substrate, and photolithography a lead hole;

[0113] Step S6: photolithography of the electrode pattern on the bottom silicon dioxide protective layer and evaporation of aluminum as an anode;

[0114] Step S7: evaporating the silicon dioxide protective layer on the top of the high-resistance silicon substrate, and magnetron sputtering an ITO transparent electrode as a common electrode;

[0115] Step S8: Dissociation, completing device fabrication.

[0116] Specifically, in the process of preparing the silicon-based back-incident PSD in this embodiment, the device placement orientation is consistent with the prior art.

[0117] The specific process of preparing a silicon-based back-incident position-sensitive detector is as follows:

[0118] Step 1: Select a qualified high-resistance silicon substrate according to the design requirements.

[0119] Specifically, a high-resistance silicon substrate 8 of appropriate thickness is selected according to the wavelength of incident light to be detected.

[0120] In one embodiment, for detecting light waves with a wavelength of 1 μm, preferably, the thickness of the high-resistance silicon substrate 8 is selected within a range of 300-500 μm.

[0121] Step 2: If Figure 6 As shown, P-type heavy doping is performed on the front side of the high-resistance silicon substrate 8 to form a P-type heavy doped layer for ohmic contact.

[0122] Specifically, in this embodiment, a doping concentration of about 1e19 cm is implanted on the upper part of the front high-resistance silicon substrate. -3 The above boron ions form a P-type heavily doped layer 6 for forming an ohmic contact. The P-type heavily doped layer 6 is adjacent to the ITO transparent electrode 7, which is conducive to better signal extraction.

[0123] Step 3: If Figure 7As shown, the isolation region 3 is heavily doped with P type.

[0124] Specifically, the purpose of the isolation region 3 is to isolate the devices and suppress the diffusion of carriers. Therefore, a concentration of about 1e19 cm -3 The above boron ions are heavily doped with P type to form an isolation region 3 .

[0125] Step 4: Figure 8 As shown, phosphorus ions are implanted into the border region 2.

[0126] Specifically, a concentration of about 1e19 cm -3 The above phosphorus ion N-type heavy doping forms the border region 2, which is conducive to better absorption of photogenerated carriers.

[0127] Step 5: Fig. 9 As shown, phosphorus ions are implanted into the photosensitive region 1 to form a light doping.

[0128] Specifically, the concentration of the implanted nanoparticles at the back of the device is about 1e15-1e17 cm -3 The phosphorus ions in the interval are lightly doped with N-type to form a photosensitive region 1, thereby forming a concentration difference with the P-type heavily doped layer 6, generating a lateral photoelectric effect.

[0129] Step 6: Fig.10 As shown, 300nm SiO was grown by plasma enhanced chemical vapor deposition (PECVD). 2 Substrate 5, photolithography to form lead holes.

[0130] Specifically, the SiO2 layer grown at the bottom of the device is used for device isolation and protection; the lead holes formed by photolithography are reserved holes for the metal anode 4 to connect to the frame area 2 .

[0131] Step 7: Fig.11 As shown, the electrode pattern is photolithographically formed on the front side, aluminum is evaporated, and an ITO transparent electrode 7 is magnetron sputtered on the back side.

[0132] Specifically, there are metal layers on the front and back of the device. The anode uses an aluminum electrode with a thickness of about 300nm for current extraction; the cathode uses an indium tin oxide (ITO) transparent electrode with a thickness of about 100nm for light transmission and signal extraction.

[0133] Step 8: Dissociation, the device is completed.

[0134] At this point, the structure of a back-incident position sensitive detector is completed.

[0135] Those skilled in the art will appreciate that all or part of the processes of the above-mentioned embodiments can be implemented by instructing related hardware through a computer program, and the program can be stored in a computer-readable storage medium, wherein the computer-readable storage medium is a disk, an optical disk, a read-only storage memory, or a random access memory, etc.

[0136] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by any technician familiar with the technical field within the technical scope disclosed by the present invention should be covered within the protection scope of the present invention.

Claims

1. A silicon-based back-incident position sensitive detector, It is characterized in that The detector is an array composed of a plurality of back-incident PSD units, wherein the plurality of PSD units share a cathode; the PSD units include the following arranged in sequence along the light incident direction: The first metal layer is used for light transmission and signal extraction and serves as a common cathode of the PSD array; The second layer is a P-type heavily doped layer, used for ohmic contact; The third layer is a high-resistance silicon substrate layer, which is used to absorb light and generate photogenerated carriers; The fourth layer is a silicon dioxide substrate, and metal anodes are implanted in the silicon dioxide substrate at positions corresponding to the four end points of the border area; A photosensitive area is provided at the bottom of the high-resistance silicon substrate layer, a frame area is provided at the periphery of the photosensitive area, and an isolation area is provided outside the frame area, wherein: The photosensitive area is used as a movable area of ​​the light spot to produce a lateral photoelectric effect, generating electron-hole pairs. The border area is used to absorb electrons. Isolation region, used to suppress carrier diffusion.

2. The silicon-based back-incident position sensitive detector according to claim 1, It is characterized in that The first metal layer is made of ITO transparent material.

3. The silicon-based back-incident position sensitive detector according to claim 2, It is characterized in that The P-type heavily doped layer is implanted at the bottom of the high-resistance silicon substrate with a concentration range of 1e19-1e20cm -3 formed by doping with boron ions.

4. The silicon-based back-incident position sensitive detector according to claim 3, It is characterized in that The high-resistance silicon substrate adopts P-type boron ion-doped high-resistance silicon material with a resistivity range of 2000-5000 ohm·cm. The thickness of the substrate is adjusted according to the wavelength of the incident light to completely absorb the incident light, and the following conditions are met: x = 1 / α, where x is the distance that light enters the semiconductor, that is, the thickness of the high-resistance silicon substrate. α is the absorption coefficient.

5. The silicon-based back-incident position sensitive detector according to claim 4, It is characterized in that According to Gear's theorem, the border area and the photosensitive area have the following relationship: In the formula, a is the curvature radius of the border area, where the size of the square of the effective light spot collection area is pre-set in the photosensitive area, and the curvature radius of the four identical circles that are tangent to the outside of the center points of each side line of the square and tangent to each other is the minimum value of the curvature radius of the border; b is the width of the border area, which shall not exceed 100 μm. r1 is the block resistance of the border area, r2 is the sheet resistance of the photosensitive area.

6. The silicon-based back-incident position sensitive detector according to claim 5, It is characterized in that The border area has an implantation doping concentration range of 1e19-1e20cm -3 Phosphorus ions are used for N-type heavy doping.

7. The silicon-based back-incident position sensitive detector according to claim 6, It is characterized in that The photosensitive area is injected with phosphorus ions for N-type light doping, and its doping concentration range depends on the block resistance of the border area and the photosensitive area, as well as the doping concentration of the border area. Specifically, the ratio of the block resistance of the border area to the block resistance of the photosensitive area is approximately equal to the ratio of the doping concentration of the border area to the doping concentration of the photosensitive area.

8. The silicon-based back-incident position sensitive detector according to claim 7, It is characterized in that The isolation region is injected with a doping concentration range of 1e19-1e20cm -3 Boron ions are used for P-type heavy doping.

9. The silicon-based back-incident position sensitive detector according to claim 8, It is characterized in that The metal anode is made of aluminum.

10. A method for preparing a silicon-based back-incident position-sensitive detector. It is characterized in that The method comprises the following steps: Performing P-type heavy doping on the top of the high-resistance silicon substrate to form a P-type heavy doped layer; P-type heavy doping is performed on the peripheral area of ​​the front surface at the bottom of the high-resistance silicon substrate to form an isolation region; Performing N-type heavy doping inside the isolation region to form a border region; N-type light doping is performed in the middle area of ​​the border area to form a photosensitive area; A silicon dioxide protective layer is grown on the bottom of a high-resistance silicon substrate using the PECVD process, and lead holes are photoetched; Photolithography of electrode patterns on the bottom silicon dioxide protective layer and evaporation of aluminum as an anode; The silicon dioxide protective layer on the top of the high-resistance silicon substrate is evaporated, and an ITO transparent electrode is magnetron sputtered as a common electrode; Dissociation completes device fabrication.

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