Array substrate, display panel and display device

Abstract

The invention relates to an array substrate, a display panel and a display device. The array substrate is provided with a pixel region, and comprises a substrate; the flat layer is located on one side of the substrate, the surface, away from the substrate, of the flat layer is provided with a plurality of concave-convex structures, the concave-convex structures are located in the pixel area, and each concave-convex structure comprises a convex part and a concave part located on one side of the convex part. According to the PSF device prepared by the array substrate based on the technical scheme of the invention, since the surface of the flat layer is provided with a plurality of concave-convex structures, the light-emitting layers prepared on the flat layer are not in the same horizontal plane, on one hand, the space volume of the light-emitting layers is increased, the concentration of excitons in the light-emitting layers is reduced, the DET energy transfer probability can be reduced, and the light-emitting efficiency is improved. Therefore, the service life of the device is prolonged; on the other hand, excitons in the light-emitting layers with different heights can be diffused into the organic layers of the adjacent non-light-emitting layers, and the concentration of the excitons in the light-emitting layers is reduced, so that the probability of TTA / TPA (exciton-polaron quenching) is reduced, and the service life of the device is prolonged.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to an array substrate, a display panel and a display device. Background Art

[0002] The power consumption of blue light devices in OLED products accounts for about 60% of the power consumption of the entire product, so improving the efficiency of blue light devices is the most effective way to reduce product power consumption. The blue light devices in existing mass-produced OLED (Organic Light-Emitting Diode) products use the TTA (triplet-triplet annihilation) luminescence mechanism, that is, two triplet excitons (Triplet) T1 are converted into a radiative transition (Singlet) S1 exciton and a ground state S0 through a collision annihilation process. The maximum exciton utilization rate in the device of this mechanism is 62.5%. There is a problem that excitons cannot be fully utilized, resulting in a bottleneck in improving the efficiency of existing blue light devices.

[0003] In order to improve the efficiency of the device, PSF (Phosphorescence sensitized fluorescence) technology is applied. This technology utilizes 100% of the excitons in the device through phosphorescence and transfers the exciton energy to the fluorescent material, making the fluorescent material emit light. This technology comprehensively utilizes the high utilization rate of excitons by phosphorescent materials and the characteristics of narrow fluorescence spectrum, improving the efficiency of the device while still ensuring the characteristics of a narrow emission spectrum.

[0004] However, the existing problem with PSF technology is the low device life, which makes it difficult to apply this technology to mass production. Summary of the invention

[0005] Based on this, it is necessary to provide an array substrate, a display panel and a display device to improve the life of the device.

[0006] An array substrate having a pixel area, the array substrate comprising:

[0007] substrate; and

[0008] The first electrode layer is located at one side of the substrate. The surface of the first electrode layer away from the substrate has a plurality of concave-convex structures. The concave-convex structures are located in the pixel area and include a convex portion and a concave portion located at one side of the convex portion.

[0009] In the preparation of PSF devices based on the array substrate of the technical solution of the present invention, since the surface of the flat layer has a plurality of concave-convex structures, the light-emitting layers prepared on the flat layer are not on the same horizontal plane. This increases the spatial volume of the light-emitting layer, thereby reducing the concentration of excitons in the light-emitting layer, which can reduce the DET (Dexter excitation transfer) energy transfer probability, reduce the exciton lifetime and thus improve the device lifetime. On the other hand, the excitons in the light-emitting layers at different heights can diffuse into the organic layer of the adjacent non-light-emitting layer, reducing the exciton concentration in the light-emitting layer, thereby reducing the probability of TTA / TPA (exciton-polaron quenching, triplet-polaron annihilation) and improving the device lifetime.

[0010] In a feasible implementation, the cross-sectional shape of the protrusion along a direction perpendicular to the surface of the substrate is arc-shaped, trapezoidal, rectangular, conical or hemispherical.

[0011] In a feasible implementation, the pixel area includes a blue pixel area, a red pixel area and a green pixel area. Along the direction perpendicular to the substrate, in the concave-convex structure located in the blue pixel area, the height difference between the convex part and the concave part is 1nm~50nm; in the concave-convex structure located in the red pixel area, the height difference between the convex part and the concave part is 1nm~130nm; in the concave-convex structure located in the green pixel area, the height difference between the convex part and the concave part is 1nm~70nm.

[0012] In a feasible implementation, the array substrate also includes a flat layer, which is located between the substrate and the first electrode layer. The surface of the flat layer away from the substrate has a plurality of undulating structures, and the undulating structures correspond to the pixel area. The undulating structures include a protrusion corresponding to the convex portion and a depression located on one side of the protrusion and corresponding to the concave portion.

[0013] In a feasible implementation, the first electrode layer is an anode or a cathode;

[0014] Preferably, the array substrate further includes:

[0015] A driving circuit layer, located between the substrate and the planar layer;

[0016] A pixel definition layer is located on a side of the planar layer away from the substrate, and a plurality of pixel openings are provided on the pixel definition layer.

[0017] The first electrode layer is located in the pixel opening.

[0018] A display panel comprises any one of the above array substrates.

[0019] In the display panel of the technical solution of the present invention, since the surface of the flat layer has a plurality of concave-convex structures, the light-emitting layers prepared on the flat layer are not on the same horizontal plane. This, on the one hand, increases the spatial volume of the light-emitting layer, thereby reducing the concentration of excitons in the light-emitting layer, which can reduce the probability of DET energy transfer, reduce the exciton lifetime and thus improve the device lifetime; on the other hand, the excitons in the light-emitting layers at different heights can diffuse into the organic layer of the adjacent non-light-emitting layer, reducing the exciton concentration in the light-emitting layer, thereby reducing the probability of TTA / TPA (exciton-polaron quenching, triplet-polaron annihilation) and improving the device lifetime.

[0020] In a feasible implementation, the display panel further includes a light-emitting layer, wherein the light-emitting layer contains a host material, a phosphorescent material and a fluorescent material;

[0021] Preferably, the host material comprises a dual-component material of p-type and n-type.

[0022] In a feasible implementation, the display panel further includes a hole transport layer and an electron transport layer located on both sides of the light-emitting layer, and the height difference between the convex part and the concave part of the concave-convex structure is smaller than the distance between the hole transport layer and the electron transport layer;

[0023] Preferably, the display panel further comprises a second electrode layer located on a side of the first electrode layer away from the substrate;

[0024] Wherein, the first electrode layer is an anode and the second electrode layer is a cathode; or the first electrode layer is a cathode and the second electrode layer is an anode;

[0025] Preferably, the display panel further includes:

[0026] A hole injection layer, located between the anode and the hole transport layer;

[0027] An electron blocking layer, located between the hole transport layer and the light emitting layer;

[0028] a hole blocking layer, located between the light-emitting layer and the electron transport layer; and

[0029] The electron injection layer is located between the electron transport layer and the cathode.

[0030] In a feasible implementation, the height difference between the convex part and the concave part of the concave-convex structure is smaller than the sum of the thicknesses of the electron blocking layer, the light-emitting layer and the hole blocking layer.

[0031] A display device, characterized by comprising any one of the above array substrates or any one of the above display panels.

[0032] In the display device of the technical solution of the present invention, since the surface of the flat layer has a plurality of concave-convex structures, the light-emitting layers prepared on the flat layer are not on the same horizontal plane. This, on the one hand, increases the spatial volume of the light-emitting layer, thereby reducing the concentration of excitons in the light-emitting layer, which can reduce the probability of DET energy transfer, reduce the exciton lifetime and thus improve the device lifetime; on the other hand, the excitons in the light-emitting layers at different heights can diffuse into the organic layer of the adjacent non-light-emitting layer, reducing the exciton concentration in the light-emitting layer, thereby reducing the probability of TTA / TPA (exciton-polaron quenching, triplet-polaron annihilation) and improving the device lifetime. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 is a schematic cross-sectional view of an array substrate according to a first embodiment of the present invention;

[0034] Figure 2 is a top view of an array substrate according to a first embodiment of the present invention;

[0035] Figure 3 is a cross-sectional schematic diagram of an array substrate according to a second embodiment of the present invention;

[0036] Figure 4 is a schematic cross-sectional view of an array substrate according to a third embodiment of the present invention;

[0037] Figure 5 is a schematic cross-sectional view of an array substrate according to a fourth embodiment of the present invention;

[0038] Figure 6 is a schematic cross-sectional view of a display panel according to a first embodiment of the present invention;

[0039] Figure 7 is a schematic cross-sectional view of a display panel according to a second embodiment of the present invention;

[0040] Figure 8 is a schematic cross-sectional view of a display panel according to a third embodiment of the present invention. DETAILED DESCRIPTION

[0041] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific embodiments of the present invention are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present invention, so the present invention is not limited by the specific embodiments disclosed below.

[0042] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only.

[0043] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0044] See also Figure 1 and Figure 2 The array substrate 100 of the first embodiment of the present invention has a pixel region, and includes a substrate 110 and a first electrode layer 120. The first electrode layer 120 is located on one side of the substrate 110, and a surface of the first electrode layer 120 away from the substrate 110 has a plurality of concave-convex structures 121, the concave-convex structures 121 are located in the pixel region, and the concave-convex structures 121 include a convex portion 122 and a concave portion 123 located on one side of the convex portion 122.

[0045] Here, “several” refers to an indefinite quantity, which can be one, two, or more than two.

[0046] On the basis of the above-mentioned embodiment, the pixel area includes a blue pixel area, a red pixel area and a green pixel area. In the direction perpendicular to the substrate 110, in the concave-convex structure 121 in the blue pixel area, the height difference between the convex part 122 and the concave part 123 is 1nm to 50nm; in the concave-convex structure 121 in the red pixel area, the height difference between the convex part 122 and the concave part 123 is 1nm to 130nm; in the concave-convex structure 121 in the green pixel area, the height difference between the convex part 122 and the concave part 123 is 1nm to 70nm. This is conducive to increasing the spatial volume of the light-emitting layer while avoiding the contact between the hole transport layer at the convex position and the electron transport layer at the concave position to cause a short circuit, resulting in reduced device efficiency and even damage to the product.

[0047] On the basis of the above-mentioned embodiment, the array substrate 100 further includes a planarization layer (PLN, Planning Layer) 130, the planarization layer 130 is located between the substrate 110 and the first electrode layer 120, the surface of the planarization layer 130 away from the substrate 110 has a plurality of undulating structures 131, the undulating structures 131 are located in the pixel area, and the undulating structures 131 include a protrusion 132 corresponding to the protrusion 122 and a depression 133 located on one side of the protrusion 132 and corresponding to the depression 123. By making the planarization layer 130 into a surface having the plurality of undulating structures 131, the first electrode layer 120 formed on the planarization layer 130 has the correspondingly arranged protrusions 122 and depressions 123, so that the light-emitting layer prepared on the first electrode layer 120 is not on the same horizontal plane.

[0048] On the basis of the above-mentioned embodiment, the first electrode layer 120 is an anode or a cathode. When the first electrode layer 120 is an anode, the device structure of the present invention is an upright structure; when the first electrode layer 120 is a cathode, the device structure of the present invention is an inverted structure.

[0049] On the basis of the above-mentioned embodiment, the array substrate 100 further includes a driving circuit layer 140, a pixel definition layer 150 and a first electrode layer 150. The driving circuit layer 140 is located between the substrate 110 and the planar layer 130. The pixel definition layer 150 is located on a side of the planar layer 130 away from the substrate 110, and a plurality of pixel openings 151 are provided on the pixel definition layer 150, and the first electrode layer 120 is located in the pixel openings 151.

[0050] Based on the above-mentioned embodiment, the cross-sectional shape of the protrusion 122 along the direction perpendicular to the surface of the substrate 110 is arc-shaped, specifically hemispherical. Figure 2 It can be seen from the top view of the convex portions 122 that in the array substrate 100 of this embodiment, the top view shapes of the convex portions 122 may be circular, elliptical or rectangular, and the number of the convex portions 122 in each pixel opening 151 is not limited.

[0051] The PSF device is prepared based on the array substrate 100 of the present embodiment. Since the surface of the first electrode layer 120 has a plurality of concave-convex structures 121, and the convex portion 122 is hemispherical along the cross-sectional shape perpendicular to the surface of the substrate 110, the light-emitting layer prepared on the first electrode layer 120 is not in the same horizontal plane, which increases the actual area of ​​the light-emitting layer, and in this way reduces the proportion of DET (full name Dexter excitation transfer) energy transfer. The reason why this purpose can be achieved is that the DET energy transfer distance is very short, about 1A, while the FRET (full name Fluorescence Resonance Energy Transfer) energy transfer distance can be 1nm to 10nm. Therefore, the PSF device is prepared using the array substrate 100 of the present embodiment, which can increase the FRET transfer ratio by increasing the area of ​​the light-emitting layer, reduce the DET energy transfer ratio, and thus increase the device life. At the same time, the excitons in the light-emitting layers at different heights can diffuse into the organic layer of the adjacent non-light-emitting layer, reducing the exciton concentration in the light-emitting layer, thereby reducing the probability of TTA / TPA (exciton-polaron quenching, triplet-polaronannihilation) and improving the device life.

[0052] It should be noted that in the array substrate of the present invention, the shape, number and arrangement of the concave-convex structures are not limited, and the final production conditions are the level that can be achieved by the actual process and the optimal conditions for device performance.

[0053] See also Figure 3 The array substrate 200 of the second embodiment of the present invention has a pixel region, and includes a substrate 210 and a first electrode layer 220. The first electrode layer 220 is located on one side of the substrate 210, and the surface of the first electrode layer 220 away from the substrate 210 has a plurality of concave-convex structures 221, which are located in the pixel region and include a convex portion 222 and a concave portion 223 located on one side of the convex portion 222.

[0054] In this embodiment, the cross-sectional shape of the convex portion 222 along the surface of the substrate 210 is rectangular. In this way, the light-emitting layers prepared on the first electrode layer 220 are not in the same horizontal plane. The horizontal plane is to reduce the contact area of ​​adjacent light-emitting layers by the height difference. The part of the original horizontal connection of the entire surface is now directly caused by the height difference of the light-emitting layer caused by the height difference of the first electrode layer 220. The contact area between the light-emitting layers is reduced. After the contact area is reduced, the energy transfer of this part is reduced due to the short DET transfer distance, while the FRET transfer distance is long, so it is not affected. Therefore, it is possible to reduce the probability of DET energy transfer, reduce the exciton lifetime, and thus improve the device lifetime. At the same time, the excitons in the light-emitting layers of different heights can diffuse into the organic layer of the adjacent non-light-emitting layer, reduce the exciton concentration in the light-emitting layer, thereby reducing the probability of TTA / TPA (exciton-polaron quenching, triplet-polaronannihilation) and improving the device lifetime.

[0055] Furthermore, the array substrate 200 further includes a flat layer 230, the flat layer 230 is located between the substrate 210 and the first electrode layer 220, the surface of the flat layer 230 away from the substrate 210 has a plurality of undulating structures 231, the undulating structures 231 are located in the pixel area, and the undulating structures 231 include a protrusion 232 corresponding to the protrusion 222 and a depression 233 located on one side of the protrusion 232 and corresponding to the depression 223. By making the flat layer 230 into a surface having the plurality of undulating structures 231, the first electrode layer 220 formed on the flat layer 230 has the correspondingly arranged protrusions 222 and depressions 223, so that the light-emitting layer prepared on the first electrode layer 220 is not on the same horizontal plane.

[0056] Furthermore, the array substrate 200 further includes a driving circuit layer 240 and a pixel definition layer 250. The driving circuit layer 240 is located between the substrate 210 and the planar layer 230. The pixel definition layer 250 is located on a side of the planar layer 230 away from the substrate 210, and a plurality of pixel openings 251 are provided on the pixel definition layer 250, and the first electrode layer 220 is located in the pixel openings 251.

[0057] See also Figure 4 The array substrate 300 of the third embodiment of the present invention has a pixel region, and includes a substrate 310 and a first electrode layer 320. The first electrode layer 320 is located at one side of the substrate 310, and the surface of the first electrode layer 320 away from the substrate 310 has a plurality of concave-convex structures 321, the concave-convex structures 321 are located in the pixel region, and the concave-convex structures 321 include a convex portion 322 and a concave portion 323 located at one side of the convex portion 322.

[0058] In this embodiment, the cross-sectional shape of the convex portion 322 along the surface of the substrate 310 is a trapezoid. In this way, the light-emitting layers prepared on the first electrode layer 320 are not in the same horizontal plane. The horizontal plane is to reduce the contact area of ​​adjacent light-emitting layers by the height difference. The original horizontal connection part of the whole surface is now caused by the height difference of the light-emitting layer caused by the height difference of the first electrode layer 320. The difference directly causes the contact area between the light-emitting layers to be reduced. After the contact area is reduced, the energy transfer of this part is reduced due to the short DET transfer distance, while the FRET transfer distance is long, so it is not affected. Therefore, it is possible to reduce the probability of DET energy transfer, reduce the exciton lifetime, and thus improve the device lifetime. At the same time, the excitons in the light-emitting layers of different heights can diffuse into the organic layer of the adjacent non-light-emitting layer, reduce the exciton concentration in the light-emitting layer, thereby reducing the probability of TTA / TPA (exciton-polaron quenching, triplet-polaronannihilation) and improving the device lifetime.

[0059] Furthermore, the array substrate 300 further includes a flat layer 330, which is located between the substrate 310 and the first electrode layer 320. The surface of the flat layer 330 away from the substrate 310 has a plurality of undulating structures 331, which are located in the pixel region, and the undulating structures 331 include a protrusion 332 corresponding to the protrusion 322 and a depression 333 located on one side of the protrusion 332 and corresponding to the depression 323. By making the flat layer 330 into a surface having the plurality of undulating structures 331, the first electrode layer 320 formed on the flat layer 330 has the correspondingly arranged protrusions 322 and depressions 323, so that the light-emitting layer prepared on the first electrode layer 320 is not on the same horizontal plane.

[0060] Furthermore, the array substrate 300 further includes a driving circuit layer 340 and a pixel definition layer 350. The driving circuit layer 340 is located between the substrate 310 and the planar layer 330. The pixel definition layer 350 is located on a side of the planar layer 330 away from the substrate 310, and a plurality of pixel openings 351 are provided on the pixel definition layer 350, and the first electrode layer 320 is located in the pixel openings 351.

[0061] See also Figure 5 The array substrate 400 of the fourth embodiment of the present invention has a pixel region, and includes a substrate 410 and a first electrode layer 420. The first electrode layer 420 is located at one side of the substrate 410, and the surface of the first electrode layer 420 away from the substrate 410 has a plurality of concave-convex structures 421, which are located in the pixel region and include a convex portion 422 and a concave portion 423 located at one side of the convex portion 422.

[0062] In this embodiment, the cross-sectional shape of the convex portion 422 along the surface of the substrate 410 is conical. In this way, the light-emitting layers prepared on the first electrode layer 420 are not in the same horizontal plane, which increases the actual area of ​​the light-emitting layer, and reduces the proportion of DET (full name Dexter excitation transfer) energy transfer in this way. The reason why this purpose can be achieved is that the DET energy transfer distance is very short, about 1A, while the FRET (full name Fluorescence Resonance Energy Transfer) energy transfer distance can be 1nm to 10nm. Therefore, the array substrate 400 of this embodiment is used to prepare a PSF device, which can increase the FRET transfer ratio by increasing the area of ​​the light-emitting layer, reduce the proportion of DET energy transfer, and thus increase the device life. At the same time, the excitons in the light-emitting layers of different heights can diffuse into the organic layer of the adjacent non-light-emitting layer, reducing the exciton concentration in the light-emitting layer, thereby reducing the probability of TTA / TPA (exciton-polaron quenching, triplet-polaron annihilation) and increasing the device life.

[0063] Furthermore, the array substrate 400 further includes a flat layer 430, which is located between the substrate 410 and the first electrode layer 420. The surface of the flat layer 430 away from the substrate 410 has a plurality of undulating structures 431, which are located in the pixel region, and the undulating structures 431 include a protrusion 432 corresponding to the protrusion 422 and a depression 433 located on one side of the protrusion 432 and corresponding to the depression 423. By making the flat layer 430 into a surface having the plurality of undulating structures 431, the first electrode layer 420 formed on the flat layer 430 has the correspondingly arranged protrusions 422 and depressions 423, so that the light-emitting layer prepared on the first electrode layer 420 is not on the same horizontal plane.

[0064] Furthermore, the array substrate 400 further includes a driving circuit layer 440 and a pixel definition layer 450. The driving circuit layer 440 is located between the substrate 410 and the planar layer 430. The pixel definition layer 450 is located on a side of the planar layer 430 away from the substrate 410, and a plurality of pixel openings 451 are provided on the pixel definition layer 450, and the first electrode layer 420 is located in the pixel openings 451.

[0065] A PSF device is prepared based on the array substrate of the technical solution of the present invention. Since the surface of the flat layer has a plurality of concave-convex structures, the light-emitting layers prepared on the flat layer are not on the same horizontal plane. This increases the spatial volume of the light-emitting layer, thereby reducing the concentration of excitons in the light-emitting layer, which can reduce the probability of DET energy transfer, reduce the exciton lifetime, and thus improve the device lifetime. On the other hand, the excitons in the light-emitting layers at different heights can diffuse into the organic layer of the adjacent non-light-emitting layer, reducing the exciton concentration in the light-emitting layer, thereby reducing the probability of TTA / TPA (exciton-polaron quenching, triplet-polaronannihilation) and improving the device lifetime.

[0066] A display panel according to an embodiment includes any one of the above array substrates. The display panel of the present invention may be an OLED or a QLED.

[0067] Please combine Figure 1 and Figure 6 The display panel 500 of the first embodiment of the present invention includes the above-mentioned array substrate 100. On the basis of the array substrate 100, the display panel 500 also includes a light-emitting layer 510, and the light-emitting layer 510 contains a host material (Host), a phosphorescent material (sensitization-dopant) and a fluorescent material (Final-dopant); preferably, the host material includes a two-component material of p-type (transporting holes) and n-type (transporting electrons). When the host material is a two-component material, it is beneficial to maximize the utilization rate of excitons. It should be noted that the host material is not limited to a two-component material, and can also be a single-component material.

[0068] On the basis of the above-mentioned embodiment, the display panel 500 further includes a hole transport layer 520 and an electron transport layer 530 located on both sides of the light-emitting layer 510, and the height difference between the convex portion 122 and the concave portion 123 of the concave-convex structure 121 is smaller than the distance between the hole transport layer 520 and the electron transport layer 530. This is beneficial to increase the spatial volume of the light-emitting layer 510 while avoiding the contact between the hole transport layer 520 at the convex portion 122 and the electron transport layer 530 at the concave portion 123, resulting in a short circuit, which reduces the efficiency of the device and even damages the product.

[0069] On the basis of the above-mentioned embodiment, the display panel 500 further includes a second electrode layer 540, which is located on the side of the first electrode layer 120 away from the substrate 110. In this embodiment, the first electrode layer 120 is an anode, and the second electrode layer 540 is a cathode. In other words, the display panel 500 of this embodiment is a positive structure. It should be noted that the display panel of the present invention can also be an inverted structure, in which the first electrode layer 120 is a cathode, and the second electrode layer 540 is an anode.

[0070] On the basis of the above-mentioned embodiment, the display panel 500 further includes a hole injection layer 550, an electron blocking layer 560, a hole blocking layer 570 and an electron injection layer 580. Among them, the hole injection layer 550 is located between the anode and the hole transport layer 520, the electron blocking layer 560 is located between the hole transport layer 520 and the light-emitting layer 510, the hole blocking layer 570 is located between the light-emitting layer 510 and the electron transport layer 530, and the electron injection layer 580 is located between the electron transport layer 530 and the cathode. In the display panel 500 of the present invention, the hole injection layer 550, the electron blocking layer 560, the hole blocking layer 570 and the electron injection layer 580 can all be commonly used material layers in the art.

[0071] On the basis of the above-mentioned embodiment, the height difference between the convex part 122 and the concave part 123 of the concave-convex structure 121 is less than the sum of the thicknesses of the electron blocking layer 560, the light-emitting layer 510 and the hole blocking layer 570. This is beneficial to increase the spatial volume of the light-emitting layer 510 while avoiding the contact between the hole transport layer 520 at the convex part 122 and the electron transport layer 530 at the concave part 123, which causes a short circuit and reduces the efficiency of the device, or even damages the product.

[0072] When preparing the display panel 500 of the present embodiment, all array TFT-related film layers before the preparation of the flat layer 130 are in existing mass production conditions. When preparing the flat layer 130, it is required that the film layer obtains an undulating structure 131 after coating-exposure-development-etching, which can be achieved by using Half-Tone during exposure. Thereafter, the first electrode 120 (for example, anode ITO / Ag / ITO) is deposited and etched on the flat layer 130, and then a concave-convex structure 121 having the same shape as the undulating structure 131 of the flat layer 130 is obtained; then the pixel definition layer 150 is prepared. Finally, an array substrate 100 having a concave-convex structure 121 in a single color pixel opening 151 is obtained, and similar concave-convex structures can also be prepared for red and green pixels.

[0073] A hole injection layer 550, a hole transport layer 520, an electron blocking layer 560, a light emitting layer 510, a hole blocking layer 570, an electron transport layer 530, an electron injection layer 580 and a second electrode layer 540 are sequentially deposited on the array substrate 100. The preparation method of each layer can adopt the common production process in the art. The organic light emitting device in the display panel 500 finally obtained is spatially separated from the interlayer of the organic light emitting layer 510 due to the concave-convex structure 121 of the array substrate 100 below.

[0074] Please combine Figure 2 and Figure 7The display panel 600 of the second embodiment of the present invention includes the above-mentioned array substrate 200. On the basis of the array substrate 200, the display panel 600 also includes a light-emitting layer 610, and the light-emitting layer 610 contains a host material (Host), a phosphorescent material (sensitization-dopant) and a fluorescent material (Final-dopant); preferably, the host material includes a two-component material of p-type (transporting holes) and n-type (transporting electrons). When the host material is a two-component material, it is beneficial to maximize the utilization rate of excitons. It should be noted that the host material is not limited to a two-component material, and can also be a single-component material.

[0075] Furthermore, the display panel 600 further includes a hole transport layer 620 and an electron transport layer 630 located on both sides of the light emitting layer 610, and the height difference between the convex portion 222 and the concave portion 223 of the concave-convex structure 221 is smaller than the distance between the hole transport layer 620 and the electron transport layer 630. This is beneficial for increasing the spatial volume of the light emitting layer 610 while avoiding the contact between the hole transport layer 620 at the convex portion 222 and the electron transport layer 630 at the concave portion 223, resulting in a short circuit, which reduces the efficiency of the device and even damages the product.

[0076] Furthermore, the display panel 600 further includes a second electrode layer 640 located on a side of the first electrode layer 220 away from the substrate 210. In this embodiment, the first electrode layer 220 is an anode and the second electrode layer 640 is a cathode. In other words, the display panel 600 of this embodiment is a positive structure.

[0077] Furthermore, the display panel 600 further includes a hole injection layer 650, an electron blocking layer 660, a hole blocking layer 670 and an electron injection layer 680. The hole injection layer 650 is located between the anode and the hole transport layer 620, the electron blocking layer 660 is located between the hole transport layer 620 and the light-emitting layer 610, the hole blocking layer 670 is located between the light-emitting layer 610 and the electron transport layer 630, and the electron injection layer 680 is located between the electron transport layer 630 and the cathode. In the display panel 600 of the present invention, the hole injection layer 650, the electron blocking layer 660, the hole blocking layer 670 and the electron injection layer 680 can all be commonly used material layers in the art.

[0078] Furthermore, the height difference between the convex portion 222 and the concave portion 223 of the concave-convex structure 221 is smaller than the sum of the thicknesses of the electron blocking layer 660, the light-emitting layer 610 and the hole blocking layer 670. This is beneficial for increasing the spatial volume of the light-emitting layer 610 while avoiding the contact between the hole transport layer 620 at the convex portion 222 and the electron transport layer 630 at the concave portion 223, thereby reducing the efficiency of the device and even damaging the product.

[0079] Please combine Figure 3and Figure 8 The display panel 700 of the third embodiment of the present invention includes the above-mentioned array substrate 300. On the basis of the array substrate 300, the display panel 700 also includes a light-emitting layer 710, and the light-emitting layer 710 contains a host material (Host), a phosphorescent material (sensitization-dopant) and a fluorescent material (Final-dopant); preferably, the host material includes a two-component material of p-type (transporting holes) and n-type (transporting electrons). When the host material is a two-component material, it is beneficial to maximize the utilization rate of excitons. It should be noted that the host material is not limited to a two-component material, but can also be a single-component material.

[0080] Furthermore, the display panel 700 further includes a hole transport layer 720 and an electron transport layer 730 located on both sides of the light emitting layer 710, and the height difference between the convex portion 322 and the concave portion 323 of the concave-convex structure 321 is smaller than the distance between the hole transport layer 720 and the electron transport layer 730. This is beneficial for increasing the spatial volume of the light emitting layer 710 while avoiding the contact between the hole transport layer 720 at the convex portion 322 and the electron transport layer 730 at the concave portion 323, resulting in a short circuit, which reduces the efficiency of the device and even damages the product.

[0081] Furthermore, the display panel 700 further includes a second electrode layer 740, which is located on a side of the first electrode layer 320 away from the substrate 310. In this embodiment, the first electrode layer 320 is an anode, and the second electrode layer 740 is a cathode. In other words, the display panel 700 of this embodiment is a positive structure.

[0082] Furthermore, the display panel 700 further includes a hole injection layer 750, an electron blocking layer 760, a hole blocking layer 770 and an electron injection layer 780. The hole injection layer 750 is located between the anode and the hole transport layer 720, the electron blocking layer 760 is located between the hole transport layer 720 and the light-emitting layer 710, the hole blocking layer 770 is located between the light-emitting layer 710 and the electron transport layer 730, and the electron injection layer 780 is located between the electron transport layer 730 and the cathode. In the display panel 700 of the present invention, the hole injection layer 750, the electron blocking layer 760, the hole blocking layer 770 and the electron injection layer 780 can all be commonly used material layers in the art.

[0083] Furthermore, the height difference between the convex portion 322 and the concave portion 323 of the concave-convex structure 321 is less than the sum of the thicknesses of the electron blocking layer 760, the light-emitting layer 710 and the hole blocking layer 770. This is beneficial for increasing the spatial volume of the light-emitting layer 710 while avoiding the contact between the hole transport layer 720 at the convex portion 322 and the electron transport layer 730 at the concave portion 323, resulting in a short circuit, a reduction in device efficiency, and even damage to the product.

[0084] In the display panel of the technical solution of the present invention, since the surface of the flat layer has a plurality of concave-convex structures, the light-emitting layers prepared on the flat layer are not on the same horizontal plane. This, on the one hand, increases the spatial volume of the light-emitting layer, thereby reducing the concentration of excitons in the light-emitting layer, which can reduce the probability of DET energy transfer, reduce the exciton lifetime and thus improve the device lifetime; on the other hand, the excitons in the light-emitting layers at different heights can diffuse into the organic layer of the adjacent non-light-emitting layer, reducing the exciton concentration in the light-emitting layer, thereby reducing the probability of TTA / TPA (exciton-polaron quenching, triplet-polaron annihilation) and improving the device lifetime.

[0085] A display device according to one embodiment includes any one of the above array substrates or any one of the above display panels.

[0086] Furthermore, the display device includes but is not limited to a mobile phone, a tablet, a computer or a bracelet.

[0087] In the display device of the technical solution of the present invention, since the surface of the flat layer has a plurality of concave-convex structures, the light-emitting layers prepared on the flat layer are not on the same horizontal plane. This, on the one hand, increases the spatial volume of the light-emitting layer, thereby reducing the concentration of excitons in the light-emitting layer, which can reduce the probability of DET energy transfer, reduce the exciton lifetime and thus improve the device lifetime; on the other hand, the excitons in the light-emitting layers at different heights can diffuse into the organic layer of the adjacent non-light-emitting layer, reducing the exciton concentration in the light-emitting layer, thereby reducing the probability of TTA / TPA (exciton-polaron quenching, triplet-polaron annihilation) and improving the device lifetime.

[0088] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0089] The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. An array substrate, characterized in that: The array substrate has a pixel area, and the array substrate includes: substrate; and The first electrode layer is located at one side of the substrate. The surface of the first electrode layer away from the substrate has a plurality of concave-convex structures. The concave-convex structures are located in the pixel area and include a convex portion and a concave portion located at one side of the convex portion.

2. The array substrate according to claim 1, characterized in that: The cross-sectional shape of the protrusion along a direction perpendicular to the surface of the substrate is arc-shaped, trapezoidal, rectangular, conical or hemispherical.

3. The array substrate according to claim 1, characterized in that: The pixel area includes a blue pixel area, a red pixel area and a green pixel area. Along the direction perpendicular to the substrate, in the concave-convex structure located in the blue pixel area, the height difference between the convex part and the concave part is 1nm~50nm; in the concave-convex structure located in the red pixel area, the height difference between the convex part and the concave part is 1nm~130nm; in the concave-convex structure located in the green pixel area, the height difference between the convex part and the concave part is 1nm~70nm.

4. The array substrate according to claim 1, characterized in that: The array substrate also includes a flat layer, which is located between the substrate and the first electrode layer. The surface of the flat layer away from the substrate has a plurality of undulating structures, and the undulating structures are located corresponding to the pixel area. The undulating structures include a protrusion corresponding to the convex part and a depression located on one side of the protrusion and corresponding to the concave part.

5. The array substrate according to claim 1, characterized in that: The first electrode layer is an anode or a cathode; Preferably, the array substrate further includes: a driving circuit layer, located between the substrate and the planar layer; and The pixel definition layer is located on a side of the planar layer away from the substrate. A plurality of pixel openings are arranged on the pixel definition layer. The first electrode layer is located in the pixel openings.

6. A display panel, characterized in that: The display panel includes the array substrate according to any one of claims 1 to 5.

7. The display panel according to claim 6, characterized in that: The display panel further comprises a light-emitting layer located on a side of the first electrode away from the substrate, wherein the light-emitting layer contains a host material, a phosphorescent material and a fluorescent material; Preferably, the host material comprises a dual-component material of p-type and n-type.

8. The display panel according to claim 7, characterized in that: The display panel further includes a hole transport layer and an electron transport layer located on both sides of the light-emitting layer, and the height difference between the convex part and the concave part of the concave-convex structure is smaller than the distance between the hole transport layer and the electron transport layer; Preferably, the display panel further comprises a second electrode layer located on a side of the first electrode layer away from the substrate; Wherein, the first electrode layer is an anode and the second electrode layer is a cathode; or the first electrode layer is a cathode and the second electrode layer is an anode; Preferably, the display panel further includes: A hole injection layer, located between the anode and the hole transport layer; An electron blocking layer, located between the hole transport layer and the light emitting layer; a hole blocking layer, located between the light-emitting layer and the electron transport layer; and The electron injection layer is located between the electron transport layer and the cathode.

9. The display panel according to claim 7, characterized in that: The height difference between the convex part and the concave part of the concave-convex structure is smaller than the sum of the thicknesses of the electron blocking layer, the light emitting layer and the hole blocking layer.

10. A display device, characterized in that: An array substrate comprising any one of claims 1 to 5 plate.

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