Grid encoding and decoding method and device, grid data processing method and storage medium

Abstract

In one method, a bitstream of a grid is received, the grid comprising a plurality of vertices. When the grid is symmetric with respect to a plane of symmetry, a first set of vertices of the grid located on a first side of the plane of symmetry is reconstructed. A second set of vertices of the grid located on a second side of the plane of symmetry is reconstructed by reflecting the reconstructed first set of vertices with respect to the plane of symmetry.

Description

Cross - Reference to Related Applications

[0001] This application claims the priority benefit of U.S. Provisional Application No. 63 / 603,002, filed on November 27, 2023, entitled "Improved Symmetric Coding for Polygon Mesh Compression", and U.S. Patent Application No. 18 / 823,546, filed on September 3, 2024, entitled "Symmetric Coding for Polygon Mesh Compression". The entire disclosure of these two prior applications is incorporated herein by reference in its entirety. Technical Field

[0002] This disclosure describes aspects generally related to mesh encoding and decoding. Background Art

[0003] The background description provided herein is intended to present the background of the disclosure as a whole. Certain work of the currently named inventors (i.e., the work described in this background art section) and aspects of the present specification that are not prior art as of the filing date of the application have never been expressly or implicitly admitted to be prior art to the present disclosure.

[0004] Image / video compression can help transmit image / video data between different devices, storage spaces, and networks with a minimal decrease in quality. In some examples, video codec technology can compress video based on spatial and temporal redundancies. In one example, a video codec can use a technique called intra - prediction, which can compress an image based on spatial redundancy. For example, intra - prediction can use reference data from the current image being reconstructed to perform sample prediction. In another example, a video codec can use a technique called inter - prediction, which can compress an image based on temporal redundancy. For example, inter - prediction can use motion compensation to predict samples in the current image from a previously reconstructed image. Motion compensation can be indicated by a motion vector (MV).

[0005] Advances in three - dimensional (3D) capture, modeling, and rendering have facilitated the popularity of 3D content on various platforms and devices. For example, the first steps of a baby taken on one continent can be captured, and grandparents on another continent can see (and in some cases interact) and enjoy a fully immersive experience with the child. To achieve such a realistic effect, models are becoming increasingly complex, and the amount of data associated with the creation and use of these models has also increased significantly. 3D meshes are widely used to represent such immersive content. Summary of the Invention

[0006] Aspects of the present disclosure include bitstreams, methods, and apparatuses for mesh processing. In some examples, a mesh processing apparatus includes processing circuitry.

[0007] According to one aspect of the present disclosure, a mesh decoding method is provided. In this method, a bitstream of a mesh is received, the mesh including a plurality of vertices. When the mesh is symmetric with respect to a symmetry plane, a first set of vertices of the mesh located on a first side of the symmetry plane is reconstructed. A second set of vertices of the mesh located on a second side of the symmetry plane is reconstructed by reflecting the reconstructed first set of vertices with respect to the symmetry plane.

[0008] According to another aspect of the present disclosure, a mesh encoding method is provided. In this method, it is determined whether a mesh is symmetric with respect to a symmetry plane, the mesh including a plurality of vertices. When the mesh is symmetric with respect to the symmetry plane, the plurality of vertices are divided into a first set of vertices located on a first side of the symmetry plane, a second set of vertices located on a second side of the symmetry plane opposite to the first side, and a third set of vertices located on the symmetry plane. The second set of vertices is encoded by reflecting the first set of vertices with respect to the symmetry plane.

[0009] According to yet another aspect of the present disclosure, a method for processing mesh data is provided. In this method, a bitstream of the mesh data is processed according to format rules. The bitstream includes encoding information of the mesh, the mesh including a plurality of vertices. The format rules specify that when the mesh is symmetric with respect to a symmetry plane, a first set of vertices of the mesh located on a first side of the symmetry plane is reconstructed. The format rules specify that a second set of vertices of the mesh located on a second side of the symmetry plane is reconstructed by reflecting the reconstructed first set of vertices with respect to the symmetry plane.

[0010] Aspects of the present disclosure also provide a mesh encoding apparatus. The mesh encoding apparatus includes processing circuitry configured to implement any of the described mesh encoding methods.

[0011] Aspects of the present disclosure also provide a mesh decoding apparatus. The mesh decoding apparatus includes processing circuitry configured to implement any of the described mesh decoding methods.

[0012] Aspects of the present disclosure also provide a non-transitory computer-readable medium storing instructions that, when executed by a computer, cause the computer to execute any of the described mesh decoding methods, mesh encoding methods, and methods for processing mesh data.

[0013] The technical solutions of the present disclosure include aspects of more effectively compressing a polygon mesh with reflection symmetry. In one example, a bitstream of a mesh is received, and the mesh includes a plurality of vertices. When the mesh is symmetric with respect to a symmetry plane, a first set of vertices of the mesh located on a first side of the symmetry plane is reconstructed. A second set of vertices of the mesh located on a second side of the symmetry plane is reconstructed by reflecting the reconstructed first set of vertices with respect to the symmetry plane. By reflecting the reconstructed first set of vertices with respect to the symmetry plane, the coding information of the first set of vertices can be used to predict the second set of vertices. Therefore, the amount of coding information required to code the second set of vertices can be reduced, and the coding efficiency can be improved.

[0014] In a related example, when the mesh is symmetric with respect to a symmetry plane, all vertices in the mesh are mirrored. In the present disclosure, the vertices in the symmetry plane may not be mirrored. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The further features, properties, and various advantages of the disclosed subject matter will become more apparent from the following detailed description and the accompanying drawings, in which:

[0016] Figure 1 is a schematic diagram of an example of a block diagram of a communication system (100).

[0017] Figure 2 is a schematic diagram of an example of a block diagram of a decoder.

[0018] Figure 3 is a schematic diagram of an example of a block diagram of an encoder.

[0019] Figure 4 is an example of reflection symmetry in artificial and natural objects according to one aspect of the present disclosure.

[0020] Figure 5 is an example of dividing a symmetric mesh into a left mesh and a right mesh according to one aspect of the present disclosure.

[0021] Figure 6 shows a flowchart outlining the mesh decoding process according to some aspects of the present disclosure.

[0022] Figure 7 shows a flowchart outlining the mesh encoding process according to some aspects of the present disclosure.

[0023] Figure 8 is a schematic diagram of a computer system according to one aspect of the present disclosure. DETAILED DESCRIPTION

[0024] Figure 1FIG. 0 shows a block diagram of a video processing system (100) in some examples. The video processing system (100) is an example of an application of the disclosed subject matter and includes a video encoder and a video decoder in a streaming environment. The disclosed subject matter is equally applicable to other video-enabled applications, including, for example, video conferencing, digital TV, streaming services, storing compressed video on digital media including CDs, DVDs, memory sticks, etc.

[0025] The video processing system (100) includes an acquisition subsystem (113), which may include a video source (101). The video source (101) may include one or more images captured by a camera and / or generated by a computer. For example, a digital camera creates an uncompressed video image stream (102). In one example, the video image stream (102) includes samples taken by the digital camera. The video image stream (102) is depicted as a thick line as compared to the encoded video data (104) (or encoded video bitstream) to emphasize that it has a high data volume. The video image stream (102) may be processed by an electronic device (120) that includes a video encoder (103) coupled to the video source (101). The video encoder (103) may include hardware, software, or a combination of both to implement or carry out aspects of the disclosed subject matter described in more detail below. The encoded video data (104) (or encoded video bitstream) is depicted as a thin line as compared to the video image stream (102) to emphasize that it has a lower data volume. The encoded video data (104) may be stored on a streaming server (105) for future use. One or more streaming client subsystems, such as Figure 1 the client subsystem (106) and the client subsystem (108) in, may access the streaming server (105) to retrieve a copy (107) of the encoded video data (104) and a copy (109) of the encoded video data (104). The client subsystem (106) may include, for example, a video decoder (110) in an electronic device (130). The video decoder (110) decodes an incoming copy (107) of the encoded video data and produces an output video image stream (111) that can be rendered / presented on a display (112) (such as a display screen) or another presentation device (not depicted). In some streaming systems, the encoded video data (104), the copy (107) of the encoded video data, and the copy (109) of the encoded video data (such as a video bitstream) may be encoded according to certain video codec / compression standards. Examples of such standards include ITU-T Recommendation H.265. In one example, a video codec standard under development is informally referred to as Versatile Video Coding (VVC). The disclosed subject matter may be used in the context of the VVC standard.

[0026] It should be noted that the electronic device (120) and the electronic device (130) may include other components (not shown). For example, the electronic device (120) may include a video decoder (not shown), and the electronic device (130) may further include a video encoder (not shown).

[0027] Figure 2 An example of a block diagram of a video decoder (210) is shown. The video decoder (210) may be provided in the electronic device (230). The electronic device (230) may include a receiver (231) (e.g., a receiving circuit). The video decoder (210) may be used to replace Figure 1 the video decoder (110) in the example.

[0028] The receiver (231) may receive one or more encoded video sequences included in, for example, a bitstream to be decoded by the video decoder (210). In one aspect, one encoded video sequence is received at a time, where the decoding of each encoded video sequence is independent of the decoding of other encoded video sequences. The encoded video sequence may be received from a channel (201), which may be a hardware / software link to a storage device storing the encoded video data. The receiver (231) may receive the encoded video data as well as other data, e.g., encoded audio data and / or auxiliary data streams that may be forwarded to their respective using entities (not depicted). The receiver (231) may separate the encoded video sequence from the other data. To prevent network jitter, a buffer memory (215) may be coupled between the receiver (231) and the entropy decoder / parser (220) (hereinafter referred to as "parser (220)"). In some applications, the buffer memory (215) is part of the video decoder (210). In other cases, the buffer memory (215) may be provided outside the video decoder (210) (not labeled). In other cases, a buffer memory (not labeled) is provided outside the video decoder (210) to, for example, prevent network jitter, and another buffer memory (215) may be additionally configured inside the video decoder (210) to, for example, handle the broadcast timing. And when the receiver (231) receives data from a storage / forward device with sufficient bandwidth and controllability or from an isochronous synchronization network, it may not be necessary to configure the buffer memory (215), or the buffer memory may be made smaller. Of course, for use on a service packet network such as the Internet, a buffer memory (215) may be required, which may be relatively large and may have an adaptive size, and may be at least partially implemented in the operating system or a similar element (not labeled) outside the video decoder (210).

[0029] The video decoder (210) may include a parser (220) to reconstruct symbols (221) from an encoded video sequence. The categories of these symbols include information for managing the operation of the video decoder (210), and potential information for controlling a rendering device such as a rendering device (212) (e.g., a display screen), which is not part of the electronic device (230) but may be coupled to the electronic device (230), as Figure 2 shown. The control information for the rendering device may be a Supplemental Enhancement Information (SEI) message or a parameter set fragment (not labeled) of Video Usability Information (VUI). The parser (220) may perform parsing / entropy decoding on the received encoded video sequence. The encoding of the encoded video sequence may be performed according to a video coding technology or standard and may follow various principles, including variable length coding, Huffman coding, arithmetic coding with or without context sensitivity, and so on. The parser (220) may extract subgroup parameter sets for at least one subgroup of pixels in the video decoder from the encoded video sequence based on at least one parameter corresponding to a group. The subgroups may include Groups of Picture (GOP), pictures, tiles, slices, macroblocks, Coding Units (CU), blocks, Transform Units (TU), Prediction Units (PU), and so on. The parser (220) may also extract information such as transform coefficients, quantizer parameter values, motion vectors, etc. from the encoded video sequence.

[0030] The parser (220) may perform entropy decoding / parsing operations on the video sequence received from the buffer memory (215) to create symbols (221).

[0031] Depending on the type of the encoded video image or a part of the encoded video image (such as: inter-frame images and intra-frame images, inter-frame blocks and intra-frame blocks) and other factors, the reconstruction of the symbols (221) may involve multiple different units. Which units are involved and the way they are involved may be controlled by subgroup control information parsed by the parser (220) from the encoded video sequence. For the sake of brevity, such subgroup control information flows between the parser (220) and the multiple units below are not depicted.

[0032] In addition to the functional blocks already mentioned, the video decoder (210) can conceptually be subdivided into several functional units as described below. In practical implementations operating under commercial constraints, many of these units interact closely with each other and can be at least partially integrated with each other. However, for the purpose of describing the disclosed subject matter, it is appropriate to conceptually subdivide into the functional units below.

[0033] The first unit is the scaler / inverse transform unit (251). The scaler / inverse transform unit (251) receives the quantized transform coefficients as symbols (221) and control information from the parser (220), including which transform mode, block size, quantization factor, quantization scaling matrix, etc. to use. The scaler / inverse transform unit (251) can output blocks including sample values, and these blocks can be input into the aggregator (255).

[0034] In some cases, the output samples of the scaler / inverse transform unit (251) can belong to intra-coded blocks. Intra-coded blocks do not use predictive information from previously reconstructed images, but can use predictive information from previously reconstructed parts of the current image. Such predictive information can be provided by the intra-image prediction unit (252). In some cases, the intra-image prediction unit (252) generates a block with the same size and shape as the block being reconstructed using the surrounding reconstructed information extracted from the current image buffer (258). For example, the current image buffer (258) buffers the partially reconstructed current image and / or the fully reconstructed current image. In some cases, the aggregator (255) adds the predictive information generated by the intra-prediction unit (252) to the output sample information provided by the scaler / inverse transform unit (251) based on each sample.

[0035] In other cases, the output samples of the scaler / inverse transform unit (251) can belong to inter-coded and potentially motion-compensated blocks. In this case, the motion compensation prediction unit (253) can access the reference image memory (257) to extract samples for prediction. After motion compensation of the extracted samples according to the symbols (221) belonging to the block, these samples can be added by the aggregator (255) to the output of the scaler / inverse transform unit (251) (which is called the residual sample or residual signal in this case), thereby generating output sample information. The address in the reference image memory (257) from which the motion compensation prediction unit (253) extracts the prediction samples can be controlled by a motion vector, and the motion vector is in the form of a symbol (221) for use by the motion compensation prediction unit (253), and the symbol (221) can have, for example, an X component, a Y component, and a reference image component. Motion compensation can also include interpolation of sample values extracted from the reference image memory (257) when using sub-sample accurate motion vectors, a motion vector prediction mechanism, and so on.

[0036] The output samples of the aggregator (255) can be used in the loop filter unit (256) for various loop filtering techniques. Video compression techniques can include in-loop filter techniques that are controlled by parameters included in the encoded video sequence (also referred to as the encoded video bitstream), and the parameters can be used in the loop filter unit (256) as symbols (221) from the parser (220). Video compression can also be responsive to meta-information obtained during decoding of a previous (in decoding order) portion of the encoded image or encoded video sequence, and responsive to previously reconstructed and loop-filtered sample values.

[0037] The output of the loop filter unit (256) can be a sample stream that can be output to the rendering device (212) and stored in the reference image memory (257) for subsequent inter-frame image prediction.

[0038] Once fully reconstructed, some encoded images can be used as reference images for future prediction. For example, once the encoded image corresponding to the current image is fully reconstructed and the encoded image is identified (by, for example, the parser (220)) as a reference image, the current image buffer (258) can become part of the reference image memory (257), and a new current image buffer can be reallocated before starting to reconstruct subsequent encoded images.

[0039] The video decoder (210) can perform decoding operations according to a predetermined video compression technique or a standard such as the ITU-T Recommendation H.265 standard. The encoded video sequence can conform to the syntax specified by the video compression technique or standard used in the sense that the encoded video sequence follows the syntax of the video compression technique or standard and the meaning of the profile recorded in the video compression technique or standard. Specifically, the profile can select certain tools from all the tools available in the video compression technique or standard as the only tools available at that profile. For compliance, it is also required that the complexity of the encoded video sequence be within the range defined by the level of the video compression technique or standard. In some cases, the level limits the maximum image size, maximum frame rate, maximum reconstruction sampling rate (measured, for example, in millions of samples per second), maximum reference image size, etc. In some cases, the limits set by the level can be further defined by the Hypothetical Reference Decoder (HRD) specification and the metadata of the HRD buffer management signaled in the encoded video sequence.

[0040] In one aspect, a receiver (231) may receive additional (redundant) data along with the encoded video. The additional data may be included as part of the encoded video sequence. The additional data may be used by a video decoder (210) to properly decode the data and / or more accurately reconstruct the original video data. The additional data may be in the form of, for example, temporal, spatial, or signal noise ratio (SNR) enhancement layers, redundant slices, redundant pictures, forward error correction codes, and the like.

[0041] Figure 3 An exemplary block diagram of a video encoder (303) is shown. The video encoder (303) is disposed in an electronic device (320). The electronic device (320) includes a transmitter (340) (e.g., a transmission circuit). The video encoder (303) may be used to replace Figure 1 the video encoder (103) in the example.

[0042] The video encoder (303) may receive video samples from a video source (301) (which is not Figure 3 part of the electronic device (320) in the example), and the video source may capture video images to be encoded by the video encoder (303). In another example, the video source (301) is part of the electronic device (320).

[0043] The video source (301) may provide a source video sequence in the form of a digital video sample stream to be encoded by the video encoder (303), and the digital video sample stream may have any suitable bit depth (e.g., 8 bits, 10 bits, 12 bits...), any color space (e.g., BT.601 Y CrCb, RGB...), and any suitable sampling structure (e.g., Y CrCb 4:2:0, YCrCb 4:4:4). In a media service system, the video source (301) may be a storage device for storing previously prepared videos. In a video conferencing system, the video source (301) may be a camera that captures local image information as a video sequence. The video data may be provided as a plurality of individual pictures that, when viewed in sequence, are given motion. The pictures themselves may be constructed as spatial pixel arrays, where each pixel may include one or more samples depending on the sampling structure, color space, etc. used. The following focuses on the description of samples.

[0044] According to one aspect, a video encoder (303) may encode and compress images of a source video sequence into an encoded video sequence (343) in real time or under any other desired time constraint. Implementing an appropriate encoding speed is a function of a controller (350). In some aspects, the controller 350 controls and is functionally coupled to other functional units as described below. For simplicity, the couplings are not depicted in the figure. Parameters set by the controller (350) may include rate control related parameters (picture skipping, quantizer, λ value of rate-distortion optimization techniques, etc.), picture size, GOP layout, maximum motion vector search range, etc. The controller (350) may be used with other suitable functions that relate to the video encoder (303) optimized for a certain system design.

[0045] In some aspects, the video encoder (303) operates in an encoding loop. As a simple description, in one example, the encoding loop may include a source encoder (330) (e.g., responsible for creating symbols, such as a symbol stream, based on an input image to be encoded and reference images) and a (local) decoder (333) embedded in the video encoder (303). The decoder (333) reconstructs the symbols in a manner similar to how a (remote) decoder creates sample data to create sample data. The reconstructed sample stream (sample data) is input into a reference image memory (334). Since the decoding of the symbol stream results in a bit-exact result regardless of the decoder location (local or remote), the content in the reference image memory (334) is also bit-exact between the local encoder and the remote encoder. In other words, the reference image samples “seen” by the prediction part of the encoder are exactly the same as the sample values that the decoder will “see” when using the prediction during decoding. This basic principle of reference image synchronization (and the drift that occurs, for example, when synchronization cannot be maintained due to channel errors) is also used in some related technologies.

[0046] The operation of the “local” decoder (333) may be the same as that of a “remote” decoder such as the video decoder (210) described in detail above in conjunction with Figure 2 However, briefly referring additionally to Figure 2 , when symbols are available and the entropy encoder (345) and parser (220) can encode / decode the symbols losslessly into an encoded video sequence, the entropy decoding part of the video decoder (210), including the buffer memory (215) and the parser (220), may not be fully implementable in the local decoder (333).

[0047] In one aspect, decoder techniques other than parsing / entropy decoding that exist in a decoder exist in a corresponding encoder in the same or substantially the same functional form. Thus, the disclosed subject matter focuses on decoder operations. The description of encoder techniques can be simplified because the encoder techniques are inverse to the decoder techniques described in detail. More detailed descriptions in certain areas are provided below.

[0048] During operation, in some examples, a source encoder (330) may perform motion-compensated predictive coding. Referencing one or more previously encoded images in a video sequence designated as "reference images", this motion-compensated predictive coding performs predictive coding on an input image. In this way, an encoding engine (332) encodes the difference between a pixel block of the input image and a pixel block of a reference image, which reference image may be selected as a prediction reference for the input image.

[0049] A local video decoder (333) may decode encoded video data of an image that may be designated as a reference image based on symbols created by the source encoder (330). The operation of the encoding engine (332) may advantageously be a lossy process. When the encoded video data may be decoded at a video decoder ( Figure 3 not shown), the reconstructed video sequence may generally be a copy of the source video sequence with some errors. The local video decoder (333) replicates the decoding process that may be performed by the video decoder on the reference image and may cause the reconstructed reference image to be stored in a reference image memory (334). In this way, the video encoder (303) may locally store a copy of the reconstructed reference image that has common content (in the absence of transmission errors) with the reconstructed reference image to be obtained by a remote video decoder.

[0050] A predictor (335) may perform a prediction search for the encoding engine (332). That is, for a new image (or grid) to be encoded, the predictor (335) may search the reference image memory (334) for sample data (as candidate reference pixel blocks) or certain metadata, such as reference image motion vectors, block shapes, etc., that may serve as an appropriate prediction reference for the new image. The predictor (335) may operate on a per-pixel block basis of sample blocks to find a suitable prediction reference. In some cases, as determined from the search results obtained by the predictor (335), the input image may have prediction references taken from multiple reference images stored in the reference image memory (334).

[0051] A controller (350) may manage the encoding operations of the source encoder (330), including, for example, setting parameters and subgroup parameters for encoding video data.

[0052] The outputs of all the above functional units can be entropy - encoded in an entropy encoder (345). The entropy encoder (345) applies lossless compression to the symbols generated by various functional units according to techniques such as Huffman coding, variable - length coding, arithmetic coding, etc., thereby converting these symbols into an encoded video sequence.

[0053] The transmitter (340) can buffer the encoded video sequence created by the entropy encoder (345) to prepare for transmission over a communication channel (360), which can be a hardware / software link to a storage device that will store the encoded video data. The transmitter (340) can merge the encoded video data from the video encoder (303) with other data to be transmitted, such as encoded audio data and / or auxiliary data streams (source not shown).

[0054] The controller (350) can manage the operation of the video encoder (303). During encoding, the controller (350) can assign a certain encoded image type to each encoded image, but this may affect the encoding technique applicable to the corresponding image. For example, an image can typically be assigned to any of the following image types:

[0055] An intra - frame image (I - image) can be encoded and decoded without using any other image in the sequence as a prediction source. Some video codecs allow different types of intra - frame images, including, for example, Independent Decoder Refresh (IDR) images.

[0056] A predictive image (P - image) can be encoded and decoded using intra - frame prediction or inter - frame prediction, which uses a motion vector and a reference index to predict the sample values of each block.

[0057] A bi - directional predictive image (B - image) can be encoded and decoded using intra - frame prediction or inter - frame prediction, which uses two motion vectors and reference indexes to predict the sample values of each block. Similarly, multiple predictive images can use more than two reference images and associated metadata for the reconstruction of a single block.

[0058] The source image can typically be spatially subdivided into multiple sample blocks (e.g., each sample block includes 4×4, 8×8, 4×8, or 16×16 samples), and encoded block by block. These blocks can be prediction-encoded with reference to other (already encoded) blocks, which can be determined by the coding assignment applied to the corresponding image of the block. For example, the blocks of an I image can be non-prediction-encoded, or these blocks can be prediction-encoded with reference to already encoded blocks of the same image (spatial prediction or intra-frame prediction). The pixel blocks of a P image can be prediction-encoded with reference to a previously encoded reference image through spatial prediction or through temporal prediction. The blocks of a B image can be prediction-encoded with reference to one or two previously encoded reference images through spatial prediction or through temporal prediction.

[0059] The video encoder (303) can perform encoding operations according to a predetermined video coding technique or standard such as ITU-T Recommendation H.265. In operation, the video encoder (303) can perform various compression operations, including prediction-encoding operations that utilize the temporal and spatial redundancies in the input video sequence. Thus, the encoded video data can conform to the syntax specified by the video coding technique or standard being used.

[0060] In one aspect, the transmitter (340) can transmit additional data when transmitting the encoded video. The source encoder (330) can include such data as part of the encoded video sequence. The additional data can include temporal / spatial / SNR enhancement layers, other forms of redundant data such as redundant images and slices, SEI messages, VUI parameter set fragments, and the like.

[0061] The captured video can be a plurality of source images (video images) in a time series. Intra-frame image prediction (often simplified to intra-frame prediction) utilizes the spatial correlation within a given image, while inter-frame image prediction utilizes the (temporal or other) correlation between images. In one example, the particular image being encoded / decoded is segmented into blocks, and the particular image being encoded / decoded is referred to as the current image. When a block in the current image is similar to a reference block in a reference image that has been previously encoded and is still buffered in the video, the block in the current image can be encoded with a vector called a motion vector. The motion vector points to the reference block in the reference image, and in the case of using multiple reference images, the motion vector can have a third dimension identifying the reference image.

[0062] In some aspects, bidirectional prediction techniques can be used in inter-frame image prediction. According to bidirectional prediction techniques, two reference images are used, such as a first reference image and a second reference image that are both before the current image in the video in decoding order (but can be past and future respectively in display order). A block in the current image can be encoded by a first motion vector pointing to a first reference block in the first reference image and a second motion vector pointing to a second reference block in the second reference image. The block can be predicted by a combination of the first reference block and the second reference block.

[0063] In addition, merge mode techniques can be used in inter-frame image prediction to improve encoding and decoding efficiency.

[0064] According to some aspects of the present disclosure, predictions such as inter-frame image prediction and intra-frame image prediction are performed on a block-by-block basis, such as polygon blocks or triangle blocks. For example, according to the HEVC standard, an image in a video image sequence is segmented into coding tree units (CTUs) for compression, and the CTUs in the image have the same size, such as 64×64 pixels, 32×32 pixels, or 16×16 pixels. Generally, a CTU includes three coding tree blocks (CTBs), which are one luminance CTB and two chrominance CTBs. Each CTU can be recursively split into one or more CUs in a quadtree. For example, a 64×64 pixel CTU can be split into a 64×64 pixel CU, or 4 32×32 pixel CUs, or 16 16×16 pixel CUs. In one example, each CU is analyzed to determine the prediction type for that CU, such as an inter-frame prediction type or an intra-frame prediction type. Depending on temporal and / or spatial predictability, the CU is split into one or more PUs. Generally, each PU includes a luminance prediction block (PB) and two chrominance PBs. In one aspect, the prediction operation in encoding / decoding (encoding / decoding) is performed on a prediction block basis. Taking the luminance prediction block as the prediction block as an example, the prediction block includes a matrix of pixel values (e.g., luminance values), such as 8×8 pixels, 16×16 pixels, 8×16 pixels, 16×8 pixels, etc.

[0065] Note that any suitable technology can be used to implement video encoder (103) and video encoder (303), as well as video decoder (110) and video decoder (210). In one aspect, one or more integrated circuits can be used to implement video encoder (103) and video encoder (303), as well as video decoder (110) and video decoder (210). In another aspect, one or more processors executing software instructions can be used to implement video encoder (103) and video encoder (303), as well as video decoder (110) and video decoder (210).

[0066] Aspects of the present disclosure include methods and systems directed to improving the compression of polygon meshes having reflection symmetry.

[0067] A mesh can include several polygons for describing the surface of a volumetric object. Each polygon can be defined by vertices of the mesh in 3D space and information about how the vertices are connected (referred to as connectivity information). In one aspect, vertex attributes such as color, normal, displacement, etc. can be associated with the mesh vertices. By leveraging mapping information that parameterizes the mesh using two-dimensional (2D) attribute maps, the attributes can also be associated with the surface of the mesh. Such mapping can be described by a set of parametric coordinates, which are referred to as UV coordinates or texture coordinates and are associated with the mesh vertices. 2D attribute maps can be used to store high-resolution attribute information such as texture, normal, displacement, etc. Such information can be used for various purposes such as texture mapping, shading, and mesh reconstruction, etc.

[0068] Meshes created from 3D scans or digital content creation tools can exhibit symmetry, which is a property of a geometric object when an operation maps the geometric object onto itself. The types of symmetry can include reflection, translation, rotation, and combinations of reflection, translation, and rotation. Among various symmetries, reflection symmetry or bilateral symmetry is one of the most common symmetries in both the biological and non-biological worlds. For example, as Figure 4 shown, reflection symmetry is manifested in the biological world such as a lion (402), a butterfly (404), and a human face (406). Reflection symmetry is also manifested in the non-biological world such as a sofa (408), a table (410), and a car (412).

[0069] Many meshes have reflection symmetry and require effective methods to compress these meshes having reflection symmetry.

[0070] In the present disclosure, methods for more effectively compressing polygon meshes having reflection symmetry are proposed. These methods can be applied individually or in any form of combination to mesh compression.

[0071] In one aspect, for an input mesh M, it is evaluated whether the input mesh M has reflection symmetry. To measure whether the input mesh M has reflection symmetry, the symmetry of the input mesh M can be evaluated through a similarity metric, which is a comparison between the input mesh M and the mirror image of the input mesh M through a plane (or symmetry plane). If the symmetry of the input mesh M has been detected and the symmetry plane p: ax + by + cz = d has been determined, the input mesh M can be divided into two halves: the left mesh M L and the right mesh M R . For example, as Figure 5 shown, the mesh (500) is divided into a left mesh (502) and a right mesh (504) by the symmetry plane p. A given vertex v can be classified into three vertex sets according to the relative position of the vertex v with respect to the symmetry plane p: left V L (left vertex set), right V R (right vertex set), and V on the symmetry plane P (vertex set on the symmetry plane). For example, as Figure 5 shown, vertices B and F are included in left V L , vertices C and D are included in right V R , and vertices A and E are included in V P .

[0072] Similarly, the faces of the input mesh M can be classified into left F L (left face set), right F R (right face set), and the faces F that intersect with the plane p P . For an intersecting face (e.g., the face (506) in Figure 5 ), a vertex (e.g., vertex X in Figure 5 ) can be introduced at the intersection of the intersecting face and the symmetry plane p, and these intersecting faces can be further triangulated and added to the left or right set to eliminate the faces that cross the plane. For example, as Figure 5 shown, vertex X divides the face (506) into a left part and a right part. The left part of the face (506) is included in left F L , and the right part of the face (506) is included in right F R .

[0073] In one example, to determine if a mesh is symmetric, a symmetry plane can be defined first. For example, the symmetry plane is defined as ax + by + cz = d. Additionally, for each vertex (or point) in the mesh, the perpendicular distance from the vertex to the symmetry plane is calculated. Then, the vertex is reflected across the symmetry plane by moving the vertex the perpendicular distance in the opposite direction along the normal of the symmetry plane. The reflected point (or vertex) is the symmetric counterpart of the vertex. For each reflected point (or vertex), a closest point (or vertex) in the mesh is defined. If the distance between the reflected point and the closest point corresponding to the reflected point is within a specified tolerance (e.g., within a threshold range), the reflected point and the corresponding point are considered symmetric.

[0074] In one aspect, when the input mesh M is divided into a left mesh M L and a right mesh M R , encoding / decoding can be performed on the left mesh M L first. On the encoder side, the left mesh M L is mirrored (or reflected) with respect to the symmetry plane p to generate a mirrored mesh. On the decoder side, the reconstructed (or decoded) left mesh is mirrored (or reflected) with respect to the symmetry plane p to generate a mirrored mesh. Then the right mesh M L is predicted based on the reflected mesh. For example, on the encoder side, subsequently the mirrored mesh is compared with the right mesh M R to generate a displacement to fit (or predict) M R . The displacement can also be signaled to the decoder side. The decoder can reconstruct the right mesh M R based on the reflected mesh and the displacement. The fitted (or reconstructed) right mesh and the decoded left mesh can be glued (or combined) to form a watertight mesh. The watertight mesh can be defined as the reconstructed mesh of the input mesh M.

[0075] In one example, to mirror M L , each vertex v in V L is reflected with respect to the symmetry plane p to generate a reflected vertex v' such that the vector from the vertex v to the reflected vertex v' is perpendicular to the symmetry plane p.

[0076] In one aspect, for vertices V P in the symmetry plane p P , each vertex in V P can be considered as its own mirrored (reflected) vertex. Therefore, it is not necessary to glue (or combine) the vertices V P in the symmetry plane to form a watertight mesh. In one example, on the encoder side, the corresponding vertices are encoded by encoding the original values of each vertex in vertices V PThe encoded value of each vertex in

[0077] In one aspect, the vertices in V P can be regarded as the vertices in a set of meshes, such as V L . Therefore, the vertices in V P can also be mirrored (or reflected) with respect to the symmetry plane p. When the mirrored (reflected) vertices have the same 3D coordinates as the original vertices (e.g., the vertices in V P ), the vertices located on the symmetry plane p can be detected. The vertices in V P and the mirrored vertices in the symmetric position (or symmetry plane) can be further merged. In one aspect, on the encoder side, the vertices in V P can be encoded based on the merged vertices. For example, the vertices in V P are encoded by encoding the values of the merged vertices. In one aspect, on the decoder side, the vertices in V P can be reconstructed based on the merged vertices. For example, the vertices in V P are reconstructed (or decoded) based on the encoded values of the merged vertices received in the bitstream.

[0078] Figure 6 FIG. shows a flowchart of an overview process (600) according to one aspect of the present disclosure. The process (600) can be used in a video decoder. In various aspects, the process (600) is executed by a processing circuit, such as a processing circuit that executes the functions of the video decoder (110), a processing circuit that executes the functions of the video decoder (210), etc. In some aspects, the process (600) is implemented by software instructions, so when the processing circuit executes the software instructions, the processing circuit executes the process (600). The process starts at (S601) and proceeds to (S610).

[0079] In step (S610), a bitstream of a mesh is received, and the mesh includes a plurality of vertices.

[0080] In step (S620), when the mesh is symmetric with respect to a symmetry plane, a first set of vertices of the mesh on the first side of the symmetry plane is reconstructed.

[0081] In step (S630), a second set of vertices of the mesh on the second side of the symmetry plane is reconstructed by reflecting the reconstructed first set of vertices with respect to the symmetry plane.

[0082] Then, the process proceeds to (S699) and terminates.

[0083] The process (600) can be appropriately adjusted. Steps in the process (600) can be modified and / or omitted. Additional steps can be added. Any suitable order of implementation can be used.

[0084] Figure 7 FIG. shows a flowchart outlining a process (700) according to one aspect of the present disclosure. The process (700) can be used in a video encoder. In various aspects, the process (700) is executed by processing circuitry, such as processing circuitry that performs the functions of video encoder (103), processing circuitry that performs the functions of video encoder (303), etc. In some aspects, the process (700) is implemented as software instructions, so that when the processing circuitry executes the software instructions, the processing circuitry performs the process (700). The process starts at (S701) and proceeds to (S710).

[0085] In step (S710), it is determined whether a mesh is symmetric with respect to a symmetry plane, where the mesh includes a plurality of vertices.

[0086] In step (S720), when the mesh is symmetric with respect to the symmetry plane, the plurality of vertices are divided into a first set of vertices located on a first side of the symmetry plane, a second set of vertices located on a second side of the symmetry plane opposite the first side, and a third set of vertices located on the symmetry plane.

[0087] In step (S730), the second set of vertices is encoded by reflecting the first set of vertices with respect to the symmetry plane.

[0088] Then, the process proceeds to (S799) and terminates.

[0089] The process (700) can be appropriately adjusted. Steps in the process (700) can be modified and / or omitted. Additional steps can be added. Any suitable order of implementation can be used.

[0090] In one aspect, a method for processing mesh data includes processing a bitstream of mesh data according to format rules. For example, the bitstream can be a bitstream decoded / encoded by any of the decoding and / or encoding methods described herein. The format rules can specify one or more constraints of the bitstream and / or one or more processes to be performed by the decoder and / or encoder.

[0091] In one example, a bitstream of mesh data is processed according to format rules. The bitstream includes encoded information of a mesh that includes a plurality of vertices. The format rules specify that when the mesh is symmetric with respect to a symmetry plane, a first set of vertices of the mesh located on a first side of the symmetry plane is reconstructed. The format rules specify that a second set of vertices of the mesh located on a second side of the symmetry plane is reconstructed by reflecting the reconstructed first set of vertices with respect to the symmetry plane.

[0092] The above technology can be implemented as computer software by computer-readable instructions and physically stored in one or more computer-readable media. For example, Figure 8 FIG. shows a computer system (800) that is suitable for implementing certain aspects of the disclosed subject matter.

[0093] The computer software can be encoded in any suitable machine code or computer language, and the code including instructions is created through mechanisms such as assembly, compilation, and linking. The instructions can be directly executed by one or more computer central processing units (CPUs), graphics processing units (GPUs), etc., or executed through decoding, microcode, etc.

[0094] The instructions can be executed on various types of computers or their components, including, for example, personal computers, tablets, servers, smartphones, gaming devices, Internet of Things devices, etc.

[0095] Figure 8 The components shown for the computer system (800) are merely examples and are not intended to impose any limitation on the scope of use or functionality of the computer software for implementing aspects of the present disclosure. Nor should the configuration of the components be construed as having any dependence on or requirement for any one component or combination thereof shown in the example aspects of the computer system (800).

[0096] The computer system (800) may include certain human-machine interface input devices. Such human-machine interface input devices can respond to inputs from one or more human users through tactile inputs (such as keyboard input, swiping, data glove movement), audio inputs (such as sound, applause), visual inputs (such as gestures), and olfactory inputs (not shown). The human-machine interface device can also be used to capture certain media, which does not have to be directly related to conscious human input, such as audio (e.g., speech, music, ambient sound), images (e.g., scanned images, photographic images obtained from a still camera), and videos (e.g., two-dimensional videos, three-dimensional videos including stereoscopic videos).

[0097] The human-machine interface input device may include one or more of the following (only one of each is shown): keyboard (801), mouse (802), touchpad (803), touch screen (810), data glove (not shown), joystick (805), microphone (806), scanner (807), camera (808).

[0098] The computer system (800) may also include certain human-machine interface output devices. Such human-machine interface output devices can stimulate the senses of one or more human users through, for example, tactile output, sound, light, and smell / taste. Such human-machine interface output devices may include tactile output devices (e.g., tactile feedback through a touch screen (810), a data glove (not shown), or a joystick (805), but there may also be tactile feedback devices that do not serve as input devices), audio output devices (e.g., speakers (809), headphones (not shown)), visual output devices (e.g., a screen (810) including a cathode ray tube (CRT) screen, a liquid crystal (LCD) screen, a plasma screen, an organic light emitting diode (OLED) screen, each of which may or may not have touch screen input functionality, each of which may or may not have tactile feedback functionality - some of which may output two-dimensional visual output or output above three dimensions through means such as stereoscopic picture output; virtual reality glasses (not shown), holographic displays, and a smoke box (not shown)), and a printer (not shown).

[0099] The computer system (800) may also include human-accessible storage devices and their associated media, such as optical media including high-density read-only / rewritable compact discs (CD / DVD ROM / RW) (820) with CD / DVD or similar media (821), thumb drives (822), removable hard disk drives, or solid state drives (823), traditional magnetic media such as tapes and floppy disks (not shown), dedicated devices based on ROM / ASIC / PLD such as a security software protector (not shown), and so on.

[0100] Those skilled in the art should also understand that the term "computer-readable medium" used in connection with the disclosed subject matter does not include a transmission medium, a carrier wave, or other transient signals.

[0101] The computer system (800) may also include an interface (854) to one or more communication networks (855). For example, the network may be wireless, wired, optical. The network may also be a local area network, a wide area network, a metropolitan area network, a vehicular network, and an industrial network, a real-time network, a delay-tolerant network, etc. The network also includes local area networks (such as Ethernet, wireless local area network, etc.), cellular networks (including GSM, 3G, 4G, 5G, LTE, etc.), television wired or wireless wide area digital networks (including cable television, satellite television, and terrestrial broadcast television), vehicular and industrial networks (including CANBus), etc. Some networks typically require an external network interface adapter for connection to certain common data ports or peripheral buses (849) (e.g., the USB port of the computer system (800)); other networks are typically integrated into the core of the computer system (800) by connecting to the system bus as described below (e.g., an Ethernet interface is integrated into a PC computer system or a cellular network interface is integrated into a smart phone computer system). By using any of these networks, the computer system (800) can communicate with other entities. This communication can be one-way, only for receiving (e.g., broadcast television), one-way only for sending (e.g., CAN bus to certain CAN bus devices), or two-way, e.g., via a local or wide area digital network to other computer systems. Each of the above-mentioned networks and network interfaces can use certain protocols and protocol stacks.

[0102] The above-mentioned human-machine interface device, human-accessible storage device, and network interface can be connected to the core (840) of the computer system (800).

[0103] The core (840) may include one or more central processing units (CPUs) (841), a graphics processing unit (GPU) (842), a dedicated programmable processing unit in the form of a field-programmable gate array (FPGA) (843), a hardware accelerator (844) for specific tasks, a graphics adapter (850), etc. These devices, as well as read-only memory (ROM) (845), random access memory (846), internal mass storage (e.g., internal non-user-accessible hard disk drive, solid-state drive (SSD), etc.) (847), etc. can be connected via a system bus (848). In some computer systems, the system bus (848) can be accessed in the form of one or more physical plugs for expansion with additional central processing units, graphics processing units, etc. Peripheral devices can be directly attached to or attached to the system bus (848) of the core via a peripheral bus (849). In one example, the screen (810) can be connected to the graphics adapter (850). The architecture of the peripheral bus includes an external controller interface PCI, a universal serial bus USB, etc.

[0104] The CPU (841), GPU (842), FPGA (843), and accelerator (844) can execute certain instructions that, when combined, can form the above computer code. The computer code can be stored in the ROM (845) or RAM (846). Transitional data can also be stored in the RAM (846), while permanent data can be stored in, for example, the internal mass storage (847). Fast storage and retrieval of any memory device can be achieved by using a cache memory, which can be closely associated with one or more CPUs (841), GPUs (842), mass storage (847), ROM (845), RAM (846), etc.

[0105] The computer-readable medium can have computer code for performing various computer-implemented operations. The medium and the computer code can be specially designed and constructed for the purposes of this disclosure or can be of the kind well-known and available to those skilled in the computer software arts.

[0106] By way of example and not limitation, a computer system having an architecture (800), particularly a core (840), can provide the functionality of a processor (including a CPU, GPU, FPGA, accelerator, etc.) to execute software contained in one or more tangible computer-readable media. Such computer-readable media can be media associated with the above-described user-accessible mass storage, as well as specific memories of the non-volatile core (840), such as the core internal mass storage (847) or ROM (845). Software for implementing various aspects of this disclosure can be stored in such devices and executed by the core (840). Depending on the particular needs, the computer-readable medium can include one or more storage devices or chips. The software can cause the core (840), particularly the processors therein (including the CPU, GPU, FPGA, etc.), to execute the specific processes or specific portions of specific processes described herein, including defining data structures stored in the RAM (846) and modifying such data structures according to software-defined processes. Additionally or alternatively, the computer system can provide functionality that is logically hardwired or otherwise embodied in circuitry (e.g., an accelerator (844)) that can operate in place of or in conjunction with the software to execute the specific processes or specific portions of specific processes described herein. In appropriate instances, references to software can include logic and vice versa. In appropriate instances, references to the computer-readable medium can include circuitry (such as an integrated circuit (IC)) that stores the software for execution, circuitry that embodies the logic, or both. This disclosure encompasses any suitable combination of hardware and software.

[0107] The use of "at least one" or "one of" in this disclosure is intended to include any one or combination of the recited elements. For example, reference to at least one of A, B, or C; at least one of A, B, and C; at least one of A, B, and / or C; and at least one of A through C is intended to include only A, only B, only C, or any combination thereof. Reference to one of A or B and one of A and B is intended to include A, B, or (A and B). Where applicable, the use of "one of" does not exclude any combination of the recited elements, such as when the elements are not mutually exclusive.

[0108] Although examples of multiple aspects of this disclosure have been described, there are also some variations, permutations, and various alternative equivalents that fall within the scope of this disclosure. Accordingly, it should be understood that those skilled in the art can design various systems and methods that, although not explicitly shown or described herein, embody the principles of this disclosure and thus fall within the spirit and scope of this disclosure.

[0109] (1) A method of grid decoding, the method comprising: receiving a bitstream of a grid, the grid including a plurality of vertices; when the grid is symmetric with respect to a symmetry plane, reconstructing a first set of vertices of the grid on a first side of the symmetry plane; and reconstructing a second set of vertices of the grid on a second side of the symmetry plane by reflecting the reconstructed first set of vertices with respect to the symmetry plane.

[0110] (2) The method according to feature (1), wherein a vector is formed between each vertex in the reconstructed first set of vertices and the reflected vertex of the corresponding vertex in the reconstructed first set of vertices, the vector being perpendicular to the symmetry plane.

[0111] (3) The method according to feature (1) or (2), wherein reconstructing the second set of vertices further comprises: reflecting the reconstructed first vertex of the first vertex in the first set of vertices through the symmetry plane to generate a first reflected vertex on a second side of the symmetry plane; and reconstructing the first vertex in the second set of vertices closest to the first reflected vertex based on the first reflected vertex and a displacement signaled in the bitstream, the displacement being used to indicate the difference between (i) the reflected vertex of the first vertex in the first set of vertices on the second side of the symmetry plane and (ii) the first vertex in the second set of vertices.

[0112] (4) The method according to any one of features (1) to (3), the method further comprising: forming the grid by combining the reconstructed first set of vertices and the reconstructed second set of vertices.

[0113] (5) The method according to any one of features (1) to (4), the method further comprising: reconstructing a third set of vertices of the mesh located on the symmetry plane, each vertex in the third set of vertices being reconstructed as the encoded value of the corresponding vertex in the third set of vertices received in the bitstream.

[0114] (6) The method according to any one of features (1) to (5), the method further comprising: reconstructing a third set of vertices of the mesh by reflecting each vertex in the third set of vertices with respect to the symmetry plane, the third set of vertices being located on the symmetry plane.

[0115] (7) The method according to feature (6), wherein the reconstruction further comprises: determining a first reconstructed vertex of a first vertex in the third set of vertices; reflecting the first reconstructed vertex through the symmetry plane to generate a first reflected vertex; when the first reflected vertex has the same 3D coordinates as the first reconstructed vertex, merging the first reconstructed vertex and the first reflected vertex to generate a merged first vertex on the symmetry plane; and reconstructing the first vertex in the third set of vertices based on the merged first vertex.

[0116] (8) A mesh encoding method, the method comprising: determining whether a mesh is symmetric with respect to a symmetry plane, the mesh including a plurality of vertices; when the mesh is symmetric with respect to the symmetry plane, dividing the plurality of vertices into a first set of vertices located on a first side of the symmetry plane, a second set of vertices located on a second side of the symmetry plane opposite to the first side, and a third set of vertices located on the symmetry plane; and encoding the second set of vertices by reflecting the first set of vertices with respect to the symmetry plane.

[0117] (9) The method according to feature (8), wherein determining whether the mesh is symmetric further comprises: reflecting each vertex in a first subset of the plurality of vertices of the mesh through the symmetry plane to generate a corresponding reflected vertex; determining a nearest vertex in a second subset of the plurality of vertices for each reflected vertex in the mesh; and when the distance between the nearest vertex and the corresponding reflected vertex is less than a threshold, determining that the mesh is symmetric with respect to the symmetry plane.

[0118] (10) The method according to feature (9), wherein a vector is formed between each vertex in the first set of vertices and the reflected vertex of the corresponding vertex in the first set of vertices, the vector being perpendicular to the symmetry plane.

[0119] (11)A method according to any one of features (8) to (10), wherein encoding the second set of vertices further comprises: reflecting a first vertex of the first set of vertices through the symmetry plane to generate a first reflected vertex on the second side of the symmetry plane; determining a first vertex in the second set of vertices that is closest to the first reflected vertex; determining a displacement between the first reflected vertex and the first vertex in the second set of vertices; and encoding the displacement as a bitstream.

[0120] (12)A method according to any one of features (8) to (11), the method further comprising: encoding a corresponding vertex in the third set of vertices by encoding an original value of each vertex in the third set of vertices.

[0121] (13)A method according to any one of features (8) to (12), the method further comprising: encoding a third set of vertices of the mesh by reflecting the third set of vertices with respect to the symmetry plane.

[0122] (14)A method according to feature (13), wherein encoding the third set of vertices further comprises: reflecting each vertex in the third set of vertices through the symmetry plane to generate a corresponding reflected vertex; determining whether the third set of vertices and the reflected vertices have the same 3D coordinates; when the reflected vertex and the corresponding vertex have the same 3D coordinates, merging each vertex in the third set of vertices with the reflected vertex corresponding to the corresponding vertex to generate a merged vertex; and encoding each vertex in the third set of vertices based on the corresponding merged vertex.

[0123] (15)A method for processing mesh data, the method comprising: processing a bitstream of the mesh data according to format rules, wherein the bitstream includes encoding information of the mesh, the mesh includes a plurality of vertices; and the format rules stipulate that: when the mesh is symmetric with respect to a symmetry plane, reconstructing a first set of vertices of the mesh located on a first side of the symmetry plane; and reconstructing a second set of vertices of the mesh located on a second side of the symmetry plane by reflecting the reconstructed first set of vertices with respect to the symmetry plane.

[0124] (16)A method according to feature (15), wherein a vector is formed between each vertex in the reconstructed first set of vertices and a reflected vertex of the corresponding vertex in the reconstructed first set of vertices, the vector being perpendicular to the symmetry plane.

[0125] (17)A method according to feature (15) or (16), wherein the format rule further stipulates that: the reconstructed first vertex of the first vertex in the first set of vertices is reflected through the symmetry plane to generate a first reflected vertex on the second side of the symmetry plane; and the first vertex in the second set of vertices closest to the first reflected vertex is reconstructed based on the first reflected vertex and the displacement signaled in the bitstream, the displacement being used to indicate the difference between (i) the reflected vertex of the first vertex in the first set of vertices on the second side of the symmetry plane and (ii) the first vertex in the second set of vertices.

[0126] (18)A method according to any one of features (15) to (17), wherein the format rule further stipulates that: the mesh is formed by combining the reconstructed first set of vertices and the reconstructed second set of vertices.

[0127] (19)A method according to any one of features (15) to (18), wherein the format rule further stipulates that: a third set of vertices of the mesh located on the symmetry plane is reconstructed, and each vertex in the third set of vertices is reconstructed as the coded value of the corresponding vertex in the third set of vertices received in the bitstream.

[0128] (20)A method according to any one of features (15) to (19), wherein the format rule further stipulates that: the third set of vertices of the mesh located on the symmetry plane is reconstructed by reflecting each vertex in the third set of vertices through the symmetry plane.

[0129] (21)A mesh decoding device, the device comprising a processing circuit configured to perform the method according to any one of features (1) to (7).

[0130] (22)A mesh encoding device, the device comprising a processing circuit configured to perform the method according to any one of features (8) to (14).

[0131] (23)A non-transitory computer-readable storage medium storing instructions that, when executed by at least one processor, cause the at least one processor to perform the method according to any one of features (1) to (14).

Claims

1. A grid decoding method, characterized in that: The method comprises: receiving a bitstream of a mesh, the mesh comprising a plurality of vertices; When the mesh is symmetric with respect to a symmetry plane, reconstructing a first set of vertices of the mesh located on a first side of the symmetry plane; and A second set of vertices of the mesh located on a second side of the symmetry plane is reconstructed by reflecting the reconstructed first set of vertices relative to the symmetry plane.

2. The method according to claim 1, characterized in that: A vector is formed between each vertex in the reconstructed first set of vertices and a reflection vertex of a corresponding vertex in the reconstructed first set of vertices, the vector being perpendicular to the symmetry plane.

3. The method according to claim 1, characterized in that The reconstructing the second set of vertices further comprises: reflecting a reconstructed first vertex of a first vertex in the first set of vertices across the symmetry plane to generate a first reflected vertex on the second side of the symmetry plane; and A first vertex in the second set of vertices that is closest to the first reflected vertex is reconstructed based on the first reflected vertex and a displacement represented by a signal in the bitstream, wherein the displacement is used to indicate the difference between (i) a reflected vertex of the first vertex in the first set of vertices on the second side of the symmetry plane and (ii) the first vertex in the second set of vertices.

4. The method according to claim 1, characterized in that: The method further comprises: The mesh is formed by combining the reconstructed first set of vertices and the reconstructed second set of vertices.

5. The method according to claim 1, characterized in that The method further comprises: A third set of vertices of the mesh located on the symmetry plane is reconstructed, each vertex in the third set of vertices being reconstructed as an encoded value of a corresponding vertex in the third set of vertices received in the bitstream.

6. The method according to any one of claims 1 to 5, characterized in that: The method further comprises: The third set of vertices of the mesh is reconstructed by reflecting each vertex in the third set of vertices with respect to the symmetry plane, the third set of vertices lying on the symmetry plane.

7. The method according to claim 6, characterized in that The reconstruction also includes: determining a reconstructed first vertex of a first vertex in the third set of vertices; reflecting the reconstructed first vertex through the symmetry plane to generate a first reflected vertex; When the first reflected vertex has the same three-dimensional (3D) coordinates as the reconstructed first vertex, merging the reconstructed first vertex and the first reflected vertex to generate a merged first vertex on the symmetry plane; and The first vertex in the third group of vertices is reconstructed based on the merged first vertex.

8. A grid coding method, characterized in that: The method comprises: determining whether a mesh is symmetric with respect to a symmetry plane, the mesh comprising a plurality of vertices; When the mesh is symmetrical with respect to the symmetry plane, the plurality of vertices are divided into a first group of vertices located on a first side of the symmetry plane, a second group of vertices located on a second side of the symmetry plane opposite to the first side, and a third group of vertices located on the symmetry plane; and The second set of vertices is encoded by reflecting the first set of vertices with respect to the symmetry plane.

9. The method according to claim 8, characterized in that The determining whether the grid is symmetrical further comprises: reflecting each vertex in the first subset of the plurality of vertices of the mesh across the symmetry plane to generate a corresponding reflected vertex; determining, for each reflected vertex in the mesh, a nearest vertex in a second subset of the plurality of vertices; and When the distance between the nearest vertex and the corresponding reflection vertex is less than a threshold, it is determined that the mesh is symmetric with respect to the symmetry plane.

10. The method according to claim 9, characterized in that A vector is formed between each vertex in the first set of vertices and a reflection vertex of a corresponding vertex in the first set of vertices, the vector being perpendicular to the symmetry plane.

11. The method according to claim 8, characterized in that Encoding the second set of vertices further comprises: reflecting a first vertex in the first set of vertices across the symmetry plane to generate a first reflected vertex on the second side of the symmetry plane; Determine a first vertex in the second group of vertices that is closest to the first reflection vertex; determining a displacement between the first reflective vertex and the first vertex in the second set of vertices; and The displacements are encoded as a bitstream.

12. The method according to any one of claims 8 to 11, characterized in that The method further comprises: The corresponding vertex in the third set of vertices is encoded by encoding the original value of each vertex in the third set of vertices.

13. The method according to any one of claims 8 to 11, characterized in that The method further comprises: The third set of vertices of the mesh is encoded by reflecting the third set of vertices with respect to the symmetry plane.

14. The method according to claim 13, characterized in that Encoding the third set of vertices further comprises: reflecting each vertex in the third set of vertices through the symmetry plane to generate a corresponding reflected vertex; determining whether the third set of vertices and the reflected vertex have the same three-dimensional (3D) coordinates; When the reflected vertex and the corresponding vertex have the same 3D coordinates, merging each vertex in the third group of vertices with the reflected vertex corresponding to the corresponding vertex to generate a merged vertex; and Each vertex in the third set of vertices is encoded based on a corresponding merged vertex.

15. A method for processing grid data, characterized in that: The method comprises: Processing a bit stream of grid data according to format rules; The bitstream includes encoding information of a mesh, and the mesh includes a plurality of vertices; and The format rules state that: When the mesh is symmetric with respect to a symmetry plane, reconstructing a first set of vertices of the mesh located on a first side of the symmetry plane; and A second set of vertices of the mesh located on a second side of the symmetry plane is reconstructed by reflecting the reconstructed first set of vertices relative to the symmetry plane.

16. A grid decoding device, characterized in that: The apparatus comprises a processing circuit configured to perform a trellis decoding method according to any one of claims 1 to 7.

17. A grid coding device, characterized in that: The apparatus comprises a processing circuit configured to perform a trellis encoding method according to any one of claims 8 to 14.

18. A non-transitory computer-readable storage medium storing instructions which, when executed by at least one processor, cause the at least one processor to perform: The trellis decoding method according to any one of claims 1 to 7; or A trellis coding method according to any one of claims 8 to 14; or A grid data processing method according to any one of claims 15 to 20.

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