Display substrate, display panel and display device

Abstract

The invention relates to a display substrate, a display panel and a display device. The display substrate comprises a pixel circuit, and the pixel circuit comprises a first transistor; the display substrate comprises a substrate body and a driving circuit layer located on the substrate body. The driving circuit layer comprises a semiconductor layer, a first conductive metal layer and a metal shielding structure which are stacked in the direction away from the substrate, the semiconductor layer comprises an active layer of a first transistor, the first conductive metal layer comprises a grid electrode of the first transistor, and the orthographic projection of the grid electrode on the active layer is located in the middle area of the active layer; the distance between the first edge of the metal shielding structure and the second edge of the middle area is C; cgt; and h1 tan theta 1 +. H1 is the thickness of the non-metal layer between the active layer and the first conductive metal layer, hN is the thickness of the (N-1) th non-metal layer between the first conductive metal layer and the metal shielding structure, theta1 is the refraction angle of the corresponding non-metal layer, thetaN is the refraction angle of the corresponding non-metal layer, and N is a positive integer greater than or equal to 2.

Description

Technical Field

[0001] The present disclosure relates to the technical field of display product manufacturing, and particularly to a display substrate, a display panel, and a display device. Background Art

[0002] With the in-depth development of display technology and the increasing degree of user use, the unlocking of more usage scenarios has forced AMOLED manufacturers to conduct more in-depth research on the working mechanism of products and optimize designs to enhance product competitiveness.

[0003] In the case of LTPS AMOLED (low temperature polysilicon active matrix organic light emitting diode) display screens, under strong light irradiation at large angles (above 45°), there is a design problem of color deviation due to the generation of photocurrent affecting the node voltage. Summary of the Invention

[0004] To solve the above technical problems, the present disclosure provides a display substrate, a display panel, and a display device, which solve the problem of color deviation due to the generation of photocurrent affecting the node voltage under strong light irradiation at large angles (above 45°).

[0005] To achieve the above object, the technical solution adopted in the embodiments of the present disclosure is: a display substrate, on which a plurality of data lines and a plurality of gate lines are set, and the plurality of data lines and the plurality of gate lines intersect to define a plurality of pixel regions, and a pixel circuit and a light-emitting device are arranged in the pixel regions, and the pixel circuit includes a first transistor and a capacitor;

[0006] The display substrate includes a substrate substrate and a driving circuit layer located on the substrate substrate, and the driving circuit layer includes the pixel circuit;

[0007] The driving circuit layer includes a semiconductor layer, a first conductive metal layer, and a metal shielding structure stacked in a direction away from the substrate substrate, the semiconductor layer includes the active layer of the first transistor, the first conductive metal layer includes the gate of the first transistor and the first electrode plate of the capacitor, and the orthographic projection of the gate on the active layer is located in the middle region of the active layer;

[0008] The metal shielding structure is configured to block external ambient light from entering the middle region. In a first direction parallel to the extending direction of the gate line, the metal shielding structure has a first side, and the middle region has a second side located on the same side as the first side. In the first direction, the distance between the first side and the second side is ΔC;

[0009] ΔC > h 1 tanθ 1 +... + h N tanθ N , where h1 The thickness of the non-metal layer between the active layer and the first conductive metal layer is h N The thickness of the (N - 1)th non-metal layer between the first conductive metal layer and the metal shielding structure is θ 1 The refraction angle of the light entering the non-metal layer between the active layer and the first conductive metal layer is θ N The refraction angle of the light entering the (N - 1)th non-metal layer between the first conductive metal layer and the metal shielding layer, where N is a positive integer greater than or equal to 2

[0010] Optionally, according to the formula n 0 sinθ 0 = n 1 sinθ 1 = n N sinθ N , θ is obtained 1 and θ N , where n 0 = 1, n 1 is the refractive index of the non-metal layer between the active layer and the first conductive metal layer, n N is the refractive index of the (N - 1)th non-metal layer between the first conductive metal layer and the metal shielding structure, θ 0 is the incident angle of the light on the display substrate, θ 0 > 60 degrees, θ N is the refraction angle of the light in the (N - 1)th non-metal layer between the first conductive metal layer and the metal shielding structure

[0011] Optionally, a metal shielding layer is provided between the driving circuit layer and the substrate, and the metal shielding layer overlaps at least with the middle region of the active layer. In the first direction, the metal shielding layer has a third side on the same side as the second side. In the first direction, the distance between the third side and the second side is △B, and the distance between the third side and the first side is △D;

[0012] △B < h′ 1 tanθ′ 1 , or △C > h′ 1 tanθ′ 1 + h′ 2 tanθ′ 2 +... + h′ M tanθ′ M ;

[0013] wherein, h′ 1 is the thickness of the non-metal layer between the metal shielding layer and the active layer, θ′ 1is the refraction angle of light entering the non-metal layer between the metal shielding layer and the active layer, h′ 2 is the overall thickness of the non-metal layer between the active layer and the first conductive metal layer, θ′ 2 is the refraction angle of light entering the non-metal layer between the active layer and the first conductive metal layer, h′ M is the thickness of the (M - 2)th non-metal layer between the first conductive metal layer and the metal shielding structure, θ′ M is the refraction angle of light entering the (M - 2)th non-metal layer between the first conductive metal layer and the metal shielding layer, where M is a positive integer greater than or equal to 3.

[0014] Optionally, according to the formula n 0 sinθ 0 = n 1 sinθ′ 1 = n 2 sinθ′ 2 = n M sinθ′ M , θ 1 , θ 2 , θ M are obtained, where n 0 = 1, n 1 is the refractive index of the non-metal layer between the metal shielding layer and the active layer, n 2 is the refractive index of the non-metal layer between the active layer and the first conductive metal layer, n M is the refractive index of the (M - 2)th non-metal layer between the first conductive metal layer and the metal shielding layer, θ 0 is the incident angle of light on the display substrate, θ 0 > 60 degrees, θ′ 1 is the refraction angle of light incident on the non-metal layer between the metal shielding layer and the active layer, θ′ 2 is the refraction angle of light incident on the non-metal layer between the active layer and the first conductive metal layer, θ M .

[0015] Optionally, the driving circuit layer includes a second conductive metal layer on a side of the first conductive metal layer away from the substrate, and the second conductive metal layer includes a second electrode plate of the capacitor, and the second electrode plate is multiplexed as the metal shielding structure.

[0016] Optionally, the driving circuit layer further includes a third conductive metal layer, the third conductive metal layer includes data lines and power lines, and in the first direction, the power lines are located on a side of the data lines close to the first transistor, and the power lines are multiplexed as the metal shielding structure.

[0017] Optionally, a light-emitting functional layer is provided on the driving circuit layer. The light-emitting functional layer includes a plurality of the light-emitting devices. The light-emitting device includes a first electrode, a light-emitting material layer, and a second electrode that are stacked away from the substrate;

[0018] The first electrode is reused as the metal shielding structure, or the second electrode is reused as the metal shielding structure.

[0019] Optionally, a touch control functional layer is provided on a side of the light-emitting functional layer away from the substrate. The touch control functional layer includes a touch control metal layer. The touch control metal layer includes a touch control pattern stacked with the intermediate region. The touch control pattern is reused as the metal shielding structure.

[0020] Optionally, the pixel circuit is a 2T1C circuit, a 3T1C circuit, a 3T2C circuit, a 7T1C circuit, or a 7T2C circuit.

[0021] An embodiment of the present disclosure further provides a display panel, including the above-mentioned display substrate.

[0022] An embodiment of the present disclosure further provides a display device, including the above-mentioned display panel.

[0023] The beneficial effects of the present disclosure are as follows: By providing the metal shielding structure, external ambient light is shielded, especially to prevent large-angle external ambient light from incident on the active layer of the first transistor in the pixel circuit, avoiding the photocurrent generated by the first transistor from affecting the node voltage, thereby improving the color shift problem. Description of the Drawings

[0024] Figure 1 Schematic diagram of an equivalent circuit representing a 7T1C pixel circuit;

[0025] Figure 2 Schematic diagram of the positional relationship between the active layer and the gate;

[0026] Figure 3 Schematic diagram of the structure of the display substrate;

[0027] Figure 4 Schematic diagram of the structure of the display substrate;

[0028] Figure 5 Schematic diagram of the structure of the display substrate;

[0029] Figure 6 Schematic diagram of the structure of the display substrate;

[0030] Figure 7 Schematic diagram of the positional relationship between the touch control metal layer and the active layer of the first transistor in the related art;

[0031] Figure 8 Schematic diagram of a simulation structure showing color deviation of light incident at -45 degrees;

[0032] Figure 9 Schematic diagram of a simulation structure showing color deviation of light incident at 45 degrees;

[0033] Figure 10 Schematic diagram showing the positional relationship between the touch metal layer and the active layer of the first transistor in an embodiment of the present invention;

[0034] Figure 11 Schematic diagram of a display substrate. Detailed implementation manners

[0035] To make the objectives, technical solutions, and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present disclosure. Obviously, the described embodiments are some, but not all, of the embodiments of the present disclosure. All other embodiments obtained by those of ordinary skill in the art based on the described embodiments of the present disclosure without creative efforts shall fall within the scope of protection of the present disclosure.

[0036] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure shall have the ordinary meanings understood by those of ordinary skill in the art to which the present disclosure pertains. The "first", "second", and similar terms used in the present disclosure do not denote any order, quantity, or importance, but are only used to distinguish different components. Similarly, terms such as "a", "an", or "the" do not denote a quantity limitation, but mean that there is at least one. The terms "comprising" or "including" and the like mean that the elements or items appearing before the term cover the elements or items listed after the term and their equivalents, without excluding other elements or items. The terms "connected" or "coupled" and the like are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. The terms "upper", "lower", "left", "right", etc. are only used to indicate relative positional relationships, and when the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0037] In the embodiments of the present disclosure, features such as "parallel", "perpendicular", and "identical" include the strictly defined features of "parallel", "perpendicular", "identical", etc., as well as cases with certain tolerances such as "substantially parallel", "substantially perpendicular", "substantially identical", etc. Considering measurement and tolerances related to the measurement of specific quantities (e.g., limitations of the measurement system), it means within the acceptable deviation range for a specific value determined by those of ordinary skill in the art. For example, "substantially" can mean within one or more standard deviations, or within 3% or 5% of the value.

[0038] In addition, in this document, unless otherwise defined, the terms "substantially", "essentially", "about", and "approximately" are used to describe and explain small variations. When used with an event or situation, these terms can cover the case where the event or situation occurs precisely, as well as the case where the event or situation occurs approximately. For example, when used with a numerical value, these terms can include a variation range of less than or equal to 10% of the numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, less than or equal to ±0.05%. The term "substantially coplanar" can mean that two surfaces are arranged in the same plane within a micron range, for example, arranged in the same plane within 40μm, 30μm, 20μm, 10μm, or 1μm.

[0039] The display substrate includes a plurality of pixel regions defined by the intersection of data lines and gate lines, and a pixel circuit is disposed in each of the pixel regions to drive the corresponding pixel for display. The pixel circuit can be a 2T1C circuit, or a 3T1C circuit, or a 3T2C circuit, or a 7T1C circuit or a 7T2C circuit. Figure 1 The shown pixel circuit is an equivalent circuit schematic diagram of a 7T1C pixel circuit. The 7T1C pixel circuit includes a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, and a capacitor C. The 7T1C pixel circuit further includes an organic light-emitting diode OLED, a first voltage terminal VDD, a second voltage terminal VSS, a first reset voltage terminal Vinit1, a second reset voltage terminal Vinit2, a scan signal terminal SN(Gate), a first light emission control signal terminal EM, a second light emission control signal terminal EM2(n), a third light emission control signal terminal EM2(n - 7), a data input terminal Data(Vref), and nodes N1, N2, and N3.

[0040] The gate electrode of the first transistor T1 is connected to the third light emission control signal terminal EM2(n - 7), the first electrode of the first transistor T1 is connected to the first reset voltage terminal Vinit1, the second electrode of the first transistor T1 is connected to the first plate of the capacitor C, the gate electrode of the second transistor T2 is connected to the second light emission control signal terminal EM2(n), the first electrode of the second transistor T2 is connected to the first plate of the capacitor C, the second electrode of the second transistor T2 is connected to the second electrode of the sixth transistor T6, the gate electrode of the third transistor T3 is connected to the first plate of the capacitor C, the first electrode of the third transistor T3 is connected to the second electrode of the fourth transistor T4, the second electrode of the third transistor T3 is connected to the second electrode of the sixth transistor T6, the gate electrode of the fourth transistor T4 is connected to the gate line Gate, the first electrode of the fourth transistor T4 is connected to the data line Date, the gate electrode of the fifth transistor T5 is connected to the first light emission control signal terminal EM, the first electrode of the fifth transistor T5 is connected to the first power supply terminal VDD, the second electrode of the fifth transistor T5 is connected to the first electrode of the third transistor T3, the gate electrode of the sixth transistor T6 is connected to the first light emission control signal terminal EM, the second electrode of the sixth transistor T6 is connected to the anode of the light emitting device, the gate electrode of the seventh transistor T7 is connected to the gate line Gate, the first electrode of the seventh transistor T7 is connected to the second reset voltage terminal Vinit2, the second electrode of the seventh transistor T7 is connected to the anode of the light emitting device (organic light emitting diode OLED), the second plate of the capacitor C is connected to the first power supply terminal VDD, and the cathode of the light emitting device OLED is connected to the second power supply terminal VSS.

[0041] The second transistor T2 is a P-type transistor. Incident light enters through the gate of the second transistor, generating electron-hole pairs in the depletion region. The holes drift towards the channel and the P substrate. Due to the high potential barrier, electrons accumulate in the n-well. These accumulated electrons lower the potential barrier of the n-well because the gate is connected to the n-well, causing the gate voltage to be more negative. The current flowing from the second transistor T2 to the N1 node increases (as Figure 1 shown, the thick blue arrows in the figure indicate the leakage direction), the potential of the N1 node rises, and the brightness decreases.

[0042] In the design and production process of LTPS (Low-Temperature Polycrystalline Silicon) products with BSM (metal shielding layer), since RGB is controlled by different TFTs and there are differences in the edge wrapping design of RGB metal film layers, when there is strong light irradiation at a large viewing angle, light will directly or indirectly (reflected by BSM) irradiate the Poly (polycrystalline active layer) where the second transistor T2 is located to varying degrees, thus generating photocurrent, causing the brightness of RGB to decrease disproportionately, and resulting in a decrease in brightness and color shift under strong light irradiation.

[0043] Reference Figures 2 - 11 Regarding the above technical problems, embodiments of the present disclosure provide a display substrate. A plurality of data lines and a plurality of gate lines are set on the display substrate. The plurality of data lines and the plurality of gate lines intersect to define a plurality of pixel regions. A pixel circuit and a light-emitting device are arranged in the pixel region. The pixel circuit includes a first transistor (i.e., Figure 1 the second transistor T2 shown) and a capacitor. The gate of the first transistor is connected to a light-emitting control signal line. The first electrode of the first transistor is connected to the first electrode plate of the capacitor. The second electrode plate of the capacitor is connected to a power supply line VDD;

[0044] The display substrate includes a substrate and a driving circuit layer located on the substrate. The driving circuit layer includes the pixel circuit;

[0045] The driving circuit layer includes a semiconductor layer, a first conductive metal layer 2, and a metal shielding structure stacked in a direction away from the substrate. The semiconductor layer includes the active layer 1 of the first transistor. The first conductive metal layer 2 includes the gate of the first transistor and the first electrode plate of the capacitor. The orthographic projection of the gate on the active layer 1 is located in the middle region 101 of the active layer 1;

[0046] The metal shielding structure is configured to block external ambient light from entering the middle region 101. In a first direction (refer to Figure 2 the Y direction in) parallel to the extending direction of the gate line, the metal shielding structure has a first side. The middle region 101 has a second side on the same side as the first side. In the first direction, the distance between the first side and the second side is ΔC;

[0047] ΔC > h 1 tanθ 1 +... + h N tanθ N , where h 1 is the thickness of the non-metal layer between the active layer 1 and the first conductive metal layer 2, h N is the thickness of the (N - 1)th non-metal layer between the first conductive metal layer 2 and the metal shielding structure, θ 1 is the refraction angle of light entering the non-metal layer between the active layer 1 and the first conductive metal layer 2, θ N is the refraction angle of light entering the (N - 1)th non-metal layer between the first conductive metal layer 2 and the metal shielding layer, and N is a positive integer greater than or equal to 2.

[0048] Figure 2 is a schematic diagram of the positional relationship between the gate of the second transistor and the polysilicon active layer 1, Figure 3It is a partial structural schematic diagram of a display substrate. The position where the polysilicon active layer 1 overlaps with Gate1 (gate electrode) forms a TFT. In an embodiment where the metal shielding layer 4 is not provided on the active layer 1 and the substrate, when strong light irradiates the middle region 101 of the active layer 1 of the transistor from a large viewing angle, it is directly irradiated. In order to prevent external strong light from irradiating the middle region 101 of the active layer 1, the metal shielding structure is provided on the side of the first conductive metal layer 2 away from the substrate. The metal shielding structure can be provided separately. In order to save the process and reduce the impact on the transmittance of the display substrate, the circuit structure on the side of the first conductive metal layer 2 away from the substrate can be reused as the metal shielding structure. Preferably, in the embodiments of the present disclosure, the circuit structure on the side of the first conductive metal layer 2 away from the substrate is reused as the metal shielding structure.

[0049] In order to more effectively reduce the impact on the transmittance of the display substrate, the circuit structure close to the active layer 1 in the first direction can be improved (such as increasing the line width, etc.) to be reused as the metal shielding structure.

[0050] Simplify the light transmission into a parallel flat plate transmission model. The light passes through the gap of the metal film layer, that is, through the optical parallel flat plate composed of multiple non-metal film layers, and irradiates the middle region 101 of the active layer 1 of the second transistor. The transmission path of the light directly irradiating the middle region 101 is as Figure 3 shown, Figure 3 The transmission path shown in is the critical situation where the external light is about to be unable to irradiate the middle region 101 of the active layer 1 of the second transistor. That is to say, as long as the edge distance of the metal shielding structure relative to the middle region 101 (on one side of the middle region 101, the length of the part of the metal shielding structure exposed outside the middle region 101, that is, △C) is greater than the critical transmission path, the edge distance of the metal shielding structure relative to the middle region 101 (refer to Figure 3 the critical edge distance L in) can block the external light from irradiating the middle region 101 of the active layer 1 of the second transistor, thereby improving the color shift problem of the display screen.

[0051] According to the refraction law of optics, the formula n 0 sinθ 0 = n 1 sinθ 1 = n N sinθ N can be obtained. According to the formula n 0 sinθ 0 = n 1 sinθ 1 = nN sinθ N to obtain θ 1 and θ, where n 0 = 1, n 1 is the refractive index of the non-metal layer between the active layer 1 and the first conductive metal layer 2, n N is the refractive index of the thickness of the (N - 1)th non-metal layer between the first conductive metal layer 2 and the metal shielding structure, θ 0 is the incident angle of the light ray to the display substrate, θ 0 > 60 degrees, θ N is the refraction angle of the light ray in the (N - 1)th non-metal layer between the first conductive metal layer 2 and the metal shielding structure.

[0052] According to the obtained θ 1 and θ N , then according to the formula △C > h 1 tanθ 1 +... + h N tanθ N , the distance △C between the first side and the second side in the first direction can be obtained.

[0053] Reference Figure 3 , there is one non-metal layer between the first conductive metal layer 2 and the metal shielding structure, that is, N = 2. Then, in the first direction, the critical value between the first side and the second side can be obtained through the formula h 1 tanθ 1 + h 2 tanθ 2 , where h 1 is the thickness of the non-metal layer (this non-metal layer is the first gate insulating layer) between the active layer 1 and the first conductive metal layer 2, h 2 is the thickness of the non-metal layer (this non-metal layer is the second gate insulating layer) between the first conductive metal layer 2 and the metal shielding structure. Among them, θ 1 and θ N2 can be obtained according to the formula n 0 sinθ 0 = n 1 sinθ 1 = n 2 sinθ 2 , and then the distance △C between the first side and the second side in the first direction can be obtained.

[0054] It should be noted that in the structure where the metal shielding layer 4BSM is provided, there are the following two cases when light is incident on the middle region 101 of the active layer 1 of the second transistor: 1. Directly irradiating the middle region 101; 2. After being reflected by the metal shielding layer 4 and then incident on the middle region 101. Figure 3 The critical situation where light directly irradiates the middle region 101 is shown in Figure 4 FIG. is the critical situation where light is reflected by the metal shielding layer 4 onto the middle region 101. From the comparison of the above two cases, it can be seen that the edge distance of the metal shielding layer required for light to be reflected by the metal shielding layer 4 onto the middle region 101 is larger. Therefore, as long as this situation is satisfied, the occurrence of strong light color cast can be avoided.

[0055] In an exemplary embodiment, a metal shielding layer 4 is provided between the driving circuit layer and the substrate. The metal shielding layer 4 overlaps at least with the middle region 101 of the active layer 1. In the first direction, the metal shielding layer 4 has a third side on the same side as the second side. In the first direction, the distance between the third side and the second side is △B, and the distance between the third side and the first side is △D;

[0056] △B < h′ 1 tanθ′ 1 or △C > h′ 1 tanθ′ 1 + h′ 2 tanθ′ 2 +... + h′ M tanθ′ M ;

[0057] where h′ 1 is the thickness of the non-metal layer between the metal shielding layer 4 and the active layer 1, and θ′ 1 is the refraction angle of light entering the non-metal layer between the metal shielding layer 4 and the active layer 1. h′ 2 is the overall thickness of the non-metal layer between the active layer 1 and the first conductive metal layer 2, and θ′ 2 is the refraction angle of light entering the non-metal layer between the active layer 1 and the first conductive metal layer 2. h′ M is the thickness of the (M - 2)-th non-metal layer between the first conductive metal layer 2 and the metal shielding structure, and θ′ M is the refraction angle of light entering the (M - 2)-th non-metal layer between the first conductive metal layer 2 and the metal shielding layer. M is a positive integer greater than or equal to 3.

[0058] Exemplarily, according to the formula n 0 sinθ0 = n 1 sinθ′ 1 = n 2 sinθ′ 2 = n M sinθ′ M , obtain θ 1 、θ′ 2 、θ M , where n 0 = 1, n 1 is the refractive index of the non - metal layer between the metal shielding layer 4 and the active layer 1, n 2 is the refractive index of the non - metal layer between the active layer 1 and the first conductive metal layer 2, n M is the refractive index of the (M - 2)th non - metal layer between the first conductive metal layer 2 and the metal shielding layer, θ 0 is the incident angle of light to the display substrate, θ 0 > 60 degrees.

[0059] Reference Figure 4 , there is a non - metal layer between the first conductive metal layer 2 and the metal shielding structure, that is, M = 3. In the first direction, the critical value of the distance between the third side and the second side can be obtained according to h′ 1 tanθ′ 1 Obtain, and further according to this critical value, the distance △B between the third side and the second side can be determined. The critical value of the distance between the third side and the first side can be obtained according to the formula h′ 1 tanθ′ 1 + h′ 2 tanθ′ 2 +... + h′ M tanθ′ M Obtain, and further according to this critical value, the distance △D between the third side and the second side can be determined.

[0060] In an exemplary embodiment, the driving circuit layer includes a second conductive metal layer 3 on the side of the first conductive metal layer 2 away from the substrate. The second conductive metal layer 3 includes the second electrode plate of the capacitor, and the second electrode plate is multiplexed as the metal shielding structure.

[0061] Reference Figure 5, a metal shielding layer 4 is provided on the substrate, a buffer layer Buffer is provided on the metal shielding layer 4, an active layer 1 is provided on a side of the buffer layer Buffer away from the substrate, a first gate insulating layer GI1 is provided on the active layer 1, a first conductive metal layer 2 is provided on the first gate insulating layer GI1, the first conductive metal layer 2 includes a gate Gate1 and a first electrode plate of a capacitor, a second gate insulating layer GI2 is provided on the first conductive metal layer 2, and a second conductive metal layer 3 is provided on a side of the second gate insulating layer GI2 away from the substrate, the second conductive metal layer 3 includes a second substrate of the capacitor (i.e., Figure 5 the Gate2 in Figure 11 ), an interlayer insulating layer ILD is provided on a side of the second conductive metal layer 3 away from the substrate, and other film layer structures on a side of the interlayer insulating layer ILD away from the substrate can be referred to

[0062] Exemplarily, the length of the second electrode plate can be lengthened in the first direction so that it can be reused as the metal shielding structure.

[0063] In an exemplary embodiment, the driving circuit layer further includes a third conductive metal layer 6, the third conductive metal layer 6 includes a data line and a power line, in the first direction, the power line is located on a side of the data line close to the first transistor, and the power line is reused as the metal shielding structure.

[0064] The data line and the power line are arranged in the same direction. In the first direction, compared with the data line, the power line VDD is closer to the active layer 1. Using the power line VDD as the metal shielding structure can reduce the influence on the transmittance of the display screen.

[0065] Refer to Figure 6 , a metal shielding layer 4 is provided on the substrate, a buffer layer Buffer is provided on the metal shielding layer 4, an active layer 1 is provided on a side of the buffer layer Buffer away from the substrate, a first gate insulating layer GI1 is provided on the active layer 1, a first conductive metal layer 2 is provided on the first gate insulating layer GI1, the first conductive metal layer 2 includes a gate Gate1 and a first electrode plate of a capacitor, a second gate insulating layer GI2 is provided on the first conductive metal layer 2, and a second conductive metal layer 3 is provided on a side of the second gate insulating layer GI2 away from the substrate, the second conductive metal layer 3 includes a second substrate of the capacitor (i.e., Figure 5In the Gate2), an interlayer insulating layer ILD is provided on the side of the second conductive metal layer 3 away from the substrate. On the side of the interlayer insulating layer ILD away from the substrate, a metal layer SD1 (this metal layer includes connection traces) is provided. A first planarization layer PLN1 is provided on the metal layer SD1. A third conductive metal layer 6SD2 is provided on the first planarization layer PLN1. A second planarization layer PLN2 is provided on the third conductive metal layer 6SD2. For other film layer structures on the side of the second planarization layer PLN2 away from the substrate, reference can be made to Figure 11 .

[0066] Exemplarily, the power supply line VDD includes a first portion covering the active layer 1. In the extending direction of the power supply line VDD, the power supply line VDD includes a second portion and a third portion adjacent to the first portion. In the first direction, the width of the first portion is greater than the width of the second portion, and the width of the first portion is greater than the width of the third portion. That is, in order to enable the power supply line VDD to be reused as the metal shielding structure, the width of the local position of the power supply line VDD corresponding to the active layer 1 of the second transistor is widened, so as to reduce the influence on the transmittance of the display screen to a greater extent.

[0067] It should be noted that the multiple pixel regions on the display substrate are arranged in an array. The power supply line VDD is arranged in the same direction as the data line. The power supply line VDD can supply power to the pixel circuits of multiple pixel regions arranged along the extending direction of the data line. That is to say, in the extending direction of the power supply line VDD, there are multiple first portions. In the middle region 101 of the display substrate, the second portion or the third portion can be located between two adjacent first portions. In the edge region of the display substrate, the second portion or the third portion is located on the side of the first portion close to the edge of the display substrate.

[0068] In an exemplary embodiment, a light-emitting functional layer is provided on the driving circuit layer. The light-emitting functional layer includes multiple light-emitting devices. The light-emitting device includes a first electrode, a light-emitting material layer, and a second electrode stacked along the direction away from the substrate;

[0069] The first electrode is reused as the metal shielding structure, or the second electrode is reused as the metal shielding structure.

[0070] In an exemplary embodiment, a touch control functional layer 7 is provided on the side of the light-emitting functional layer away from the substrate. The touch control functional layer includes a touch control metal layer. The touch control metal layer includes a touch control pattern stacked with the middle region 101. The touch control pattern is reused as the metal shielding structure.

[0071] In a conventional structure, the touch pattern does not overlap with the middle region 101 of the active layer 1, or partially overlaps (refer to Figure 7 ), when light is incident on the display substrate from the θ = 45° & -45° direction, the color shift is the most serious. The simulation results ( Figure 8 and Figure 9 ) show that the light mainly enters through the junction between the middle region 101 of the active layer 1 and the gate ( Figure 7 the high-risk position in Figure 10 ), and after being reflected by the guard shielding layer, it irradiates the middle region 101 of the active layer 1, thereby causing color shift. In this embodiment, a special-angle shielding design is carried out by using a metal film layer structure TMB (touch metal layer) that is further away from the second transistor in the direction perpendicular to the substrate. As Figure 10 shown, by adjusting the relative positions of the touch pattern of the touch metal layer, the middle region 101 of the active layer 1, and the gate, the high-risk position shown in Figure 7 is adjusted to the center position of the touch pattern, so as to maximally block the light incident on the high-risk position.

[0072] The touch pattern includes a plurality of repeated sub-touch patterns. The sub-touch pattern includes a linear part 71 extending along the extension direction of the data line, and V-shaped parts 72 located at opposite ends of the linear part 71. The two V-shaped parts 72 can be symmetrically arranged with respect to the linear part 71. In the direction perpendicular to the extension direction of the data line (refer to the Y direction in Figure 7 ), the width of the linear part 71 is greater than the width of the middle region 101 of the active layer 1. In the extension direction of the data line (refer to the X direction in Figure 2 and Figure 7 ), the length of the linear part 71 is greater than the width of the middle region 101 of the active layer 1. In this way, the touch pattern can completely cover the middle region 101 of the active layer 1, blocking the direct or indirect incidence (reflected by the metal shielding layer 4) of external ambient light to the middle region 101.

[0073] Exemplarily, in the direction perpendicular to the extension direction of the data line, the width of the linear part 71 is greater than the width of the middle region 101 of the active layer 1 by 2.5 - 5 μm. Without affecting other screen functions such as transmittance, increasing the line width has a better shielding effect.

[0074] To achieve a better shielding effect, widening the wiring at a fixed position is also within the scope of this embodiment. That is to say, as long as the touch pattern can completely cover the intermediate region 101 of the active layer 1, the overall sub-touch pattern can be widened, or the local position of the sub-touch pattern can be widened, etc. For example, the linear part 71 is widened at least in the direction perpendicular to the extension direction of the data line, but not limited thereto.

[0075] Figure 11 Schematic diagram of the display substrate of this embodiment. The manufacturing method of the display substrate in this embodiment includes:

[0076] Providing a substrate;

[0077] A metal shielding layer BSM is provided on the substrate, and the thickness of the metal shielding layer 4 is 0.05 - 0.2 um;

[0078] A buffer layer Buffer is formed on the metal shielding layer 4, the thickness of the buffer layer is 0.5 - 1 um, and the refractive index of the buffer layer is 1.5 - 2;

[0079] An active layer 1 is formed on the buffer layer, and the thickness of the active layer 1 is 0.02 - 0.15;

[0080] A first gate insulating layer GI1 is formed on the active layer 1, the thickness of the first gate insulating layer is 0.05 - 0.15 um, and the refractive index of the first gate insulating layer is 1.3 - 2;

[0081] A first conductive metal layer 2Gate1 including a gate and a first electrode plate of a capacitor is formed on the first gate insulating layer, and the thickness of the first conductive metal layer 2 is 0.2 - 0.5 um;

[0082] A second gate insulating layer GI2 is formed on the first conductive metal layer 2, the thickness of the second gate insulating layer GI2 is 0.1 - 0.2 um, and the refractive index of the second gate insulating layer is 1.3 - 2;

[0083] A second conductive metal layer 3Gate2 including a second electrode plate of a capacitor is formed on the second gate insulating layer, and the thickness of the second conductive metal layer 3 is 0.2 - 0.5 um;

[0084] An interlayer dielectric layer ILD is formed on the second conductive metal layer 3, the thickness of the interlayer dielectric layer is 0.2 - 1 um, and the refractive index of the interlayer dielectric layer is 1.3 - 2;

[0085] A fourth conductive metal layer SD1 including connection traces is formed on the interlayer dielectric layer, and the thickness of the third conductive metal layer 6 is 0.5 - 1.5 um;

[0086] A first planarization layer PLN1 is formed on the third conductive metal layer 6, the thickness of the first planarization layer is 1 - 2.5, and the refractive index of the first planarization layer is 1.4 - 2;

[0087] A third conductive metal layer 6SD2 is formed on the first planarization layer, and the thickness of the third conductive metal layer 6 is 0.5 - 1.5 um;

[0088] A second planarization layer PLN2 is formed on the third conductive metal layer 6, the thickness of the second planarization layer is 1 - 2.5, and the refractive index of the second planarization layer is 1.4 - 2;

[0089] A light-emitting functional layer is formed on the second planarization layer, the light-emitting functional layer includes a plurality of light-emitting devices, and the light-emitting devices include an anode, a light-emitting material layer, and a cathode stacked on each other;

[0090] A touch control functional layer 7 is formed on the light-emitting functional layer, and the touch control functional layer 7 includes a touch control metal layer TMA, a touch control insulating layer TLD, and a touch control metal layer TMB.

[0091] An embodiment of the present disclosure further provides a display panel, including the above-mentioned display substrate.

[0092] An embodiment of the present disclosure further provides a display device, including the above-mentioned display panel.

[0093] The display device includes, but is not limited to: components such as a radio frequency unit, a network module, an audio output unit, an input unit, a sensor, a display unit, a user input unit, an interface unit, a memory, a processor, and a power supply. Those skilled in the art can understand that the structure of the above-mentioned display device does not constitute a limitation on the display device. The display device may include more or fewer components as described above, or combine some components, or have different component arrangements. In an embodiment of the present disclosure, the display device includes, but is not limited to, a display, a mobile phone, a tablet computer, a television, a wearable electronic device, a navigation display device, etc.

[0094] The display device may be: any product or component with a display function such as a television, a display, a digital photo frame, a mobile phone, a tablet computer, etc., and the display device further includes a flexible circuit board, a printed circuit board, and a backplane.

[0095] The following points need to be noted:

[0096] (1) The drawings of the embodiments of the present disclosure only relate to the structures involved in the embodiments of the present disclosure, and other structures can refer to the general design.

[0097] (2) For clarity, in the drawings used to describe the embodiments of the present disclosure, the thickness of layers or regions is enlarged or reduced, that is, these drawings are not drawn to actual scale. It can be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "under" another element, the element can be "directly" on or under the other element or there can be intervening elements.

[0098] (3) Without conflict, the embodiments of the present disclosure and the features in the embodiments can be combined with each other to obtain new embodiments.

[0099] It can be understood that the above embodiments are merely exemplary embodiments adopted to illustrate the principles of the present disclosure, but the present disclosure is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and essence of the present disclosure, and these modifications and improvements are also regarded as the protection scope of the present disclosure.

Claims

1. A display substrate, characterized in that: A plurality of data lines and a plurality of gate lines are set on the display substrate, and the plurality of data lines and the plurality of gate lines intersect to define a plurality of pixel areas, and a pixel circuit and a light-emitting device are arranged in the pixel area, and the pixel circuit includes a first transistor and a capacitor; The display substrate comprises a base substrate and a driving circuit layer located on the base substrate, wherein the driving circuit layer comprises the pixel circuit; The driving circuit layer includes a semiconductor layer, a first conductive metal layer and a metal shielding structure stacked in a direction away from the substrate, the semiconductor layer includes an active layer of the first transistor, the first conductive metal layer includes a gate of the first transistor, and a first electrode plate of the capacitor, and an orthographic projection of the gate on the active layer is located in a middle area of ​​the active layer; The metal shielding structure is configured to block external ambient light from being incident on the middle area. In a first direction parallel to the extending direction of the gate line, the metal shielding structure has a first side, and the middle area has a second side located on the same side as the first side. In the first direction, the distance between the first side and the second side is △C; △C>h1tanθ1+...+h N tanθ N , where h1 is the thickness of the non-metallic layer between the active layer and the first conductive metal layer, h N is the thickness of the N-1th non-metallic layer between the first conductive metal layer and the metal shielding structure, θ1 is the refraction angle of the light entering the non-metallic layer between the active layer and the first conductive metal layer, θ N is the refraction angle of light entering the N-1th non-metallic layer between the first conductive metal layer and the metal shielding structure, where N is a positive integer greater than or equal to 2.

2. The display substrate according to claim 1, characterized in that: According to the formula n0sinθ0=n1sinθ1=n N sinθ N , we get θ1 and θ N , where n0=1, n1 is the refractive index of the non-metallic layer between the active layer and the first conductive metal layer, n N is the refractive index of the thickness of the N-1th non-metallic layer between the first conductive metal layer and the metal shielding structure, θ0 is the incident angle of the light incident on the display substrate, and θ0>60 degrees.

3. The display substrate according to claim 1, characterized in that: A metal shielding layer is provided between the driving circuit layer and the base substrate, the metal shielding layer is at least overlapped with the middle area of ​​the active layer, in the first direction, the metal shielding layer has a third side located on the same side as the second side, in the first direction, the distance between the third side and the second side is △B, and the distance between the third side and the first side is △D; △B < h′1 tanθ′1, or △C > h′1 tanθ′1 + h′2 tanθ′2 +... + h′ M tanθ′ M ; Wherein, h′1 is the thickness of the non-metallic layer between the metal shielding layer and the active layer, θ′1 is the refraction angle of the light entering the non-metallic layer between the metal shielding layer and the active layer, h′2 is the overall thickness of the non-metallic layer between the active layer and the first conductive metal layer, θ′2 is the refraction angle of the light entering the non-metallic layer between the active layer and the first conductive metal layer, and h′ M is the thickness of the M-2th non-metallic layer between the first conductive metal layer and the metal shielding structure, θ′ M is the refraction angle of light entering the M-2th non-metallic layer between the first conductive metal layer and the metal shielding layer, where M is a positive integer greater than or equal to 3.

4. The display substrate according to claim 3, characterized in that: According to the formula n0sinθ0=n1sinθ′1=n2sinθ′2=n M sinθ′ M , we get θ′1, θ′2, θ M , where n0=1, n1 is the refractive index of the non-metallic layer between the metal shielding layer and the active layer, n2 is the refractive index of the non-metallic layer between the active layer and the first conductive metal layer, θ0 is the incident angle of the light incident on the display substrate, θ0>60 degrees, n M is the refractive index of the M-2th non-metallic layer between the first conductive metal layer and the metal shielding structure.

5. The display substrate according to claim 1, characterized in that: The driving circuit layer includes a second conductive metal layer located on a side of the first conductive metal layer away from the base substrate, the second conductive metal layer includes a second electrode plate of the capacitor, and the second electrode plate is reused as the metal shielding structure.

6. The display substrate according to claim 1, characterized in that: The driving circuit layer also includes a third conductive metal layer, and the third conductive metal layer includes a data line and a power line. In the first direction, the power line is located on a side of the data line close to the first transistor, and the power line is multiplexed as the metal shielding structure.

7. The display substrate according to claim 1, characterized in that: A light-emitting functional layer is disposed on the driving circuit layer, and the light-emitting functional layer includes a plurality of light-emitting devices, and the light-emitting devices include a first electrode, a light-emitting material layer, and a second electrode stacked along a path away from the base substrate; The first electrode is multiplexed as the metal shielding structure, or the second electrode is multiplexed as the metal shielding structure.

8. The display substrate according to claim 7, characterized in that: A touch function layer is arranged on one side of the light emitting function layer away from the base substrate. The touch function layer includes a touch metal layer. The touch metal layer includes a touch pattern overlapping the middle area. The touch pattern is multiplexed as the metal shielding structure.

9. The display substrate according to claim 1, characterized in that: The pixel circuit is a 2T1C circuit, a 3T1C circuit, a 3T2C circuit, a 7T1C circuit or a 7T2C circuit.

10. A display panel, characterized in that: The display substrate comprises any one of claims 1 to 9.

11. A display device, characterized in that: Comprising the display panel according to claim 10.

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