Array substrate and manufacturing method thereof, display panel and display device

Abstract

The invention provides an array substrate and a manufacturing method thereof, a display panel and a display device. The array substrate comprises a substrate; the wiring layer is located on one side of the substrate; the cutting section is positioned at one end, far away from the display area, of the substrate and the wiring layer; the wiring layer comprises a signal terminal, the signal terminal is located in the bonding area, and the signal terminal comprises a first part and a second part which are arranged in the first direction; the wiring layer further comprises a cutting groove used for separating the first part from the second part, and the second part is located between the cutting groove and the cutting section. According to the array substrate provided by the invention, the cutting section is formed through one-time cutting, so that the array substrate is separated from the mother board, and the cutting groove is formed through another-time cutting, so that the signal terminal of the wiring layer is disconnected to form the first part and the second part, and short circuit of a test circuit caused by conductive substances such as carbonized foreign matters generated by cutting is prevented; or burn or poor electrical property is caused after module bonding, so that the product yield can be improved.

Description

Technical Field

[0001] The present application relates to the field of display technologies, and particularly to an array substrate, a manufacturing method thereof, a display panel, and a display device. Background Art

[0002] Flat display devices based on technologies such as Organic Light Emitting Diode (OLED) and Light Emitting Diode (LED) are widely used in various consumer electronic products such as mobile phones, televisions, laptop computers, and desktop computers due to their advantages of high image quality, power saving, thin body, and wide application range, and have become the mainstream in display devices.

[0003] However, the performance of current display devices needs to be improved. Summary of the Invention

[0004] In view of this, the purpose of the present application is to provide an array substrate, a manufacturing method thereof, a display panel, and a display device, which are beneficial to reducing the impact of cutting on line short - circuit and improving the product yield.

[0005] Based on the above purpose, the present application provides an array substrate, including a display area and a non - display area. At least one non - display area includes a bonding area. The display area and the bonding area are arranged along a first direction. The array substrate further includes:

[0006] A substrate, located in the display area and the non - display area;

[0007] A wiring layer, at least partially located in the non - display area and on one side of the substrate;

[0008] A cutting cross - section, located at one end of the substrate and the wiring layer away from the display area;

[0009] The wiring layer includes signal terminals. The signal terminals are located in the bonding area. The signal terminals include a first part and a second part arranged along the first direction. The wiring layer further includes a cutting groove for separating the first part and the second part. The second part is located between the cutting groove and the cutting cross - section.

[0010] In one implementation, the cutting groove extends along a second direction, and the second direction intersects with the first direction;

[0011] Preferably, the second direction is perpendicular to the first direction;

[0012] Preferably, the material of the wiring layer includes at least one of molybdenum, titanium - aluminum - titanium composite material, copper, silver, and indium tin oxide.

[0013] In one embodiment, the array substrate further includes:

[0014] A filling layer, located between the substrate and the wiring layer, and a positive projection of the cutting groove on the substrate is located within a positive projection of the filling layer on the substrate;

[0015] Preferably, the material of the filling layer includes at least one of silicon nitride and silicon oxide.

[0016] In one embodiment, the filling layer includes a recessed portion,

[0017] The cutting groove is located within the recessed portion;

[0018] The first part includes a first extension portion located within the recessed portion, the second part includes a second extension portion located within the recessed portion, and the cutting groove is located between the first extension portion and the second extension portion;

[0019] Preferably, in a cross-section parallel to the first direction and perpendicular to the substrate, a cross-sectional shape of the recessed portion is an inverted trapezoid;

[0020] Preferably, an extending direction of the recessed portion is parallel to an extending direction of the cutting groove;

[0021] Preferably, along the first direction, a size of the cutting groove is smaller than a size of the recessed portion;

[0022] Preferably, along the first direction, the size of the recessed portion is greater than 100 μm.

[0023] In one embodiment, the filling layer includes a dam, and the dam is located between the cutting groove and the cutting section;

[0024] Preferably, a positive projection of the dam on the substrate is located within a positive projection of the second part on the substrate.

[0025] In one embodiment, the array substrate further includes:

[0026] A protective film layer, and the protective film layer is located on a side of the substrate away from the wiring layer;

[0027] Preferably, the material of the protective film layer includes polyethylene terephthalate.

[0028] Based on the same inventive concept, the present application also discloses a method for manufacturing an array substrate, which includes:

[0029] Perform a first cut on the mother board of the array substrate to divide the mother board of the array substrate into a plurality of array substrates; wherein, the array substrate includes a display area and a non-display area, at least one non-display area includes a bonding area, the display area and the bonding area are arranged along a first direction, the mother board of the array substrate includes a substrate and a wiring layer, the wiring layer includes signal terminals, and the signal terminals are located in the bonding area;

[0030] Perform a second cut on the array substrate to form a cut groove in the wiring layer, so that the signal terminals form a first part and a second part arranged at intervals along the first direction.

[0031] In one implementation,

[0032] The first cut and the second cut include laser cutting;

[0033] Preferably, the laser energy used in the second cut is less than the laser energy used in the first cut;

[0034] Preferably, the array substrate further includes a filling layer, and the filling layer is located between the substrate and the wiring layer; when performing the second cut on the array substrate, cut from the wiring layer to the surface of the filling layer far from the substrate side to form the cut groove;

[0035] Preferably, the filling layer includes a recess, and the cut groove is located in the recess;

[0036] Preferably, the first part includes a first extension located in the recess, the second part includes a second extension located in the recess, and the cut groove is located between the first extension and the second extension.

[0037] Based on the same inventive concept, the present application also discloses a display panel, which includes the array substrate described in any one of the above.

[0038] Based on the same inventive concept, the present application also discloses a display device, which includes the above display panel.

[0039] Compared with the prior art, the array substrate provided by the present application forms a cut section through one cut to complete the separation of the array substrate from the mother board, and forms a cut groove through another cut to disconnect the signal terminals of the wiring layer to form a first part and a second part. Among them, the carbonized foreign matters remaining near the cut section are located in the second part and are separated from the first part. The array substrate can be electrically connected to the test circuit or the circuit board through the first part, preventing conductive substances such as carbonized foreign matters generated by cutting from causing a short circuit in the test circuit, or causing burns or electrical defects after module bonding, and can improve the product yield. Description of the Drawings

[0040] To more clearly illustrate the technical solutions in the present application or related technologies, the following will briefly introduce the drawings required for use in the embodiments or related technology descriptions. Obviously, the drawings in the following description are only embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0041] Figure 1 It is a schematic diagram of a related array substrate;

[0042] Figure 2 It is a schematic diagram of the layer structure of a related array substrate;

[0043] Figure 3 It is a schematic diagram of the structure of an array substrate in an embodiment of the present application;

[0044] Figure 4 It is a schematic diagram of the layer structure of an array substrate in an embodiment of the present application;

[0045] Figure 5 It is a schematic diagram of the layer structure of an array substrate in another embodiment of the present application;

[0046] Figure 6 It is a schematic diagram of the layer structure of an array substrate in another embodiment of the present application;

[0047] Figure 7 It is a schematic diagram of the layer structure of an array substrate in another embodiment of the present application;

[0048] Figure 8 It is a schematic diagram of the layer structure of an array substrate in another embodiment of the present application;

[0049] Figure 9 It is a schematic diagram of an array substrate mother board in another embodiment of the present application;

[0050] Figure 10 It is a flowchart of the manufacturing method of an array substrate in another embodiment of the present application.

[0051] Marking description: 100, array substrate; 101, display area; 102, bonding area; 11, substrate; 12, wiring layer; 120, signal terminal; 121, first part; 1211, first extension; 122, second part; 1221, second extension; 13, cutting section; 14, cutting groove; 15, filling layer; 151, recess; 152, dam; 16, protective film layer; 200, carbonized foreign matter;

[0052] 10, array substrate mother board. Detailed implementation manners

[0053] To make the objectives, technical solutions, and advantages of the present application clearer and more understandable, the following further elaborates on the present application in detail with reference to specific embodiments and the accompanying drawings.

[0054] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present application should have the ordinary meanings understood by those with ordinary skills in the field to which the present application belongs. The "first", "second", and similar terms used in the embodiments of the present application do not indicate any order, quantity, or importance, but are only used to distinguish different components. Words such as "include" or "comprise" mean that the elements or objects appearing before this word cover the elements or objects listed after this word and their equivalents, without excluding other elements or objects. Words such as "connect" or "be connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Upper", "lower", "left", "right", etc. are only used to represent relative positional relationships, and when the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0055] Please refer to Figure 1 , Figure 2 As shown, a related array substrate 100 is provided. The array substrate 100 includes a display area 101 and a non-display area. The non-display area is disposed around the display area 101, and the non-display area includes a bonding area 102. The array substrate 100 includes a substrate 11, a wiring layer 12, and a protective film layer 16. The wiring layer 12 and the protective film layer 16 are located on both sides of the substrate 11. Signal terminals 120 are provided in the wiring layer 12, and the signal terminals 120 are located in the bonding area 102.

[0056] In the manufacturing process of the array substrate or the display panel, a laser is usually used to cut the master substrate. During the process of using the laser to cut the substrate 11 or the protective film layer 16, carbonized foreign matters 200 will be generated and remain on the signal terminals 120 near the cutting position. The carbonized foreign matters 200 have conductive properties. Currently, it is difficult to detect the carbonized foreign matters 200 on the signal terminals 120 after cutting. During the testing of the display panel or after module bonding, the conductive carbonized foreign matters 200 may cause terminal burns or electrical defects, resulting in a loss of production yield. That is to say, due to a large amount of carbonized conductive substances being generated during the laser cutting process and remaining on the signal terminals 120, during the subsequent testing of the product or the module bonding process, it may cause a short circuit in the line signals of the connected FPCB (Flexible Printed Circuit Board), causing burns or electrical defects to the product.

[0057] Based on this, the present application provides an array substrate, a manufacturing method thereof, a display panel, and a display device to solve the above problems.

[0058] Please refer to Figure 3 and Figure 4 As shown, the array substrate 100 provided by an embodiment of the present application includes a display area 101 and a non-display area. At least one non-display area includes a bonding area 102. The display area 101 and the bonding area 102 are arranged along a first direction (such as the X direction in the figure). The array substrate 100 further includes a substrate 11, a wiring layer 12, a cutting section 13, signal terminals 120, and a cutting groove 14. Among them, the substrate 11 and the wiring layer 12 are located in the display area 101 and the non-display area, and the wiring layer 12 is located on one side of the substrate 11. The cutting section 13 is located at one end of the substrate 11 and the wiring layer 12 away from the display area 101. The wiring layer 12 includes signal terminals 120. The signal terminals 120 are located in the bonding area 102. The signal terminals 120 include a first part 121 and a second part 122 arranged along the first direction. The second part 122 is located on the side of the first part 121 away from the display area 101. The wiring layer 12 further includes a cutting groove 14. The cutting groove 14 is located between the first part 121 and the second part 122 to separate the first part 121 and the second part 122. The second part 122 is located between the cutting groove 14 and the cutting section 13.

[0059] Among them, the signal terminals 120 are specifically located in the pad area of the bonding area 102. In the display module, the signal terminals 120 can be used to bond the driving chip and the flexible printed circuit board to provide a channel for signal transmission. At the same time, the signal terminals 120 can also be used as connection points for signal driving during the electrical testing of the display product, so as to provide an interface for the testing device to connect with the internal circuit of the display panel, enabling the test signal to drive the display panel to detect whether its electrical performance meets the standards.

[0060] For the array substrate 100 provided by the embodiment of the present application, the cutting section 13 is formed by one cutting to separate the array substrate 100 from the mother board. The cutting groove 14 is formed by another cutting to disconnect the signal terminals 120 of the wiring layer 12 to form a first part 121 and a second part 122. Among them, the first part 121 is close to the display area 101, and the second part 122 is located between the cutting groove 14 and the cutting section 13. In this way, the carbonized foreign matter 200 remaining near the cutting section 13 is located in the second part 122 and is separated from the first part 121. The array substrate 100 can be electrically connected to the test circuit or the circuit board through the first part 121, preventing conductive substances such as the carbonized foreign matter 200 remaining in the second part 122 from causing a short circuit in the test circuit, or causing terminal burns or electrical defects after module bonding, and improving the product yield.

[0061] Specifically, a plurality of parallel signal terminals 120 are provided in the wiring layer 12, and the signal terminals 120 extend in the first direction. The cutting section 13 covers at least one end of the substrate 11 and the wiring layer 12 away from the display area 101. Both the cutting section 13 and the cutting groove 14 are formed by laser cutting. The cutting section 13 is formed by the first cutting and penetrates through all the layer structures of the array substrate 100, including the substrate 11 and the wiring layer 12, so as to separate the array substrate 100 from the mother board; the cutting groove 14 is formed by the second cutting and only penetrates through the wiring layer 12 to disconnect the signal terminals 120 in the wiring layer 12.

[0062] In another embodiment, the cutting groove 14 can also be cut on the wiring layer 12 by the first cutting first, and then the cutting section 13 is formed by the second cutting.

[0063] Continue to refer to Figure 3 and Figure 4 As shown, in one embodiment, the cutting groove 14 extends in the second direction (such as the Y direction in the figure), and the second direction intersects with the first direction. Specifically, the extending direction of the signal terminal 120 is the first direction, and there is an included angle between the extending direction of the cutting groove 14 and the extending direction of the signal terminal 120. Among them, each signal terminal 120 in the wiring layer 12 is separated by the cutting groove 14, so that each signal terminal 120 forms a first part 121 and a second part 122 arranged in the first direction, thereby preventing the carbonized foreign matter 200 located in the second part 122 from affecting the electrical connection at the first part 121.

[0064] Preferably, the second direction is perpendicular to the first direction. That is, the included angle between the extending direction of the cutting groove 14 and the extending direction of the signal terminal 120 is 90 degrees. In another embodiment, the included angle formed between the second direction and the first direction is 70 degrees, 80 degrees, etc.

[0065] Optionally, the material of the wiring layer 12 includes at least one of molybdenum, titanium-aluminum-titanium composite material, copper, silver, and indium tin oxide.

[0066] Refer to Figure 5 As shown, in one embodiment, the array substrate 100 further includes a filling layer 15. The filling layer 15 is located between the substrate 11 and the wiring layer 12. The orthographic projection of the cutting groove 14 on the substrate 11 is located within the orthographic projection of the filling layer 15 on the substrate 11, preventing the laser from cutting the substrate 11 when cutting the cutting groove 14 in the wiring layer 12 and causing damage to the substrate 11.

[0067] Specifically, the bottom of the cutting groove 14 is located on the surface of the filling layer 15 away from the substrate 11.

[0068] Preferably, the material of the filling layer 15 includes at least one of silicon nitride (SiNx) and silicon oxide (SiOx). Among them, silicon nitride and silicon oxide are silicon-based materials. The filling layer 15 made of silicon-based materials has good electrical insulation and environmental stability.

[0069] Among them, the substrate 11, the filling layer 15 and the wiring layer 12 are stacked in sequence along the third direction (the Z direction in the figure). The third direction, the second direction and the first direction are perpendicular to each other pairwise. The substrate 11 provides mechanical support, the wiring layer 12 is used to form a circuit path to achieve circuit connection and communication, and the filling layer 15 plays a role of filling and isolation.

[0070] Specifically, the material of the substrate 11 includes PI (Polyimide) material. Polyimide has excellent flexibility and bendability and is often used in the manufacture of foldable, rollable or stretchable display panels.

[0071] Refer to Figure 6 As shown, in one embodiment, the filling layer 15 includes a recess 151, and the cutting groove 14 is located in the recess 151.

[0072] The first part 121 includes a first extension 1211, and the first extension 1211 is located in the recess 151. The second part 122 includes a second extension 1221, and the second extension 1221 is located in the recess 151. The cutting groove 14 is located between the first extension 1211 and the second extension 1221.

[0073] Among them, a recess 151 is provided in the filling layer 15. The recess 151 is formed by the filling layer 15 recessing toward the side (downward) close to the substrate 11, so that the first extension 1211 of the first part 121 and the second extension 1221 of the second part 122 in the wiring layer 12 extend into the recess 151, and at the same time the cutting groove 14 is located in the recess 151. Since a small amount of carbonized conductive substances will also be generated when the cutting groove 14 is formed by cutting, by providing the recess 151, the carbonized conductive substances can be left in the recess 151 to avoid short circuit of the metal wires of the first part 121 of the signal terminal 120 due to the carbonized substances; moreover, during the testing and module process stages, it can prevent the circuit board from contacting the cutting groove 14, thereby reducing the influence of the carbonized conductive substances at the cutting groove 14 on the line short circuit, reducing the electrical defects of the product caused by the short circuit problem, and improving the yield and stability of the product.

[0074] Preferably, in a cross-section parallel to the first direction and perpendicular to the substrate 11, the cross-sectional shape of the recess 151 is an inverted trapezoid. Among them, the recess 151 is an inverted trapezoidal groove, which can collect the carbonized conductive substances generated when the cutting groove 14 is formed by cutting and limit their diffusion.

[0075] Preferably, along the third direction, the depth of the cutting groove 14 is less than the depth of the recess 151.

[0076] Preferably, the extending direction of the recess 151 is parallel to the extending direction of the cutting groove 14, that is, both the recess 151 and the cutting groove 14 extend along the second direction.

[0077] Preferably, along the first direction, the size of the cutting groove 14 is less than the size of the recess 151, that is, the width dimension of the cutting groove 14 is less than the width dimension of the recess 151, so that the cutting groove 14 can be formed by cutting in the recess 151.

[0078] Preferably, along the first direction, the size of the recess 151 is greater than 100 μm, for example, 120 μm, 150 μm, etc.

[0079] Referring to Figure 7 As shown, in one embodiment, the filling layer 15 includes a dam 152, and the dam 152 is located between the cutting groove 14 and the cutting section 13.

[0080] Preferably, the orthographic projection of the dam 152 on the substrate 11 is located within the orthographic projection of the second part 122 on the substrate 11.

[0081] Specifically, in the first direction, the first part 121 and the second part 122 are located on both sides of the recess 151, and the cutting groove 14 and the cutting section 13 are located on both sides of the dam 152; in the third direction, the dam 152 corresponds to the second part 122. Taking the third direction as the up-down direction as an example, both the cutting groove 14 and the cutting section 13 are lower than the highest position of the dam 152, and the dam 152 protrudes from the cutting groove 14 and the cutting section 13, so that the carbonized foreign matter 200 remaining near the cutting section 13 will not contact the test circuit or the circuit board, further avoiding short circuit or other electrical problems.

[0082] Referring to Figure 8 As shown, in one embodiment, the array substrate 100 further includes a protective film layer 16, and the protective film layer 16 is located on the side of the substrate 11 away from the wiring layer 12. Among them, the protective film layer 16 is mainly used to protect the product from external stress and cause film layer damage, and also protect the circuits in the substrate 11 and the wiring layer 12 from moisture, oxygen, dust and other pollutants, so as to ensure the display stability and reliability.

[0083] Preferably, the material of the protective film layer 16 includes polyethylene terephthalate (PET).

[0084] Based on the same inventive concept, referring to Figure 10 As shown, another embodiment of the present application also discloses a manufacturing method of an array substrate, and the structure of the manufactured array substrate 100 can be referred to Figures 3 to 9。The manufacturing method of the array substrate includes:

[0085] Step S1: Perform a first cut on the array substrate mother board 10 to divide the array substrate mother board 10 into multiple array substrates 100;

[0086] Among them, the array substrate mother board 10 includes a display area 101 and a non-display area. At least one non-display area includes a bonding area 102. The display area 101 and the bonding area 102 are arranged along a first direction; the array substrate mother board 10 includes a substrate 11 and a wiring layer 12. The wiring layer 12 includes signal terminals 120, and the signal terminals 120 are located in the bonding area 102.

[0087] Step S2: Perform a second cut on the array substrate 100 to form a cutting groove 14 in the wiring layer 12, so that the signal terminals 120 form a first part 121 and a second part 122 arranged at intervals along the first direction.

[0088] Specifically, a cutting section 13 is formed through the first cut, so that the array substrate mother board 10 is cut and separated from the whole piece structure into single-piece array substrates 100. The cutting section 13 is formed at one end of the array substrate 100 away from the display area 101. By performing a second cut on the wiring layer 12, a cutting groove 14 is formed, and the signal terminals 120 are divided into a first part 121 and a second part 122 arranged along the first direction. The second part 122 is located between the cutting groove 14 and the cutting section 13.

[0089] In the manufacturing method of the array substrate 100 provided by the embodiment of the present application, a cutting section 13 is formed through the first cut to complete the separation of the array substrate 100 from the array substrate mother board 10. A cutting groove 14 is formed through the second cut, so that the signal terminals 120 of the wiring layer 12 are disconnected to form a first part 121 and a second part 122. Among them, the first part 121 is close to the display area 101, and the second part 122 is located between the cutting groove 14 and the cutting section 13. In this way, the carbonized foreign matter 200 remaining near the cutting section 13 is located in the second part 122 and is separated from the first part 121. The array substrate 100 can be electrically connected to the test circuit or the circuit board through the first part 121, preventing conductive substances such as the carbonized foreign matter 200 from causing a short circuit in the test circuit, or causing burns or electrical defects after module bonding, and can improve the product yield.

[0090] In one embodiment, the first cut and the second cut include laser cutting.

[0091] Preferably, the laser energy used in the second cut is less than the laser energy used in the first cut.

[0092] Among them, the laser energy used in the first cutting is relatively large, mainly for cutting the product from a whole piece into single pieces. A relatively large amount of energy is required to penetrate the product material to ensure the cutting and separating effect. Since the overall structure of the product is relatively thick and strong, using a high-energy laser can quickly and effectively complete the cutting and separating operation. However, high-energy cutting will generate more carbonized conductive substances, which may cause conduction short circuits between the product terminals.

[0093] The laser energy used in the second cutting is relatively small, mainly for cutting the signal terminal 120 into two parts, thereby blocking the line short circuit caused by the conductive substances at the cutting position and improving the product defects. If a higher-energy laser is used, it may cause excessive damage to the surrounding circuits and structures, generate more carbonized conductive substances, and affect the product performance. Therefore, a lower-energy laser is adopted, which can not only accurately cut the target wire but also reduce the generation of carbonized substances and reduce the impact on other parts of the product. At the same time, in cooperation with the concave structure of the filling layer 15, even if a small amount of carbonized substances are generated, they can be confined within the concave portion 151.

[0094] Preferably, the array substrate 100 further includes a filling layer 15, and the filling layer 15 is located between the substrate 11 and the wiring layer 12; in step S2, when the array substrate 100 is subjected to the second cutting, the wiring layer 12 is cut to the surface of the filling layer 15 away from the substrate 11 to form a cutting groove 14.

[0095] Preferably, the filling layer 15 includes a concave portion 151, and the cutting groove 14 is located within the concave portion 151.

[0096] The first part 121 includes a first extension portion 1211, and the first extension portion 1211 is located within the concave portion 151. The second part 122 includes a second extension portion 1221, and the second extension portion 1221 is located within the concave portion 151. The cutting groove 14 is located between the first extension portion 1211 and the second extension portion 1221.

[0097] Based on the same inventive concept, another embodiment of the present application also discloses a display panel, which includes the array substrate 100 in the above embodiment.

[0098] For the display panel provided in this embodiment, the array substrate 100 forms a cutting section 13 through one-time cutting, so that the array substrate 100 is separated from the array substrate mother board 10, and a cutting groove 14 is formed through another cutting, so that the signal terminals 120 of the wiring layer 12 are disconnected to form a first part 121 and a second part 122. Among them, the first part 121 is close to the display area 101, and the second part 122 is located between the cutting groove 14 and the cutting section 13. In this way, the carbonized foreign matter 200 remaining near the cutting section 13 is located in the second part 122 and is separated from the first part 121. The array substrate 100 can be electrically connected to the test circuit or the circuit board through the first part 121, preventing conductive substances such as the carbonized foreign matter 200 from causing a short circuit in the test circuit, or causing burns or electrical defects after module bonding, and can improve the product yield.

[0099] Based on the same inventive concept, another embodiment of the present application also discloses a display device, which includes the display panel in the above embodiment. Further, the display device includes a mobile phone, a VR device, a computer, a television, a vehicle-mounted display device, etc.

[0100] For a display device provided in this embodiment, the array substrate 100 in the display panel forms a cutting section 13 through one-time cutting, so that the array substrate 100 is separated from the array substrate mother board 10, and a cutting groove 14 is formed through another cutting, so that the signal terminals 120 of the wiring layer 12 are disconnected to form a first part 121 and a second part 122. Among them, the first part 121 is close to the display area 101, and the second part 122 is located between the cutting groove 14 and the cutting section 13. In this way, the carbonized foreign matter 200 remaining near the cutting section 13 is located in the second part 122 and is separated from the first part 121. The array substrate 100 can be electrically connected to the test circuit or the circuit board through the first part 121, preventing conductive substances such as the carbonized foreign matter 200 from causing a short circuit in the test circuit, or causing burns or electrical defects after module bonding, and can improve the product yield.

[0101] Although the present application has been described in conjunction with specific embodiments of the present application, many substitutions, modifications, and variations of these embodiments will be apparent to those of ordinary skill in the art based on the foregoing description.

[0102] It should be noted that some embodiments of the present application have been described above. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims may be performed in a different order than in the above embodiments and still achieve the desired result. Additionally, the processes depicted in the figures do not necessarily require the particular order or sequential order shown to achieve the desired result. In certain implementations, multitasking and parallel processing are also possible or may be advantageous.

[0103] Embodiments of the present application are intended to cover all such substitutions, modifications, and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present application shall be included within the protection scope of the present application.

Claims

1. An array substrate, characterized in that: The array substrate comprises a display area and a non-display area, at least one non-display area comprises a bonding area, the display area and the bonding area are arranged along a first direction, and the array substrate further comprises: A substrate, located in the display area and the non-display area; A wiring layer, at least partly located in the non-display area and located on one side of the substrate; A cutting section is located at an end of the substrate and the wiring layer away from the display area; The routing layer includes a signal terminal, the signal terminal is located in the bonding area, the signal terminal includes a first part and a second part arranged along a first direction, the routing layer also includes a cutting groove for separating the first part and the second part, and the second part is located between the cutting groove and the cutting section.

2. The array substrate according to claim 1, characterized in that: The cutting groove extends along a second direction, and the second direction intersects with the first direction; Preferably, the second direction is perpendicular to the first direction; Preferably, the material of the routing layer includes at least one of molybdenum, titanium-aluminum-titanium composite material, copper, silver, and indium tin oxide.

3. The array substrate according to claim 1, characterized in that: The array substrate further includes: A filling layer is located between the substrate and the routing layer, and the orthographic projection of the cutting groove on the substrate is located within the orthographic projection of the filling layer on the substrate; Preferably, the material of the filling layer includes at least one of silicon nitride and silicon oxide.

4. The array substrate according to claim 3, characterized in that: The filling layer comprises a recessed portion, and the cutting groove is located in the recessed portion; The first portion includes a first extension portion located in the recessed portion, the second portion includes a second extension portion located in the recessed portion, and the cutting groove is located between the first extension portion and the second extension portion; Preferably, along a cross section parallel to the first direction and perpendicular to the substrate, the cross-sectional shape of the recessed portion is an inverted trapezoid; Preferably, the extending direction of the recessed portion is parallel to the extending direction of the cutting groove; Preferably, along the first direction, the size of the cutting groove is smaller than the size of the recessed portion; Preferably, along the first direction, the size of the recessed portion is greater than 100 μm.

5. The array substrate according to claim 3, characterized in that: The filling layer includes a dam, and the dam is located between the cutting groove and the cutting section; Preferably, an orthographic projection of the dam on the substrate is located within an orthographic projection of the second portion on the substrate.

6. The array substrate according to claim 1, characterized in that: The array substrate further includes: A protective film layer, the protective film layer is located on a side of the substrate away from the wiring layer; Preferably, the material of the protective film layer includes polyethylene terephthalate.

7. A method for manufacturing an array substrate, characterized in that: include: Performing a first cutting on the array substrate motherboard, dividing the array substrate motherboard into a plurality of array substrates; wherein the array substrate comprises a display area and a non-display area, at least one non-display area comprises a bonding area, the display area and the bonding area are arranged along a first direction, the array substrate motherboard comprises a substrate and a wiring layer, the wiring layer comprises a signal terminal, and the signal terminal is located in the bonding area; The array substrate is cut for a second time to form cutting grooves in the wiring layer, so that the signal terminals are formed into a first part and a second part which are arranged at intervals along the first direction.

8. The method for manufacturing an array substrate according to claim 7, characterized in that: The first cutting and the second cutting include laser cutting; Preferably, the laser energy used in the second cutting is less than the laser energy used in the first cutting; Preferably, the array substrate further comprises a filling layer, wherein the filling layer is located between the substrate and the wiring layer; when the array substrate is cut for the second time, the cutting is performed from the wiring layer to the surface of the filling layer away from the substrate to form the cutting groove; Preferably, the filling layer comprises a recessed portion, and the cutting groove is located in the recessed portion; Preferably, the first portion includes a first extending portion located in the recessed portion, the second portion includes a second extending portion located in the recessed portion, and the cutting groove is located between the first extending portion and the second extending portion.

9. A display panel, characterized in that: It comprises the array substrate as claimed in any one of claims 1 to 6.

10. A display device, characterized in that: Comprising the display panel as claimed in claim 9.

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