Alignment circuit for mixed connection of null line and live line

Abstract

The neutral wire and live wire mixed connection alignment circuit comprises a first voltage dividing module and a second voltage dividing module which are respectively connected with a first alternating current end and a second alternating current end; the forward conduction module and the reverse conduction module are connected between the first voltage dividing module and the second voltage dividing module; the pressure difference detection module is respectively connected with the first voltage dividing module and the second voltage dividing module and is used for detecting the pressure difference between the second end of the first voltage dividing module and the second end of the second voltage dividing module; the logic judgment module is connected with the voltage difference detection module and is used for locking a line position state result corresponding to the voltage difference in a first half-wave period of alternating current power-on; and the alignment module is connected with the logic judgment module and is used for carrying out alignment according to the line bit state result output by the logic judgment module. Through the implementation of the embodiment, the line position state result can be quickly locked through differential pressure detection, interference is avoided, and the detection speed is extremely high.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit technology, and particularly to a zero-fire wire mixed connection alignment circuit. Background Art

[0002] Currently, in scenarios where multiple lighting lamps are connected to alternating current, it is necessary to distinguish between the zero wire and the live wire. The reason is that emergency lights need to perform impedance detection when powered off. Each chip system will release a detection current. Under normal circumstances, the detection current of one chip system should flow back to itself completely to avoid interfering with other systems and causing other systems to make incorrect judgments. However, using manual methods to distinguish requires a great deal of effort. There are also technical solutions in the prior art that use a phase detection circuit to actively detect the zero-fire wire positions, but usually complex circuits need to be set up, with weak anti-interference ability and high power consumption. Summary of the Invention

[0003] The purpose of the embodiments of the present invention is to propose a zero-fire wire mixed connection alignment circuit to solve the above problems. The embodiments of the present invention achieve the above purpose through the following technical solutions.

[0004] The embodiments of the present invention provide a zero-fire wire mixed connection alignment circuit, including: a first voltage division module, whose first end is connected to the first AC terminal; a second voltage division module, whose first end is connected to the second AC terminal; a forward conduction module and a reverse conduction module connected in parallel, connected between the second end of the first voltage division module and the second end of the second voltage division module; a pressure difference detection module, which is respectively connected to the first voltage division module and the second voltage division module to detect the pressure difference between the second end of the first voltage division module and the second end of the second voltage division module; a logic judgment module, which is connected to the pressure difference detection module. The logic judgment module locks the line position state result corresponding to the pressure difference within the first half-wave cycle when the alternating current is powered on; and an alignment module, which is connected to the logic judgment module and aligns according to the line position state result output by the logic judgment module.

[0005] In some embodiments, the pressure difference detection module is respectively connected to the voltage division terminals of the first voltage division module and the second voltage division module. When the absolute value of the pressure difference between the voltage division terminal of the first voltage division module and the voltage division terminal of the second voltage division module detected is greater than a first preset threshold, it is determined that the alternating current is powered on.

[0006] In some embodiments, the logic judgment module locks the line position state result corresponding to the pressure difference when the pressure difference detection module detects that the absolute value of the pressure difference changes from being greater than the first preset threshold to being less than the first preset threshold within the first half-wave cycle.

[0007] In some embodiments, there are multiple zero-fire wire misconnection alignment circuits connected to the first AC terminal and the second AC terminal. After locking the line position state result corresponding to the voltage difference, when the absolute value of the voltage difference reaches the first preset threshold again, the logic judgment module outputs the line position state result.

[0008] In some embodiments, there are multiple zero-fire wire misconnection alignment circuits connected to the first AC terminal and the second AC terminal. When each voltage difference detection module detects that the absolute value of the first voltage difference reaches the first preset threshold, it is determined that the first AC terminal and the second AC terminal are powered on, and multiple zero-fire wire misconnection alignment circuits synchronously perform line position state detection.

[0009] In some embodiments, both the forward conduction threshold of the forward conduction module and the reverse conduction threshold of the reverse conduction module are greater than the absolute value of the voltage difference applied to the voltage dividing end of the first voltage dividing module and the voltage dividing end of the second voltage dividing module in the case of impedance detection.

[0010] In some embodiments, when the line position state result indicates that the voltage of the first AC terminal is greater than the voltage of the second AC terminal, the alignment module adjusts the current flow direction in sequence as the alignment module, the voltage dividing end of the first voltage dividing module, the first AC terminal, the second AC terminal, the voltage dividing end of the second voltage dividing module, and the alignment module; when the line position state result indicates that the voltage of the first AC terminal is less than the voltage of the second AC terminal, the alignment module adjusts the current flow direction in sequence as the alignment module, the voltage dividing end of the second voltage dividing module, the second AC terminal, the first AC terminal, the voltage dividing end of the first voltage dividing module, and the alignment module.

[0011] In some embodiments, the first voltage dividing module includes a first resistor and a second resistor. The first end of the first resistor serves as the first end of the first voltage dividing module, the second end of the second resistor serves as the second end of the first voltage dividing module, and the second end of the first resistor and the first end of the second resistor serve as the voltage dividing end of the first voltage dividing module; the second voltage dividing module includes a third resistor and a fourth resistor. The second end of the fourth resistor serves as the first end of the second voltage dividing module, the first end of the third resistor serves as the second end of the second voltage dividing module, and the second end of the third resistor and the first end of the fourth resistor serve as the voltage dividing end of the second voltage dividing module; the forward conduction module includes multiple forward diodes connected in series; the reverse conduction module includes multiple reverse diodes connected in series.

[0012] In some embodiments, the voltage difference detection module includes: a first detection end for connecting to a voltage to be detected terminal and a second detection end for connecting to another voltage to be detected terminal; a first current conversion unit, whose first end is connected to the first detection end and whose second end is connected to the second detection end. When the voltage at the first detection end is greater than the voltage at the second detection end, the output end of the first current conversion unit outputs a first current; a first judgment unit, which determines the voltage difference between the first detection end and the second detection end according to the first current.

[0013] In some embodiments, the differential pressure detection module further includes: a second current conversion unit, whose first end is connected to the first detection end and whose second end is connected to the second detection end. When the voltage at the first detection end is less than the voltage at the second detection end, the output end of the second current conversion unit outputs a second current; a second judgment unit, which determines the differential pressure between the second detection end and the first detection end according to the second current.

[0014] Compared with the prior art, by adopting the zero-fire wire misconnection alignment circuit including the first voltage division module, the second voltage division module, the forward conduction module, the reverse conduction module, the differential pressure detection module, the logic judgment module and the alignment module provided in this embodiment, the line position state result can be locked within the first half-wave cycle of the alternating current power-on through differential pressure detection, without interference, the circuit complexity is low, and the detection speed is extremely fast. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments of the present invention. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0016] Figure 1 is a schematic diagram of a module of the zero-fire wire misconnection alignment circuit provided in this embodiment;

[0017] Figure 2 is a waveform schematic diagram of the zero-fire wire misconnection alignment circuit provided in this embodiment;

[0018] Figure 3 is another waveform schematic diagram of the zero-fire wire misconnection alignment circuit provided in this embodiment;

[0019] Figure 4 is a circuit structure schematic diagram of the zero-fire wire misconnection alignment circuit provided in this embodiment;

[0020] Figure 5 is a current flow schematic diagram of the zero-fire wire misconnection alignment circuit provided in this embodiment;

[0021] Figure 6 is another current flow schematic diagram of the zero-fire wire misconnection alignment circuit provided in this embodiment;

[0022] Figure 7 is a schematic diagram of a structure of the differential pressure detection module in the zero-fire wire misconnection alignment circuit provided in this embodiment;

[0023] Figure 8 is another schematic diagram of a structure of the differential pressure detection module in the zero-fire wire misconnection alignment circuit provided in this embodiment;

[0024] Figure 9 It is another structural schematic diagram of the voltage difference detection module in the zero-line and live-line mixed connection alignment circuit provided by this embodiment. Detailed implementation manners

[0025] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0026] "Coupling" or "connection" in the present invention includes both direct connection and indirect connection, such as connection through some active devices, passive devices or electrical conduction media; it may also include connections through other active devices or passive devices known to those skilled in the art on the basis of achieving the same or similar functional purposes, such as connections through circuits or components such as switches and follower circuits.

[0027] Please refer to Figure 1 , the embodiment of the present invention provides a zero-line and live-line mixed connection alignment circuit, which includes a first voltage division module 11, a second voltage division module 12, a forward conduction module 13, a reverse conduction module 14, a voltage difference detection module 15, a logic judgment module 16, and an alignment module 17. Among them, the first end of the first voltage division module 11 is connected to the first AC terminal AC_1; the first end of the second voltage division module 12 is connected to the second AC terminal AC_2; the forward conduction module 13 and the reverse conduction module 14 are connected in parallel between the second end B of the first voltage division module 11 and the second end C of the second voltage division module 12; the voltage difference detection module 15 is respectively connected to the first voltage division module 11 and the second voltage division module 12, and the voltage difference detection module 15 detects the voltage difference V-BC between the second end B of the first voltage division module 11 and the second end C of the second voltage division module 12; the logic judgment module 16 is connected to the voltage difference detection module 15, and the logic judgment module 16 locks the line position state result corresponding to the voltage difference V-BC within the first half-wave cycle when the alternating current is powered on; the alignment module 17 is connected to the logic judgment module 16 and performs alignment according to the line position state result output by the logic judgment module 16.

[0028] In this embodiment, the first AC terminal AC_1 can be used to connect to one of the neutral wire and the live wire, and the second AC terminal AC_2 can be used to connect to the other of the neutral wire and the live wire. When there is alternating current at the first AC terminal AC_1 and the second AC terminal AC_2, there is a voltage difference V-BC between the first AC terminal AC_1 and the second AC terminal AC_2. The first voltage dividing module 11 and the second voltage dividing module 12 can divide the voltages of the first AC terminal AC_1 and the second AC terminal AC_2. Both the first voltage dividing module 11 and the second voltage dividing module 12 can include resistors.

[0029] In this embodiment, the conduction direction of the forward conduction module 13 can be regarded as flowing from the first AC terminal AC_1 to the second AC terminal AC_2, and the conduction direction of the reverse conduction module 14 can be regarded as flowing from the second AC terminal AC_2 to the first AC terminal AC_1. The "forward" and "reverse" here are only used to indicate that the conduction directions of the forward conduction module 13 and the reverse conduction module 14 are opposite.

[0030] In this embodiment, the voltage difference detection module 15 can detect the voltage difference V-BC between the second terminal B of the first voltage dividing module 11 and the second terminal C of the second voltage dividing module 12, and the logic judgment module 16 can obtain the corresponding line position state result according to this voltage difference V-BC. Specifically, the logic judgment module 16 can obtain the voltage difference V-BC detected by the voltage difference detection module 15 within the first half-wave cycle when the alternating current connected to the first AC terminal AC_1 and the second AC terminal AC_2 is powered on, and lock the line position state result corresponding to this voltage difference V-BC.

[0031] In this embodiment, a pulse can be given immediately after the alternating current is powered on. The pulse emission time is within the first half-wave cycle of the power-on. When the pulse is emitted, the line position state result corresponding to the voltage difference V-BC is locked. It is also possible to detect the interval where the first half-wave cycle of the alternating current power-on is located by detecting the voltage difference V-BC. There is no specific limitation on the confirmation method of the first half-wave cycle of the alternating current power-on here.

[0032] When the first AC terminal AC_1 is connected to the live wire and the second AC terminal AC_2 is connected to the neutral wire, as Figure 2As shown, the time period from time t0 to time t3 is the first half-wave cycle after the alternating current is powered on. During the time period from time t0 to time t3, the voltage at the second terminal B of the first voltage dividing module 11 is greater than the voltage at the second terminal C of the second voltage dividing module 12. The differential pressure detection module 15 detects the differential pressure V-BC between the second terminal B of the first voltage dividing module 11 and the second terminal C of the second voltage dividing module 12. When the differential pressure V-BC is greater than 0, the logic judgment module 16 outputs "1". At this time, the line position state result is that the line voltage connected to the first AC terminal AC_1 is greater than the line voltage connected to the second AC terminal AC_2. Theoretically, the line position state result corresponding to the differential pressure V-BC can be locked at any time during the time period from time t0 to time t3.

[0033] Similarly, when the first AC terminal AC_1 is connected to the neutral line and the second AC terminal AC_2 is connected to the live line, as Figure 3 shown, the time period from time t0 to time t3 is the first half-wave cycle after the alternating current is powered on. During the time period from time t0 to time t3, the voltage at the second terminal B of the first voltage dividing module 11 is less than the voltage at the second terminal C of the second voltage dividing module 12. The differential pressure detection module 15 detects the differential pressure V-BC between the second terminal B of the first voltage dividing module 11 and the second terminal C of the second voltage dividing module 12. When the differential pressure V-BC is less than 0, the logic judgment module 16 outputs "0". At this time, the line position state result is that the line voltage connected to the first AC terminal AC_1 is less than the line voltage connected to the second AC terminal AC_2. Theoretically, the line position state result corresponding to the differential pressure V-BC can be locked at any time during the time period from time t0 to time t3.

[0034] In this embodiment, the alignment module 17 can adjust the current direction of the internal circuit of the chip relative to the first AC terminal AC_1 and the second AC terminal AC_2, uniformly determine the line position of the alternating current within the first half-wave cycle after the alternating current is powered on, and complete the mixed connection alignment.

[0035] In this embodiment, different from the phase detection for achieving the zero-fire line mixed connection alignment, the anti-interference ability of the phase mixing scheme is poor. During multiple alignment processes, due to interference, part of the system phase information will shift, resulting in incorrect identification of the zero-fire line state and inability to perform alignment. By adopting the zero-fire line mixed connection alignment circuit including the first voltage dividing module 11, the second voltage dividing module 12, the forward conduction module 13, the reverse conduction module 14, the differential pressure detection module 15, the logic judgment module 16, and the alignment module 17, the line position state result can be locked within the first half-wave cycle after the alternating current is powered on through the detection of the differential pressure V-BC, without interference, with a low circuit complexity and an extremely fast detection speed.

[0036] In some embodiments, the differential pressure detection module 15 may be respectively connected to the voltage dividing end A of the first voltage dividing module 11 and the voltage dividing end D of the second voltage dividing module 12. When it detects that the absolute value of the differential pressure |V-AD| between the voltage dividing end A of the first voltage dividing module 11 and the voltage dividing end D of the second voltage dividing module 12 is greater than the absolute value threshold |Vth1|, it determines that the alternating current is powered on.

[0037] Among them, the absolute value threshold |Vth1| may be greater than the forward conduction threshold of the forward conduction module 13 and the reverse conduction threshold of the reverse conduction module 14. When it detects that the alternating current is powered on, the differential pressure detection module 15 can surely detect the differential pressure V-BC between the second end B of the first voltage dividing module 11 and the second end C of the second voltage dividing module 12, and can quickly provide the line position state result corresponding to this differential pressure V-BC.

[0038] In this embodiment, when it detects that the absolute value of the differential pressure |V-AD| between the voltage dividing end A of the first voltage dividing module 11 and the voltage dividing end D of the second voltage dividing module 12 is greater than the absolute value threshold |Vth1|, it may output a rising edge and determine that the alternating current is powered on. In this way, when there are multiple zero-fire wire mixed connection alignment circuits connected to the first AC terminal AC_1 and the second AC terminal AC_2, the power-on time of the alternating current can be uniformly determined simultaneously, and at the same time, the differential pressure V-BC is immediately detected to judge whether the alternating current is powered on.

[0039] In some embodiments, when the differential pressure detection module 15 detects that the absolute value of the differential pressure |V-AD| changes from being greater than the absolute value threshold |Vth1| to being less than the absolute value threshold |Vth1| within the first half-wave period, the logic judgment module 16 locks the line position state result corresponding to the differential pressure V-BC.

[0040] In this embodiment, since the line position result corresponding to the differential pressure V-BC is locked within the first half-wave period when the alternating current is powered on, the absolute value threshold |Vth1| may be greater than the zero-crossing point of the alternating current. Even if there is interference near the first threshold, it will only lock the line position state result corresponding to the differential pressure V-BC in advance and no error will occur.

[0041] In some embodiments, there are multiple zero-fire wire mixed connection alignment circuits connected to the first AC terminal AC_1 and the second AC terminal AC_2. After locking the line position state result corresponding to the differential pressure V-BC, if the absolute value of the differential pressure |V-AD| reaches the absolute value threshold |Vth1| again, the logic judgment module 16 outputs the line position state result.

[0042] In this embodiment, when the absolute value of the pressure difference |V - AD| reaches the absolute value threshold |Vth1| again, the logic judgment module 16 outputs the line position state result, and multiple zero-fire wire mixed connection alignment circuits can perform alignment simultaneously, improving the consistency of multiple zero-fire wire mixed connection alignment circuits, and completing the line position voltage confirmation of the connections with the first AC terminal AC_1 and the second AC terminal AC_2 within one AC cycle.

[0043] In some embodiments, there are multiple zero-fire wire mixed connection alignment circuits connected to the first AC terminal AC_1 and the second AC terminal AC_2. When each pressure difference detection module 15 detects that the absolute value of the first pressure difference |V - AD| reaches the absolute value threshold |Vth1|, it is determined that the first AC terminal AC_1 and the second AC terminal AC_2 are powered on, and multiple zero-fire wire mixed connection alignment circuits perform line position state detection synchronously. Thus, the consistency of multiple zero-fire wire mixed connection alignment circuits can be improved.

[0044] Specifically, as Figure 2 shown, when the first AC terminal AC_1 is connected to the live wire and the second AC terminal AC_2 is connected to the neutral wire, at time t0, the AC power is turned on. At time t1, the absolute value of the pressure difference |V - AD| between the voltage dividing end A of the first voltage dividing module 11 and the voltage dividing end D of the second voltage dividing module 12 is greater than the absolute value threshold |Vth1|. At this time, multiple zero-fire wire mixed connection alignment circuits all determine that the AC power is turned on. At time t2, the absolute value of the pressure difference |V - AD| between the voltage dividing end A of the first voltage dividing module 11 and the voltage dividing end D of the second voltage dividing module 12 is less than the absolute value threshold |Vth1|. Lock the pressure difference V - BC between the second end B of the first voltage dividing module 11 and the second end C of the second voltage dividing module 12 at this time. This pressure difference V - BC is greater than 0, and lock to obtain the line position state result "1". At time t4, the absolute value of the pressure difference |V - AD| between the voltage dividing end A of the first voltage dividing module 11 and the voltage dividing end D of the second voltage dividing module 12 is greater than the absolute value threshold |Vth1|, and output the line position state result "1" locked at time t2. Among them, after time t2, the line position state result corresponding to the pressure difference V - BC between the second end B of the first voltage dividing module 11 and the second end C of the second voltage dividing module 12 does not need to be adopted, and only the line position state result locked at time t2 is taken as the standard.

[0045] Specifically, as Figure 3As shown, when the first AC terminal AC_1 is connected to the neutral wire and the second AC terminal AC_2 is connected to the live wire, at time t0, the AC power is turned on. At time t1, the absolute value of the voltage difference |V-AD| between the voltage-dividing terminal A of the first voltage-dividing module 11 and the voltage-dividing terminal D of the second voltage-dividing module 12 is greater than the absolute value threshold |Vth1|. At this time, multiple zero-fire wire misconnection alignment circuits all determine that the AC power is on. At time t2, the absolute value of the voltage difference |V-AD| between the voltage-dividing terminal A of the first voltage-dividing module 11 and the voltage-dividing terminal D of the second voltage-dividing module 12 is less than the absolute value threshold |Vth1|. Lock the voltage difference V-BC between the second terminal B of the first voltage-dividing module 11 and the second terminal C of the second voltage-dividing module 12 at this time. This voltage difference V-BC is less than 0, and lock to obtain the line position state result "0". At time t4, the absolute value of the voltage difference |V-AD| between the voltage-dividing terminal A of the first voltage-dividing module 11 and the voltage-dividing terminal D of the second voltage-dividing module 12 is greater than the absolute value threshold |Vth1|, and output the line position state result "0" locked at time t2. Among them, after time t2, the line position state result corresponding to the voltage difference V-BC between the second terminal B of the first voltage-dividing module 11 and the second terminal C of the second voltage-dividing module 12 does not need to be adopted, and only the line position state result locked at time t2 is used as the standard.

[0046] In some embodiments, the forward conduction threshold of the forward conduction module 13 and the reverse conduction threshold of the reverse conduction module 14 are both greater than the absolute value of the voltage difference |V-AD| applied to the voltage-dividing terminal A of the first voltage-dividing module 11 and the voltage-dividing terminal D of the second voltage-dividing module 12 in the impedance detection case.

[0047] In this embodiment, the forward conduction threshold of the forward conduction module 13 and the reverse conduction threshold of the reverse conduction module 14 are preferably the same.

[0048] In this embodiment, the forward conduction threshold of the forward conduction module 13 and the reverse conduction threshold of the reverse conduction module 14 are both greater than the absolute value of the voltage difference |V-AD| applied to the voltage-dividing terminal A of the first voltage-dividing module 11 and the voltage-dividing terminal D of the second voltage-dividing module 12 in the impedance detection case, which can avoid forming a path between the voltage-dividing terminal A of the first voltage-dividing module 11 and the voltage-dividing terminal D of the second voltage-dividing module 12 during the subsequent impedance detection process.

[0049] In some embodiments, such as Figure 4As shown, the first voltage dividing module 11 may include a first resistor R1 and a second resistor R2. The first end of the first resistor R1 serves as the first end of the first voltage dividing module 11, the second end of the second resistor R2 serves as the second end B of the first voltage dividing module 11, and the second end of the first resistor R1 and the first end of the second resistor R2 serve as the voltage dividing end A of the first voltage dividing module 11; the second voltage dividing module 12 includes a third resistor R3 and a fourth resistor R4. The second end of the fourth resistor R4 serves as the first end of the second voltage dividing module 12, the first end of the third resistor R3 serves as the second end C of the second voltage dividing module 12, and the second end of the third resistor R3 and the first end of the fourth resistor R4 serve as the voltage dividing end D of the second voltage dividing module 12; the forward conduction module 13 includes a plurality of forward diodes D1 connected in series; the reverse conduction module 14 includes a plurality of reverse diodes D2 connected in series.

[0050] Among them, the forward conduction module 13 may include a first number of forward diodes D1, and the first number of forward diodes D1 are connected in series. The anode of each forward diode D1 is connected to the second end B of the first voltage dividing module 11, and the cathode of each forward diode D1 is connected to the second end C of the second voltage dividing module 12. The reverse conduction module 14 may include a second number of reverse diodes D2, and the second number of reverse diodes D2 are connected in series. The anode of each reverse diode D2 is connected to the second end C of the second voltage dividing module 12, and the cathode of each reverse diode D2 is connected to the second end B of the first voltage dividing module 11. Among them, the first number and the second number are preferably the same.

[0051] In this embodiment, the second end of the first resistor R1 and the first end of the second resistor R2 are commonly connected and then serve as the voltage dividing end A of the first voltage dividing module 11, and the second end of the third resistor R3 and the first end of the fourth resistor R4 are commonly connected and then serve as the voltage dividing end D of the second voltage dividing module 12. The voltage difference detection module 15 can detect the absolute value of the voltage difference |V - AD| between the second end of the first resistor R1 and the second end of the third resistor R3, and can also detect the voltage difference V - BC between the second end of the second resistor R2 and the first end of the third resistor R3.

[0052] Among them, the resistance value of the first resistor R1 is preferably the same as that of the fourth resistor R4. The resistance value of the second resistor R2 is preferably the same as that of the third resistor R3.

[0053] In some embodiments, as Figure 5 shown, when the online bit state result indicates that the voltage of the first AC terminal AC_1 is greater than the voltage of the second AC terminal AC_2, the alignment module 17 adjusts the current flow direction in sequence as the alignment module 17, the voltage dividing end A of the first voltage dividing module 11, the first AC terminal AC_1, the second AC terminal AC_2, the voltage dividing end D of the second voltage dividing module 12, and the alignment module 17.

[0054] AsFigure 6 As shown, when the on-line bit status result indicates that the voltage of the first AC terminal AC_1 is less than the voltage of the second AC terminal AC_2, the alignment module 17 adjusts the current flow direction to be, in sequence, the alignment module 17, the voltage-dividing terminal D of the second voltage-dividing module 12, the second AC terminal AC_2, the first AC terminal AC_1, the voltage-dividing terminal A of the first voltage-dividing module 11, and the alignment module 17.

[0055] Specifically, as Figure 5 shown, if the on-line bit status result output by the logic judgment module 16 indicates that the voltage of the first AC terminal AC_1 is greater than the voltage of the second AC terminal AC_2, the current flow direction can be controlled to be, in sequence, the alignment module 17, the second terminal of the first resistor R1, the first terminal of the first resistor R1, the first AC terminal AC_1, the second AC terminal AC_2, the second terminal of the fourth resistor R4, the first terminal of the fourth resistor R4, and the alignment module 17. As Figure 6 shown, if the on-line bit status result output by the logic judgment module 16 indicates that the voltage of the first AC terminal AC_1 is less than the voltage of the second AC terminal AC_2, the current flow direction can be controlled to be, in sequence, the alignment module 17, the first terminal of the fourth resistor R4, the second terminal of the fourth resistor R4, the first terminal of the first resistor R1, the second terminal of the first resistor R1, and the alignment module 17.

[0056] In some embodiments, as Figure 7 shown, the differential pressure detection module 15 may include: a first detection terminal X for connecting to a voltage terminal to be detected and a second detection terminal Y for connecting to another voltage terminal to be detected; a first current conversion unit 151, whose first end is connected to the first detection terminal X and whose second end is connected to the second detection terminal Y. When the voltage of the first detection terminal X is greater than the voltage of the second detection terminal Y, the output terminal of the first current conversion unit 151 outputs a first current Iout1; a first judgment unit 152, which determines the differential pressure between the first detection terminal X and the second detection terminal Y according to the first current Iout1.

[0057] In this embodiment, one of the voltage terminals to be detected may be connected to the voltage-dividing terminal A of the first voltage-dividing module 11 or the second terminal B of the first voltage-dividing module 11, and the other voltage terminal to be detected may be connected to the voltage-dividing terminal D of the second voltage-dividing module 12 or the second terminal C of the second voltage-dividing module 12. When the first detection terminal X is the voltage-dividing terminal A of the first voltage-dividing module 11, the second detection terminal Y is connected to the voltage-dividing terminal D of the second voltage-dividing module 12. When the first detection terminal X is the second terminal B of the first voltage-dividing module 11, the second detection terminal Y is connected to the second terminal C of the second voltage-dividing module 12.

[0058] In this embodiment, when the voltage of the first detection terminal X is greater than the voltage of the second detection terminal Y, the pressure difference can be converted into a first current Iout1, and the pressure difference between the first detection terminal X and the second detection terminal Y can be determined according to the magnitude of the first current Iout1, so as to meet the detection requirements of the pressure difference detection module 15 in this embodiment.

[0059] In some embodiments, as Figure 7 shown, the pressure difference detection module 15 may further include: a second current conversion unit 153, whose first end is connected to the first detection terminal X and whose second end is connected to the second detection terminal Y. When the voltage of the first detection terminal X is less than the voltage of the second detection terminal Y, the output end of the second current conversion unit 153 outputs a second current Iout2; a second judgment unit 154, which determines the pressure difference between the second detection terminal Y and the first detection terminal X according to the second current Iout2.

[0060] In this embodiment, when the voltage of the first detection terminal X is less than the voltage of the second detection terminal Y, the pressure difference can be converted into a second current Iout2, and the pressure difference between the second detection terminal Y and the first detection terminal X can be determined according to the magnitude of the second current Iout2, so as to meet the detection requirements of the pressure difference detection module 15 in this embodiment.

[0061] Further, in some embodiments, as Figure 8 shown, the first current conversion unit 151 may include: a first switch tube K1, whose first end is connected to the first detection terminal X; a second switch tube K2, whose first end is connected to the second detection terminal Y; a first mirror component 1511, whose mirror input end is connected to the second end of the first switch tube K1; a second mirror component 1512, whose mirror input end is connected to the second end of the second switch tube K2, and whose mirror output end is commonly connected to the mirror output end of the first mirror component 1511 to form a first current Iout1 output end. When the voltage of the first detection terminal X is greater than the voltage of the second detection terminal Y, the first switch tube K1 and the second switch tube K2 are turned on, and the first current Iout1 output end outputs a first current Iout1.

[0062] Further, in some embodiments, the first mirror component 1511 may include a first mirror sub-component and a second mirror sub-component. The mirror input end of the first mirror sub-component is connected to the second end of the first switch tube K1, the mirror output end of the first mirror sub-component is connected to the mirror input end of the second mirror sub-component, the mirror output end of the second mirror sub-component is connected to the mirror output end of the second mirror component 1512, and the mirror output end of the second mirror sub-component is commonly connected to the mirror output end of the second mirror component 1512 to form a first current Iout1 output end.

[0063] In this embodiment, the first mirror sub-component and the second mirror sub-component are combined, so that the direction of the current generated by the first switching transistor K1 is consistent with the direction of the current at the mirror output terminal of the second mirror component 1512.

[0064] Further, in some embodiments, as Figure 8 shown, the second current conversion unit 153 may include: a third switching transistor K3, whose first end is connected to the second detection terminal Y; a fourth switching transistor K4, whose first end is connected to the first detection terminal X; a third mirror component 1531, whose mirror input terminal is connected to the second end of the third switching transistor K3; a fourth mirror component 1532, whose mirror input terminal is connected to the second end of the fourth switching transistor K4, and whose mirror output terminal is commonly connected to the mirror output terminal of the third mirror component 1531 to form a second current Iout2 output terminal. When the voltage at the first detection terminal X is less than the voltage at the second detection terminal Y, the third switching transistor K3 and the fourth switching transistor K4 are turned on, and the second current Iout2 output terminal outputs the second current Iout2.

[0065] Further, in some embodiments, the fourth mirror component 1532 may include a third mirror sub-component and a fourth mirror sub-component. The mirror input terminal of the third mirror sub-component is connected to the second end of the fourth switch, the mirror output terminal of the third mirror sub-component is connected to the mirror input terminal of the fourth mirror sub-component, the mirror output terminal of the fourth mirror sub-component is connected to the mirror output terminal of the third mirror component 1531, and the mirror output terminal of the fourth mirror sub-component is commonly connected to the mirror output terminal of the third mirror component 1531 to form a second current Iout2 output terminal.

[0066] In this embodiment, the third mirror sub-component and the fourth mirror sub-component are combined, so that the direction of the current generated by the fourth switching transistor K4 is consistent with the direction of the current at the mirror output terminal of the third mirror component 1531.

[0067] Specifically, as Figure 9 shown, the first mirror sub-component may include a seventh switching transistor K7 and an eighth switching transistor K8, the second mirror sub-component may include a ninth switching transistor K9 and a tenth switching transistor K10, and the second mirror component 1512 may include a fifth switching transistor K5 and a sixth switching transistor K6. The third mirror sub-component may include a thirteenth switching transistor K13 and a fourteenth switching transistor K14, the fourth mirror sub-component may include a fifteenth switching transistor K15 and a sixteenth switching transistor K16, and the third mirror component 1531 may include an eleventh switching transistor K11 and a twelfth switching transistor K12.

[0068] Among them, the first end of the seventh switching tube K7 is connected to the first ends of the eighth switching tube K8, the thirteenth switching tube K13, and the fourteenth switching tube K14. The second end of the seventh switching tube K7 is connected to the second end of the first switching tube K1, the third end of the seventh switching tube K7, and the third end of the eighth switching tube K8. The second end of the eighth switching tube K8 is connected to the second end of the ninth switching tube K9, the third end of the ninth switching tube K9, and the third end of the tenth switching tube K10. The first end of the ninth switching tube K9 is connected to the first ends of the tenth switching tube K10, the eleventh switching tube K11, the twelfth switching tube K12, the fifteenth switching tube K15, the sixteenth switching tube K16, the fifth switching tube K5, and the sixth switching tube K6. The second end of the fifth switching tube K5 is connected to the third end of the sixth switching tube K6, the second end of the second switching tube K2, and the third end of the fifth switching tube K5. The second ends of the sixth switching tube K6 and the tenth switching tube K10 are connected to the output terminal of the first current Iout1. The second end of the thirteenth switching tube K13 is connected to the third end of the fourteenth switching tube K14, the third end of the thirteenth switching tube K13, and the second end of the fourth switching tube K4. The second end of the fourteenth switching tube K14 is connected to the second end of the fifteenth switching tube K15, the third end of the fifteenth switching tube K15, and the third end of the sixteenth switching tube K16. The second end of the eleventh switching tube K11 is connected to the third end of the eleventh switching tube K11 and the third end of the twelfth switching tube K12. The second ends of the twelfth switching tube K12 and the sixteenth switching tube K16 are connected to the output terminal of the second current Iout2.

[0069] When the voltage of the first detection terminal X is greater than the voltage of the second detection terminal Y, the first switching transistor K1, the seventh switching transistor K7, the eighth switching transistor K8, the ninth switching transistor K9, the tenth switching transistor K10, the fifth switching transistor K5, the sixth switching transistor K6, and the second switching transistor K2 are turned on, and the third switching transistor K3, the eleventh switching transistor K11, the twelfth switching transistor K12, the sixteenth switching transistor K16, the fifteenth switching transistor K15, the thirteenth switching transistor K13, the fourteenth switching transistor K14, and the fourth switching transistor K4 are turned off. A first current Iout1 is output at the first current Iout1 output terminal, and the magnitude of the first current Iout1 can represent the pressure difference between the first detection terminal X and the second detection terminal Y. When the voltage of the first detection terminal X is less than the voltage of the second detection terminal Y, the first switching transistor K1, the seventh switching transistor K7, the eighth switching transistor K8, the ninth switching transistor K9, the tenth switching transistor K10, the fifth switching transistor K5, the sixth switching transistor K6, and the second switching transistor K2 are turned off, and the third switching transistor K3, the eleventh switching transistor K11, the twelfth switching transistor K12, the sixteenth switching transistor K16, the fifteenth switching transistor K15, the thirteenth switching transistor K13, the fourteenth switching transistor K14, and the fourth switching transistor K4 are turned on. A second current Iout2 is output at the second current Iout2 output terminal, and the magnitude of the second current Iout2 can represent the pressure difference between the second detection terminal Y and the first detection terminal X.

[0070] In this embodiment, the potentials connected to the third terminal g1 of the first switching transistor K1 and the third terminal g4 of the fourth switching transistor K4 can be kept consistent, and the potentials connected to the third terminal g3 of the third switching transistor K3 and the third terminal g2 of the second switching transistor K2 can be kept consistent. The difference between the third terminal g3 of the third switching transistor K3 and the third terminal g1 of the first switching transistor K1 needs to be greater than or equal to 2Vgs. Preferably, the difference between the third terminal g3 of the third switching transistor K3 and the third terminal g1 of the first switching transistor K1 is equal to 2Vgs, and the power consumption is lower at this time. Here, Vgs can be the conduction threshold of the first switching transistor K1.

[0071] It should be noted that the first switching transistor K1, the second switching transistor K2, the third switching transistor K3, and the fourth switching transistor K4 operate in the saturation region, and the voltages given to the third terminal g1 of the first switching transistor K1, the third terminal g4 of the fourth switching transistor K4, the third terminal g3 of the third switching transistor K3, and the third terminal g2 of the second switching transistor K2 are all bias voltages.

[0072] In this embodiment, as Figure 9 shown, the first terminal of each switching transistor can be the source electrode of the switching transistor, the second terminal of each switching transistor can be the drain electrode of the switching transistor, and the third terminal of each switching transistor can be the gate electrode of the switching transistor.

[0073] In this embodiment, a fifth resistor R5 can be disposed between the first end and the first detection end of the first switching transistor K1, a seventh resistor R7 can be disposed between the first end and the first detection end of the third switching transistor K3, a sixth resistor R6 can be disposed between the first end and the second detection end of the second switching transistor K2, and an eighth resistor R8 can be disposed between the first end and the second detection end of the fourth switching transistor K4.

[0074] In this embodiment, the first ends of the ninth switching transistor K9, the tenth switching transistor K10, the eleventh switching transistor K11, the twelfth switching transistor K12, the fifteenth switching transistor K15, the sixteenth switching transistor K16, the fifth switching transistor K5, and the sixth switching transistor K6 may not be connected to a fixed potential, and the first ends of the seventh switching transistor K7, the eighth switching transistor K8, the thirteenth switching transistor K13, and the fourteenth switching transistor K14 may also not be connected to a fixed circuit. The generation of the first current Iout1 or the second current Iout2 is generated by the voltage difference between the first detection end X and the second detection end Y.

[0075] The embodiment of the present invention further provides a zero-line and live-line mixed connection alignment chip, and the zero-line and live-line mixed connection alignment chip includes the zero-line and live-line mixed connection alignment circuit described in any of the above embodiments.

[0076] Since the circuit structure and working mode of the zero-line and live-line mixed connection alignment circuit in the zero-line and live-line mixed connection alignment chip in this embodiment are the same as those of the zero-line and live-line mixed connection alignment circuit in the previous embodiment, they will not be elaborated here.

[0077] The above-described embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments or perform equivalent replacements for some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention and should all be included in the protection scope of the present invention.

Claims

1. A neutral and live line mixed connection alignment circuit, characterized in that: include; A first voltage dividing module, a first end of which is connected to the first AC end; A second voltage dividing module, a first end of which is connected to the second AC end; A forward conducting module and a reverse conducting module connected in parallel are connected between the second end of the first voltage dividing module and the second end of the second voltage dividing module; a pressure difference detection module, connected to the first pressure dividing module and the second pressure dividing module respectively, and detecting a pressure difference between a second end of the first pressure dividing module and a second end of the second pressure dividing module; A logic judgment module, which is connected to the pressure difference detection module, and the logic judgment module locks the line position state result corresponding to the pressure difference in the first half-wave cycle of AC power-on; as well as An alignment module is connected to the logic judgment module and performs alignment according to the line position status result output by the logic judgment module.

2. The zero-live mixed alignment circuit according to claim 1, characterized in that: The pressure difference detection module is connected to the pressure dividing end of the first pressure dividing module and the pressure dividing end of the second pressure dividing module respectively, and determines that the AC power is turned on when the absolute value of the pressure difference between the pressure dividing end of the first pressure dividing module and the pressure dividing end of the second pressure dividing module is detected to be greater than a first preset threshold.

3. The zero-live mixed alignment circuit according to claim 2, characterized in that: The logic judgment module locks the line position state result corresponding to the pressure difference when the pressure difference detection module detects that the absolute value of the pressure difference changes from greater than the first preset threshold to less than the first preset threshold within the first half-wave cycle.

4. The zero-live mixed alignment circuit according to claim 2, characterized in that: There are multiple neutral-live mixed alignment circuits connected to the first AC end and the second AC end. After locking the line status result corresponding to the pressure difference, if the absolute value of the pressure difference reaches the first preset threshold again, the logic judgment module outputs the line status result.

5. The zero-live mixed alignment circuit according to claim 2, characterized in that: There are multiple zero-live mixed alignment circuits connected to the first AC end and the second AC end. When each of the pressure difference detection modules detects that the absolute value of the first pressure difference reaches the first preset threshold, it is determined that the first AC end and the second AC end are powered on, and the multiple zero-live mixed alignment circuits synchronously perform line position status detection.

6. The neutral-live hybrid alignment circuit according to any one of claims 1 to 5, characterized in that: The forward conduction threshold of the forward conduction module and the reverse conduction threshold of the reverse conduction module are both greater than the absolute value of the voltage difference applied to the voltage dividing end of the first voltage dividing module and the voltage dividing end of the second voltage dividing module under impedance detection.

7. The neutral-live hybrid alignment circuit according to any one of claims 1 to 5, characterized in that: When the line position status result indicates that the voltage of the first AC end is greater than the voltage of the second AC end, the alignment module adjusts the current flow direction to be the alignment module, the voltage divider end of the first voltage divider module, the first AC end, the second AC end, the voltage divider end of the second voltage divider module, and the alignment module in sequence; when the line position status result indicates that the voltage of the first AC end is less than the voltage of the second AC end, the alignment module adjusts the current flow direction to be the alignment module, the voltage divider end of the second voltage divider module, the second AC end, the first AC end, the voltage divider end of the first voltage divider module, and the alignment module in sequence.

8. The neutral-live mixed alignment circuit according to any one of claims 1 to 5, characterized in that: The first voltage divider module includes a first resistor and a second resistor, the first end of the first resistor serves as the first end of the first voltage divider module, the second end of the second resistor serves as the second end of the first voltage divider module, and the second end of the first resistor and the first end of the second resistor serve as the voltage divider end of the first voltage divider module; the second voltage divider module includes a third resistor and a fourth resistor, the second end of the fourth resistor serves as the first end of the second voltage divider module, the first end of the third resistor serves as the second end of the second voltage divider module, and the second end of the third resistor and the first end of the fourth resistor serve as the voltage divider end of the second voltage divider module; the forward conduction module includes a plurality of forward diodes connected in series; and the reverse conduction module includes a plurality of reverse diodes connected in series.

9. The neutral-live hybrid alignment circuit according to any one of claims 1 to 5, characterized in that: The pressure difference detection module comprises: A first detection terminal for connecting to a voltage to be detected terminal and a second detection terminal for connecting to another voltage to be detected terminal; a first current conversion unit, wherein a first end of the first current conversion unit is connected to the first detection end, and a second end of the first current conversion unit is connected to the second detection end, and when a voltage at the first detection end is greater than a voltage at the second detection end, an output end of the first current conversion unit outputs a first current; A first determining unit is configured to determine a voltage difference between the first detection terminal and the second detection terminal according to the first current.

10. The neutral and live wire hybrid alignment circuit according to claim 9, characterized in that: The pressure difference detection module also includes: a second current conversion unit, wherein a first end of the second current conversion unit is connected to the first detection end, and a second end of the second current conversion unit is connected to the second detection end, and when a voltage at the first detection end is less than a voltage at the second detection end, an output end of the second current conversion unit outputs a second current; A second determining unit is configured to determine a voltage difference between the second detection end and the first detection end according to the second current.

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