Ignition circuit system based on digital structure

Abstract

The invention belongs to the technical field of digital circuits, and particularly relates to an ignition circuit system based on a digital structure. Comprising a digital logic control circuit and an ignition circuit, and the digital logic control circuit is connected with the ignition circuit. The digital logic control circuit comprises a code conversion module and a logic conversion module; the ignition circuit part comprises a power supply charging module and a power supply discharging module; the code conversion module comprises a shift register chip IC1, and the shift register chip IC1 converts a serial code into a parallel code; the logic conversion module comprises four-channel AND gates IC2 and IC3 and a NOT gate IC4; the parallel codes are subjected to logic conversion through the logic conversion module to generate control signals, and the control signals are output to the ports S1 and S2; in the power supply charging module, when the control signal enables the port S2 to output a high level, the ignition circuit performs power supply charging, and when the control signal enables the port S1 to output a high level, the ignition circuit performs power supply discharging.

Description

Technical Field

[0001] The present invention belongs to the technical field of digital circuits, and particularly relates to an ignition circuit system based on a digital structure. Background Art

[0002] Due to the characteristics of strong anti-interference ability, easy adjustment of input, simple circuit, and available for single-chip microcomputer to perform coding input, digital circuits are widely used in weapon equipment. As an important part of the ignition circuit, the logic transformation single circuit is mainly composed of circuits such as shift registers, AND gates, and NOT gates, so as to realize the ignition function by controlling the charging and discharging of capacitors. The existing analog circuit technology, as an input control circuit, is composed of resistors, capacitors, etc. and is extremely vulnerable to external signal interference. It has a large temperature drift at high and low temperatures. The input signal of this circuit is an analog pulse signal, and its stability is poor during circuit conversion, which makes the circuit structure complex and the cost high. Summary of the Invention

[0003] The present invention provides an ignition circuit system based on a digital structure to solve the technical problems of poor anti-interference ability and difficult input adjustment of the ignition circuit in the prior art.

[0004] To achieve the above object, the present invention adopts the following technical solutions: An ignition circuit system based on a digital structure includes a digital logic control circuit and an ignition circuit, and the digital logic control circuit is connected to the ignition circuit; the digital logic control circuit part includes a coding conversion module and a logic transformation module, and the ignition circuit part includes a power supply charging module and a power supply discharging module; The coding conversion module is used to convert the received serial coding into parallel coding; The logic transformation module is used to perform logic transformation on the parallel coding and then output a control signal to the ignition circuit; The ignition circuit executes the power supply charging module or the power supply discharging module according to the control signal.

[0005] The coding conversion module includes a shift register chip IC1, and the shift register chip IC1 is used to convert serial coding into parallel coding.

[0006] The DB interface of the shift register chip IC1 is connected to the coding signal terminal BM, the CLOCKB interface of the shift register chip IC1 is connected to the clock signal terminal CK, the coding signal terminal BM is connected to the single-chip microcomputer, and the single-chip microcomputer is used to generate serial coding of more than four digits and input it into the shift register chip IC1 through the coding signal terminal BM. The shift register chip IC1 is connected to the logic transformation module, and the clock signal terminal CK controls the shift output of the coding signal in the shift register chip IC1 to output parallel coding, and the logic transformation module receives the output parallel coding.

[0007] The VSS interface of the shift register chip IC1 is connected to the GND signal ground, and the VDD interface of the shift register chip IC1 is connected to the SV power supply.

[0008] The logic transformation module includes NOT gate IC4A and NOT gate IC4B, and also includes AND gates IC2A, IC2B, and IC2C, as well as AND gates IC3A, IC3B, and IC3D; the input terminal 13 interface of NOT gate IC4A is connected to the Q2B interface of the shift register chip IC1, the output terminal interface of IC4A of NOT gate IC4A is connected to the second input terminal interface of IC2A of AND gate IC2A, the first input terminal interface of IC2A of AND gate IC2A is connected to the Q1B interface of the shift register chip IC1, and the output terminal interface of IC2A of AND gate IC2A is connected to the first input terminal interface of IC2B of AND gate IC2B; the Q3B interface and Q4B interface of the shift register chip IC1 are respectively connected to the first input terminal interface and the second input terminal interface of IC2C of AND gate IC2C; the Q1B interface and Q2B interface of the shift register chip IC1 are respectively connected to the first input terminal interface and the second input terminal interface of IC3D of AND gate IC3D, and the output terminal interface of IC3D of AND gate IC3D is connected to the first input terminal interface of IC3A of AND gate IC3A; the Q4B interface of the shift register chip IC1 is connected to the second input terminal interface of IC3B of AND gate IC3B, the input terminal interface of IC4B of NOT gate IC4B is connected to the Q3B interface of the shift register chip IC1, the output terminal interface of IC4B of NOT gate IC4B is connected to the first input terminal interface of IC3B of AND gate IC3B, and the output terminal interface of IC3B of AND gate IC3B is connected to the second input terminal interface of IC3A of AND gate IC3A; the first power supply interface of AND gate IC2A and the second power supply interface of AND gate IC3A are both connected to a power supply.

[0009] The output terminal interface of IC2B of AND gate IC2B is connected to the power supply charging module of the ignition circuit through resistors R9 and R11; the output terminal interface of IC3A of AND gate IC3A is connected to the power supply discharging module of the ignition circuit through resistors R10 and R12.

[0010] Resistor R9, resistor R4, and diode D5 form a series circuit, resistor R10, resistor R5, and diode D4 form a series circuit, and the two series circuits are connected in parallel and then connected to the monitoring terminal JC.

[0011] The power charging module of the ignition circuit consists of a diode D2. The positive electrode of the diode D2 is connected to the S2 port, and the negative electrode of the diode D2 is connected to the T1 first interface of the control thyristor T1. The T1 second interface of the control thyristor T1 is connected to one end of the resistor R2. The other end of the resistor R2 is connected in series with one end of the resistor R1. The other end of the resistor R1 is connected to the source electrode of the control power transistor Q1. The end of the resistor R2 connected to the resistor R1 is also connected to the gate electrode of the control power transistor Q1. The drain electrode of the control power transistor Q1 is connected to the negative electrode of the diode D1, and the positive electrode of the diode D1 is connected to the parallel-connected capacitors C9 and C10 through the resistor R3.

[0012] The ignition circuit further includes a voltage monitoring module. The voltage monitoring module is connected to the power charging module and the power discharging module through the diode D6. The voltage monitoring module includes the resistors R6 and R7. One end of the resistor R6 is connected to the negative electrode of the diode D6, and the positive electrode of the diode D6 is connected to one end of the resistor R3. The other end of the resistor R6 is connected in series with the resistor R7 and then grounded. The end of the resistor R6 connected to the resistor R7 is also connected to the PREF port, and the other end of the resistor R7 is connected to the load RL.

[0013] The power discharging module further includes an output thyristor T2. The T2 first interface of the output thyristor T2 is connected to the negative electrode of the diode D3, and the positive electrode of the diode D3 is connected to the S1 port. The T2 second interface of the output thyristor T2 is connected to the parallel-connected capacitors C9 and C10, and the T2 third interface of the output thyristor T2 is connected to the load RL.

[0014] Compared with the prior art, the present invention has the following beneficial effects: An ignition circuit system based on a digital structure disclosed by the present invention connects a digital logic control circuit and an ignition circuit part through the S1 and S2 ports. This design helps to reduce electromagnetic interference (EMI) and improve the anti-interference ability of the system. At the same time, the digitization of logic control makes the ignition moment more precisely adjustable and enhances the flexibility of input regulation.

[0015] Furthermore, the encoding conversion module is integrated with the single-chip microcomputer: the encoding signal terminal BM is directly connected to the single-chip microcomputer, enabling the system to receive complex encoding signals from the single-chip microcomputer, improving the diversity and accuracy of signal processing, facilitating precise control of the ignition process, and enhancing anti-interference performance.

[0016] Furthermore, the shift register is controlled by a clock signal: the introduction of the clock signal terminal CK ensures the synchronous movement of the encoding signal in the shift register, improving the stability and reliability of signal processing and having better resistance to high-frequency interference.

[0017] Furthermore, the logic transformation module uses NOT gates and AND gates: The combined logic transformation of two NOT gates and AND gates not only enables flexible signal processing but also enhances the circuit's logical judgment ability, helping to filter out error signals and improve the anti-interference performance.

[0018] Furthermore, AND gates IC2 and IC3 are connected to VS: This indicates that the system can perform logical operations based on specific voltage states, enhancing the circuit's stability under different operating conditions and making it more adaptable to interference factors such as power fluctuations.

[0019] Furthermore, the logic transformation module directly controls ports S1 and S2. This design simplifies the control path, reduces attenuation and distortion during signal transmission, and enhances the reliability of the signal and the precise regulation of the ignition timing.

[0020] Furthermore, the addition of the monitoring terminal JC provides an interface for monitoring the system's operating state, facilitating real-time monitoring and fault diagnosis, helping to detect and correct problems in a timely manner, and enhancing the overall stability and reliability of the system.

[0021] Furthermore, control thyristor T1 and related protection components. The addition of these components effectively manages the charging and discharging process of the power supply, protects the circuit from overvoltage or current shocks, and improves the system's anti-interference ability in harsh environments.

[0022] Furthermore, the voltage monitoring module monitors the capacitor voltage through resistors R6 and R7 and diode D6 to ensure a stable power supply state, timely adjust the charging strategy, and further enhance the stability and safety of the system.

[0023] Furthermore, the discharge process of the capacitor is controlled by turning on the output thyristor T2 to ensure rapid and accurate energy release, improve the ignition efficiency and reliability, and at the same time cooperate with the previous protection measures to enhance the overall anti-interference ability. Description of the Drawings

[0024] Figure 1 is a schematic diagram of the ignition circuit; Figure 2 is a schematic diagram of the digital logic control transformation circuit.

[0025] Numbers: 1. T1 First Interface; 2. T1 Second Interface; 3. T1 Third Interface; 4. T2 First Interface; 5. T2 Second Interface; 6. T3 Third Interface; 7. IC4A Input Terminal Interface; 8. IC4B Input Terminal Interface; 9. IC2A First Input Terminal Interface; 10. IC2A Second Input Terminal Interface; 11. IC2B First Input Terminal Interface; 12. IC2B Second Input Terminal Interface; 13. IC2C First Input Terminal Interface; 14. IC2C Second Input Terminal Interface; 15. IC3A First Input Terminal Interface; 16. IC3A Second Input Terminal Interface; 17. IC3B First Input Terminal Interface; 18. IC3B Second Input Terminal Interface; 19. IC3D First Input Terminal Interface; 20. IC3D Second Input Terminal Interface; 21. IC4A Output Terminal Interface; 22. IC4B Output Terminal Interface; 23. IC2A Output Terminal Interface; 24. IC2B Output Terminal Interface; 25. IC2C Output Terminal Interface; 26. IC3A Output Terminal Interface; 27. IC3B Output Terminal Interface; 28. IC3D Output Terminal Interface; 29. First Power Supply Interface; 30. Second Power Supply Interface. Detailed Implementation Manner

[0026] To further understand the content of the present invention, the following describes the present invention in detail with reference to the accompanying drawings and specific embodiments. It should be understood that the embodiments are only for explaining the present invention and not for limiting it.

[0027] The following details the embodiments of the present invention with reference to the accompanying drawings.

[0028] See Figure 1 and Figure 2 , the circuit system is divided into two parts. Figure 1 is the ignition circuit. Figure 2 is the digital logic control conversion circuit; wherein, D1~D6 are diodes, T1 is the thyristor of the control circuit, T2 is the output control thyristor, Q1 is the control power transistor, IC1 is the shift register chip, IC2 and IC3 are four-channel AND gates, IC4 is a NOT gate, RL is the output load, BM port is the input coding signal terminal, CK is the clock signal terminal, VS is the power supply terminal, and FIRE is the output terminal.

[0029] The digital logic control conversion circuit part includes an IC1 shift register chip. The DB interface of the shift register chip IC1 is connected to the encoding signal terminal BM, and the CLOCKB interface of the shift register chip IC1 is connected to the clock signal terminal CK. The encoding signal terminal BM is connected to the single-chip microcomputer, and the single-chip microcomputer is used to generate an encoding signal of more than four digits and input it into the shift register chip IC1 through the encoding signal terminal BM. The clock signal terminal CK controls the shift of the encoding signal in the shift register chip IC1. The VSS interface of the shift register chip IC1 is connected to the GND signal ground, and the VDD interface of the shift register chip IC1 is connected to the power supply. The input terminal interface 7 of the NOT gate IC4A is connected to the Q2B interface of the shift register chip IC1, and the input terminal interface 13 of the NOT gate IC4A is connected to the Q2B interface of the shift register chip IC1. The output terminal interface (21) of the NOT gate IC4A is connected to the second input terminal interface (10) of the AND gate IC2A. The first input terminal interface (9) of the AND gate IC2A is connected to the Q1B interface of the shift register chip IC1, and the output terminal interface (23) of the AND gate IC2A is connected to the first input terminal interface (11) of the AND gate IC2B. The Q3B interface and the Q4B interface of the shift register chip IC1 are respectively connected to the first input terminal interface (13) and the second input terminal interface (14) of the AND gate IC2C. The Q1B interface and the Q2B interface of the shift register chip IC1 are respectively connected to the first input terminal interface (19) and the second input terminal interface (20) of the AND gate IC3D. The output terminal interface (28) of the AND gate IC3D is connected to the first input terminal interface (15) of the AND gate IC3A. The Q4B interface of the shift register chip IC1 is connected to the second input terminal interface (18) of the AND gate IC3B. The input terminal interface (8) of the NOT gate IC4B is connected to the Q3B interface of the shift register chip IC1, and the output terminal interface (22) of the NOT gate IC4B is connected to the first input terminal interface (17) of the AND gate IC3B. The output terminal interface (27) of the AND gate IC3B is connected to the second input terminal interface (16) of the AND gate IC3A. The first power supply interface (29) of the AND gate IC2A and the second power supply interface (30) of the AND gate IC3A are both connected to the power supply. The output terminal interface (24) of the AND gate IC2B is connected to the power supply charging module of the ignition circuit through resistors R9 and R11. The output terminal interface (26) of the AND gate IC3A is connected to the power supply discharging module of the ignition circuit through resistors R10 and R12. Resistor R9, resistor R4 and diode D5 form a series circuit, and resistor R10, resistor R5 and diode D4 form a series circuit. The two series circuits are connected in parallel and then connected to the monitoring terminal JC.

[0030] The ignition circuit part includes a diode D2. The positive pole of the diode D2 is connected to the S2 port, and the negative pole of the diode D2 is connected to the T1 first interface (1) of the control thyristor T1. The T1 second interface (2) of the control thyristor T1 is connected to one end of the resistor R2. The other end of the resistor R2 is connected in series with one end of the resistor R1. The other end of the resistor R1 is connected to the source electrode of the control power transistor Q1. The end of the resistor R2 connected to the resistor R1 is also connected to the gate electrode of the control power transistor Q1. The drain electrode of the control power transistor Q1 is connected to the negative pole of the diode D1. The positive pole of the diode D1 is connected to the parallel-connected capacitor C9 and capacitor C10 through the resistor R3. The ignition circuit also includes a voltage monitoring module. The voltage monitoring module is connected to the power supply charging module and the power supply discharging module through the diode D6. The voltage monitoring module includes the resistor R6 and the resistor R7. One end of the resistor R6 is connected to the negative pole of the diode D6. The positive pole of the diode D6 is connected to one end of the resistor R3. The other end of the resistor R6 is connected in series with the resistor R7 and then grounded. The end of the resistor R6 connected to the resistor R7 is also connected to the PREF port. The other end of the resistor R7 is connected to the load RL. The power supply discharging module also includes an output thyristor T2. The T2 first interface (4) of the output thyristor T2 is connected to the negative pole of the diode D3. The positive pole of the diode D3 is connected to the S1 port. The T2 second interface (5) of the output thyristor T2 is connected to the parallel-connected capacitor C9 and capacitor C10. The T2 third interface (6) of the output thyristor T2 is connected to the load RL.

[0031] The four-channel AND gate IC2, AND gate IC3, and NOT gate IC4 perform logic transformation according to the truth table to obtain the level control signals of the S1 port and the S2 port. The control signals make the S1 port or the S2 port generate a high level, thereby controlling the ignition circuit to charge or discharge the power supply.

[0032] The present invention proposes an ignition circuit system based on a digital structure, and its specific implementation method is as follows: The system mainly includes an ignition circuit part and a digital logic control circuit. The ignition circuit part mainly includes: a diode D, a resistor R, a load RL, a control power transistor Q1, a thyristor T, and a capacitor C. The digital logic control circuit part mainly includes: a register IC1, four-channel AND gates IC2 and IC3, and a NOT gate IC4. The diode D includes diodes D1, D2, D3, and D4, which are used for protecting the circuit and controlling the signal direction. The resistor R includes: resistors R1, R2, R3, R6, and R7, which are used for voltage division and current limitation. The load RL serves as an ignition coil or other equipment that requires pulsed electrical energy. The control power transistor Q1 serves as the main control element, which is used to provide sufficient current driving ability and is responsible for charging the capacitor. The thyristor T includes thyristor T1 and thyristor T2. Among them, thyristor T1 is the thyristor of the control circuit, which is used to control the charging process, and thyristor T2 is the output control thyristor used to control the discharging process of the capacitor; The capacitor C includes C9 and C10, which are used to store and release energy.

[0033] The shift register chip IC1 converts the serial coding signal generated by the single-chip microcomputer into a parallel coding signal; The four-channel AND gates IC2 and IC3 are used for logic transformation to generate control signals according to the parallel coding signal; The NOT gate IC4 is used to further process the logic signal after the logic transformation by the AND gates IC2 and IC3.

[0034] A coding signal generated by the single-chip microcomputer is input at the BM terminal. After being converted from serial coding to parallel coding by IC1, it undergoes logic transformation through IC2 to IC4 and is output to port S1 and port S2. The JC terminal is the monitoring terminal. When a high level is input at port S2, as the voltage of port S2 rises, thyristor T1 starts to conduct. The VGS conduction voltage of the power transistor Q1 is provided by the voltage division of resistor R1 and resistor R2. Q1 is made to conduct through resistor voltage division, and thus the power transistor Q1, diode D1, and resistor R3 are used to charge the capacitors C9 and C10 to the power supply voltage VS. Among them, the PREF port monitors the charging voltage through diode D6, resistor R6, and resistor R7. After thyristor T1 conducts, resistors R1 and R2 provide the holding current for thyristor T1 to ensure that the thyristor is in a continuously conducting state, and the control power transistor Q1 is also in a continuously conducting state to continuously charge the capacitor. When a high level is input at port S1, as the voltage of port S2 rises, thyristor T2 starts to conduct, and the energy across capacitors C9 and C10 can be released through thyristor T2 and the external load RL.

[0035] The encoding signal terminal BM of the digital logic control circuit is connected to a single-chip microcomputer. The single-chip microcomputer generates a coding signal of more than four digits according to a preset program or an external input. The encoding signal terminal BM is connected to the DB interface of the shift register chip IC1, and the encoding signal is input into the shift register IC1 through the encoding signal terminal BM. The encoding signal is continuously input into the shift register chip IC1 with one bit as a single input unit to form a serial code. When all the bit positions in the shift register chip IC1 are filled, the shift register chip IC1 outputs the data of the serial encoding signal simultaneously from all the register positions, converting it into a parallel code. The clock signal terminal CK is connected to the CLOCKB interface of the shift register chip IC1. The shifting of the shift register chip IC1 is controlled by the clock signal terminal CK. Whenever the rising edge of the clock signal terminal arrives, the register chip IC1 receives a new input signal and shifts the previous encoding signal. When the bit positions in the register chip IC1 are filled with the encoding signal, it is the falling edge of the clock signal terminal Ck. At this time, the clock signal terminal CK controls the register chip IC1 to output all the encoding signals inside it in parallel, forming a parallel code.

[0036] The input terminal 13 interface of the NOT gate IC4A is connected to the Q2B interface of the shift register chip IC1. The output terminal interface (21) of the NOT gate IC4A is connected to the second input terminal interface (10) of the AND gate IC2A. The first input terminal interface (9) of the AND gate IC2A is connected to the Q1B interface of the shift register chip IC1. The output terminal interface (23) of the AND gate IC2A is connected to the first input terminal interface (11) of the AND gate IC2B. The Q3B interface and the Q4B interface of the shift register chip IC1 are respectively connected to the first input terminal interface (13) and the second input terminal interface (14) of the AND gate IC2C. The Q1B interface and the Q2B interface of the shift register chip IC1 are respectively connected to the first input terminal interface (19) and the second input terminal interface (20) of the AND gate IC3D. The output terminal interface (28) of the IC3D is connected to the first input terminal interface (15) of the AND gate IC3A. The Q4B interface of the shift register chip IC1 is connected to the second input terminal interface (18) of the AND gate IC3B. The input terminal interface (8) of the NOT gate IC4B is connected to the Q3B interface of the shift register chip IC1. The output terminal interface (22) of the NOT gate IC4B is connected to the first input terminal interface (17) of the AND gate IC3B. The output terminal interface (27) of the AND gate IC3B is connected to the second input terminal interface (16) of the AND gate IC3A. The first power supply interface (29) of the AND gate IC2A and the second power supply interface (30) of the AND gate IC3A are both connected to a power supply. The parallel encoding of the shift register IC1 is output to the NOT gate IC4A and the NOT gate IC4B through the Q2B interface and the Q3B interface. The parallel encoding undergoes logical transformation through the four-channel AND gates IC2A, IC2B, and IC2C, the AND gates IC3A, IC3B, and IC3D, and the NOT gates IC4A and IC4B to generate a control signal and output it to the S1 port and the S2 port. When the encoding input at the BM terminal is 1011, the output at the S2 port is high level. When the encoding input at the BM terminal is 1101, the output at the S1 port is high level. The input of other encodings is invalid. The logical truth table 1 is as follows: Table 1 Logical Truth Table

[0037] When a high level is input at the S2 port, as the voltage of the S2 port increases, the VGT of T1 begins to increase and T1 starts to conduct. The V of Q1 GSThe turn-on voltage is provided by the voltage division of resistors R1 and R2. Through the voltage division of the resistors, Q1 is turned on, so as to charge capacitors C9 and C10 by controlling power transistor Q1, diode D1 and resistor R3. Then, capacitors C9 and C10 are charged to the power supply voltage VS. Among them, when the PREF terminal charges the power supply charging module through diode D6, resistor R6 and resistor R7, the voltage generated is monitored, and the voltage provides monitoring data (the resistance values of R6 and R7 are generally selected to be relatively large). After T1 is turned on, R1 and R2 provide the holding current for T1 to ensure that the thyristor is in the continuously-conducting state, and Q1 is also in the continuously-conducting state, continuously charging the capacitor. Once T1 is turned on, resistors R1 and R2 provide current for it to ensure that thyristor T1 and control power transistor Q1 are in the continuously-conducting state, continuously charging the capacitor until the next electrical signal arrives.

[0038] When a high level is input at port S1, as the voltage of port S2 increases, the output control thyristor T2 starts to conduct, and the V of T2 GT starts to increase. The energy at both ends of capacitors C9 and C10 can be released through T2 and the external load RL, thereby completing the ignition process. The discharge current is as follows:

[0039] It should be noted that when selecting the resistance values of R1 and R2, the magnitude of the holding current available for the thyristor to conduct needs to be considered. If the current value is too small, it will affect the normal conduction of the thyristor; at the same time, Q1 needs to select a field effect transistor with a small on-resistance, which can effectively reduce the product loss.

[0040] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them. Although the present invention has been described in detail with reference to the above embodiments, those of ordinary skill in the art should understand that: the specific implementation manners of the present invention can still be modified or equivalently replaced, and any modification or equivalent replacement that does not depart from the spirit and scope of the present invention shall be covered by the protection scope of the claims of the present invention.

Claims

1. An ignition circuit system based on a digital structure, characterized in that: It includes a digital logic control circuit and an ignition circuit, and the digital logic control circuit is connected to the ignition circuit; the digital logic control circuit part includes a code conversion module and a logic conversion module, and the ignition circuit part includes a power charging module and a power discharging module; A code conversion module, used for converting the received serial code into a parallel code; A logic conversion module, used for performing logic conversion on the parallel code and then outputting a control signal to the ignition circuit; The ignition circuit executes the power charging module or the power discharging module according to the control signal.

2. An ignition circuit system based on a digital structure according to claim 1, characterized in that: The encoding ring module includes a shift register chip IC1, and the shift register chip IC1 is used to convert serial encoding into parallel encoding.

3. An ignition circuit system based on a digital structure according to claim 2, characterized in that: The DB interface of the shift register chip IC1 is connected to the coding signal terminal BM, the CLOCKB interface of the shift register chip IC1 is connected to the clock signal terminal CK, the coding signal terminal BM is connected to the single-chip microcomputer, the single-chip microcomputer is used to generate more than four-bit serial coding and input it to the shift register chip IC1 through the coding signal terminal BM, the shift register chip IC1 is connected to the logic conversion module, the clock signal terminal CK controls the shift output parallel coding of the coding signal in the shift register chip IC1, and the logic conversion module receives the output parallel coding.

4. An ignition circuit system based on a digital structure according to claim 3, characterized in that: The VSS interface of the shift register chip IC1 is connected to the GND signal ground, and the VDD interface of the shift register chip IC1 is connected to the SV power supply.

5. An ignition circuit system based on a digital structure according to claim 2, characterized in that: The logic conversion module includes a NOT gate IC4A and a NOT gate IC4B, and also includes AND gates IC2A, IC2B and IC2C, and AND gates IC3A, IC3B and IC3D; the input end 13 interface of the NOT gate IC4A is connected to the Q2B interface of the shift register chip IC1, the IC4A output end interface (21) of the NOT gate IC4A is connected to the IC2A second input end interface (10) of the AND gate IC2A, the IC2A first input end interface (9) of the AND gate IC2A is connected to the Q1B interface of the shift register chip IC1, and the IC2A output end interface (23) of the AND gate IC2A is connected to the IC2B first input end interface (11) of the AND gate IC2B; the Q3B interface and the Q4B interface of the shift register chip IC1 are respectively connected to the IC2C first input end interface (13) and the IC2C second input end interface (14) of the AND gate IC2C; the shift register chip IC The Q1B interface and the Q2B interface of IC1 are connected to the first input terminal interface (19) and the second input terminal interface (20) of the AND gate IC3D respectively; the IC3D output terminal interface (28) of IC3D is connected to the IC3A first input terminal interface (15) of the AND gate IC3A; the Q4B interface of the shift register chip IC1 is connected to the IC3B second input terminal interface (18) of the AND gate IC3B; the IC4B input terminal interface (8) of the NOT gate IC4B is connected to the Q3B interface of the shift register chip IC1; the IC4B output terminal interface (22) of the NOT gate IC4B is connected to the IC3B first input terminal interface (17) of the AND gate IC3B; the IC3B output terminal interface (27) of the AND gate IC3B is connected to the IC3A second input terminal interface (16) of the AND gate IC3A; the first power supply interface (29) of the AND gate IC2A and the second power supply interface (30) of the AND gate IC3A are both connected to a power supply.

6. An ignition circuit system based on a digital structure according to claim 5, characterized in that: The IC2B output terminal interface (24) of the AND gate IC2B is connected to the power charging module of the ignition circuit through resistors R9 and R11; and the IC3A output terminal interface (26) of the AND gate IC3A is connected to the power discharging module of the ignition circuit through resistors R10 and R12.

7. An ignition circuit system based on a digital structure according to claim 6, characterized in that: The resistor R9, the resistor R4 and the diode D5 form a series circuit, and the resistor R10, the resistor R5 and the diode D4 form a series circuit. The two series circuits are connected in parallel and connected to the monitoring terminal JC.

8. The ignition circuit system based on digital structure according to claim 1, characterized in that: The power charging module of the ignition circuit comprises a diode D2, wherein the positive electrode of the diode D2 is connected to the S2 port, the negative electrode of the diode D2 is connected to the T1 first interface (1) of the control thyristor T1, the T1 second interface (2) of the control thyristor T1 is connected to one end of a resistor R2, the other end of the resistor R2 is connected in series with one end of the resistor R1, the other end of the resistor R1 is connected to the source of the control power tube Q1, the resistor R2 is connected to one end of the resistor R1 and is also connected to the gate of the control power tube Q1, the drain of the control power tube Q1 is connected to the negative electrode of the diode D1, and the positive electrode of the diode D1 is connected to the capacitor C9 and the capacitor C10 connected in parallel through the resistor R3.

9. An ignition circuit system based on a digital structure according to claim 8, characterized in that: The ignition circuit also includes a voltage monitoring module, which is connected to the power charging module and the power discharging module through a diode D6. The voltage monitoring module includes a resistor R6 and a resistor R7. One end of the resistor R6 is connected to the cathode of the diode D6, the anode of the diode D6 is connected to one end of the resistor R3, the other end of the resistor R6 is connected in series with the resistor R7 and then grounded, one end of the resistor R6 is connected to the resistor R7 and is also connected to the PREF port, and the other end of the resistor R7 is connected to the load RL.

10. An ignition circuit system based on a digital structure according to claim 9, characterized in that: The power supply discharge module also includes an output thyristor T2, wherein a first T2 interface (4) of the output thyristor T2 is connected to the cathode of a diode D3, and an anode of the diode D3 is connected to an S1 port; a second T2 interface (5) of the output thyristor T2 is connected to a capacitor C9 and a capacitor C10 connected in parallel, and a third T2 interface (6) of the output thyristor T2 is connected to a load RL.

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