Task processing method and electronic equipment

Abstract

The invention provides a task processing method and electronic equipment, the method is applied to the electronic equipment, and the electronic equipment comprises a first processor; the method comprises the following steps: in response to a received first task, executing the first task through a first processor; in response to the received second task, interrupting execution of the first task and executing the second task through the first processor; wherein the priority of the second task is higher than that of the first task, and the priority of any task is used for indicating the execution sequence of any task; when the execution interruption duration of the first task exceeds a first set duration and the first processor is in a state of executing the task, continuing to execute the first task through the second processor; wherein the first set duration is set duration used as an upper limit value of the task waiting duration. According to the scheme, the total power consumption of the processor in the task execution process of the electronic equipment can be reduced.

Description

[0001] This application is a divisional application. The application number of the original application is 202410808159.X, and the original application date is June 20, 2024. The entire content of the original application is incorporated herein by reference. Technical Field

[0002] This application relates to the technical field of electronic devices, and particularly to a task processing method and an electronic device. Background Art

[0003] Currently, for an electronic device with multiple Central Processing Units (CPUs), in a scenario where the system load of the electronic device is relatively light, the operation of some CPUs of the electronic device can meet the task load requirements, and other CPUs can be switched to the idle state, thereby reducing a certain amount of power consumption. There is a possible situation in this scenario: during the execution of a low-priority task by a CPU of the electronic device, if a high-priority task needs to be executed, the electronic device can use this CPU to interrupt the currently executing low-priority task and then execute the high-priority task, and can allocate the interrupted low-priority task to other CPUs (such as idle CPUs) for execution, so as to ensure the timely execution of the high-priority task. During this process, if the execution time of the high-priority task is relatively short, immediately migrating the interrupted low-priority task to other CPUs may cause a relatively large power consumption overhead. Summary of the Invention

[0004] This application provides a task processing method and an electronic device, which are used to reduce the total CPU power consumption during the task execution process of the electronic device.

[0005] In a first aspect, an embodiment of this application provides a task processing method, which is applied to an electronic device, and the electronic device includes a first processor; the method includes: in response to receiving a first task, executing the first task through the first processor; in response to receiving a second task, interrupting the execution of the first task through the first processor and executing the second task; where the priority of the second task is higher than the priority of the first task, and the priority of any task is used to indicate the order of execution of the any task; when the interruption duration of the first task exceeds a first set duration and the first processor is in a state of executing a task, continue to execute the first task through a second processor; where the first set duration is a set duration used as the upper limit of the task waiting duration.

[0006] In this method, when the duration of the interruption of the first task executed by the electronic device exceeds the first set duration and the first processor is in the state of executing a task, the first task is executed by the second processor, which allows the first task to continue to be executed by the first processor when the first set duration is not exceeded and the first processor has no task being executed. That is, after a high-priority task preempts the processor of a low-priority task, the electronic device can wait for a period of time, i.e., the first set duration, and then execute the interrupted low-priority task on another processor when it is determined that the preempted processor is busy. This solution can reduce the possibility of the interrupted task being migrated to another processor for execution, thereby reducing the situation of migrating the processor after task interruption, helping to reduce the problem of the increase in the total processor power consumption caused by immediately migrating to another processor after task interruption, and further helping to reduce the total processor power consumption during the task execution of the electronic device. In addition, this solution can also avoid to a certain extent the problem that the interruption duration of the interrupted task is too long, which affects the task execution efficiency and quality.

[0007] In a possible design, the method further includes: when the estimated execution duration of the second task exceeds the first set duration, the first task is continued to be executed by the second processor; where the estimated execution duration is the estimated duration required to execute the second task.

[0008] In this method, when the estimated execution duration exceeds the first set duration, it indicates that the execution duration of the second task with a higher priority is longer. Therefore, in this scenario, the first task interrupted on the first processor can be migrated to the second processor for execution, so as to avoid the interruption duration of the first task, that is, the waiting duration, being too long and affecting the task execution efficiency and quality.

[0009] In a possible design, the electronic device further includes a task queue, and the method further includes; when the estimated execution duration is less than or equal to the first set duration, the first task is added to the task queue; when the first processor has no task being executed and the first task is in the state of interrupted execution, the first task is continued to be executed by the first processor.

[0010] In this method, when the estimated execution duration is less than or equal to the first set duration, it indicates that the execution duration of the second task with a higher priority is shorter. Therefore, in this scenario, the interrupted first task can wait for a certain duration and continue to be executed on the first processor when waiting until the first processor has no task being executed. On the one hand, it can avoid migrating the first task interrupted on the first processor to another processor for execution, thereby avoiding the power consumption caused thereby, and helping to reduce the total processor power consumption during the task execution of the electronic device. On the other hand, it can avoid the interruption duration of the interrupted first task being too long and affecting the task execution efficiency and quality.

[0011] In a possible design, after adding the first task to the task queue, the method further includes: when there is a task being executed by the first processor and the interruption duration of the first task exceeds a first set duration, the second processor is used to continue executing the first task.

[0012] This method can reduce the possibility that the first task interrupted on the first processor is migrated to other processors for execution, thereby reducing the situation of migrating processors after task interruption, helping to reduce the problem of increased total processor power consumption caused by immediately migrating to other processors after task interruption, and further helping to reduce the total processor power consumption during the task execution of the electronic device. At the same time, this method can also prevent the interruption duration of the interrupted task from being too long, which affects the task execution efficiency and quality.

[0013] In a possible design, the electronic device further includes the second processor in an idle state; the step of using the second processor to continue executing the first task includes: after the second processor exits the idle state, it continues to execute the first task.

[0014] Based on the above method, the scenario where the electronic device executes the first task through the first processor and the second processor is in an idle state can be a light load scenario. The above method can be applied to the light load scenario, thereby reducing the total processor power consumption during the task execution of the electronic device in the light load scenario.

[0015] In a possible design, the method further includes: when there is no task being executed by the first processor and the first task is in an interrupted execution state, the first processor is used to continue executing the first task.

[0016] In this method, when there is no task being executed by the first processor and the first task is in an interrupted execution state, the first processor is used to continue executing the first task, which can avoid the power consumption generated by migrating the interrupted first task to other processors. That is, after a high-priority task preempts the processor of a low-priority task, the electronic device can wait until there is no task being executed by this processor, and then use this processor to continue executing the interrupted low-priority task, which can avoid the power consumption generated by migrating the interrupted low-priority task to other processors. Therefore, this method can reduce the total processor power consumption during the task execution of the electronic device.

[0017] In a possible design, the first task belongs to a non-real-time task and a non-focus task, and the second task belongs to a real-time task or a focus task; wherein, the real-time task is a task that requires a response within a time period less than or equal to a fourth set duration after reception, and the focus task is an interactive type task.

[0018] In a possible design, the method further includes: obtaining a first duration, a second duration, and a third duration; where the first duration is used to indicate the duration for migrating the service data of the first task stored in the buffer memory of the first processor to the buffer memory of the second processor, the second duration is used to indicate the duration for the second processor to exit the idle state, and the third duration is used to indicate the execution duration of the second task; determining the first set duration according to the first duration, the second duration, and the third duration.

[0019] In this method, the electronic device can determine a first set duration with a relatively reasonable value based on multiple reference durations, thereby improving the accuracy of task processing based on the first set duration, which helps to achieve a better effect of reducing the total processor power consumption during the task execution of the electronic device.

[0020] In a possible design, the first duration is the average value of the service data migration durations of at least one reference task that has ended execution; where any reference task is a task that is interrupted and executed on the third processor of the electronic device and then migrated to the fourth processor of the electronic device for execution; the service data migration duration of any reference task is the duration for migrating the service data of any reference task stored in the buffer memory of the third processor to the buffer memory of the fourth processor.

[0021] In this method, the electronic device determines the duration for migrating the first task between the first processor and the second processor based on the statistically obtained durations of the service data of other tasks migrating between different processors, which helps to improve the accuracy of processing.

[0022] In a possible design, the at least one reference task is a task that has ended execution within a set time period; and / or, the number of the at least one reference task is a set number.

[0023] Based on this method, the electronic device can obtain the required data through different statistical methods, with relatively high flexibility.

[0024] In a possible design, the third processor is the first processor, and the fourth processor is the second processor.

[0025] Based on this method, the electronic device can determine the duration for migrating the first task between the first processor and the second processor based on the statistically obtained durations of the service data of other tasks migrating between the first processor and the second processor, which can further improve the accuracy of processing.

[0026] In a possible design, the set historical time period is: a time period of a second set duration with the current moment as the end moment, that is, the historical time period of the second set duration closest to the current moment. The second set duration is the duration of the time period set for collecting the business data migration duration of the at least one reference task.

[0027] In this method, the electronic device can obtain the required data based on the latest historical data statistics, which helps to improve the accuracy of processing.

[0028] In a possible design, the type of the third processor is the same as that of the first processor, and the type of the fourth processor is the same as that of the second processor; wherein, the type of any processor is one of a small-core processor, a medium-core processor, and a large-core processor.

[0029] Based on this method, the electronic device can determine the migration duration of the first task between the first processor and the second processor based on the migration duration of the business data of other tasks statistically migrated between the processor of the same type as the first processor and the processor of the same type as the second processor, which can further improve the accuracy of processing.

[0030] In a possible design, the third duration is: the quotient of the total execution duration of at least one target priority task in at least one historical time period and the number of the at least one historical time period; or, the quotient of the total execution duration of at least one target priority task in at least one historical time period and the number of the at least one target priority task; wherein, the duration of each historical time period in the at least one historical time period is a third set duration, and the priority of the at least one target priority task is the priority of the second task.

[0031] Based on this method, the electronic device can obtain the required data through different statistical methods, with relatively high flexibility.

[0032] In a second aspect, the present application provides an electronic device, which includes a memory and one or more processors; wherein, the memory is used to store computer program code, and the computer program code includes computer instructions; when the computer instructions are executed by the one or more processors, the electronic device is enabled to execute the method described in the first aspect or any possible design of the first aspect.

[0033] In a third aspect, the present application provides a computer-readable storage medium, which stores a computer program. When the computer program runs on an electronic device, the electronic device is enabled to execute the method described in the first aspect or any possible design of the first aspect.

[0034] Fourthly, the present application provides a computer program product, which includes a computer program or instructions. When the computer program or instructions run on an electronic device, the electronic device is enabled to execute the method described in the first aspect or any possible design of the first aspect.

[0035] Fifthly, the present application provides a chip system, which includes a processor and a memory, and instructions are stored in the memory. When the instructions are executed by the processor, the method described in the first aspect or any possible design of the first aspect is implemented. The chip system can be composed of chips, or can include chips and other discrete devices.

[0036] For the beneficial effects of the second aspect to the fifth aspect above, reference can be made to the beneficial effects of the first aspect above, which will not be repeated here. Description of the Drawings

[0037] Figure 1 It is a schematic diagram of a task processing method;

[0038] Figure 2 It is a schematic diagram of the hardware architecture of an electronic device provided by an embodiment of the present application;

[0039] Figure 3 It is a schematic diagram of the software architecture of an electronic device provided by an embodiment of the present application;

[0040] Figure 4 It is a schematic diagram of the architecture of a task processing system provided by an embodiment of the present application;

[0041] Figure 5 It is a schematic diagram of a task processing method provided by an embodiment of the present application;

[0042] Figure 6 It is a schematic diagram of a task processing method provided by an embodiment of the present application;

[0043] Figure 7 It is a schematic diagram of a global task queue provided by an embodiment of the present application;

[0044] Figure 8 It is a schematic diagram of a task execution process provided by an embodiment of the present application;

[0045] Figure 9 It is a schematic diagram of a task execution process provided by an embodiment of the present application;

[0046] Figure 10 It is a schematic diagram of a task processing method provided by an embodiment of the present application;

[0047] Figure 11 It is a schematic diagram of a task processing method provided by an embodiment of the present application;

[0048] Figure 12 Schematic diagram of a task processing method provided by an embodiment of the present application;

[0049] Figure 13 Schematic diagram of a task processing method provided by an embodiment of the present application;

[0050] Figure 14 Schematic diagram of a task processing method provided by an embodiment of the present application;

[0051] Figure 15 Schematic diagram of the structure of an electronic device provided by an embodiment of the present application. Detailed implementation manners

[0052] In order to make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the embodiments of the present application will be further described in detail below with reference to the accompanying drawings.

[0053] Among them, in the description of the embodiments of the present application, hereinafter, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features.

[0054] It should be understood that in the embodiments of the present application, "at least one" means one or more, and "a plurality" means two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B may represent: A exists alone, A and B exist simultaneously, and B exists alone, where A and B may be singular or plural. The character " / " generally represents an "or" relationship between the associated objects before and after. "At least one (item) of the following" or its similar expression refers to any combination of these items, including any combination of single item (s) or plural item (s). For example, at least one (item) of a, b, or c may represent: a, b, c, a and b, a and c, b and c, or a, b, and c, where a, b, and c may be single or multiple.

[0055] Generally, an electronic device does not operate at a high load all the time during operation. In a light-load scenario (such as when there are no tasks in the background of the electronic device or the electronic device is in the screen-off standby state, etc.), the load of the electronic device is relatively low. For an electronic device with multiple CPUs (or multiple cores) (which can also be called a multi-core device), only some CPUs need to work to meet the load requirements in a light-load scenario, and the other CPUs that do not need to work can be switched to the idle state. The CPUs in the idle state hardly execute any tasks, so the power consumption is very low. However, if a CPU that enters the idle state is made to enter the working state again or a CPU in the working state is switched to the idle state, there will be relatively large power consumption and latency overhead.

[0056] The operating states of multiple CPUs of an electronic device are controlled by the kernel scheduler. The kernel scheduler can be used to configure the execution time of tasks in the electronic device and the CPUs used to execute tasks. The tasks in the electronic device exist in the task queue before being allocated to the CPUs by the kernel scheduler. Currently, the task queue is mainly divided into two types: the global task queue and the private task queue. Among them, the global task queue is a task queue shared by all CPUs in the system, and the private task queue is a task queue that each CPU has and is only used by that CPU.

[0057] High-priority tasks in the global task queue can be executed prior to low-priority tasks. In the case of using the global task queue, taking the scenario where an electronic device includes two CPUs, namely CPU0 and CPU1, and the high-priority tasks are real-time tasks and the low-priority tasks are ordinary tasks as an example, as Figure 1 shown in the first stage in, in a light-load scenario, CPU0 can be in the idle state and CPU1 can be in the working state and execute ordinary tasks. As Figure 1 shown in the second stage in, during the execution of ordinary tasks by CPU1, if a real-time task with a higher priority appears in the global task queue, this real-time task will preempt the usage right of CPU1. That is, the kernel scheduler will schedule CPU1 to interrupt the ordinary task and execute the real-time task. The preempted ordinary task will enter the global task queue, and then the kernel scheduler will allocate the ordinary task to CPU0 for execution. Since CPU0 was in the idle state before, the arrival of the ordinary task will cause it to exit the idle state, so there will be a certain amount of power consumption and latency overhead. As Figure 1 shown in the third stage in, after CPU0 exits the idle state and can execute the ordinary task migrated from CPU1, power consumption will be generated. After CPU1 finishes running the real-time task in a short time, although there are no other tasks to execute, CPU1 will not immediately enter the idle state with the lowest power consumption, but needs to go through a period of time before entering the idle state. During this period, there is still power consumption on CPU1. Figure 1As shown in the fourth stage in , if a real-time task with a higher priority appears in the global task queue later, and CPU1 has entered the idle state, the real-time task will preempt CPU0 in the working state, causing the ordinary task originally executed on CPU0 to be interrupted and reallocated (or migrated) to CPU1. In this process, CPU1 needs a certain amount of power consumption and delay overhead to exit the idle state. And after CPU0 executes the real-time task, it takes a while to enter the idle state, and there is also a certain amount of power consumption overhead. In the above-mentioned task execution process, the switching of the CPU will lead to an increase in the overall power consumption of the CPU, and may cause a delay in task execution, resulting in a reduction in task execution efficiency.

[0058] In another possible scenario, if in the above method, CPU0 is in a working state before the interrupted common task is assigned to CPU0, the migration of the business data of the interrupted common task from CPU1 to CPU0 also requires certain power consumption and delay costs. Moreover, when CPU0 is in a working state with a task being executed, there is also a delay cost of waiting for CPU0 to complete the task being executed.

[0059] In summary, no matter which state CPU0 is in, allocating the interrupted common tasks on CPU1 to CPU0 for execution will incur additional power consumption overhead, thus increasing the total power consumption of the CPU.

[0060] In order to reduce the total power consumption of the processor (such as CPU) during the electronic device's task execution process and improve the efficiency of the electronic device's task execution, the embodiment of the present application provides a task processing method and an electronic device. The method can be applied to electronic devices. In the method, after the electronic device interrupts the low-priority task being executed on a processor and uses the processor to execute a high-priority task, it can temporarily not reallocate the low-priority task to other idle processors for execution, but can wait for a period of time. If the processor completes the high-priority task during the waiting period, the electronic device can continue to execute the low-priority task using the processor. If the processor does not complete the high-priority task during the waiting period, the electronic device will reallocate the low-priority task to other idle processors for execution. The method can avoid or reduce the switching of processors during task execution as much as possible, thereby helping to reduce the total power consumption of the processor, and also helping to reduce the delay of task execution and improve the efficiency of task execution.

[0061] The technical solutions provided by the embodiments of the present application can be executed by any electronic device (or multi-core electronic device) with multiple processors. The electronic device can be a terminal device. In some embodiments of the present application, the terminal device can be a portable terminal device (such as a mobile phone, a tablet computer, a laptop computer, an ultra-mobile personal computer (UMPC), a netbook, etc.), a wearable device, a vehicle-mounted terminal device, an augmented reality (AR) / virtual reality (VR) device, a personal digital assistant (PDA), a smart home device (such as a smart TV, etc.), a smart robot, a workshop device, a wireless terminal in self-driving, a wireless terminal in remote medical surgery, a wireless terminal in a smart grid, a wireless terminal in transportation safety, a wireless terminal in a smart city, or a wireless terminal in a smart home, a flying device (such as a smart robot, a drone, an airplane), etc. Among them, exemplary embodiments of the portable terminal device include, but are not limited to, those equipped with or other operating systems. The above-mentioned portable terminal device can also be other portable terminal devices, such as a laptop with a touch-sensitive surface (such as a touch panel), etc. A wearable device is a portable device that a user can directly wear on the body or integrate into the user's clothes or accessories. For the performance introduction of the electronic device, reference can be made to the relevant descriptions in the following text.

[0062] Next, refer to Figure 2 to introduce the structure of the electronic device to which the method provided by the embodiments of the present application is applicable.

[0063] As Figure 2 shown, the electronic device 100 can include multiple processors 110, an external memory interface 120, an internal memory 121, a USB interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, a headphone jack 170D, a sensor module 180, a button 190, a motor 191, an indicator 192, a camera 193, a display screen 194, and a SIM card interface 195, etc.

[0064] Among them, the sensor module 180 may include a gyroscope sensor, an acceleration sensor, a proximity light sensor, a fingerprint sensor, a touch sensor, a temperature sensor, a pressure sensor, a distance sensor, a magnetic sensor, an ambient light sensor, an air pressure sensor, a bone conduction sensor, etc.

[0065] It can be understood that Figure 2 The illustrated electronic device 100 is merely an example, which does not constitute a limitation on the electronic device, and the electronic device may have more or fewer components than those shown in the figure, may combine two or more components, or may have different component configurations. Figure 2 The various components shown in the figure may be implemented in hardware, software, or a combination of hardware and software including one or more signal processing and / or application specific integrated circuits.

[0066] The processor 110 may include one or more processing units. For example, the processor 110 may include a CPU, an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a memory, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU), etc. Among them, different processing units may be independent devices or may be integrated in one or more processors. Among them, the controller may be the nerve center and command center of the electronic device 100. The controller may generate operation control signals according to the instruction operation code and timing signal to complete the control of fetching and executing instructions.

[0067] A memory may also be provided in the processor 110 for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. This memory may save the instructions or data just used or recycled by the processor 110. If the processor 110 needs to use the instruction or data again, it can directly call it from the memory. This avoids repeated accesses, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.

[0068] In the embodiments of the present application, the execution of various tasks can be controlled by the processor 110 or other components can be called to complete the tasks. For example, the internal memory 121 can be called to store service data related to the tasks, and the wireless communication module 160 can be controlled to perform data communication related to the tasks with other devices. The processor 110 can include different devices. For example, when the CPU and GPU are integrated, the CPU and GPU can cooperate to execute tasks. For example, some operations in the tasks are executed by the CPU, and the other part of the operations are executed by the GPU to obtain a faster processing efficiency.

[0069] The display screen 194 is used to display images, videos, etc. The display screen 194 includes a display panel. The display panel can adopt a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), a MiniLED, a MicroLED, a Micro-OLED, a quantum dot light-emitting diode (QLED), etc. In some embodiments, the electronic device 100 may include one or N display screens 194, where N is a positive integer greater than 1. The display screen 194 can be used to display information input by the user or information provided to the user and various graphical user interfaces (GUIs). For example, the display screen 194 can display photos, videos, web pages, or files, etc.

[0070] In the embodiments of the present application, the display screen 194 can be an integrated flexible display screen, or a spliced display screen composed of two rigid screens and a flexible screen located between the two rigid screens.

[0071] The camera 193 (front camera or rear camera, or a camera can be used as both the front camera and the rear camera) is used to capture static images or videos. Generally, the camera 193 can include a photosensitive element such as a lens group and an image sensor. Among them, the lens group includes multiple lenses (convex lenses or concave lenses) for collecting the optical signals reflected by the object to be photographed and transmitting the collected optical signals to the image sensor. The image sensor generates the original image of the object to be photographed according to the optical signals.

[0072] The internal memory 121 can be used to store computer-executable program codes, and the executable program codes include instructions. The processor 110 executes various functional applications and data processing of the electronic device 100 by running the instructions stored in the internal memory 121. The internal memory 121 can include a program storage area and a data storage area. Among them, the program storage area can store the operating system, the codes of application programs, etc. The data storage area can store the data created during the use of the electronic device 100, etc.

[0073] The internal memory 121 can also store one or more computer programs corresponding to the algorithms of the solution of this application. The one or more computer programs are stored in the above internal memory 121 and are configured to be executed by one or more processors 110. The one or more computer programs include instructions, and the above instructions can be used to execute each step in the following embodiments.

[0074] In addition, the internal memory 121 can include a high-speed random access memory, and can also include a non-volatile memory, such as at least one disk storage device, a flash memory device, a universal flash storage (UFS), etc.

[0075] Of course, the code of the algorithm of the solution of the embodiment of this application can also be stored in an external memory. In this case, the processor 110 can run the code of the algorithm of the solution of this application stored in the external memory through the external memory interface 120.

[0076] The touch sensor, also known as the "touch panel". The touch sensor can be disposed on the display screen 194. The touch sensor and the display screen 194 form a touch display screen, also known as the "touch screen". The touch sensor is used to detect a touch operation acting on or near it. The touch sensor can transmit the detected touch operation to the application processor to determine the type of touch event. Visual output related to the touch operation can be provided through the display screen 194. In some other embodiments, the touch sensor can also be disposed on the surface of the electronic device 100, at a different position from the display screen 194.

[0077] The wireless communication function of the electronic device 100 can be implemented by the antenna 1, the antenna 2, the mobile communication module 150, the wireless communication module 160, the modulation and demodulation processor, and the baseband processor, etc.

[0078] The antenna 1 and the antenna 2 are used to transmit and receive electromagnetic wave signals. Each antenna in the electronic device 100 can be used to cover a single or multiple communication frequency bands. Different antennas can also be multiplexed to improve the utilization rate of the antennas. For example: the antenna 1 can be multiplexed as the diversity antenna of the wireless local area network. In some other embodiments, the antenna can be used in combination with a tuning switch.

[0079] The mobile communication module 150 may provide solutions for wireless communications including the 2nd generation (2G) / 3rd generation (3G) / 4th generation (4G) / 5th generation (5G) / 6th generation (6G), etc., which are applied to the electronic device 100. The mobile communication module 150 may include at least one filter, switch, power amplifier, low noise amplifier (LNA), etc. The mobile communication module 150 may receive electromagnetic waves through the antenna 1, filter, amplify, and perform other processes on the received electromagnetic waves, and then transmit them to the modulation and demodulation processor for demodulation. The mobile communication module 150 may also amplify the signal modulated by the modulation and demodulation processor and convert it into electromagnetic waves through the antenna 1 for radiation. In some embodiments, at least some functional modules of the mobile communication module 150 may be disposed in the processor 110. In some embodiments, at least some functional modules of the mobile communication module 150 and at least some modules of the processor 110 may be disposed in the same device. In the embodiments of the present application, the mobile communication module 150 may also be used for information interaction with other devices.

[0080] The modulation and demodulation processor may include a modulator and a demodulator. Among them, the modulator is used to modulate the low-frequency baseband signal to be transmitted into a medium-high frequency signal. The demodulator is used to demodulate the received electromagnetic wave signal into a low-frequency baseband signal. Subsequently, the demodulator transmits the demodulated low-frequency baseband signal to the baseband processor for processing. After being processed by the baseband processor, the low-frequency baseband signal is transmitted to the application processor. The application processor outputs a sound signal through an audio device (not limited to the speaker 170A, receiver 170B, etc.), or displays an image or video through the display screen 194. In some embodiments, the modulation and demodulation processor may be an independent device. In other embodiments, the modulation and demodulation processor may be independent of the processor 110 and be disposed in the same device as the mobile communication module 150 or other functional modules.

[0081] The wireless communication module 160 may provide solutions for wireless communications applied to the electronic device 100, including wireless local area networks (WLANs) (such as Wi-Fi networks), Bluetooth (BT), global navigation satellite systems (GNSSs), frequency modulation (FM), near field communication (NFC), infrared technology (IR), and the like. The wireless communication module 160 may be one or more devices integrating at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via the antenna 2, performs frequency modulation and filtering processing on the electromagnetic wave signals, and sends the processed signals to the processor 110. The wireless communication module 160 may also receive signals to be sent from the processor 110, perform frequency modulation and amplification on them, and convert them into electromagnetic waves through the antenna 2 for radiation. In the embodiments of the present application, the wireless communication module 160 may be used to establish a connection with other electronic devices and perform data interaction. Or the wireless communication module 160 may be used to access an access point device, send control instructions to other electronic devices, or receive data sent from other electronic devices.

[0082] In addition, the electronic device 100 may implement audio functions through the audio module 170, the speaker 170A, the receiver 170B, the microphone 170C, the headphone jack 170D, and the application processor, etc. For example, music playback, recording, etc. The electronic device 100 may receive inputs from the keys 190 and generate key signal inputs related to the user settings and function controls of the electronic device 100. The electronic device 100 may use the motor 191 to generate vibration prompts (such as incoming call vibration prompts). The indicator 192 in the electronic device 100 may be an indicator light, which can be used to indicate the charging state, the change in battery level, and can also be used to indicate messages, missed calls, notifications, etc. The SIM card interface 195 in the electronic device 100 is used to connect the SIM card. The SIM card can be in contact with and separated from the electronic device 100 by being inserted into or removed from the SIM card interface 195.

[0083] It should be understood that in practical applications, the electronic device 100 may include more than Figure 2More or fewer components shown are not limited in the embodiments of this application. The illustrated electronic device 100 is merely an example, and the electronic device 100 may have more or fewer components than those shown in the figure, may combine two or more components, or may have different component configurations. The various components shown in the figure may be implemented in hardware, software, or a combination of hardware and software, including one or more signal processing and / or application specific integrated circuits.

[0084] The software system of the electronic device 100 may adopt a layered architecture, an event-driven architecture, a microkernel architecture, a microservices architecture, or a cloud architecture. The layered architecture divides the software into several layers, and each layer has a clear role and division of labor. Communication between layers is through software interfaces. Exemplarily, as Figure 3 shown, the software architecture may be divided into four layers, from top to bottom are the application layer, the application framework layer (framework, FWK), the runtime and system libraries, and the (Linux) kernel layer.

[0085] The application layer is the top layer of the operating system, including the native applications of the operating system, and may also include third-party applications. For example, the application layer may include a clone application, a near-field fast transfer application, and other applications, etc. The application involved in the embodiments of this application is abbreviated as application (APP), which is a software program capable of implementing one or more specific functions. Usually, multiple applications may be installed in the electronic device, such as a camera application, a gallery application, a calendar application, etc. The applications mentioned herein may be system applications pre-installed when the electronic device leaves the factory, or third-party applications downloaded from the network or obtained from other electronic devices by the user during the use of the electronic device.

[0086] Of course, for developers, developers can write application programs and install them into this layer. In one possible implementation, the application program may be developed using the Java language and completed by calling the application programming interface (API) provided by the application framework layer. Developers can interact with the underlying layer of the operating system (such as the kernel layer, etc.) through the application framework to develop their own application programs.

[0087] The application framework layer is the API and programming framework for the application layer. The application framework layer may include some predefined functions. The application framework layer may include a window manager, a content provider, a view system, a telephone manager, a resource manager, a notification manager, etc.

[0088] The window manager is used to manage window programs. The window manager can obtain the display screen size, determine whether there is a status bar, lock the display screen (or screen), capture the display screen, etc. The content provider is used to store and obtain data, and make this data accessible to application programs. The said data may include information such as files (e.g., documents, videos, images, audio), texts, etc. The view system includes visual controls, such as controls for displaying contents like texts, pictures, documents, etc. The view system can be used to build application programs. The interface in the display window can be composed of one or more views. For example, a display interface including a short message notification icon may include a view for displaying text and a view for displaying pictures. The phone manager is used to provide the communication functions of the electronic device. The notification manager enables application programs to display notification information in the status bar, can be used to convey message of the notification type, and can automatically disappear after a short stay without user interaction.

[0089] The runtime includes a core library and a virtual machine. The runtime is responsible for the scheduling and management of the system.

[0090] The core library of the system consists of two parts: one part is the functional functions that need to be called by the Java language, and the other part is the core library of the system. The application layer and the application framework layer run in the virtual machine. Taking Java as an example, the virtual machine executes the Java files of the application layer and the application framework layer as binary files. The virtual machine is used to perform functions such as the management of the object life cycle, stack management, thread management, security and exception management, and garbage collection.

[0091] The system library can include multiple functional modules. For example: the surface manager, the media library, the 3D graphics processing library (e.g., OpenGL ES), the 2D graphics engine (e.g., SGL), the image processing library, etc. The surface manager is used to manage the display subsystem and provides the fusion of 2D and 3D layers for multiple application programs. The media library supports the playback and recording of multiple common audio and video formats, as well as static image files, etc. The media library can support multiple audio and video coding formats, such as: MPEG4, H.564, MP3, AAC, AMR, JPG, PNG, etc. The 3D graphics processing library is used to implement 3D graphics drawing, image rendering, synthesis and layer processing, etc. The 2D graphics engine is the drawing engine for 2D drawing.

[0092] The kernel layer provides the core system services of the operating system. Services such as security, memory management, process management, network protocol stack, and driver model are all implemented based on the kernel layer. The kernel layer also serves as an abstraction layer between the hardware and software stacks. There are many driver programs related to electronic devices in this layer. The main drivers are: display driver; keyboard driver as an input device; Flash driver based on memory technology devices; camera driver; audio driver; Bluetooth driver; WiFi driver, etc. These drivers can be used to drive the corresponding hardware devices to perform corresponding processing. For example, the Bluetooth driver can be used to drive the Bluetooth device of the electronic device for Bluetooth communication, and the WiFi driver can be used to drive the WiFi communication device of the electronic device for WiFi communication, etc.

[0093] In the embodiments of the present application, the kernel layer may include a kernel scheduler. The kernel scheduler can be simply referred to as the scheduler, which is responsible for load management and coordinating the reasonable allocation of CPU resources among multiple processes or tasks. The execution of the task processing method provided by the embodiments of the present application can be controlled by the kernel scheduler or by calling other components (such as a processor) to complete.

[0094] It should be understood that the above-mentioned functional services are only examples. In actual applications, the electronic device can also be divided into more or fewer functional services according to other factors, or the functions of each service can be divided in other ways, or the functional services can not be divided, but work as a whole.

[0095] The solution provided by the embodiments of the present application will be described in detail below. The solution provided by the embodiments of the present application can be applied to an electronic device with multiple processors. For the convenience of description, in the following, the processor is taken as an example of a CPU. The processing methods of other types of devices included in the processor can be implemented with reference to the following methods, and will not be described in detail one by one in the embodiments of the present application.

[0096] The solution provided by the embodiments of the present application can be applied to an electronic device. In a possible solution, as Figure 4 shown, the electronic device may include a task queue, a scheduling module, and multiple CPUs (for example Figure 4CPU0 and CPU1 shown in []. Optionally, the task queue may be created and maintained by a task queue management service. Exemplarily, the task queue may be a global task queue or other queues. A queue is just a data format for managing tasks, and other data formats for implementing task management may be used, which are not limited in the embodiments of the present application. The global task queue is a task queue shared by all CPUs in the electronic device. The global task queue may include one task queue or multiple task queues, where each task queue is shared by all CPUs in the electronic device. When the global task queue includes multiple task queues, the multiple task queues may be uniformly managed by the task queue management service and regarded as one global task queue. The global task queue may include tasks to be executed (such as Figure 4 the multiple tasks shown in []. The scheduling module may be used to allocate the tasks in the task queue to multiple CPUs of the electronic device for execution. Exemplarily, the scheduling module may be a kernel scheduler or other types of schedulers, etc., which are not limited in the embodiments of the present application.

[0097] For ease of understanding and description, in the following, a scenario where the task queue is a global task queue and the scheduling module is a kernel scheduler is used as an example to illustrate the method provided by the embodiments of the present application. The solutions in other scenarios may be implemented with reference to the following method, which will not be elaborated one by one in the embodiments of the present application.

[0098] The priorities of different tasks in the global task queue may be the same or different. Among them, high-priority tasks in the global task queue may be executed prior to low-priority tasks. In some embodiments of the present application, the tasks in the electronic device may be divided into three categories: ordinary tasks, focus tasks, and real-time tasks. Among them, the focus tasks may be interactive tasks. The real-time tasks may be tasks that need to be immediately responded to and executed, or may be tasks that need to be executed within a specific time constraint. The ordinary tasks may be tasks other than the focus tasks and the real-time tasks, that is, the ordinary tasks belong to non-real-time and non-focus tasks. The priority of the ordinary tasks is lower than the priorities of the focus tasks and the real-time tasks. Optionally, the priority of the real-time tasks is higher than the priority of the focus tasks. Optionally, the execution duration of the ordinary tasks may be longer than the execution durations of the focus tasks and the real-time tasks, or the completion time of the ordinary tasks may be later than the focus tasks and the real-time tasks. For example, the ordinary tasks may be long-duration low-priority tasks, and the focus tasks and the real-time tasks may be short-duration high-priority tasks.

[0099] In some embodiments of the present application, when the kernel scheduler allocates tasks in the global task queue, it can allocate them in the order of task priorities from high to low. For example, high-priority tasks can be allocated preferentially, followed by low-priority tasks. When the CPU allocated by the kernel scheduler to execute high-priority tasks is executing low-priority tasks, the kernel scheduler can control the CPU to temporarily interrupt the executed low-priority tasks and preferentially execute high-priority tasks. Within a set duration after interrupting the execution of low-priority tasks, if the CPU has completed the execution of high-priority tasks, the kernel scheduler can control the CPU to continue executing the original low-priority tasks. Within a set duration after interrupting the execution of low-priority tasks, if the CPU has not completed the execution of high-priority tasks, the kernel scheduler can, when the duration of interrupting the execution of low-priority tasks exceeds the set duration, allocate the interrupted low-priority tasks to other idle CPUs for execution.

[0100] In some embodiments of the present application, the hardware structure of the electronic device can adopt Figure 2 the structure shown. The software system of the electronic device can adopt Figure 3 the system shown, where Figure 4 the kernel scheduler shown in

[0101] It should be understood that the system architecture of the electronic device described above is only an example. In actual applications, some modules in the system can be added or reduced, or some modules can be split or merged. No specific limitations are made in the present application. The division of functional modules in the system architecture of the electronic device described above is illustrative, only a logical function division. In actual implementation, there can be other division methods, and the specific functions executed by each functional module can also have other division methods (for example, the rationality check function in the above compliance check can also be executed by the prompt scheduling management module, etc.).

[0102] Next, the solution provided by the embodiments of the present application will be described in detail in combination with the above system architecture.

[0103] The task processing method provided by the embodiments of the present application can be executed by an electronic device with multiple CPUs, specifically by the kernel scheduler in the electronic device.

[0104] Embodiment 1

[0105] In the solution provided by the embodiments of the present application, the kernel scheduler in the electronic device can continuously select tasks from the global task queue and allocate them to appropriate CPUs for execution. Among them, the kernel scheduler can select tasks in the global task queue in order from high to low task priorities and allocate them. Among them, the priority of each task can be used to indicate the order of execution of the task.

[0106] Reference Figure 5 , taking the scenario where the task processing method is executed by the kernel scheduler, the task types are divided into three types: real-time tasks, focus tasks, and ordinary tasks, and the priority of real-time tasks is higher than that of focus tasks, and the priority of focus tasks is higher than that of ordinary tasks as an example, a task processing method provided by an embodiment of the present application may include:

[0107] S501: The kernel scheduler queries the global task queue.

[0108] S502: The kernel scheduler determines whether the global task queue includes real-time tasks; if so, execute step S503, otherwise, execute step S504.

[0109] S503: The kernel scheduler allocates a CPU for executing the real-time task. And execute step S501.

[0110] Among them, the kernel scheduler can select a CPU for executing the real-time task based on the load of the real-time task and allocate the real-time task to the selected CPU. For example, the processing power of the CPU selected by the kernel scheduler can be positively correlated with the load of the real-time task, that is, the greater the load of the real-time task, the higher the processing power of the CPU selected by the kernel scheduler for executing the real-time task, and the smaller the load of the real-time task, the lower the processing power of the CPU selected by the kernel scheduler for executing the real-time task.

[0111] The CPU allocated by the kernel scheduler for executing the real-time task can be a CPU in a working state or a CPU in an idle state. Among them, when the CPU allocated by the kernel scheduler for executing the real-time task is a CPU in a working state, if there is no task being executed on this CPU, this CPU can immediately start executing the allocated real-time task; if there is a task being executed on this CPU and the task being executed is a real-time task or a focus task, this CPU can execute the allocated real-time task after finishing the task being executed; if there is a task being executed on this CPU and the task being executed is an ordinary task, this CPU can execute the allocated real-time task after interrupting the ordinary task being executed. Among them, regarding the processing method for the interrupted ordinary task, it can be implemented with reference to the corresponding method described in the following embodiments. When the CPU allocated by the kernel scheduler for executing the real-time task is a CPU in an idle state, this CPU can execute the allocated real-time task after exiting the idle state.

[0112] In the embodiments of the present application, when the CPU is in a working state and there is no task being executed, it can also be understood that the CPU is in a working state without task execution. When the CPU is in a working state and there is a task being executed, it can also be understood that the CPU is in a working state with task execution or the CPU is in a state with task execution.

[0113] S504: The kernel scheduler determines whether there is a focus task in the global task queue; if so, step S505 is executed, otherwise, step S506 is executed.

[0114] S505: The kernel scheduler allocates a CPU for executing the focus task. And step S501 is executed.

[0115] Among them, the kernel scheduler can select a CPU for executing the focus task based on the load of the focus task, and allocate the focus task to the selected CPU. For example, the processing capacity of the CPU selected by the kernel scheduler can be positively correlated with the load of the focus task.

[0116] The CPU allocated by the kernel scheduler for executing the focus task may be the same as or different from the CPU allocated for executing the real-time task in step S503. The CPU allocated by the kernel scheduler for executing the focus task can be a CPU in a working state or a CPU in an idle state. Among them, when the CPU allocated by the kernel scheduler for executing the focus task is a CPU in a working state, if there is no task being executed on this CPU, this CPU can immediately start executing the allocated focus task; if there is a task being executed on this CPU and the task being executed is a real-time task or a focus task, this CPU can execute the allocated focus task after finishing the task being executed; if there is a task being executed on this CPU and the task being executed is a normal task, this CPU can execute the allocated focus task after interrupting the task being executed. Among them, regarding the processing method for the interrupted normal task, it can be implemented with reference to the corresponding method described in the following embodiments. When the CPU allocated by the kernel scheduler for executing the focus task is a CPU in an idle state, this CPU can execute the allocated focus task after exiting the idle state.

[0117] S506: The kernel scheduler determines whether there is a normal task in the global task queue; if so, step S507 is executed, otherwise, step S501 is executed.

[0118] S507: The kernel scheduler allocates a CPU for executing the normal task. And step S501 is executed.

[0119] Among them, the kernel scheduler can select a CPU for executing ordinary tasks based on the load of the ordinary tasks and allocate the ordinary tasks to the selected CPU. For example, the processing capacity of the CPU selected by the kernel scheduler can be positively correlated with the load of the ordinary tasks.

[0120] The CPU allocated by the kernel scheduler for executing ordinary tasks may be the same as or different from the CPU allocated in step S503 for executing real-time tasks or the CPU allocated in step S505 for executing focus tasks. The CPU allocated by the kernel scheduler for executing ordinary tasks can be a working CPU or an idle CPU. Among them, when the CPU allocated by the kernel scheduler for executing ordinary tasks is a working CPU, if there is no task being executed on this CPU, this CPU can immediately start executing the allocated ordinary tasks; if there is a task being executed on this CPU, this CPU can execute the allocated ordinary tasks after finishing the task being executed. When the CPU allocated by the kernel scheduler for executing ordinary tasks is an idle CPU, this CPU can execute the allocated ordinary tasks after exiting the idle state.

[0121] In the above method, regarding the method of the kernel scheduler allocating CPUs for different tasks, reference can also be made to the description in the following embodiments, which will not be elaborated here for the time being.

[0122] In the above method, the kernel scheduler will continuously select tasks from the global task queue for execution. Among them, the kernel scheduler can first determine whether there are real-time tasks. If there are real-time tasks, the CPU for the real-time tasks will be allocated preferentially. The real-time tasks have the highest priority, so they can obtain scheduling and execution preferentially. If there are no real-time tasks, the kernel scheduler can determine whether there are focus tasks. If there are focus tasks, the CPU for the focus tasks can be allocated. If there are no focus tasks, the kernel scheduler can determine whether there are ordinary tasks. If there are, the CPU will be allocated. Through this method, it can be ensured that tasks with higher priorities are executed preferentially, thereby improving the service experience.

[0123] The method of the kernel scheduler in the embodiments of the present application for allocating CPUs for different tasks will be described in detail below.

[0124] In the solution provided by the embodiments of the present application, the state of the CPU can be divided into a working state and an idle state. Among them, the working state is the state in which the CPU can directly execute tasks. When the CPU is in the working state, it can either have tasks to execute or have no tasks to execute. The CPU can sequentially execute the tasks assigned to it in the working state. The idle state belongs to a low-power sleep state. The CPU has no tasks to execute in the idle state. The CPU in the idle state needs to exit the idle state before it can execute tasks. The CPU can switch between the working state and the idle state. High-priority tasks can preempt the CPU of low-priority tasks. Therefore, the CPU assigned by the kernel scheduler to execute high-priority tasks can be any of the following:

[0125] 1) A CPU in the idle state. Among them, this CPU can execute the assigned high-priority task after exiting the idle state.

[0126] 2) A CPU in the working state but not executing any tasks. Among them, this CPU can immediately execute the assigned high-priority task.

[0127] 3) A CPU in the working state and executing a low-priority task. Among them, this CPU can interrupt the currently executing low-priority task and then execute the assigned high-priority task.

[0128] During specific allocation, the kernel scheduler can perform the allocation in combination with scenario factors such as the service scenario and the status of the electronic device, and no specific limitations are imposed in the embodiments of the present application.

[0129] The CPU assigned by the kernel scheduler to execute low-priority tasks can be any of the following:

[0130] 1) A CPU in the idle state. Among them, this CPU can execute the assigned low-priority task after exiting the idle state.

[0131] 2) A CPU in the working state but not executing any tasks. Among them, this CPU can immediately execute the assigned low-priority task.

[0132] During specific allocation, the kernel scheduler can perform the allocation in combination with scenario factors such as the service scenario and the status of the electronic device, and no specific limitations are imposed in the embodiments of the present application.

[0133] In an example, high-priority tasks can be real-time tasks or focus tasks, and low-priority tasks can be ordinary tasks, that is, non-real-time and non-focus tasks.

[0134] Embodiment 2

[0135] In a possible solution provided by an embodiment of the present application, after the kernel scheduler assigns a low-priority task to a CPU1 for execution, during the execution of the low-priority task by CPU1, when the kernel scheduler queries that a high-priority task is added to the global task queue, the high-priority task can preempt the CPU that is executing the low-priority task, that is, the kernel scheduler can assign the high-priority task to the CPU for priority execution. The CPU can interrupt the low-priority task being executed and start executing the high-priority task. The interrupted low-priority task can return to the global task queue and queue up. When the allocation order of the interrupted low-priority task reaches the first in the global task queue, the kernel scheduler can reassign a CPU for the interrupted low-priority task. Among them, when the CPU that originally executed the interrupted low-priority task is in a working state and there is no task being executed (for example, the CPU finishes executing the high-priority task), the CPU can resume executing the interrupted low-priority task. When the CPU that originally executed the interrupted low-priority task is in a working state and there is a task being executed (for example, the CPU is executing a high-priority task), the kernel scheduler can, when the interruption duration of the interrupted low-priority task exceeds a set duration, assign the interrupted low-priority task to another CPU (such as an idle CPU) for execution. Or, the kernel scheduler can, before the interruption duration of the interrupted low-priority task exceeds the set duration, when determining that the CPU that originally executed the interrupted low-priority task is in a working state and there is no task being executed, assign the interrupted low-priority task to the CPU for execution. Optionally, in the above scenario, the electronic device may be in a light load state. In the light load state, some of the multiple CPUs of the electronic device may be in a working state and some may be in an idle state.

[0136] In one example, the low-priority tasks may include the aforementioned normal tasks, and the high-priority tasks may include the aforementioned real-time tasks and focus tasks.

[0137] Referring to Figure 6 , taking the example that the multiple CPUs of the electronic device at least include a first CPU and a second CPU, and the task processing method is executed by the kernel scheduler, and the task types include three types of tasks: real-time tasks, focus tasks, and normal tasks, and the priority of the real-time task is higher than that of the focus task, and the priority of the focus task is higher than that of the normal task, a task processing method provided by an embodiment of the present application may include:

[0138] S601: When the kernel scheduler queries that the global task queue includes normal tasks and does not include real-time tasks and focus tasks, it instructs the first CPU to execute the first normal task in the global task queue.

[0139] Optionally, the electronic device may be in a light load state where the first CPU is in the working state and the second CPU is in the idle state.

[0140] S602: The first CPU executes the ordinary tasks indicated by the kernel scheduler.

[0141] Example 1. In an example, multiple CPUs of the electronic device may include CPU1 and CPU0. CPU1 may be in the working state and CPU0 may be in the idle state. In this scenario, the electronic device is in the light load state. Taking the task queue including only ordinary tasks shown in the schematic diagram (a) in Figure 7 as an example, based on the method described in step S601, the kernel scheduler may allocate the first ordinary task in the global task queue, that is, ordinary task 1, to CPU1 (i.e., the first CPU) for execution. As shown in the first stage in Figure 8 , CPU1 may execute ordinary task 1, and CPU2 (i.e., the second CPU) is in the idle state, and the electronic device is still in the light load state. In the above scenario, after the kernel scheduler allocates ordinary task 1 to CPU1 for execution, this ordinary task 1 exits the global task queue, Figure 7 and the global task queue shown in the schematic diagram (a) in Figure 7 is updated to the global task queue shown in the schematic diagram (b) in

[0142] S603: When the kernel scheduler queries that there is a real-time task in the global task queue, it instructs the first CPU to interrupt the execution of the ordinary task and execute the real-time task.

[0143] Optionally, after the kernel scheduler instructs the first CPU to interrupt the execution of the ordinary task and execute the real-time task, it may start timing. The timing duration is used to represent the duration of the interruption of the ordinary task execution, and it is also the duration for which the ordinary task waits for the first CPU to execute other tasks (such as real-time tasks).

[0144] S604: The first CPU interrupts the execution of the ordinary task, adds the interrupted ordinary task to the global task queue, and starts to execute the real-time task.

[0145] Example 2. In an example, based on the scenario described in Example 1, when the kernel scheduler queries that a real-time task is added to the global task queue, that is, when the global task queue shown in the schematic diagram (b) in Figure 7 is updated to the global task queue shown in the schematic diagram (c) in Figure 7 , since the priority of the newly added real-time task in the global task queue is higher than the priority of ordinary task 1, this real-time task may preempt CPU1 that is executing ordinary task 1. The kernel scheduler may allocate this real-time task to CPU1 for priority execution. As shown in Figure 8As shown in the second stage in , in response to the indication of the kernel scheduler, CPU1 can switch from executing the normal task 1 to executing the real-time task, so the normal task 1 is interrupted. In the above scenario, after the kernel scheduler assigns the real-time task to CPU1 for execution, Figure 7 the global task queue shown in the schematic diagram (c) in is updated to Figure 7 the global task queue shown in the schematic diagram (d) in . Among them, the interrupted normal task 1 returns to the end of the global task queue and waits for reallocation.

[0146] S605: When the interrupted normal task is the first task to be allocated in the global task queue, the kernel scheduler determines whether the first CPU currently has no task being executed; if so, step S606 is executed, otherwise, step S608 is executed.

[0147] Among them, the situation where the interrupted normal task is the first task to be allocated in the global task queue can specifically be the following: the interrupted normal task is the first task in the global task queue, and there is no task in the global task queue with a higher priority than the interrupted normal task. The situation where the first CPU has no task being executed can specifically refer to: the first CPU is in an idle state; or, the first CPU is in a working state but has no task being executed.

[0148] Optionally, the duration of the interruption of the interrupted normal task can be the timing duration timed by the above kernel scheduler.

[0149] S606: The kernel scheduler instructs the first CPU to continue executing the interrupted normal task.

[0150] S607: The first CPU continues to execute the interrupted normal task.

[0151] In a light load scenario, the system load is low or the priorities of other tasks are low. Therefore, after the interrupted normal task returns to the global task queue, its sorting is relatively high, and the waiting time for reallocation is short.

[0152] Example 3. In one example, in a scenario where the allocation order of the interrupted normal task after returning to the global task queue is not ranked first, the kernel scheduler can refer to the foregoing Figure 5Perform task allocation according to the method shown. Until the allocation order of the interrupted real-time task ranks first in the global task queue (that is, the tasks that were originally before the interrupted ordinary task and had a priority higher than or equal to that of the interrupted ordinary task have been allocated), the kernel scheduler can determine whether the first CPU has no task being executed. If the first CPU has no task being executed, the kernel scheduler can re-allocate the interrupted ordinary task to the first CPU for execution. The second CPU remains in the idle state, and the electronic device remains in the light load state. If the first CPU has a task being executed (that is, the first CPU is in the state of executing a task), the kernel scheduler can process it with reference to the method described in step S608 and subsequent steps. Among them, the allocation order of the interrupted ordinary task can be determined with reference to the order of allocating tasks in the corresponding method described above, which will not be elaborated here. Figure 5 The corresponding method determines the order of task allocation, which will not be elaborated here.

[0153] For example, the set duration can be 4 milliseconds (ms). Based on the scenario described in the above Example 2, in the scenario where the interrupted ordinary task 1 shown in the schematic diagram (d) in [reference] ranks third in the global task queue after returning, assume that the duration required for the allocation order of the interrupted ordinary task 1 to rank first in the global task queue is 2 ms. As shown in the schematic diagram (e) in [reference], when the allocation order of the interrupted ordinary task 1 ranks first in the global task queue, if CPU1 is in the working state and has no task being executed, the kernel scheduler can re-allocate the interrupted ordinary task 1 to CPU1 for execution. As shown in the third stage in [reference], CPU1 can continue to execute the interrupted ordinary task 1. CPU2 remains in the idle state, and the electronic device remains in the light load state. In this scenario, the duration of the interrupted execution of the interrupted ordinary task 1 is also the duration required for the allocation order of the interrupted ordinary task 1 to rank first in the global task queue. In this scenario, there are the following two possible situations for the duration of the interrupted execution of the interrupted ordinary task 1: Figure 7 In the scenario where the interrupted ordinary task 1 shown in the schematic diagram (d) in [reference] ranks third in the global task queue after returning, assume that the duration required for the allocation order of the interrupted ordinary task 1 to rank first in the global task queue is 2 ms. As shown in the schematic diagram (e) in [reference], when the allocation order of the interrupted ordinary task 1 ranks first in the global task queue, if CPU1 is in the working state and has no task being executed, the kernel scheduler can re-allocate the interrupted ordinary task 1 to CPU1 for execution. As shown in the third stage in [reference], CPU1 can continue to execute the interrupted ordinary task 1. CPU2 remains in the idle state, and the electronic device remains in the light load state. In this scenario, the duration of the interrupted execution of the interrupted ordinary task 1 is also the duration required for the allocation order of the interrupted ordinary task 1 to rank first in the global task queue. In this scenario, there are the following two possible situations for the duration of the interrupted execution of the interrupted ordinary task 1: Figure 7 As shown in the schematic diagram (e) in [reference], when the allocation order of the interrupted ordinary task 1 ranks first in the global task queue, if CPU1 is in the working state and has no task being executed, the kernel scheduler can re-allocate the interrupted ordinary task 1 to CPU1 for execution. As shown in the third stage in [reference], CPU1 can continue to execute the interrupted ordinary task 1. CPU2 remains in the idle state, and the electronic device remains in the light load state. In this scenario, the duration of the interrupted execution of the interrupted ordinary task 1 is also the duration required for the allocation order of the interrupted ordinary task 1 to rank first in the global task queue. In this scenario, there are the following two possible situations for the duration of the interrupted execution of the interrupted ordinary task 1: Figure 8 As shown in the third stage in [reference], CPU1 can continue to execute the interrupted ordinary task 1. CPU2 remains in the idle state, and the electronic device remains in the light load state. In this scenario, the duration of the interrupted execution of the interrupted ordinary task 1 is also the duration required for the allocation order of the interrupted ordinary task 1 to rank first in the global task queue. In this scenario, there are the following two possible situations for the duration of the interrupted execution of the interrupted ordinary task 1:

[0154] 1) A possible scenario is that the interrupted duration of the ordinary task 1 is less than or equal to the set duration. For example, the interrupted duration of the ordinary task 1, that is, the duration required for the allocation order of the interrupted ordinary task 1 to rank first in the global task queue, can be 2 ms. In this case, compared with the existing solution where the kernel scheduler waits until the interrupted ordinary task 1 ranks first in the global task queue (i.e., after waiting for 2 ms) and then immediately allocates the interrupted ordinary task 1 to the idle CPU, namely CPU2, the above solution saves the duration required for CPU2 to exit the idle state. Therefore, the waiting duration for the interrupted ordinary task 1 to be executed (i.e., the interrupted duration) can be shortened, thereby improving the task execution efficiency. It can also avoid CPU2 exiting the idle state, thus reducing the total CPU power consumption.

[0155] 2) Another possible scenario is that the interrupted duration of the ordinary task 1 is greater than the set duration. For example, the interrupted duration of the ordinary task 1, that is, the duration required for the allocation order of the interrupted ordinary task 1 to rank first in the global task queue, can be 6 ms. In this case, compared with the existing solution where the kernel scheduler waits until the interrupted ordinary task 1 ranks first in the global task queue (i.e., after waiting for 6 ms) and then allocates the interrupted ordinary task 1 to the idle CPU2, the above solution can avoid CPU2 exiting the idle state, and also avoid the relatively large power consumption caused by CPU2 exiting the idle state, thereby reducing the total CPU power consumption.

[0156] Figure 8 The switching process from the third stage to the fifth stage shown in can be referred to Figure 8 The switching process from the first stage to the third stage shown in, which will not be elaborated here. In summary, the above method can avoid waking up CPU2, and further avoid CPU switching during task execution, which helps to reduce the total CPU power consumption. In the above method, CPU1 is always in the state of executing tasks, which can improve the utilization rate of CPU1. When the duration of CPU1 executing the real-time task is less than the duration required for CPU2 to exit the idle state, this method can also reduce the task execution latency, thereby improving the task execution efficiency. The above method and Figure 1 The method shown in avoids the possible power consumption in the stage where CPU2 exits the idle state and the stage where CPU1 remains in the working state but does not execute any tasks before entering the idle state. Therefore, the overall power consumption overhead and even latency overhead are reduced, and the light load state of the electronic device will not be changed.

[0157] In the above Example 3 or Example 4, the duration of CPU1 executing the real-time task can be less than or equal to the set duration.

[0158] S608: The kernel scheduler determines whether the interrupted execution duration of the ordinary task exceeds a set duration; if so, step S609 is executed, otherwise, step S611 is executed.

[0159] Optionally, the interrupted execution duration of the ordinary task can be the timing duration measured by the above kernel scheduler.

[0160] S609: The kernel scheduler instructs the second CPU in the idle state to exit the idle state and continue to execute the interrupted ordinary task.

[0161] S610: The second CPU exits the idle state and executes the interrupted ordinary task.

[0162] S611: When the kernel scheduler determines that either the first condition or the second condition is satisfied, it executes the processing corresponding to the satisfied condition; wherein, the first condition is that the first CPU has no task being executed, and the processing corresponding to the first condition is to instruct the first CPU to continue executing the interrupted ordinary task; the second condition is that the interrupted execution duration of the ordinary task exceeds the set duration, and the processing corresponding to the second condition is to instruct the second CPU in the idle state to exit the idle state and continue to execute the interrupted ordinary task.

[0163] Wherein, after the kernel scheduler instructs the first CPU to continue executing the interrupted ordinary task, the first CPU can continue to execute the interrupted ordinary task according to the instruction of the kernel scheduler. After the kernel scheduler instructs the second CPU in the idle state to exit the idle state and continue to execute the interrupted ordinary task, the second CPU can exit the idle state and continue to execute the interrupted ordinary task according to the instruction of the kernel scheduler. Therefore, after step S611, the following step S612 or step S613 can be included.

[0164] S612: When the first CPU receives the instruction of the kernel scheduler, it continues to execute the interrupted ordinary task.

[0165] S613: When the second CPU receives the instruction of the kernel scheduler, it exits the idle state and continues to execute the interrupted ordinary task.

[0166] As an alternative implementation, the "first condition is that the first CPU is in the working state and has no task being executed" described in step S611 can also be replaced with "the first condition is that the first CPU currently has no task being executed" or "the first condition is that the first CPU has completed the real-time task".

[0167] In the embodiments of the present application, "exceed" can be understood as "greater than".

[0168] Example 4: In one example, in a scenario where the allocation order of an interrupted normal task ranks first after it returns to the global task queue, the kernel scheduler may temporarily not allocate a CPU to the interrupted normal task in the global task queue and may wait until it is determined that the first CPU is in a working state and there is no task being executed, or the interruption duration of the interrupted normal task in the global task queue exceeds a set duration, and then allocate a CPU to the interrupted normal task. Among them, when the kernel scheduler preferentially determines that the first CPU is in a working state and there is no task being executed during the waiting process, it can re-allocate the interrupted normal task in the global task queue to the first CPU for execution. That is, after the first CPU finishes executing the real-time task, it can continue to execute the interrupted normal task. The second CPU is still in an idle state, and the electronic device is still in a light load state. Compared with the existing solution where the kernel scheduler immediately allocates the interrupted normal task in the global task queue to the idle CPU, that is, the second CPU, this solution can avoid the second CPU exiting the idle state, thereby reducing the total CPU power consumption. When the kernel scheduler preferentially determines that the interruption duration of the interrupted normal task exceeds the set duration during the waiting process, it can allocate the interrupted normal task to the idle second CPU, thereby avoiding the waiting duration of the interrupted normal task being too long and affecting the service quality.

[0169] For example, based on the above Example 2, taking the scenario where the execution duration of the real-time task by the first CPU is less than or equal to the set duration as an example, when the allocation order of the interrupted normal task in the global task queue ranks first, the kernel scheduler can determine that the CPU1 is in a working state and there is no task being executed (that is, determine that the CPU1 has finished executing the real-time task) before the interruption duration of the interrupted normal task 1 exceeds the set duration. Therefore, when the kernel scheduler preferentially determines that the CPU1 is in a working state and there is no task being executed, it can allocate the interrupted normal task 1 to the CPU1 for continued execution.

[0170] For another example, based on the above Example 2, taking the scenario where the execution duration of the real-time task by the first CPU is greater than the set duration (for example, it can be t) as an example, when the allocation order of the interrupted normal task in the global task queue ranks first, the kernel scheduler can determine that the interruption duration of the interrupted normal task 1 exceeds the set duration before determining that the CPU1 is in a working state and there is no task being executed (that is, determine that the CPU1 has finished executing the real-time task). Therefore, when the kernel scheduler preferentially determines that the interruption duration of the interrupted normal task 1 exceeds the set duration, it can allocate the interrupted normal task 1 to the idle CPU2 for continued execution. As Figure 9As shown in [Figure 0], when the interrupted duration of the interrupted normal task 1 exceeds t and CPU1 is still executing the real-time task, in order to avoid the waiting duration of the interrupted normal task from being too long and affecting the service quality, the kernel scheduler may instruct the idle CPU2 to exit the idle state and continue to execute the interrupted normal task 1. As Figure 9 shown in the third stage of [Figure 0], CPU2 continues to execute the interrupted normal task 1 after exiting the idle state. Among them, after CPU2 exits the idle state, the kernel scheduler may control CPU1 to migrate the service data of the interrupted normal task 1 in the cache to the cache of CPU2. After the service data migration is completed, CPU2 may continue to execute the interrupted normal task 1, thereby ensuring the smooth execution of the service. This process and the process of CPU2 exiting the idle state may be included in the preparation stage before CPU2 executes the interrupted normal task 1. Figure 9 The switching process from the third stage to the fifth stage shown in [Figure 0] may refer to Figure 8 the switching process from the first stage to the third stage shown in [Figure 0], which will not be elaborated here.

[0171] As an alternative implementation, step S603 may also be replaced with: when the kernel scheduler queries that there is no real-time task in the global task queue and there is a focus task, it instructs the first CPU to interrupt the execution of the normal task and execute the focus task. Correspondingly, the real-time task described in step S604 may be replaced with a focus task.

[0172] Embodiment III

[0173] In a possible solution provided by an embodiment of the present application, after the kernel scheduler assigns a low-priority task to a CPU for execution, during the execution of the low-priority task by the CPU, when the kernel scheduler queries that a high-priority task is added to the global task queue, the high-priority task can preempt the CPU that is executing the low-priority task, that is, the kernel scheduler can assign the high-priority task to the CPU that is executing the low-priority task for priority execution. The CPU can interrupt the currently executing low-priority task and start executing the assigned high-priority task. Within a set duration after the CPU interrupts the execution of the low-priority task, when the CPU is in a working state and there is no task being executed (for example, the CPU finishes executing the high-priority task), the CPU can resume executing the interrupted low-priority task. Within a set duration after the CPU interrupts the execution of the low-priority task, if the CPU has been in the state of executing the high-priority task, when the interruption duration of the interrupted low-priority task exceeds the set duration, the kernel scheduler can assign the interrupted low-priority task to another CPU (such as an idle CPU) for execution. Optionally, in the above scenario, the electronic device may be in a light-load state. In the light-load state, some of the multiple CPUs of the electronic device may be in a working state and another part may be in an idle state.

[0174] In one example, the low-priority tasks may include the aforementioned ordinary tasks, and the high-priority tasks may include the aforementioned real-time tasks and focus tasks.

[0175] Referring to Figure 10 , the multiple CPUs of the electronic device at least include a first CPU and a second CPU. Among them, the second CPU may be in an idle state. Taking the scenario where the task processing method is executed by the kernel scheduler, the task types include three types of tasks: real-time tasks, focus tasks, and ordinary tasks, and the priority of the real-time tasks is higher than that of the focus tasks, and the priority of the focus tasks is higher than that of the ordinary tasks as an example, a task processing method provided by an embodiment of the present application may include:

[0176] S1001: When the kernel scheduler queries that the global task queue includes ordinary tasks and does not include real-time tasks and focus tasks, it instructs the first CPU to execute the first ordinary task in the global task queue.

[0177] The specific implementation of step S1001 may refer to the aforementioned step S601 and will not be elaborated here.

[0178] S1002: The first CPU executes the ordinary task instructed by the kernel scheduler.

[0179] The specific implementation of step S1002 may refer to the aforementioned step S602 and will not be elaborated here.

[0180] S1003: When the kernel scheduler queries that there is a real-time task in the global task queue, it instructs the first CPU to interrupt the execution of the ordinary task and execute the real-time task.

[0181] For the specific implementation of step S1003, reference can be made to the aforementioned step S603, which will not be elaborated here.

[0182] S1004: The first CPU interrupts the execution of the ordinary task and adds the interrupted ordinary task to the global task queue, and starts to execute the real-time task.

[0183] For the specific implementation of step S1004, reference can be made to the aforementioned step S604, which will not be elaborated here.

[0184] As an alternative implementation, step S1003 can also be replaced with: when the kernel scheduler queries that there is no real-time task in the global task queue and there is a focus task, it instructs the first CPU to interrupt the execution of the ordinary task and execute the focus task. Correspondingly, the real-time task described in step S1004 can be replaced with the focus task.

[0185] S1005: When the kernel scheduler determines that either the first condition or the second condition is met, it performs the processing corresponding to the met condition; wherein, the first condition is that the first CPU is in the working state and there is no task being executed, and the processing corresponding to the first condition is to instruct the first CPU to continue executing the interrupted ordinary task; the second condition is that the interruption duration of the interrupted ordinary task exceeds the set duration, and the processing corresponding to the second condition is to instruct the second CPU in the idle state to exit the idle state and continue executing the interrupted ordinary task.

[0186] For the specific implementation of step S1005, reference can be made to the aforementioned step S611, which will not be elaborated here.

[0187] After the kernel scheduler instructs the first CPU to continue executing the interrupted ordinary task, the first CPU can continue to execute the interrupted ordinary task according to the instruction of the kernel scheduler. After the kernel scheduler instructs the second CPU in the idle state to exit the idle state and continue executing the interrupted ordinary task, the second CPU can exit the idle state and continue executing the interrupted ordinary task according to the instruction of the kernel scheduler. Therefore, after step S1005, the following step S1006 or step S1007 can be included.

[0188] S1006: When the first CPU receives the instruction of the kernel scheduler, it continues to execute the interrupted ordinary task.

[0189] S1007: When the second CPU receives the instruction of the kernel scheduler, it exits the idle state and continues to execute the interrupted ordinary task.

[0190] As an alternative embodiment, the "first condition being that the first CPU is in a working state and the task being executed" described in step S1005 may also be replaced with "the first condition being that the first CPU has no task being executed currently" or "the first condition being that the first CPU has completed the real-time task".

[0191] Embodiment Four

[0192] In a possible solution provided by the embodiments of the present application, after the kernel scheduler assigns a low-priority task to a CPU for execution, during the execution of the low-priority task by the CPU, when the kernel scheduler receives a high-priority task, the high-priority task can preempt the CPU that is executing the low-priority task, that is, the kernel scheduler can assign the high-priority task to the CPU that is executing the low-priority task for priority execution. The CPU can interrupt the low-priority task being executed and start executing the assigned high-priority task. Within a set duration after the CPU interrupts the execution of the low-priority task, when the CPU is in a working state and has no task being executed (for example, the CPU has completed the execution of the high-priority task), the CPU can resume the execution of the interrupted low-priority task. Within a set duration after the CPU interrupts the execution of the low-priority task, if the CPU is always in a state of having a task to execute, then when the interruption duration of the interrupted low-priority task exceeds the set duration, the kernel scheduler can assign the interrupted low-priority task to another CPU (such as a CPU in an idle state) for execution. Optionally, in the above scenario of the embodiments of the present application, the electronic device may be in a light-load state. In the light-load state, at least one of the multiple CPUs of the electronic device may be in a working state and at least one CPU may be in an idle state.

[0193] In one example, the low-priority task may include a normal task, and the high-priority task may include a real-time task and a focus task.

[0194] Referring to Figure 11 , the multiple CPUs of the electronic device at least include a first CPU and a second CPU. Taking the scenario where the task processing method is executed by the kernel scheduler, the task types include three types of tasks: real-time tasks, focus tasks, and normal tasks, and the priority of the real-time task is higher than that of the focus task, and the priority of the focus task is higher than that of the normal task as an example, a task processing method provided by the embodiments of the present application may include:

[0195] S1101: During the execution of the normal task assigned by the kernel scheduler by the first CPU, when the kernel scheduler receives a real-time task, the kernel scheduler instructs the first CPU to interrupt the execution of the normal task and execute the real-time task.

[0196] Among them, for the process in which the kernel scheduler assigns a normal task to the first CPU for execution, it can be implemented with reference to the methods related to steps S506 - S507 described above, or it can be implemented with reference to the methods described in steps S601 - S602 above, which will not be elaborated in this embodiment.

[0197] S1102: The first CPU interrupts the execution of the normal task and, at the same time, executes a real - time task.

[0198] Optionally, after the first CPU interrupts the execution of the normal task, the interrupted normal task can return to the global task queue. For example, after the first CPU interrupts the execution of the normal task, the first CPU can add the interrupted normal task to the global task queue. Or, the kernel scheduler can recall the interrupted normal task to the global task queue. Optionally, in a light - load scenario, after the interrupted normal task returns to the global task queue, the global task queue may only include this one interrupted normal task.

[0199] S1103: When the duration of the interruption of the interrupted normal task reaches the set duration, the kernel scheduler determines whether the first CPU has no task being executed; if so, step S1104 is executed, otherwise, step S1105 is executed.

[0200] Optionally, the kernel scheduler can set a timer (or timer) with a timing duration of the set duration after the interrupted normal task returns to the global task queue. When the timer expires, the kernel scheduler can determine that the duration of the interruption of the interrupted normal task reaches the set duration, and then execute step S1103.

[0201] S1104: The kernel scheduler assigns the interrupted normal task to the first CPU to continue execution.

[0202] Optionally, based on the above method, after the interrupted normal task returns to the global task queue, the kernel scheduler can assign the interrupted normal task in the global task queue to the first CPU to continue execution when the duration of the interruption of the interrupted normal task reaches the set duration and the first CPU has no task to execute. This method can reduce the total power consumption of the CPU.

[0203] In step S1104, the kernel scheduler can instruct the first CPU to continue executing the interrupted normal task, and the first CPU can continue to execute the interrupted normal task according to the instruction of the kernel scheduler.

[0204] S1105: The kernel scheduler assigns the interrupted normal task to the second CPU for execution.

[0205] Optionally, based on the above method, after the interrupted normal task returns to the global task queue, the kernel scheduler may, when the interruption duration of the interrupted normal task reaches a set duration and there is a task to be executed on the first CPU, allocate the interrupted normal task in the global task queue to the second CPU for continued execution. This method can avoid too long interruption duration of normal tasks.

[0206] In step S1105, the kernel scheduler may instruct the second CPU to continue executing the interrupted normal task, and the second CPU may continue to execute the interrupted normal task according to the instruction of the kernel scheduler. Among them, when the second CPU receives the instruction of the kernel scheduler and is in the idle state, the second CPU may exit the idle state and then execute the interrupted normal task.

[0207] As an alternative implementation, the real-time task described in steps S1101 - S1102 may also be replaced with a focus task.

[0208] Embodiment Five

[0209] In a possible solution provided by the embodiments of the present application, after the kernel scheduler allocates a low-priority task to a CPU for execution, during the execution of the low-priority task by the CPU, when the kernel scheduler receives a high-priority task, the high-priority task may preempt the CPU that is executing the low-priority task, that is, the kernel scheduler may allocate the high-priority task to the CPU that is executing the low-priority task for priority execution. The CPU may interrupt the currently executing low-priority task and start executing the allocated high-priority task.

[0210] In the above process, the kernel scheduler may estimate the execution duration of the high-priority task (i.e., the duration required to execute the high-priority task) when receiving the high-priority task. For ease of description, hereinafter, the estimated execution duration of the high-priority task will be simply referred to as the estimated execution duration. If the estimated execution duration is less than or equal to the set duration, the kernel scheduler may, when there is no task to be executed on the above CPU (for example, after executing the high-priority task), re-allocate the interrupted normal task to the CPU for execution. If the estimated execution duration is greater than the set duration, the kernel scheduler may allocate the interrupted normal task to other CPUs (for example, a CPU in the idle state) for execution. Optionally, in the above scenario of the embodiments of the present application, the electronic device may be in a light load state. In the light load state, at least one of the multiple CPUs of the electronic device is in the working state and at least one CPU is in the idle state.

[0211] In one example, the low-priority task may include a normal task, and the high-priority task may include a real-time task and a focus task.

[0212] Refer to Figure 12, multiple CPUs of an electronic device at least include a first CPU and a second CPU. Taking the scenario where a task processing method is executed by a kernel scheduler, and the task types include three types of tasks: real-time tasks, focus tasks, and ordinary tasks, and the priority of real-time tasks is higher than that of focus tasks, and the priority of focus tasks is higher than that of ordinary tasks as an example, a task processing method provided by an embodiment of the present application may include:

[0213] S1201: During the process of the first CPU executing an ordinary task assigned by the kernel scheduler, when the kernel scheduler receives a real-time task, the kernel scheduler instructs the first CPU to interrupt the execution of the ordinary task and execute the real-time task, and obtain an estimated execution duration, where the estimated execution duration is used to indicate the estimated execution duration of the real-time task.

[0214] Among them, regarding the process of the kernel scheduler allocating an ordinary task to the first CPU for execution, it can be implemented with reference to the methods related to steps S506 - S507 described above, or it can be implemented with reference to the methods described in steps S601 - S602 above, which will not be elaborated in this embodiment.

[0215] As an alternative implementation, the estimated execution duration may be carried by the real-time task. For example, the real-time task may include a parameter for indicating the estimated execution duration. When the kernel scheduler receives the real-time task, it can determine the estimated execution duration according to this parameter. As another alternative implementation, the kernel scheduler can estimate the duration required to execute the real-time task based on the relevant information of the real-time task, and then obtain the estimated execution duration. Exemplarily, the relevant information of the real-time task may include the computing power of the first processor for executing the real-time task, the task type of the real-time task, etc. Of course, it may also include information in other aspects, which is not limited in the embodiments of the present application. As yet another alternative implementation, the estimated execution duration may be the T described in the part introducing the set duration below avg .

[0216] S1202: The first CPU interrupts the execution of the ordinary task and executes the real-time task.

[0217] S1203: The kernel scheduler determines whether the estimated execution duration is less than or equal to the set duration; if so, execute step S1204, otherwise, execute step S1205.

[0218] S1204: When the first CPU has no task to execute, the kernel scheduler allocates the interrupted ordinary task to the first CPU to continue execution.

[0219] Optionally, if the estimated execution duration is less than or equal to the set duration, and after the first CPU interrupts the execution of a normal task, the interrupted normal task can return to the global task queue. For example, if the estimated execution duration is less than or equal to the set duration, and after the first CPU interrupts the execution of a normal task, the kernel scheduler can transfer the interrupted normal task back to the global task queue. Optionally, in a light load scenario, after the interrupted normal task returns to the global task queue, the global task queue may only include this one interrupted normal task.

[0220] Optionally, after the interrupted normal task returns to the global task queue, when the first CPU has no task to execute, the kernel scheduler can assign the interrupted normal task in the global task queue to the first CPU for continued execution. This method can reduce the total CPU power consumption.

[0221] S1205: The kernel scheduler assigns the interrupted normal task to the second CPU for execution.

[0222] Regarding step S1205, it can be implemented with reference to the aforementioned step S1105, and will not be elaborated in this embodiment.

[0223] It should be noted that the execution order of the above step S1203 and step S1202 can be arbitrary and is not limited in this embodiment. The execution order of step S1204 and step S1205 is later than step S1202.

[0224] As an alternative implementation, the real-time task described in steps S1101 - S1102 can also be replaced with a focus task.

[0225] In another possible solution provided by the embodiments of the present application, step S1204 in the above steps S1201 - S1205 can also be replaced with the steps S1103 - S1105 described in the fourth embodiment above, and the solution as shown in Figure 13 can be obtained. Among them, Figure 13 The steps S1301 - S1302 shown in can be referred to the aforementioned steps S1201 - S1202, Figure 13 In step S1303 of, the kernel scheduler determines whether the estimated execution duration is less than or equal to the set duration; if so, step S1304 is executed, otherwise, step S1306 is executed. Regarding the method for the kernel scheduler to obtain the estimated execution duration, it can be referred to the description in the aforementioned step S1201. Figure 13 The steps S1304 - S1306 shown in can be referred to the aforementioned steps S1103 - S1105 and will not be elaborated here.

[0226] Next, the set duration described in the above embodiments will be introduced.

[0227] In some embodiments of the present application, the set duration described in the above embodiments may be: the duration used as the upper limit value of the duration (or waiting duration) for the interrupted normal task to interrupt execution. The set duration may be any one of the following:

[0228] 1) A preset fixed duration. This duration may be a duration preset by the electronic device, or may be a duration preset by the user in the electronic device.

[0229] 2) The duration determined by the kernel scheduler according to the service data migration duration of the interrupted normal task, the duration for the idle CPU to exit the idle state, and the average running duration of the real-time tasks within at least one historical time period.

[0230] Among them, the service data migration duration is used as the duration for migrating the service data of the interrupted normal task generated by the first CPU to the CPU (such as the second CPU) used to continue executing the interrupted normal task. This duration may be a set duration. Alternatively, this duration may be a statistical value obtained through big data sampling. For example, in a scenario where a certain task migrates between different CPUs, the kernel scheduler may record the duration required for the service data of this task to migrate between different CPUs, and use this duration as a service data migration duration statistical value. Based on this method, the kernel scheduler can sample at least one service data migration duration statistical value. Optionally, the kernel scheduler may use the average value of at least one service data migration duration statistical value obtained within a preset historical time period (such as a historical time period of the set duration with the current moment as the end moment) as the service data migration duration, or may use the average value of the latest set number of service data migration duration statistical values obtained by sampling as the service data migration duration.

[0231] In some embodiments of the present application, different types of task migrations may correspond to different business data migration durations. The kernel scheduler may determine the type of task migration (i.e., the task interrupted on the first CPU is migrated to the second CPU for execution) between the first CPU and the second CPU according to the types of the first CPU and the second CPU, and then determine the corresponding business data migration duration. Among them, the business data migration duration corresponding to any type of task migration may be determined according to at least one statistical value of the business data migration duration sampled during the task migration process of this type. Any type of task migration may be: migrating from one type of CPU to another CPU of the same type, or migrating from one type of CPU to another CPU of a different type. Among them, the types of CPUs may include: small-core CPUs, medium-core CPUs, and large-core CPUs. Exemplarily, migrating from one type of CPU to another CPU of the same type may be migrating from a medium-core CPU to a medium-core CPU, migrating from a small-core CPU to a small-core CPU, etc.; migrating from one type of CPU to another CPU of a different type may be migrating from a small-core CPU to a medium-core CPU, migrating from a small-core CPU to a large-core CPU, etc., which will not be listed one by one in the embodiments of the present application. Among them, the cores of the CPU may be simply referred to as cores. Cores can be divided into different types according to the highest processing capacity (or the highest computing capacity), for example, they can be divided into large cores, medium cores, small cores, etc. The large core has the strongest processing capacity, the small core has the weakest processing capacity, and the medium core's processing capacity is between the large core and the small core. A CPU with a small core belongs to a small-core CPU, a CPU with a medium core belongs to a medium-core CPU, and a CPU with a large core belongs to a large-core CPU. Among them, small-core CPUs are usually used to process lightweight and low-power tasks. Large-core CPUs are usually used to process complex tasks or compute-intensive tasks.

[0232] The idle CPU may be a CPU (such as the second CPU mentioned above) used to continue executing the interrupted ordinary task. The duration for the idle CPU to exit the idle state is related to the hardware process of the CPU, and this duration may be a preset value. Optionally, the idle state of the CPU can be divided into multiple levels. The longer the CPU is idle, the higher the level of its idle state, and the lower the corresponding power consumption. The durations for different levels of idle states to exit the idle state may be different.

[0233] The average running duration of real-time tasks within at least one historical time period is used as the execution duration of the real-time tasks. Each historical time period can be a set time period before the current time. For example, it can be the time period corresponding to a certain clock cycle before the current time, etc. As an alternative implementation, the average running duration of real-time tasks within at least one historical time period can be the quotient of the total running duration of real-time tasks within at least one historical time period and the number of at least one time period. For example, at least one time period can include the time periods corresponding to the past 3 clock cycles. The running durations of the real-time tasks within the time periods corresponding to each clock cycle are T1, T2, and T3 respectively. Then the average running duration of the real-time tasks within at least one historical time period is (T1 + T2 + T3) / 3. As another alternative implementation, the average running duration of real-time tasks within at least one historical time period can be the quotient of the total running duration of real-time tasks within at least one historical time period and the total number of real-time tasks.

[0234] In this method, the set duration can satisfy: t = T cache +T idle +T avg . Wherein, t represents the set duration, T cache represents the business data migration duration, T idle represents the duration for the idle CPU to exit the idle state, T avg represents the average running duration of real-time tasks within at least one historical time period.

[0235] In some embodiments of the present application, the real-time tasks described in the above process can also be replaced by focus tasks. Alternatively, the real-time tasks described in the above process can be replaced by high-priority tasks, and the ordinary tasks described in the above process can be replaced by low-priority tasks.

[0236] In the above method, after the CPU executing the ordinary task is preempted by the high-priority task, the ordinary task does not immediately switch to other idle CPUs to run. Instead, it can continue to run on the original CPU after waiting for a period of time, or it can switch to other idle CPUs after waiting for a longer time. Therefore, the impact on the states of other idle CPUs can be minimized, thereby reducing the total CPU power consumption.

[0237] The above takes the scenario where the electronic device includes at least a first CPU and a second CPU as an example to elaborate on the solution provided by the embodiments of the present application in detail. The solutions in the scenario where the electronic device includes more CPUs can be implemented with reference to the above solutions, and will not be elaborated one by one in the embodiments of the present application.

[0238] It should be noted that the kernel scheduler described in the above embodiments is only used for exemplary illustration of the scheduling module, and does not limit the execution subject of the method provided in the above embodiments. For example, the kernel scheduler described in the above embodiments can also be replaced by other functional modules or devices that can be used as the scheduling module, or the kernel scheduler described in the above embodiments can also be replaced by an electronic device.

[0239] It should be understood that the implementation processes provided in the above embodiments are only examples of the applicable method processes of the embodiments of the present application. Among them, the execution order of each step can be adjusted accordingly according to actual needs, other steps can be added, or some steps can be reduced. The execution order between steps without temporal correlation can be arbitrary.

[0240] Based on the above embodiments and the same technical concept, the embodiments of the present application also provide a task processing method, as Figure 14 described in, this method may include:

[0241] S1401: The electronic device responds to the received first task and executes the first task through the first processor.

[0242] In some embodiments of the present application, the first task belongs to a non-real-time task and a non-focus task, and the second task belongs to a real-time task or a focus task; wherein, a real-time task is a task that requires a response within a time period less than or equal to the fourth set duration after reception, and a focus task is an interactive type task. For example, the first task can be an ordinary task, and the second task can be a real-time task or a focus task. Regarding ordinary tasks, real-time tasks, and focus tasks, reference can be made to Figure 4 the explanations in the corresponding content, which will not be elaborated here.

[0243] Optionally, this task processing method can be specifically executed by the scheduling module in the electronic device. Regarding the scheduling module, reference can be made to Figure 4 the explanations in the corresponding content, which will not be elaborated here.

[0244] S1402: The electronic device responds to the received second task, interrupts the execution of the first task through the first processor and executes the second task; wherein, the priority of the second task is higher than the priority of the first task, and the priority of any task is used to indicate the order of execution of any task.

[0245] Optionally, the first processor may include a CPU.

[0246] In one example, the first task may be the general task described in Embodiment 4, and the second task may be the real-time task described in Embodiment 4. The first processor may be the first CPU described in Embodiment 4. In another example, the first task may be the general task described in Embodiment 5, and the second task may be the real-time task described in Embodiment 5. The first processor may be the first CPU described in Embodiment 5.

[0247] S1403: When the duration of the interruption of the execution of the first task exceeds the first set duration and the first processor is in the state of executing a task, the electronic device continues to execute the first task through the second processor; wherein, the first set duration is the duration set as the upper limit of the task waiting duration.

[0248] In one example, the first set duration may be the set duration described in the foregoing embodiments. Regarding the method for determining the first set duration, it may be implemented with reference to the method for determining the set duration described in the part introducing the set duration in the foregoing embodiments, and will not be elaborated here.

[0249] In the first possible solution, after step S1402, the following method may further be included: When the estimated execution duration of the second task exceeds the first set duration, the first task is continued to be executed through the second processor; wherein, the estimated execution duration is the duration estimated for executing the second task. In one example, the first processor may be the first CPU described in Embodiment 5 of the foregoing embodiments, and the second processor may be the second CPU described in Embodiment 5 of the foregoing embodiments.

[0250] Wherein, regarding the method for obtaining the estimated execution duration, it may be implemented with reference to the method described in step S1201, and will not be elaborated here.

[0251] In the second possible solution, the electronic device further includes a task queue. After step S1402, the following method may further be included: When the estimated execution duration is less than or equal to the first set duration, the first task is added to the task queue; when the first processor has no task being executed and the first task is in the interrupted execution state, the first task is continued to be executed through the first processor.

[0252] Wherein, regarding the task queue, reference may be made to Figure 4 the explanation in the corresponding content, and will not be elaborated here. In one example, the task queue may be the global task queue described in Embodiment 5 of the foregoing embodiments.

[0253] Optionally, after adding the first task to the task queue as described above, the following method may further be included: When the first processor has a task being executed and the duration of the interruption of the execution of the first task exceeds the first set duration, the first task is continued to be executed through the second processor.

[0254] In some embodiments of the present application, the electronic device may further include a second processor in an idle state; the above-mentioned continuing to execute the first task by the second processor may specifically include: after the second processor exits the idle state, continuing to execute the first task. In one example, the first processor may be the first CPU described in the fifth embodiment above, and the second processor may be the second CPU described in the fifth embodiment above.

[0255] In a third possible solution, after step S1402, the following method may further be included: when the first processor has no task being executed and the first task is in an interrupted execution state, the first task is continued to be executed by the first processor. Among them, when the first processor continues to execute the first task, the state of the first task being in an interrupted execution state ends, that is to say, when the first processor continues to execute the first task, the state of the first task changes from the interrupted execution state to the being-executed state.

[0256] In one example, the first processor may be the first CPU described in the fourth embodiment above, and the second processor may be the second CPU described in the fourth embodiment above.

[0257] The method for obtaining the first set duration will be described below.

[0258] In one possible solution, the first set duration may be a fixed duration preset by the electronic device, or may be a fixed duration pre-configured by the user in the electronic device.

[0259] In another possible solution, the electronic device may obtain a first duration, a second duration, and a third duration, and determine the first set duration according to the first duration, the second duration, and the third duration. Among them, the first duration is used to indicate the duration for migrating the service data of the first task stored in the buffer memory of the first processor to the buffer memory of the second processor, the second duration is used to indicate the duration for the second processor to exit the idle state, and the third duration is used to indicate the execution duration of the second task. Optionally, the first set duration may be the sum of the first duration, the second duration, and the third duration.

[0260] In one example, the first duration may be the T described in the part of the above embodiment that introduces the set duration cache , the second duration may be the T described in the part of the above embodiment that introduces the set duration idle , the first duration may be the T described in the part of the above embodiment that introduces the set duration avg . The method for obtaining the first duration may also refer to T idleThe acquisition method can be implemented accordingly. The acquisition method for the second duration can also be implemented by referring to the acquisition method. The acquisition method for the third duration can also be implemented by referring to T avg The acquisition method can be implemented accordingly.

[0261] In some embodiments of the present application, the first duration can be the average of the business data migration durations of at least one reference task that has finished execution; wherein, any reference task is a task that is interrupted on the third processor of the electronic device and then migrated to the fourth processor of the electronic device for execution; the business data migration duration of any reference task is the duration for migrating the business data of any reference task stored in the buffer memory of the third processor to the buffer memory of the fourth processor. Among them, at least one reference task can be a task that has finished execution within a set time period; and / or, the number of at least one reference task is a set number. Optionally, the set time period can be: a time period of a second set duration with the current moment as the end moment, that is, the historical time period of the second set duration closest to the current moment. The second set duration can be the duration of the set time period for collecting the business data migration durations of at least one reference task.

[0262] As an alternative implementation, the third processor is the first processor, and the fourth processor is the second processor. As another alternative implementation, the type of the third processor is the same as the type of the first processor, and the type of the fourth processor is the same as the type of the second processor; wherein, the type of any processor is one of a small-core processor, a medium-core processor, and a large-core processor.

[0263] In some embodiments of the present application, the third duration can be: the quotient of the total execution duration of at least one target priority task within at least one historical time period and the number of at least one historical time period; or, the quotient of the total execution duration of at least one target priority task within at least one historical time period and the number of at least one target priority task; wherein, the duration of each historical time period in at least one historical time period is a third set duration, and the priority of at least one target priority task is the priority of the second task.

[0264] In the above method, the specific steps executed by the electronic device can refer to the relevant introductions in the foregoing embodiments, and will not be elaborated herein.

[0265] Based on the above embodiments and the same technical concept, the embodiments of the present application also provide an electronic device, which is used to implement the task processing method applied to the electronic device provided by the embodiments of the present application. As Figure 15As shown in the figure, the electronic device 1500 may include: a memory 1501, multiple processors 1502, and one or more computer programs (not shown in the figure). Each of the above components may be coupled via one or more communication buses 1503. Optionally, the electronic device 1500 may further include a display screen 1504.

[0266] Among them, one or more computer programs (codes) are stored in the memory 1501, and the one or more computer programs include computer instructions; the one or more processors 1502 call the computer instructions stored in the memory 1501, so that the electronic device 1500 executes the task processing method for the electronic device provided in the above embodiments of the present application.

[0267] In a specific implementation, the memory 1501 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more disk storage devices, flash memory devices, or other non-volatile solid-state storage devices. The memory 1501 may store an operating system (hereinafter referred to as the system), such as ANDROID, IOS, WINDOWS, or an embedded operating system such as LINUX. The memory 1501 may be used to store the implementation program of the embodiments of the present application. The memory 1501 may also store a network communication program, which may be used to communicate with one or more additional devices, one or more user devices, and one or more network devices.

[0268] One or more processors 1502 may be a general-purpose CPU, a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits for controlling the execution of the program of the present application solution.

[0269] The display screen 1504 is used to display relevant user interfaces such as application interfaces.

[0270] It should be noted that Figure 15 This is only one implementation manner of the electronic device 1500 provided in the embodiments of the present application. In actual applications, the electronic device 1500 may further include more or fewer components. Specifically, reference may be made to Figure 2 the specific structure and description shown, and there is no limitation here.

[0271] Based on the above embodiments and the same technical concept, the embodiments of the present application also provide a computer-readable storage medium, which stores a computer program. When the computer program runs on a computer, the computer executes the method for the electronic device provided in the above embodiments.

[0272] Based on the above embodiments and the same inventive concept, an embodiment of the present application further provides a computer program product, which includes a computer program or instructions. When the computer program or instructions run on a computer, the computer is caused to execute the method applied to an electronic device provided in the above embodiments.

[0273] In the method provided by the embodiments of the present application, it can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions according to the embodiments of the present invention are generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a network device, a user device, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from a website, a computer, a server, or a data center to another website, computer, server, or data center by wire (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wirelessly (such as infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by the computer or a data storage device such as a server or a data center that includes one or more integrated available media. The available medium can be a magnetic medium (such as a floppy disk, a hard disk, a magnetic tape), an optical medium (such as a digital video disc (DVD)), or a semiconductor medium (such as an SSD), etc.

[0274] Obviously, those skilled in the art can make various modifications and variations to the present application without departing from the scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalent technologies, the present application is also intended to include these modifications and variations.

Claims

1. A task processing method, applied to an electronic device, characterized in that: The electronic device comprises a first processor and a second processor; the method comprises: In response to receiving the first task, executing the first task by the first processor; In response to the received second task, executing the first task and executing the second task through the first processor interrupt; wherein the priority of the second task is higher than the priority of the first task, and the priority of any task is used to indicate the execution order of any task; When the duration of the first task interruption execution exceeds a first set duration and the first processor is in a state of executing a task, the first task is continued to be executed by the second processor; wherein the first set duration is a duration set as an upper limit of the task waiting duration.

2. The method according to claim 1, characterized in that The method further comprises: When the estimated execution time of the second task exceeds the first set time, the first task continues to be executed by the second processor; wherein the estimated execution time is the estimated time required to execute the second task.

3. The method according to claim 2, characterized in that The electronic device further includes a task queue, and the method further includes: When the estimated execution time is less than or equal to the first set time, adding the first task to the task queue; When the first processor has no task being executed and the first task is in an interrupted execution state, the first task continues to be executed by the first processor.

4. The method according to claim 3, characterized in that After adding the first task to the task queue, the method further includes: When the first processor is executing a task and the duration of the interruption of the execution of the first task exceeds a first set duration, the first task is continued to be executed by the second processor.

5. The method according to any one of claims 1 to 4, characterized in that: The electronic device further comprises the second processor being in an idle state; Continuing to execute the first task by using the second processor includes: continuing to execute the first task after the second processor exits an idle state.

6. The method according to any one of claims 1 to 4, characterized in that: The method further comprises: When the first processor has no task being executed and the first task is in an interrupted execution state, the first task continues to be executed by the first processor.

7. The method according to any one of claims 1 to 6, characterized in that: The first task is a non-real-time task and a non-focus task, and the second task is a real-time task or a focus task; wherein the real-time task is a task that requires a response within a time period less than or equal to a fourth set time period after receipt, and the focus task is an interactive type task.

8. The method according to any one of claims 1 to 7, characterized in that: The method further comprises: Acquire a first duration, a second duration, and a third duration; wherein the first duration is used to indicate the duration for which the business data of the first task stored in the buffer memory of the first processor is migrated to the buffer memory of the second processor, the second duration is used to indicate the duration for which the second processor exits the idle state, and the third duration is used to indicate the execution duration of the second task; The first set duration is determined according to the first duration, the second duration and the third duration.

9. The method according to claim 8, characterized in that The first duration is the average duration of business data migration of at least one reference task that has been completed; wherein, any reference task is a task that is interrupted on the third processor of the electronic device and then migrated to the fourth processor of the electronic device for execution; the business data migration duration of any reference task is the duration for the business data of any reference task stored in the buffer memory of the third processor to migrate to the buffer memory of the fourth processor.

10. The method according to claim 9, characterized in that The at least one reference task is a task that is completed within a set time period; and / or the number of the at least one reference task is a set number.

11. The method according to claim 9 or 10, characterized in that The third processor is the first processor, and the fourth processor is the second processor.

12. The method according to any one of claims 8 to 11, characterized in that: The third duration is: the quotient of the total execution time of at least one target priority task in at least one historical time period and the number of the at least one historical time period; or the quotient of the total execution time of at least one target priority task in at least one historical time period and the number of the at least one target priority task; The duration of each historical time period in the at least one historical time period is a third set duration, and the priority of the at least one target priority task is the priority of the second task.

13. An electronic device, characterized in that: The electronic device includes a memory and one or more processors; The memory is used to store computer program codes, and the computer program codes include computer instructions; when the computer instructions are executed by the one or more processors, the electronic device executes the method according to any one of claims 1 to 12.

14. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed on an electronic device, the electronic device executes the method according to any one of claims 1 to 12.

15. A computer program product, characterized in that The computer program product comprises a computer program or instructions. When the computer program or instructions are executed on an electronic device, the electronic device executes the method according to any one of claims 1 to 12.

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