Memory system and operating method thereof, readable storage medium and system

Abstract

The embodiment of the invention provides a memory system, an operation method thereof, a readable storage medium and a system. A memory system includes: a memory device including a first memory area and a second memory area; the first storage area is different from the second storage area; the memory controller is coupled with the memory device and is configured to run the second firmware stored in the second storage area when running of the first firmware stored in the first storage area fails; the first firmware is the firmware to be operated by the memory system after the firmware is upgraded, and the second firmware is the firmware normally operated by the memory system before the firmware is upgraded; and replacing the first firmware stored in the first storage area with the second firmware.

Description

Technical Field

[0001] Embodiments of the present application relate to the field of semiconductor technology, and in particular to a memory system, an operation method thereof, a readable storage medium, and a system. Background Art

[0002] With the progress of technology and the rapid development of the Internet, the demand for the security of information data storage, retention, and transmission is particularly urgent, especially in the field of memory systems. During the operation of a memory system, if the firmware (FirmWare, FW) is damaged or a new failure occurs during firmware upgrade, the memory system will face the risk of data loss. Therefore, the firmware is crucial for the memory system, and ensuring the security of the firmware is a prerequisite for ensuring data security. Summary of the Invention

[0003] In view of this, embodiments of the present application provide a memory system, an operation method thereof, a readable storage medium, and a system.

[0004] In a first aspect, embodiments of the present application provide a memory system, which includes: a memory device, including a first storage area and a second storage area; the first storage area and the second storage area are different; a memory controller, coupled to the memory device and configured to: when running the first firmware stored in the first storage area fails, run the second firmware stored in the second storage area; the first firmware is the firmware that the memory system will run after firmware upgrade, and the second firmware is the firmware that the memory system runs normally before firmware upgrade; and replace the first firmware stored in the first storage area with the second firmware.

[0005] In some embodiments, the memory controller is configured to: when running the first firmware stored in the first storage area fails, send an asynchronous event; the asynchronous event includes at least the reason for the failure to run the first firmware after restart.

[0006] In some embodiments, the memory controller is configured to: when running the first firmware stored in the first storage area is successful, replace the second firmware stored in the second storage area with the first firmware.

[0007] In some embodiments, the memory controller is configured to: after the memory system restarts, obtain the firmware operation status of the memory system; when the firmware operation status is in a first state, update the firmware operation status from the first state to a second state, and run the first firmware in the first storage area; when the first firmware runs successfully, update the firmware operation status from the second state to the first state, and update the second firmware stored in the second storage area to the first firmware.

[0008] In some embodiments, the memory controller is configured to: when the first firmware fails to run, maintain the firmware running state in a second state; after the memory system is restarted again, re-obtain the firmware running state of the memory system, and when the firmware running state is in the second state, run the second firmware in the second storage area; when the second firmware in the first storage area runs successfully, update the firmware running state from the second state to the first state, and update the first firmware stored in the second storage area to the second firmware.

[0009] In some embodiments, the memory device includes a plurality of memory blocks, and the second storage area is located in the memory blocks for storing code data.

[0010] In some embodiments, the memory controller is configured to: before running the first firmware, change the second firmware stored in the first storage area to the first firmware; when the update of the first storage area to the first firmware fails, send an error message; the error message indicates the error state of the failure to activate the first firmware.

[0011] In some embodiments, before the first storage area is successfully updated to the first firmware, the second firmware is stored in the first storage area; the memory controller is configured to: update the second firmware in the first storage area to the first firmware through the Peripheral Component Interconnect Express (PCIe).

[0012] In a second aspect, an embodiment of the present application provides an operation method for a memory system, and the method includes: when the first firmware stored in the first storage area of the memory device of the memory system fails to run, run the second firmware stored in the second storage area of the memory device; the first firmware is the firmware that the memory system is going to run before firmware upgrade, and the second firmware is the firmware that the memory system runs normally before firmware upgrade; the first storage area and the second storage area are different; and replace the first firmware stored in the first storage area with the second firmware.

[0013] In some embodiments, the method further includes: when the first firmware stored in the first storage area fails to run, send an asynchronous event; the asynchronous event includes at least the reason for the failure to run the first firmware after restart.

[0014] In some embodiments, the method further includes: when the first firmware stored in the first storage area runs successfully, replace the second firmware stored in the second storage area with the first firmware.

[0015] In some embodiments, the method further includes: after the memory system restarts, obtaining the firmware running state of the memory system; when the firmware running state is in the first state, updating the firmware running state from the first state to the second state, and running the first firmware in the first storage area; when the first firmware runs successfully, updating the firmware running state from the second state to the first state, and updating the second firmware stored in the second storage area to the first firmware.

[0016] In some embodiments, the method further includes: when the first firmware runs fails, keeping the firmware running state in the second state; after the memory system restarts again, re-obtaining the firmware running state of the memory system, and when the firmware running state is in the second state, running the second firmware in the second storage area; when the second firmware in the first storage area runs successfully, updating the firmware running state from the second state to the first state, and updating the first firmware stored in the second storage area to the second firmware.

[0017] In some embodiments, the memory device includes a plurality of storage blocks, and the second storage area is located in the storage blocks for storing code data in the storage blocks.

[0018] In some embodiments, the method further includes: before running the first firmware, changing the second firmware stored in the first storage area to the first firmware; when the update of the first storage area to the first firmware fails, sending an error message; the error message indicates the error state of the failure of the first firmware activation.

[0019] In some embodiments, before the first storage area is successfully updated to the first firmware, the second firmware is stored in the first storage area; the method further includes: updating the second firmware in the first storage area to the first firmware through PCIe.

[0020] In a third aspect, an embodiment of the present application provides a readable storage medium, which stores a computer program, and when the computer program is executed, it implements the operation method of the memory system according to any one of the embodiments in the second aspect.

[0021] Fourthly, an embodiment of the present application provides a system, which includes: a host and a memory system coupled to the host; wherein, the host is configured to: send a firmware upgrade command to the memory system; the memory system is configured to: in response to the firmware upgrade command, when the first firmware stored in the first storage area where the memory system runs fails, run the second firmware stored in the second storage area of the memory system; the first firmware is the firmware that the memory system will run after the firmware upgrade, and the second firmware is the firmware that the memory system runs normally before the firmware upgrade; and replace the first firmware stored in the first storage area with the second firmware; when the first firmware stored in the first storage area fails to run, send an asynchronous event to the host; the asynchronous event at least includes the reason for the failure to run the first firmware after restart; when the first firmware stored in the first storage area runs successfully, replace the second firmware stored in the second storage area with the first firmware.

[0022] In some embodiments, the host is configured to: before the memory system runs the first firmware, download the first firmware from a server and send the downloaded first firmware to the memory system; the memory system is configured to: activate the first firmware, and when the activation of the first firmware is successful, update the first storage area to the first firmware; when the activation of the first firmware fails, send an error message to the host; the error message indicates the error status of the failure to activate the first firmware.

[0023] In each embodiment of the present application, by storing the firmware that the memory system runs normally before the firmware upgrade in the second storage area, it is ensured that a complete firmware can run. Specifically: if the newly upgraded firmware in the first storage area fails to run, run the firmware that runs normally stored in the second storage area, that is, the firmware that ran well last time, to ensure that the memory system runs normally during the firmware upgrade process, and avoid the possibility that the terminal where the memory system is located becomes bricked due to the failure during the process of running the newly upgraded firmware, thus ensuring the security of user data. Description of the Drawings

[0024] Figure 1 It is a schematic flowchart of the firmware update of the memory system;

[0025] Figure 2 It is a schematic diagram of the structure and working mode of the firmware update of the memory system;

[0026] Figure 3 It is a schematic diagram of the structure and working mode of the SSD firmware update;

[0027] Figure 4A It is a schematic diagram of the structure and working mode of the firmware update of the memory system according to an exemplary embodiment of the present application;

[0028] Figure 4BSchematic diagram of the structure and working mode of SSD firmware update exemplary of an embodiment of the present application;

[0029] Figure 5 Schematic diagram of an exemplary system with a memory system according to an embodiment of the present application;

[0030] Figure 6A Schematic diagram of an exemplary memory card with a memory system according to an embodiment of the present application;

[0031] Figure 6B Schematic diagram of an exemplary solid - state drive with a memory system according to an embodiment of the present application;

[0032] Figure 7 Schematic diagram of an exemplary composition structure with a memory system provided by an embodiment of the present application. Detailed implementation manners

[0033] Next, in combination with the embodiments of the present application and the accompanying drawings, the technical solutions in the embodiments of the present application will be clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present application.

[0034] In the following description, a large number of specific details are given to provide a more thorough understanding of the present application. However, it is obvious to those skilled in the art that the present application can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present application, some well - known technical features are not described; that is, not all features of the actual embodiments are described here, and the well - known functions and structures are not described in detail.

[0035] In the drawings, for clarity, the dimensions of layers, regions, elements and their relative dimensions may be exaggerated. The same reference numerals denote the same elements throughout.

[0036] It should be understood that when an element or layer is referred to as being "on", "adjacent to", "connected to" or "coupled to" another element or layer, it can be directly on, adjacent to, connected or coupled to the other element or layer, or there may be intervening elements or layers. In contrast, when an element is referred to as being "directly on", "directly adjacent to", "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and / or portions, these elements, components, regions, layers and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or portion from another element, component, region, layer or portion. Thus, without departing from the teachings of the present application, the first element, component, region, layer or portion discussed below may be referred to as the second element, component, region, layer or portion. And when discussing the second element, component, region, layer or portion, it does not imply that there must be a first element, component, region, layer or portion in the present application.

[0037] The purpose of the terms used herein is only to describe specific embodiments and is not a limitation of the present application. As used herein, the singular forms "a", "an" and "the" are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms "comprising" and / or "including", when used in this specification, specify the presence of the stated features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups. As used herein, the term "and / or" includes any and all combinations of the related listed items.

[0038] To fully understand the present application, detailed steps and detailed structures will be presented in the following description to illustrate the technical solutions of the present application. The preferred embodiments of the present application are described in detail below. However, in addition to these detailed descriptions, the present application may have other embodiments.

[0039] In the field of memory systems, such as the field of SSD (Solid State Drives) storage, consumer-grade SSDs store users' private data, and enterprise-grade SSDs store users' privacy information. These data are very important for both individuals and enterprises. However, during the operation of the device, if the firmware is damaged or new failures occur during firmware upgrade, the SSD will face the risk of data loss. Therefore, the firmware is crucial for the SSD, and the premise of ensuring data security is to ensure the security of the firmware.

[0040] Reference Figure 1, the process of upgrading the memory system firmware includes the following steps: S101, obtaining the memory system firmware; S102, receiving the memory system firmware; S103, activating the memory system firmware; S104, restarting and running the memory system firmware.

[0041] Reference Figure 2 , what the memory system firmware upgrade involves mainly includes: the remote firmware server 202, the host 204, and the memory system 206. Among them, the memory system 206 includes: the memory device 210 and the memory controller 208 coupled to the memory device 210.

[0042] In some specific embodiments, the remote firmware server 202 is coupled to the terminal with the host 204. The terminal may optionally include the memory system 206. The user can control the host to implement various operations (such as firmware upgrade operations) by operating on the terminal, or the terminal can automatically trigger various operations (such as firmware upgrade operations).

[0043] In some embodiments, the firmware can be a program stored in the electrically erasable programmable read-only memory (EEPROM) or FLASH chip of the memory system 206 and can be upgraded by the host 204 through a specific refresh program. The firmware controls the read / write and transmission algorithms of the memory system 206 and reasonably allocates the storage of data. Since the memory system 206 usually stores relatively confidential information, it is crucial to ensure the security of the data information stored in the memory system 206. One of the main functions of firmware update is to repair the BUGs of the memory system 206 and improve the quality and security of the memory system 206.

[0044] In some embodiments, the host 204 can establish a connection with the firmware server 202 through, for example, the TCP / IP protocol, send a firmware update request, and obtain the firmware update version (such as the first firmware FWB) sent in response to the firmware update request. Further, inside the host 204, the obtained firmware update file (such as the first firmware FWB) can be transmitted to the (firmware download / firmware submission) memory system 206 through, for example, the peripheral component interconnect express (PCIe) bus, and the firmware update file is decrypted, authenticated, and firmware update is implemented based on the target update file in the memory system 206.

[0045] However, if the downloaded firmware (such as the first firmware FWB) is damaged, the activation process of the first firmware FWB is corrupted, or there are problems with the first firmware FWB itself, etc., then there will be a situation where the memory system freezes or has a blue screen when restarting to run the new firmware after the firmware upgrade. In severe cases, it will directly cause the host 204 to become bricked. For users, the process of firmware upgrade to running the new firmware will face the risk of data loss. Therefore, in this case, the importance of protecting the firmware, even the firmware upgrade and running the new firmware without causing the host 204 to become bricked, is self-evident. Hereinafter, the memory system 206 is taken as an SSD as an example for detailed description, but the memory system 206 being an SSD does not limit the embodiments of the present application.

[0046] Reference Figure 2 and Figure 3 , in some embodiments, the main process of SSD firmware upgrade includes the following steps: S301. The host obtains (or downloads) the new firmware of the SSD (taking the first firmware FWB as an example) from the remote firmware server; before the host downloads the first firmware FWB, the firmware stored in the first storage area Slot1 is the firmware (taking the second firmware FWA as an example) that the memory system 206 runs normally before the firmware upgrade; S302. The host sends (firmware download / firmware submission) the first firmware FWB to the SSD; S303. The host updates the SSD firmware. If the first firmware FWB is successfully activated, the successfully activated first firmware FWB is stored in the first storage area Slot1; if the activation of the first firmware FWB fails, execute step S305, and send an error message to the host; among them, after the first firmware FWB is successfully activated, the first firmware FWB stored in the first storage area Slot1 can be run; execute step S304. After the first firmware FWB is successfully activated, if the first firmware FWB restarts and runs successfully, the first firmware FWB still stored in the first storage area Slot1; if the first firmware FWB fails to restart and run, execute steps S306 and S307: execute step S306, the first firmware FWB fails to start normally; execute step S307, the host is abnormal or becomes bricked.

[0047] In some embodiments, 1. When the activation firmware specifying a certain storage area (for example, the first successfully activated firmware FWB stored in the first storage area Slot1) is started, if a failure occurs or the wrong firmware is injected into the storage area, it will be backed up from the corresponding storage area, that is, the firmware version remains unchanged; 2. When downloading the firmware and updating the activation firmware of a certain storage area (for example, the first successfully activated firmware FWB stored in the first storage area Slot1), if the firmware itself has an infinite loop or is damaged, it will brick the host, and at the same time, the backup will replace the corresponding damaged firmware, and the host will not receive an AER (Advanced Error Reporting) event indicating that the firmware upgrade to the new firmware is unsuccessful.

[0048] Whether the process of SSD firmware activation and operation is successful mainly depends on whether the firmware is not damaged and whether there are problems with the firmware itself. At the same time, there is no error handling mechanism for running the firmware after firmware activation. Once the firmware switch operation fails, users will face the risk of data loss or even bricking. After the firmware activation is successful and the switch to the new firmware fails to run, it will cause the computer to brick and requires contacting the manufacturer again or finding a professional for repair, which affects the use and increases the human and financial costs; the failure of the firmware switch operation to cause bricking makes users face the risk of data loss.

[0049] In view of this, the embodiments of the present application provide a memory system, its operation method, readable storage medium, and system.

[0050] Reference Figure 4A and Figure 4B In a first aspect, the embodiments of the present application provide a memory system 406, which includes: a memory device 410, including a first storage area Slot1 and a second storage area Slot0; the first storage area Slot1 and the second storage area Slot0 are different; a memory controller 408, coupled to the memory device 410 and configured to: when the operation of the first firmware FWB stored in the first storage area Slot1 fails, run the second firmware FWA stored in the second storage area Slot0; the first firmware FWB is the firmware that the memory system 406 will run after firmware upgrade, and the second firmware FWA is the firmware that the memory system 406 runs normally before firmware upgrade; and replace the first firmware FWB stored in the first storage area Slot1 with the second firmware FWA.

[0051] It should be noted that Figure 4A The difference between the memory system firmware update structure shown in Figure 3 and the memory system firmware update structure shown in Figure 4AThe memory device shown includes a second storage area Slot0 different from the first storage area Slot1, and the firmware in which the memory system operates normally before firmware upgrade in the second storage area Slot0. Figure 4B The working mode of the firmware update of the memory system shown is different from Figure 3 The working mode of the firmware update of the memory system shown is at least different in that: Figure 4B The working mode of the firmware update of the memory system shown includes that if a specified firmware upgrade fails, such as wrong error annotation, etc., it will start from the firmware stored in the corresponding second storage area Slot0. If the firmware itself is damaged, it will also start from the firmware stored in the hidden second storage area Slot0 when switching to run after successful firmware activation fails.

[0052] In some embodiments, the host 404 may be, for example, a personal computer, a mobile phone, a GPS terminal, and a digital satellite receiver, etc. In some embodiments, the memory controller 408 may manage the data stored in the memory device 410. In some embodiments, the memory controller 408 is designed to operate in a low duty cycle environment, such as a Secure Digital (SD) card, a Compact Flash (CF) card, a Universal Serial Bus (USB) flash drive, or other media used in electronic devices such as personal calculators, digital cameras, mobile phones, etc. In some embodiments, the memory device 410 may include a device with a FLASH chip (such as a three-dimensional NAND Flash memory). The FLASH chip may be used as the storage medium of the SSD of the memory system 406 described above to store data.

[0053] In the embodiments of the present application, when the first firmware stored in the first storage area Slot1 fails to run, the second firmware stored in the second storage area Slot0 is run and the first firmware FWB stored in the first storage area Slot1 is replaced with the second firmware FWA. Exemplarily, if the first firmware FWB fails to restart and run, steps S406 and S407 are executed: step S406 is executed, and the first firmware FWB fails to start normally; step S407 is executed, and during the process of restarting the host, it will start from the firmware in the second storage area Slot0, that is, after restarting the host, the second firmware FWA stored in the second storage area Slot0 of the SSD is loaded and run. Since the second firmware FWA is the firmware in which the memory system operates normally before firmware upgrade, the SSD can operate normally after restarting the host. After starting from the firmware in the second storage area Slot0 during the process of restarting the host, the second firmware FWA stored in the second storage area Slot0 is replaced with the first firmware FWB.

[0054] In each embodiment of the present application, by storing the firmware that was running normally in the memory system before the firmware upgrade in the second storage area, it is ensured that a complete firmware can run. Specifically: if the newly upgraded firmware in the first storage area fails to run, the firmware that is running normally stored in the second storage area is run, that is, the firmware that was running properly last time, ensuring that the memory system runs normally during the firmware upgrade process, avoiding the possibility that the host where the memory system is located becomes bricked due to the failure of running the newly upgraded firmware, and ensuring the security of user data.

[0055] In some embodiments, the memory device includes a plurality of storage blocks, and the second storage area Slot0 is located in the storage block (code block) for storing code data in the storage blocks.

[0056] Exemplarily, an area is found in the storage block for storing code data in the storage block to be used as the second storage area Slot0 that is invisible to the user. The function of this second storage area Slot0 is to back up the currently running firmware version. For example, the currently running firmware version can be the firmware that was running normally in the memory system before the firmware upgrade, or the firmware that the memory system will run after the firmware upgrade and runs successfully after running.

[0057] In some embodiments, multiple areas in the storage block for storing code data in the storage block can be used to store different versions of firmware. Exemplarily, there are a total of multiple storage areas in the storage block for storing code data in the storage block (the storage area SlotX generally refers to one of the multiple storage areas), and the firmware stored in the multiple storage areas (the firmware FWX generally refers to one of the firmware stored in the multiple storage areas). Exemplarily, an area is found in the storage block for storing code data in the storage block to be used as the first storage area Slot1. The function of this first storage area Slot1 is to store the firmware that is successfully activated during the firmware upgrade process. Multiple areas in the storage block for storing code data in the storage block are used as the third to eighth storage areas Slot2 to Slot7. The functions of the third to eighth storage areas Slot2 to Slot7 are to store different versions of firmware respectively. The memory system can select a firmware from the first storage area Slot1, the second storage area Slot0, or one of the third to eighth storage areas Slot2 to Slot7 according to the actual situation to run. Figure 4A and Figure 4B The number of storage areas in can be eight. SlotX generally refers to one of the first to eighth storage areas, and the firmware FWX generally refers to one of the firmware stored in the first to eighth storage areas. Two of the eight storage areas are the first storage area and the second storage area respectively.

[0058] In the embodiments of the present application, by adding a backup of the second storage area Slot0 to the storage block for storing code data in the storage block, although it occupies the space of the code block and also increases the maintenance of the data in this area, it can greatly ensure the possibility that the firmware activation and the process of switching to run the new firmware fail without causing the terminal to become a brick, thus ensuring the security of user data.

[0059] In some embodiments, the memory controller is further configured to: before running the first firmware FWB stored in the first storage area Slot1, perform the following steps:

[0060] S401. The host obtains (or downloads) the new firmware of the SSD (taking the first firmware FWB as an example) from the remote firmware server; before the host downloads the first firmware FWB, the firmware that runs normally before the firmware upgrade of the memory system is stored in both the first storage area Slot1 and the second storage area Slot0 (taking the second firmware FWA as an example);

[0061] S402. The host sends (firmware download / firmware submission) the first firmware FWB to the SSD;

[0062] S403. The host updates the SSD firmware. If the activation of the first firmware FWB is successful, the successfully activated first firmware FWB is stored in the first storage area Slot1; if the activation of the first firmware FWB fails, perform step S405 and send an error message to the host; wherein, after the activation of the first firmware FWB is successful, the first firmware FWB stored in the first storage area Slot1 can be run.

[0063] In some embodiments, the host coupled with the memory system can establish a connection with the firmware server through, for example, the TCP / IP protocol, send a firmware update request, and obtain the firmware update version (such as the first firmware FWB) sent in response to the firmware update request. In some embodiments, the host can be such as a personal computer, a mobile phone, a GPS terminal, and a digital satellite receiver, etc.

[0064] In some embodiments, inside the host, the obtained firmware update file (such as the first firmware FWB) can be transmitted to (firmware download / firmware submission) the memory system through, for example, the PCIe (peripheral component interconnect express, high-speed serial computer expansion bus standard) bus, and the firmware update file is decrypted, authenticated, and firmware update is implemented based on the target update file in the memory system.

[0065] In some embodiments, the memory controller is configured to: before running the first firmware FWB, change the second firmware FWA stored in the first storage area Slot1 to the first firmware FWB; when the update of the first storage area to the first firmware fails, send an error message; the error message indicates the error status of the failure to activate the first firmware.

[0066] Exemplarily, if the activation of the first firmware FWB fails, perform step S405, send an error message to the host, and the error message indicates the error status of the failure to activate the first firmware.

[0067] In some embodiments, the memory controller is configured to: update the second firmware FWA in the first storage area Slot1 to the first firmware FWB through the Peripheral Component Interconnect Express (PCIe).

[0068] In some embodiments, the memory controller is configured to: when the operation of the first firmware stored in the first storage area fails, send an asynchronous event; the asynchronous event includes at least the reason for the failure to run the first firmware after restart.

[0069] Exemplarily, if the restart operation of the first firmware FWB fails, perform steps S406, S407, and S408: perform step S406, the startup of the first firmware FWB is abnormal; perform step S407, during the process of restarting the host, the firmware in the second storage area Slot0 will be used, that is, after restarting the host, the second firmware FWA stored in the second storage area Slot0 of the SSD will be loaded and run. Since the second firmware FWA is the firmware that the memory system ran normally before the firmware upgrade, the SSD can run normally after restarting the host; perform step S408, after starting from the firmware in the second storage area Slot0 during the process of restarting the host, send an asynchronous event to the host, and the asynchronous event includes at least the reason for the failure to run the first firmware after restart.

[0070] In some embodiments, the memory controller is configured to: when the operation of the first firmware stored in the first storage area is successful, replace the second firmware stored in the second storage area with the first firmware.

[0071] Exemplarily, after performing step S404 and the activation of the first firmware FWB is successful, if the restart operation of the first firmware FWB is successful, the second firmware FWA stored in the first storage area Slot1 is replaced with the first firmware FWB.

[0072] In some embodiments, a variable is used to record the current firmware operation status of the memory system as shown in Table 1 below; the memory controller obtains the firmware operation status of the memory system through the ROM and executes the firmware of which storage area according to the firmware operation status.

[0073] Table 1

[0074]

[0075]

[0076] Exemplarily, the firmware running state is in the first state, that is, the value of the variable act_state is 2, and the memory controller loads the firmware running in the specified storage area. The firmware in the specified storage area can be the firmware for which the memory system runs normally before firmware upgrade, or the firmware that the memory system will run after firmware upgrade and runs successfully after running; the firmware running state is in the second state, the value of the variable act_state is 1, and the memory controller switches to run the firmware in the second storage area Slot0; the firmware running state is in the third state, the value of the variable act_state is 0, and the memory controller loads the firmware running in the default storage area. The firmware in the default storage area can be the firmware in the first storage area Slot1.

[0077] In some embodiments, the memory controller is configured to: after the memory system is restarted, obtain the firmware running state of the memory system; when the firmware running state is in the first state, update the firmware running state from the first state to the second state, and run the first firmware in the first storage area; when the first firmware runs successfully, update the firmware running state from the second state to the first state, and update the second firmware stored in the second storage area to the first firmware.

[0078] In some specific embodiments, the memory controller further includes a read-only memory (ROM). The memory controller is configured to: after the memory system is restarted, obtain the firmware running state of the memory system through the ROM; the ROM includes program code for detecting the firmware running state, and obtains the firmware running state of the memory system through the program code.

[0079] Exemplarily, through restart, the ROM will read the value of the variable act_state. If the value of the variable act_state is 2; then the ROM jumps to the activated successful firmware stored in the first storage area Slot1, and at the same time updates the value of the variable act_state to 1, and directly loads the activated successful firmware stored in the specified first storage area Slot1; after the activated successful firmware runs successfully, update the value of the variable act_state to 2, and at the same time, update the firmware in the hidden (or invisible to the user) second storage area Slot0 with the currently running successful firmware (the firmware that is activated successfully and runs successfully).

[0080] In some embodiments, the memory controller is configured to: when the first firmware fails to run, maintain the firmware running state in a second state; after the memory system is restarted again, re-obtain the firmware running state of the memory system, and when the firmware running state is in the second state, run the second firmware in the second storage area; when the second firmware in the first storage area runs successfully, update the firmware running state from the second state to the first state, and update the first firmware stored in the second storage area to the second firmware.

[0081] Exemplarily, through restart, the ROM reads the value of the variable act_state. If the value of the variable act_state is 2, then the ROM jumps to the successfully activated firmware, and at the same time updates the value of the variable act_state to 1, and directly loads the successfully activated firmware stored in the specified first storage area Slot1; after the successfully activated firmware fails to run, the value of the variable act_state remains 1, and the firmware is in a stuck state after the failure to run; through restart, the ROM reads the value of the variable act_state. If the value of the variable act_state is 1, then the ROM jumps to the firmware of the memory system that was running normally before the firmware upgrade stored in the second storage area Slot0, and at the same time updates the value of the variable act_state to 1, and directly loads the firmware of the memory system that was running normally before the firmware upgrade stored in the specified second storage area Slot0; the firmware stored in the second storage area Slot0 runs successfully, and at the same time updates the value of the variable act_state to 2.

[0082] In some embodiments, the memory controller is configured to: when the firmware running state is in a third state, run the second firmware in the second storage area.

[0083] In some embodiments, the memory controller is configured to: when no firmware upgrade command is received, the firmware running state defaults to the third state; when a firmware upgrade command is received, the firmware running state defaults to the first state.

[0084] Exemplarily, when no firmware upgrade command is received, the firmware running state defaults to the third state. After a reboot, the ROM reads the value of the variable act_state. If the value of the variable act_state is 0, then the ROM defaults to jumping to the firmware in the first storage area Slot1 that was operating normally before the firmware upgrade. When a firmware upgrade command is received, the firmware running state defaults to the first state. After a reboot, the ROM reads the value of the variable act_state. If the value of the variable act_state is 1, then the ROM jumps to the firmware in the second storage area Slot0 that was operating normally before the firmware upgrade, and at the same time updates the value of the variable act_state to 1, and directly loads the firmware in the specified second storage area Slot0 that was operating normally before the firmware upgrade.

[0085] In some embodiments, if the process of rebooting and switching to the new firmware fails, when rebooting from the firmware stored in the second storage area Slot0, an AER event will be generated to actively notify the host of the reason for the failure of the new firmware switch operation and the fallback to the previous firmware version.

[0086] In some embodiments, if the firmware activation fails, it is sufficient to return an error status message to the host.

[0087] In a second aspect, an embodiment of the present application provides an operation method for a memory system, the method including: when the first firmware stored in the first storage area of the memory device running the memory system fails, running the second firmware stored in the second storage area of the memory device; the first firmware is the firmware that the memory system was about to run before the firmware upgrade, and the second firmware is the firmware that the memory system was operating normally before the firmware upgrade; the first storage area and the second storage area are different; and replacing the first firmware stored in the first storage area with the second firmware.

[0088] In some embodiments, the method further includes: when the first firmware stored in the first storage area fails to run, sending an asynchronous event; the asynchronous event at least includes the reason for the failure of the first firmware to run after reboot.

[0089] In some embodiments, the method further includes: when the first firmware stored in the first storage area runs successfully, replacing the second firmware stored in the second storage area with the first firmware.

[0090] In some embodiments, the method further includes: after the memory system is restarted, obtaining the firmware running state of the memory system; when the firmware running state is in the first state, updating the firmware running state from the first state to the second state, and running the first firmware in the first storage area; when the first firmware runs successfully, updating the firmware running state from the second state to the first state, and updating the second firmware stored in the second storage area to the first firmware.

[0091] In some embodiments, the method further includes: when the first firmware runs failed, keeping the firmware running state in the second state; after the memory system is restarted again, re-obtaining the firmware running state of the memory system, and when the firmware running state is in the second state, running the second firmware in the second storage area; when the second firmware in the first storage area runs successfully, updating the firmware running state from the second state to the first state, and updating the first firmware stored in the second storage area to the second firmware.

[0092] In some embodiments, the method further includes: when the firmware running state is in the third state, running the second firmware in the second storage area.

[0093] In some embodiments, the memory device includes a plurality of storage blocks, and the second storage area is located in the storage block for storing code data in the storage blocks.

[0094] In some embodiments, the method further includes: before running the first firmware, changing the second firmware stored in the first storage area to the first firmware; when the update of the first storage area to the first firmware fails, sending an error message; the error message indicates the error state of the failure of the activation of the first firmware.

[0095] In some embodiments, the method further includes: updating the second firmware in the first storage area to the first firmware through PCIe.

[0096] The memory system used in the operation method of the memory system provided in the second aspect of the present application is the same as or similar to the memory systems in the respective embodiments of the first aspect above. For the technical features not disclosed in detail in the embodiments of the present application, please refer to the memory systems in the respective embodiments of the first aspect for understanding, and details are not described herein again.

[0097] In a third aspect, an embodiment of the present application provides a readable storage medium storing a computer program which, when executed, implements the operation method of the memory system according to any one of the embodiments in the second aspect. The method includes: when the first firmware stored in the first storage area of the memory device of the running memory system fails, running the second firmware stored in the second storage area of the memory device; the first firmware is the firmware that the memory system will run before firmware upgrade, and the second firmware is the firmware that the memory system runs normally before firmware upgrade; the first storage area and the second storage area are different; and replacing the first firmware stored in the first storage area with the second firmware.

[0098] In a fourth aspect, an embodiment of the present application provides a system 500, which includes a host 508 and a memory system 502 coupled to the host 508; the host 508 is configured to send a firmware upgrade command to the memory system 502; the memory system 502 is configured to: in response to the firmware upgrade command, when the first firmware stored in the first storage area of the running memory system fails, run the second firmware stored in the second storage area of the memory system; the first firmware is the firmware that the memory system will run after firmware upgrade, and the second firmware is the firmware that the memory system runs normally before firmware upgrade; and replace the first firmware stored in the first storage area with the second firmware; when the first firmware stored in the first storage area fails to run, send an asynchronous event to the host; the asynchronous event includes at least the reason for the failure to run the first firmware after restart; when the first firmware stored in the first storage area runs successfully, replace the second firmware stored in the second storage area with the first firmware.

[0099] In some embodiments, the host 508 is configured to: before the memory system runs the first firmware, download the first firmware from a server and send the downloaded first firmware to the memory system; the memory system 502 is configured to: activate the first firmware and, when the activation of the first firmware is successful, update the first storage area to the first firmware; when the activation of the first firmware fails, send an error message to the host; the error message indicates the error status of the failure to activate the first firmware.

[0100] In some embodiments, the memory system 502 is configured to: when no firmware upgrade command from the host is received, the firmware running state defaults to the third state; when a firmware upgrade command from the host is received, the firmware running state defaults to the first state.

[0101] Figure 5FIG. 0 shows a block diagram of an exemplary system 500 with a memory in accordance with some aspects of the present application. The system 500 can be a mobile phone, a desktop computer, a laptop computer, a tablet computer, a vehicle computer, a game console, a printer, a positioning device, a wearable electronic device, a smart sensor, a virtual reality (VR) device, an augmented reality (AR) device, or any other suitable electronic device having a memory. As Figure 5 shown, the system 500 can include a host 508 and a memory system 502 having one or more memory devices 504 and a memory controller 506. The host 508 can be a processor (e.g., a central processing unit (CPU)) or a system-on-chip (SoC) (e.g., an application processor (AP)) of an electronic device. The host 508 can be configured to send data to or receive data from the memory device 504.

[0102] The memory device 504 can be any memory disclosed in the present disclosure. As will be disclosed in detail below, the memory device 504 (e.g., a NAND flash memory (e.g., a three-dimensional (3D) NAND flash memory)) can have a reduced leakage current from a driving transistor (e.g., a string driver) coupled to an unselected word line during an erase operation, which allows for further scaling down of the driving transistor.

[0103] According to some embodiments, the memory controller 506 is coupled to the memory device 504 and the host 508 and is configured to control the memory device 504. The memory controller 506 can manage data stored in the memory device 504 and communicate with the host 508. In some embodiments, the memory controller 506 is designed to operate in a low-duty-cycle environment, such as a Secure Digital (SD) card, a CompactFlash (CF) card, a Universal Serial Bus (USB) flash drive, or other media used in electronic devices such as personal calculators, digital cameras, mobile phones, etc. In some embodiments, the memory controller 506 is designed to operate in a high-duty-cycle environment, such as a Solid State Drive (SSD) or an Embedded Multimedia Card (eMMC), which are used as data storage for mobile devices such as smart phones, tablet computers, laptop computers, etc., and enterprise storage arrays.

[0104] The memory controller 506 can be configured to control the operations of the memory device 504, such as read, erase, and program operations. The memory controller 506 can also be configured to manage various functions regarding the data stored in or to be stored in the memory device 504, including but not limited to bad block management, garbage collection, logical-to-physical address translation, wear leveling, etc. In some embodiments, the memory controller 506 is further configured to process error correction codes (ECC) regarding the data read from or written to the memory device 504. The memory controller 506 can also perform any other suitable functions, such as formatting the memory device 504. The memory controller 506 can communicate with external devices (e.g., host 508) according to a specific communication protocol. For example, the memory controller 506 can communicate with external devices through at least one of various interface protocols, such as USB protocol, MMC protocol, Peripheral Component Interconnect (PCI) protocol, PCI Express (PCI-E) protocol, Advanced Technology Attachment (ATA) protocol, Serial ATA protocol, Parallel ATA protocol, Small Computer System Interface (SCSI) protocol, Enhanced Small Disk Interface (ESDI) protocol, Integrated Drive Electronics (IDE) protocol, Firewire protocol, etc.

[0105] The memory controller 506 and one or more memory devices 504 can be integrated into various types of storage devices, e.g., included in the same package (such as Universal Flash Storage (UFS) package or eMMC package). That is, the memory system 502 can be implemented and packaged into different types of end-user electronic products.

[0106] In one example as shown in Figure 6A the memory controller 506 and a single memory device 504 can be integrated into a memory card 602. The memory card 602 can include PC Card (PCMCIA, Personal Computer Memory Card International Association), CF card, Smart Media (SM) card, Memory Stick, Multimedia Card (MMC, RS-MMC, MMCmicro), SD card (SD, miniSD, microSD, SDHC), UFS, etc. The memory card 602 can also include a memory card connector 604 that couples the memory card 602 to a host (e.g., Figure 5 the host 508 in

[0107] In another example as shown in Figure 6B the memory controller 506 and multiple memory devices 504 can be integrated into an SSD 606. The SSD 606 can also include a component that couples the SSD 606 to a host (e.g., Figure 5The SSD connector 608 coupled to the host 508 therein. In some embodiments, the storage capacity and / or operating speed of the SSD 606 are greater than those of the memory card 602 (as Figure 6A shown).

[0108] Referring Figure 7 , in some specific embodiments, the memory system 102 is coupled to the host and executes various feedbacks in response to the instructions of the host. The memory system 102 may include: a memory controller 106 and a memory device 104. The memory controller 106 is used to control the memory device 104 to perform operations such as reading, writing, and erasing. The memory controller 106 and the memory device 104 may also be coupled in any suitable manner.

[0109] The memory controller 106 may include a host interface (I / F) 1061, a memory interface (I / F) 1062, a processor 1063, a read-only memory (ROM) 1069, a random access memory (RAM) 1070, an error correction module 1064, a garbage collection module 1065, a wear leveling module 1066, a data buffer 1067, and a bus 1060. Among them, the host interface 1061 is the connection interface between the host 108 and the memory controller 106. The host interface 1061 allows the host and the memory controller to communicate according to a specific protocol, send read and write requests, and perform other operations. The memory interface 1062 is the connection interface between the memory controller 106 and the memory device 104. The memory interface 1062 is used to implement data transmission between the memory controller 106 and the memory device 104. The processor 1063 is used to overall control the memory system 106. The specific steps performed by the memory controller as described above are mainly executed and completed by the processor 1063 here. In some specific embodiments, the processor 1063 is, for example, a central processing unit (CPU), a microcontroller unit (MCU), etc. The ROM 1069 usually contains the firmware or firmware program code of the memory controller 106. These codes are used to initialize and operate the components of the memory controller. The RAM 1070 is usually used to cache data. The error correction module 1064 may further include an encoding unit and a decoding unit; the encoding unit is used to encode the data to be stored to obtain check data, and the decoding unit is used to decode the check data to detect and correct possible error data during data transmission.

[0110] The garbage collection module 1065 is used to read out the valid data on some memory blocks, rewrite it, and then mark these memory blocks after the storage space of the memory device reaches a certain threshold, so as to obtain new spare memory blocks. The general implementation of garbage collection can be divided into three steps: selecting source memory blocks with less valid data; finding valid data from the source memory blocks; writing the valid data into the target memory blocks. At this time, all the data in the source memory blocks becomes invalid data, and the source memory blocks are marked and can be used as new spare memory blocks. The wear leveling module 1066 is used to make the wear (erase count) of each memory block in the memory system balanced through data statistics and algorithms. The general implementation of wear leveling can be divided into two steps: selecting the source memory blocks where the cold data is located; reading the valid data on the source memory blocks and writing it to the memory blocks with a relatively large erase count. At this time, the valid data in the source memory blocks becomes invalid data and is marked. The buffer 1067 is used to cache data.

[0111] The memory device 104 and the memory blocks can be understood with reference to the specific structure and specific working mode of the foregoing memory device 104, which will not be elaborated here.

[0112] It should be understood that the "one embodiment" or "an embodiment" mentioned throughout the specification means that the specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present application. Therefore, the appearances of "in one embodiment" or "in an embodiment" throughout the specification do not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in various embodiments of the present application, the magnitudes of the sequence numbers of the above processes do not mean the order of execution is prior or subsequent. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation to the implementation process of the embodiments of the present application. The sequence numbers of the embodiments of the present application are only for description and do not represent the advantages or disadvantages of the embodiments.

[0113] The above is only the preferred embodiment of the present application, and does not limit the patent scope of the present application. Any equivalent structural transformation made under the inventive concept of the present application by using the content of the specification and drawings of the present application, or directly / indirectly applied in other related technical fields, is included in the patent protection scope of the present application.

Claims

1. A memory system, characterized in that, comprising: a memory device including a first storage area and a second storage area; the first storage area and the second storage area are different; a memory controller coupled to the memory device and configured to: when running the first firmware stored in the first storage area fails, run the second firmware stored in the second storage area; the first firmware is the firmware that the memory system will run after firmware upgrade, and the second firmware is the firmware that the memory system runs normally before firmware upgrade; and replace the first firmware stored in the first storage area with the second firmware.

2. The memory system according to claim 1, characterized in that, the memory controller is configured to: when running the first firmware stored in the first storage area fails, send an asynchronous event; the asynchronous event includes at least the reason for the failure of running the first firmware after restart.

3. The memory system according to claim 1, characterized in that, the memory controller is configured to: when running the first firmware stored in the first storage area is successful, replace the second firmware stored in the second storage area with the first firmware.

4. The memory system according to claim 3, characterized in that, the memory controller is configured to: after the memory system restarts, obtain the firmware running state of the memory system; when the firmware running state is in the first state, update the firmware running state from the first state to the second state and run the first firmware in the first storage area; when the first firmware runs successfully, update the firmware running state from the second state to the first state and update the second firmware stored in the second storage area to the first firmware.

5. The memory system according to claim 4, characterized in that, the memory controller is configured to: when the first firmware runs fails, keep the firmware running state in the second state; after the memory system restarts again, re-obtain the firmware running state of the memory system, and when the firmware running state is in the second state, run the second firmware in the second storage area; when the second firmware in the first storage area runs successfully, update the firmware running state from the second state to the first state and update the first firmware stored in the second storage area to the second firmware.

6. The memory system according to claim 1, characterized in that, the memory device includes a plurality of storage blocks, and the second storage area is located in the storage block for storing code data among the storage blocks.

7. The memory system according to claim 1, characterized in that, the memory controller is configured to: before running the first firmware, update the second firmware stored in the first storage area to the first firmware; when updating the first storage area to the first firmware fails, send an error message; the error message indicates the error state of the failure of activating the first firmware.

8. The memory system according to claim 7, wherein, the memory controller is configured to: update the second firmware in the first storage area to the first firmware through the Peripheral Component Interconnect Express (PCIe).

9. A method for operating a memory system, wherein, it includes: when the first firmware stored in the first storage area of the memory device in the running memory system fails, running the second firmware stored in the second storage area of the memory device; the first firmware is the firmware that the memory system is going to run before the firmware upgrade, and the second firmware is the firmware that the memory system runs normally before the firmware upgrade; the first storage area and the second storage area are different; and replacing the first firmware stored in the first storage area with the second firmware.

10. The operation method according to claim 9, wherein, the method further includes: when the first firmware stored in the first storage area fails to run, sending an asynchronous event; the asynchronous event includes at least the reason for the failure of running the first firmware after restart.

11. The operation method according to claim 9, wherein, the method further includes: when the first firmware stored in the first storage area runs successfully, replacing the second firmware stored in the second storage area with the first firmware.

12. The operation method according to claim 11, wherein, the method further includes: after the memory system restarts, obtaining the firmware running state of the memory system; when the firmware running state is in the first state, updating the firmware running state from the first state to the second state, and running the first firmware in the first storage area; when the first firmware runs successfully, updating the firmware running state from the second state to the first state, and updating the second firmware stored in the second storage area to the first firmware.

13. The operation method according to claim 12, wherein, the method further includes: when the first firmware runs fails, keeping the firmware running state in the second state; after the memory system restarts again, re-obtaining the firmware running state of the memory system, and when the firmware running state is in the second state, running the second firmware in the second storage area; when the second firmware in the first storage area runs successfully, updating the firmware running state from the second state to the first state, and updating the first firmware stored in the second storage area to the second firmware.

14. The operation method according to claim 9, wherein, the memory device includes a plurality of storage blocks, and the second storage area is located in the storage block for storing code data among the storage blocks.

15. The operation method according to claim 9, wherein, the method further includes: before running the first firmware, updating the second firmware stored in the first storage area to the first firmware; When the update of the first firmware in the first storage area fails, an error message is sent; the error message indicates the error status of the failure of the activation of the first firmware.

16. The operation method according to claim 15, wherein, the method further includes: Updating the second firmware in the first storage area to the first firmware through PCIe.

17. A readable storage medium, wherein, The readable storage medium stores a computer program, and when the computer program is executed, it implements the operation method of the memory system according to any one of claims 9 to 16.

18. A system, wherein, comprising: A host and a memory system coupled to the host; wherein, The host is configured to: send a firmware upgrade command to the memory system; The memory system is configured to: In response to the firmware upgrade command, when the first firmware stored in the first storage area of the memory system fails, run the second firmware stored in the second storage area of the memory system; the first firmware is the firmware that the memory system will run after the firmware upgrade, and the second firmware is the firmware that the memory system runs normally before the firmware upgrade; and replace the first firmware stored in the first storage area with the second firmware; When the first firmware stored in the first storage area fails to run, send an asynchronous event to the host; the asynchronous event at least includes the reason for the failure of running the first firmware after restart; When the first firmware stored in the first storage area runs successfully, replace the second firmware stored in the second storage area with the first firmware.

19. The system according to claim 18, wherein, The host is configured to: before the memory system runs the first firmware, download the first firmware from a server and send the downloaded first firmware to the memory system; The memory system is configured to: activate the first firmware, and when the activation of the first firmware is successful, update the first storage area to the first firmware; when the activation of the first firmware fails, send an error message to the host; The error message indicates the error status of the failure of the activation of the first firmware.

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