Task scheduling method, system and device and storage medium

Abstract

The invention discloses a task scheduling method, a task scheduling system, a task scheduling device and a storage medium. The task scheduling method comprises the following steps: acquiring a computing core load condition and task real-time data in the system; the task real-time data comprises resource demand data; determining initial system task scheduling according to a calculation core load condition and task real-time data; the initial system task scheduling comprises a task layering result; inputting the resource demand data and the task layering result into a trained time delay prediction model for calculation to obtain a time delay prediction result; the embodiment of the invention can improve the resource utilization rate and task scheduling efficiency when the power distribution system executes task scheduling, and can be widely applied to the field of power distribution networks.

Description

Technical Field

[0001] The present invention relates to power distribution network technology, and in particular, to a task scheduling method, system, device, and storage medium. Background Art

[0002] The power system is a complex system composed of power generation, transformation, transmission, distribution, and power consumption equipment, which is responsible for converting primary energy into electric energy and safely, reliably, and economically delivering it to the user side. And the task scheduling of the distribution system is a crucial link in the power system, which involves aspects such as predicting the power consumption load, formulating the power generation plan and operation mode, ensuring the safe and stable operation of the power grid, optimizing the allocation of power resources, and promoting the intelligent development of the power system, aiming to ensure the balance between power supply and demand and improve the economy and safety of the operation of the power system. Therefore, it is very important to ensure that the distribution system can perform task scheduling accurately and efficiently.

[0003] However, in the prior art, when the distribution system performs task scheduling, there are problems of low resource utilization rate and low task scheduling efficiency. Summary of the Invention

[0004] In view of this, to solve one of the above problems, an object of an embodiment of the present invention is to provide a task scheduling method, system, device, and storage medium, which can improve the resource utilization rate and task scheduling efficiency when the distribution system performs task scheduling.

[0005] In a first aspect, an embodiment of the present invention provides a task scheduling method, including the following steps:

[0006] Obtain the computing core load situation and task real-time data in the system; the task real-time data includes resource requirement data;

[0007] Determine an initial system task scheduling according to the computing core load situation and the task real-time data; the initial system task scheduling includes a task stratification result;

[0008] Input the resource requirement data and the task stratification result into a trained delay prediction model for calculation to obtain a delay prediction result;

[0009] Judge whether the delay prediction result of the tasks in the system meets a preset condition, and adjust the initial system task scheduling according to the judgment result and the core load situation in the system to obtain a system task scheduling.

[0010] Specifically, the determining an initial system task scheduling according to the computing core load situation and the task real-time data includes:

[0011] Divide the computing cores in the system into several computing core groups based on the computing core load situation;

[0012] Based on the computational complexity and priority level in the task real-time data, tasks within the system are divided into several task layers; the number of task layers is the same as the number of computational core groups;

[0013] Several of the task layers are correspondingly assigned to several of the computational core groups one by one.

[0014] Specifically, the latency prediction model is trained in the following manner:

[0015] Obtain historical sample data of the system; the historical sample data includes historical resource demand data samples, historical task layering result samples, and historical latency result samples;

[0016] Input the historical resource demand data samples and the historical task layering result samples into a pre-latency prediction model for calculation to obtain a sample training result;

[0017] Based on the historical latency result samples and the sample training result, calculate to obtain an error value;

[0018] Obtain the preset parameters of the pre-latency prediction model; update the preset parameters of the pre-latency prediction model according to the error value and re-obtain the error value until the error value meets a preset threshold, and obtain a trained latency prediction model according to the update result.

[0019] Specifically, updating the preset parameters according to the error value and a preset debugging function includes:

[0020] Determine the debugging step size of the preset parameters of the pre-latency prediction model based on the error value;

[0021] Update the preset parameters of the pre-latency prediction model according to the debugging step size.

[0022] Specifically, the initial system task scheduling further includes the correspondence between tasks within the system and computational cores; adjusting the initial system task scheduling according to the judgment result and the core load situation within the system includes:

[0023] If the judgment result is that the latency prediction result of the task is greater than or equal to a first preset threshold, adjust the correspondence between the task and the computational core;

[0024] If the judgment result is that the latency prediction result of the task is less than a second preset threshold, adjust the task layering result of the task.

[0025] Optionally, the method further includes:

[0026] Determine the dependency relationship of the tasks within the system based on the task layering result and the latency prediction result;

[0027] Construct a directed acyclic graph based on the dependency relationship of the tasks within the system, and adjust the execution order of the tasks within the system according to the directed acyclic graph.

[0028] Specifically, the directed acyclic graph is constructed by the following method:

[0029] Represent the tasks within the system as a number of nodes;

[0030] Represent the dependency relationship of the tasks within the system as a number of directed edges;

[0031] Based on a number of the nodes and a number of the directed edges, form the directed acyclic graph.

[0032] On the other hand, an embodiment of the present invention further provides a task scheduling system, including:

[0033] A first module, configured to obtain the computing core load situation and task real-time data within the system; the task real-time data includes resource requirement data;

[0034] A second module, configured to determine an initial system task schedule according to the computing core load situation and the task real-time data; the initial system task schedule includes a task layering result;

[0035] A third module, configured to input the resource requirement data and the task layering result into a trained latency prediction model for calculation to obtain a latency prediction result;

[0036] A fourth module, configured to determine whether the latency prediction result of the tasks within the system meets a preset condition, and adjust the initial system task schedule according to the judgment result and the core load situation within the system to obtain a system task schedule.

[0037] On the other hand, an embodiment of the present invention further provides a task scheduling device, including:

[0038] At least one processor;

[0039] At least one memory, configured to store at least one program;

[0040] When the at least one program is executed by the at least one processor, the at least one processor implements the method as described above.

[0041] On the other hand, an embodiment of the present invention further provides a computer-readable storage medium, in which a processor-executable program is stored; the processor-executable program is used to execute the method as described above when executed by a processor.

[0042] The implementation of the embodiments of the present invention includes the following beneficial effects:

[0043] The embodiments of the present invention provide a task scheduling method, system, device and storage medium. The method determines the initial task scheduling based on the load conditions of the computing cores in the system and the real-time task data, divides the tasks and computing cores in the system, adaptively allocates the tasks in the system to the eligible computing cores, then calculates the delay prediction result of the system tasks using the delay prediction model, and dynamically adjusts the initial task scheduling of the system according to the delay prediction result and the load conditions of the computing cores in the system. Through the dynamic adjustment of the task scheduling, the tasks in the system can be completed and processed in a timely manner, improving the task scheduling efficiency when the power distribution system executes task scheduling; at the same time, the present invention can dynamically adjust the correspondence between the tasks and computing cores in the system based on the delay prediction of the tasks, reducing the core competition and delay situations when the system executes tasks, and improving the resource utilization rate when the power distribution system executes task scheduling. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 is a schematic flowchart of the steps of a task scheduling method provided by an embodiment of the present invention;

[0045] Figure 2 is a schematic flowchart of the steps of a prediction model optimization method based on the dung beetle algorithm provided by an embodiment of the present invention;

[0046] Figure 3 is a schematic flowchart of the steps of a dedicated circuit cooperative scheduling method provided by an embodiment of the present invention;

[0047] Figure 4 is a structural block diagram of a task scheduling system provided by an embodiment of the present invention;

[0048] Figure 5 is a structural block diagram of a task scheduling device provided by an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0049] The following further elaborates the present invention in detail with reference to the accompanying drawings and specific embodiments. For the step numbers in the following embodiments, they are only set for the convenience of explanation and illustration, and no limitation is imposed on the order between the steps. The execution order of each step in the embodiments can be adaptively adjusted according to the understanding of those skilled in the art.

[0050] The explanations of several terms involved in this application are as follows:

[0051] ADC (Analog-to-Digital Converter): An electronic device or circuit used to convert analog signals into digital signals. Its function is to convert continuous analog signals into discrete digital signals, facilitating processing and analysis by digital processing systems.

[0052] FPGA (Field-Programmable Gate Array): A programmable hardware device that can be configured at the hardware level to perform various customized logic operations.

[0053] DAG (Directed Acyclic Graph): A graphical data structure that contains a set of vertices and directed edges, where each edge has a direction and does not form a loop. Each vertex represents a task or operation, and the edges represent the dependencies between tasks.

[0054] LSTM (Long Short-Term Memory): A special type of recurrent neural network that effectively solves the problem of traditional RNNs having difficulty capturing long-distance dependencies by introducing gating mechanisms and cell states. LSTM can learn long-term dependencies and is suitable for processing and predicting important events with long intervals and delays in time series data. It is widely used in fields such as natural language processing, speech recognition, and time series prediction, demonstrating strong sequence modeling capabilities.

[0055] Dung Beetle Optimizer (DBO): A new type of swarm intelligence optimization algorithm proposed by Jiankai Xue et al. in 2022. This algorithm is inspired by the behaviors of dung beetles such as rolling balls, dancing, foraging, stealing, and reproducing, and searches for the optimal solution in the search space by simulating these behaviors. It has the characteristics of strong optimization ability and fast convergence speed, and is suitable for solving various complex optimization problems.

[0056] Heterogeneous Cores: Heterogeneous cores refer to integrating multiple different types of cores with different structures and functions in the same system or processor. These cores may include traditional CPU cores, graphics processing unit (GPU) cores, digital signal processor (DSP) cores, neural network processor (NPU) cores, etc. They are optimized for specific application fields or functions and can achieve higher performance and energy efficiency. The design of heterogeneous cores enables the system to select the appropriate core type according to different computing tasks, realizing task parallelization and acceleration.

[0057] Adaptive Step-Size Strategy: The adaptive step-size strategy is a method that dynamically adjusts the step size according to the characteristics of the problem and the current search state. It can dynamically adjust the step size during the optimization process based on the current state and environmental information to balance global exploration and local exploitation, accelerate the convergence speed, and improve the efficiency of the algorithm. This strategy is applied in various optimization algorithms, demonstrating strong robustness and adaptability.

[0058] Dijkstra's Shortest Path Algorithm: A classic algorithm for calculating the single-source shortest paths in a weighted graph. It gradually expands the shortest path tree, continuously finds the unvisited vertex closest to the source vertex, and updates the shortest path estimates of its neighbor vertices until all vertices are visited, finally obtaining the shortest paths from the source vertex to all other vertices.

[0059] Weighted Round Robin (WRR): A scheduling algorithm that, when allocating service requests or resources, determines the probability or frequency of their being selected based on the weights assigned to each request or resource, thus ensuring that requests or resources with higher weights receive relatively more processing opportunities.

[0060] As Figure 1 shown, an embodiment of the present invention provides a task scheduling method, and the steps included therein are as follows.

[0061] S100: Obtain the computing core load situation and task real-time data within the system; the task real-time data includes resource requirement data;

[0062] Obtain and record the computing core load situation and the real-time data of the tasks being executed within the system through a data collector and sensors.

[0063] Specifically, the task real-time data includes computational complexity and priority level; specifically including: task progress, remaining task time, resource usage, input data, and output data status, etc.; the resource requirement data is calculated from the task real-time data.

[0064] S200: Determine the initial system task scheduling according to the computing core load situation and task real-time data; the initial system task scheduling includes the task layering result;

[0065] Classify the tasks according to the load level of the system computing cores and the task real-time data, and allocate the tasks to the corresponding system computing cores.

[0066] In some embodiments, the process of determining the initial system task scheduling in step S200 can be implemented by the following method:

[0067] S210: Divide the computing cores within the system into several computing core groups based on the computing core load situation;

[0068] Group according to the load situation and computing power of the computing cores within the system. Low-power cores can be responsible for tasks with less computing load or less required computing power. Medium-performance cores can handle tasks with normal computing processes, while high-performance cores are specifically used to handle tasks with high computing load and large required computing power.

[0069] S220: Divide the tasks in the system into several task layers based on the computational complexity and priority level in the task real-time data; the number of task layers is the same as the number of computational core groups;

[0070] Layer the tasks in the system according to the computational complexity and priority level of the tasks in the system.

[0071] Specifically, divide the tasks in the system into high-priority / computation-intensive tasks, normal tasks, and low-priority tasks.

[0072] S230: Correspondingly assign several task layers to several computational core groups.

[0073] Assign normal tasks to medium-performance cores, high-priority and computation-intensive tasks to high-performance cores, and low-priority tasks to low-power cores.

[0074] Specifically, the present invention adopts three types of heterogeneous cores - low-power cores, medium-performance cores, and high-performance cores - to flexibly schedule resources according to the computational complexity of tasks, thereby effectively balancing the energy efficiency and computing power of the system. The low-power cores are responsible for simple tasks, the medium-performance cores handle general computing requirements, and the high-performance cores are specifically used to handle computation-intensive tasks. Accordingly, it is possible to provide task level and priority data for delay prediction and optimization, ensuring that the delay prediction algorithm can accurately predict the execution delay for tasks at different levels.

[0075] S300: Input the resource demand data and the task layering result into the trained delay prediction model for calculation to obtain the delay prediction result;

[0076] Utilize a delay prediction algorithm, which is trained based on the LSTM neural network algorithm for historical task execution data. Through the trained delay prediction model and the real-time monitored resource demand data, predict the execution delay of each layer of tasks. The delay prediction result reflects the potential delay of task execution and can be optimized according to the computational complexity of the task and the system load situation.

[0077] Specifically, the delay prediction model can be trained by the following method:

[0078] S310: Input the historical resource demand data samples and the historical task layering result samples into the pre-delay prediction model for calculation to obtain the sample training result;

[0079] First, preset the preset parameters based on the LSTM neural network algorithm, and construct a pre-delay prediction model according to the preset parameters; the preset parameters include the number of hidden layer nodes, learning rate, Batch Size, search range, and epoch, etc. Input the historical execution data of the system into the pre-delay prediction model for calculation to obtain the sample training result.

[0080] S320: Calculate based on historical latency result samples and sample training results to obtain an error value;

[0081] According to the historical latency situation of tasks recorded in the system, perform a comparison calculation based on the calculated sample training results to obtain an error value.

[0082] S330: Obtain the preset parameters of the pre-latency prediction model; update the preset parameters of the pre-latency prediction model according to the error value and re-obtain the error value until the error value meets the preset threshold, and obtain the trained latency prediction model according to the update result.

[0083] Adjust the parameters of the pre-latency prediction model according to the calculated error value, and repeat the process of calculating the error - adjusting the parameters until the error value meets the preset threshold. Based on the model parameters that meet the conditions obtained at this time, construct the trained latency prediction model.

[0084] Specifically, the process of adjusting the parameters of the pre-latency prediction model according to the calculated error value can be implemented by the following method:

[0085] Determine the debugging step size of the preset parameters of the pre-latency prediction model based on the error value;

[0086] Update the preset parameters of the pre-latency prediction model according to the debugging step size.

[0087] Specifically, as Figure 2 shown, the present invention uses a multi-strategy improved dung beetle algorithm to optimize the LSTM neural network for real-time load prediction and latency optimization. Utilize the global search strategy of the dung beetle algorithm to randomly generate the preset parameter configuration of the pre-latency prediction model at the initial stage and train for task latency prediction. Combine the local search strategy to refine the performance of the LSTM by gradually adjusting parameters such as the network structure, step size, and update frequency during the training process. In each round of iteration, the dung beetle algorithm uses a fitness function to measure the latency prediction accuracy. The fitness function is based on the error of the latency prediction to optimize the latency prediction ability of the latency prediction model. To accelerate the convergence process, an adaptive step size strategy is adopted. This strategy adjusts the debugging step size in real time according to the dynamic change of the latency prediction error in each round of iteration. In the initial stage with a large prediction error, in order to quickly find the appropriate solution space, the step size is set large to search for the best parameter configuration within a large range; while when the prediction error gradually decreases and approaches stability, the step size will gradually decrease to improve the search accuracy and avoid over-adjustment. Specifically, when the reduction amplitude of the error is less than the preset threshold, the system will automatically reduce the step size to ensure that the search process is more stable and accurate, thereby preventing system oscillation and the failure of the scheduling strategy, and finally improving the prediction accuracy to more than 95%. All calculation processes are accelerated by FPGA to reduce hardware latency.

[0088] S400: Determine whether the delay prediction result of the tasks in the system meets the preset conditions, and adjust the initial system task scheduling according to the judgment result and the core load situation in the system to obtain the system task scheduling.

[0089] The task scheduling system adopts a delay optimization strategy. This strategy adjusts the scheduling according to the delay prediction result of the tasks in the system and the core load situation in the system, and adaptively allocates tasks to the eligible computing cores in the system.

[0090] In some embodiments, in step S400, the process of adjusting the initial system task scheduling according to the judgment result and the core load situation in the system can be implemented by the following method:

[0091] If the judgment result is that the delay prediction result of the task is greater than or equal to the first preset threshold, adjust the correspondence between the task and the computing core;

[0092] The system monitors the computing delay and load status of each task in real time. When it is found that the delay of a certain task is approaching the predetermined threshold, the system will automatically adjust the scheduling strategy according to the current load situation, and transfer the task to a computing core with a lower load to avoid the increase in delay caused by core competition.

[0093] If the judgment result is that the delay prediction result of the task is less than the second preset threshold, adjust the task stratification result of the task.

[0094] When the delay of a certain task does not reach the expectation, the system will dynamically adjust the resource allocation according to the actual situation, such as adjusting the task execution order or increasing the execution priority of some tasks.

[0095] Specifically, the task scheduling system adopts a latency optimization strategy. This strategy reduces the task execution latency through real-time load monitoring, task priority evaluation, and dynamic scheduling mechanisms, and ensures that the data transmission latency from the dedicated circuit to the kernel does not exceed 50 microseconds. The specific latency optimization strategy includes: The system monitors the computing latency and load status of each task in real time. When it is found that the latency of a certain task is close to the predetermined threshold, the system will automatically adjust the scheduling strategy according to the current load situation, transfer the task to a computing core with a lower load, and reduce the increase in latency caused by core competition. The task priority scheduling mechanism ensures that in the case of high concurrency, high-priority tasks are processed first, and core resources are allocated through the weighted round-robin algorithm to avoid multiple tasks concentrating on one core, thereby reducing resource competition and latency. The latency optimization strategy also includes a real-time feedback mechanism. When the latency of a certain task does not meet the expectation, the system will dynamically adjust the resource allocation according to the actual situation, such as adjusting the task execution order or increasing the execution priority of certain tasks. Further, within every 100-millisecond scheduling cycle, the system dynamically allocates computing resources according to the latency prediction result. When the latency exceeds the set threshold, the task will be transferred to a core with a lower load or additional computing resources will be enabled, thereby ensuring the stable operation of the system under high-concurrency conditions.

[0096] Further, the task scheduling method provided by the embodiment of the present invention further includes:

[0097] S500: Determine the dependency relationship of tasks in the system based on the task layering result and the latency prediction result;

[0098] S600: Construct a directed acyclic graph based on the dependency relationship of tasks in the system, and adjust the execution order of tasks in the system according to the directed acyclic graph.

[0099] Specifically, the directed acyclic graph mentioned in step S600 can be constructed by the following method:

[0100] Represent the tasks in the system as several nodes;

[0101] Represent the dependency relationship of tasks in the system as several directed edges;

[0102] Based on several nodes and several directed edges, form a directed acyclic graph.

[0103] Specifically, the present invention constructs a DAG model for tasks within the system, where each task link is regarded as a node in the graph, and the dependency relationship between tasks is represented as an edge. Further, using the Dijkstra shortest path algorithm, the system optimizes the task execution order to minimize the dependency latency between tasks. By adopting a prefetch mechanism, before the start of the task chain, computing resources are allocated in advance for high-priority links to avoid the accumulation of time delays caused by resource contention. The scheduling period is 200 milliseconds, and the system monitors the status and resource requirements of tasks in real time and dynamically adjusts the allocation of computing resources. When the computing requirements of a task link exceed the resource threshold, the system automatically schedules the task to an idle resource node or enables parallel computing capabilities to improve processing efficiency.

[0104] Implementing the embodiments of the present invention includes the following beneficial effects:

[0105] (1) Three types of heterogeneous cores are adopted: low-power cores, medium-performance cores, and high-performance cores; resources are flexibly scheduled according to the computational complexity of tasks, thereby effectively balancing the energy efficiency and computing power of the system. Combining the weighted round-robin and real-time load monitoring mechanisms ensures the matching of task priorities and core performance, avoiding resource waste and processing delays.

[0106] (2) Integrated data decoding circuit and power monitoring circuit: Through a high-speed bus and a hardware trigger mechanism, the efficiency and real-time nature of data transmission are ensured. The precise cooperation of the dedicated circuits enables data to be transmitted to the service kernel in a timely manner after low-level computational processing is completed, meeting the high-timeliness system requirements.

[0107] (3) Using the dung beetle algorithm to optimize the LSTM neural network: improving the accuracy of latency prediction, and finely adjusting task scheduling and resource allocation through an adaptive step size strategy to ensure the stable operation of the system in a high-concurrency environment and avoid risks caused by excessive adjustment or oscillation.

[0108] (4) The scheduling strategy based on the DAG optimization algorithm reduces the dependency latency between tasks by optimizing the task chain, adjusts the task execution order, and improves task processing efficiency. The prefetch mechanism allocates resources for high-priority tasks in advance, avoiding the accumulation of time delays caused by resource contention. The real-time monitoring and dynamic adjustment mechanisms ensure that the system can quickly respond to task changes during operation, automatically adjust resource allocation, and further improve the computing efficiency and the overall processing capacity of the system.

[0109] As Figure 3 shown, the present invention also provides a dedicated circuit cooperative scheduling method. Based on the integrated data decoding circuit and power monitoring circuit, through a high-speed bus and a hardware trigger mechanism, the efficiency and real-time nature of data transmission are ensured.

[0110] Specifically, the present invention integrates multiple dedicated circuit modules within a chip, including a data decoding circuit and a power monitoring circuit. The data decoding circuit is based on a 12-bit ADC with a sampling frequency of 1 MHz and is responsible for the digital processing of signals; the power monitoring circuit monitors the current at a frequency of 10 Hz with an accuracy of 0.1%. After the module finishes low-level calculations, it transfers the data to the service kernel through a high-speed bus with a rate of 1.5 GB / s; the service kernel includes the system calculation core after grouping.

[0111] Specifically, during the data flow of task scheduling executed by the power distribution system, the system precisely controls the calculation completion time of each circuit module through a hardware trigger mechanism. Once the calculation is completed, it immediately triggers the kernel to read the data, ensuring that the data transmission is not affected by delays. The scheduling period of the entire system is set to 50 milliseconds. During the scheduling process, a dynamic queue management mechanism is used to sort and process tasks in a timely manner, ensuring that tasks are executed in the order of priority, reducing delays and data congestion caused by improper resource allocation, thereby improving the response speed and processing capacity of the system.

[0112] As Figure 4 shown, an embodiment of the present invention also provides a task scheduling system, including:

[0113] A first module, configured to obtain the load condition of the calculation core within the system and real-time task data; the real-time task data includes resource requirement data;

[0114] A second module, configured to determine an initial system task scheduling according to the load condition of the calculation core and the real-time task data; the initial system task scheduling includes a task stratification result;

[0115] A third module, configured to input the resource requirement data and the task stratification result into a trained delay prediction model for calculation to obtain a delay prediction result;

[0116] A fourth module, configured to determine whether the delay prediction result of the tasks within the system meets a preset condition, and adjust the initial system task scheduling according to the judgment result and the core load condition within the system to obtain a system task scheduling.

[0117] It can be seen that the content in the above method embodiments is applicable to the system embodiments of the present invention. The functions specifically implemented by the system embodiments of the present invention are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those of the above method embodiments.

[0118] As Figure 5 shown, an embodiment of the present invention also provides a task scheduling device, including:

[0119] At least one processor;

[0120] At least one memory, configured to store at least one program;

[0121] When the at least one program is executed by the at least one processor, the at least one processor implements the steps of a task scheduling method as described in the above method embodiments.

[0122] Among them, the memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer-executable programs. The memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, a flash memory device, or other non-transitory solid-state storage devices. In some embodiments, the memory optionally includes a remote memory remotely disposed relative to the processor, and these remote memories can be connected to the processor through a network. Examples of the above networks include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0123] It can be seen that the content in the above method embodiments is applicable to the device embodiments of the present application. The functions specifically implemented by the device embodiments of the present application are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those of the above method embodiments.

[0124] In addition, the embodiments of the present application also disclose a computer program product or a computer program. The computer program product or the computer program is stored in a computer-readable storage medium. The processor of the computer device can read the computer program from the computer-readable storage medium, and the processor executes the computer program, so that the computer device executes the above method.

[0125] The embodiments of the present invention also provide a computer-readable storage medium. The computer-readable storage medium stores a program executable by a processor, and the program executable by the processor is used to implement the above method when executed by the processor. Similarly, the content in the above method embodiments is applicable to the storage medium embodiments of the present application. The functions specifically implemented by the storage medium embodiments of the present application are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those of the above method embodiments.

[0126] It will be understood that all or some of the steps and systems disclosed in the above methods can be implemented as software, firmware, hardware and their appropriate combinations. Some physical components or all physical components can be implemented as software executed by a processor, such as a central processing unit, a digital signal processor or a microprocessor, or implemented as hardware, or implemented as an integrated circuit, such as an application specific integrated circuit. Such software can be distributed on a computer-readable medium, which can include a computer storage medium (or non-transitory medium) and a communication medium (or transitory medium). As is well known to those of ordinary skill in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information, such as computer-readable instructions, data structures, program modules or other data. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cassettes, tapes, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and can be accessed by a computer. In addition, it is well known to those of ordinary skill in the art that communication media typically contains computer-readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transmission mechanism, and can include any information delivery medium.

[0127] The above is a specific description of the preferred embodiment of the present invention, but the present invention is not limited to the described embodiment. Those skilled in the art can make various equivalent deformations or substitutions without departing from the spirit of the present invention, and these equivalent deformations or substitutions are all included in the scope defined by the claims of this application.

Claims

1. A task scheduling method, characterized in that: include: Obtain the computing core load and real-time task data within the system; The task real-time data includes resource demand data; Determine the initial system task scheduling according to the computing core load and the task real-time data; the initial system task scheduling includes task hierarchical results; Inputting the resource demand data and the task hierarchical result into the trained delay prediction model for calculation to obtain a delay prediction result; It is determined whether the delay prediction result of the task in the system meets the preset condition, and the initial system task scheduling is adjusted according to the result of the determination and the core load condition in the system to obtain the system task scheduling.

2. The method according to claim 1, characterized in that The determining of the initial system task scheduling according to the computing core load condition and the task real-time data includes: Dividing the computing cores in the system into a plurality of computing core groups based on the computing core load conditions; Based on the computational complexity and priority of the task real-time data, the tasks in the system are divided into a plurality of task layers; the number of the task layers is the same as the number of the computing core groups; Allocate a plurality of the task layers to a plurality of the computing core groups in a one-to-one correspondence.

3. The method according to claim 1, characterized in that The delay prediction model is trained in the following way: Acquire historical sample data of the system; the historical sample data includes historical resource demand data samples, historical task stratification result samples and historical delay result samples; Inputting the historical resource demand data samples and the historical task stratification result samples into the pre-delay prediction model for calculation to obtain sample training results; Calculate based on the historical delay result sample and the sample training result to obtain an error value; Obtaining preset parameters of the pre-delay prediction model; The preset parameters of the pre-delay prediction model are updated according to the error value and the error value is reacquired until the error value meets a preset threshold value, and a trained delay prediction model is obtained according to the update result.

4. The method according to claim 3, characterized in that The updating of the preset parameters according to the error value and the preset debugging function includes: Determining a debugging step of preset parameters of the pre-delay prediction model based on the error value; The preset parameters of the pre-delay prediction model are updated according to the debugging step size.

5. The method according to claim 1, characterized in that The initial system task scheduling also includes the correspondence between the tasks in the system and the computing cores; and adjusting the initial system task scheduling according to the judgment result and the core load condition in the system includes: If the judgment result is that the delay prediction result of the task is greater than or equal to the first preset threshold, adjusting the corresponding relationship between the task and the computing core; If the judgment result is that the delay prediction result of the task is less than the second preset threshold, the task hierarchical result of the task is adjusted.

6. The method according to claim 1, characterized in that The method further comprises: Determining the dependency relationship of tasks in the system based on the task hierarchical result and the delay prediction result; A directed acyclic graph is constructed based on the dependency relationship of the tasks in the system, and the execution order of the tasks in the system is adjusted according to the directed acyclic graph.

7. The method according to claim 6, characterized in that The directed acyclic graph is constructed by the following method: Representing tasks within the system as a number of nodes; Representing the dependencies of tasks in the system as a plurality of directed edges; Based on the plurality of nodes and the plurality of directed edges, the directed acyclic graph is constructed.

8. A task scheduling system, characterized in that: include: The first module is used to obtain the computing core load and real-time task data in the system; The task real-time data includes resource demand data; The second module is used to determine the initial system task scheduling according to the computing core load and the task real-time data; the initial system task scheduling includes the task layering result; The third module is used to input the resource demand data and the task hierarchical result into the trained delay prediction model for calculation to obtain the delay prediction result; The fourth module is used to determine whether the delay prediction result of the task in the system meets the preset conditions, and adjust the initial system task scheduling according to the judgment result and the core load situation in the system to obtain the system task scheduling.

9. A task scheduling device, characterized in that: include: at least one processor; at least one memory for storing at least one program; When the at least one program is executed by the at least one processor, the at least one processor implements the method according to any one of claims 1 to 7.

10. A computer-readable storage medium storing a program executable by a processor, characterized in that: The processor-executable program is used to perform the method according to any one of claims 1 to 7 when executed by the processor.

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