A CPU-GPU heterogeneous system workload dynamic allocation method and system

Abstract

The application relates to the technical field of memory management, in particular to a CPU-GPU heterogeneous system workload dynamic allocation method and system. The CPU-GPU heterogeneous system workload dynamic allocation method, a CPU performs preliminary analysis and preprocessing on task data, extracts key feature information of the task, and judges the task type; a PSO algorithm is realized by an FPGA chip, calculation is performed in combination with a task completion rate and a delay model, and an optimal CPU / GPU mapping ratio is found; a scheduling and allocation unit performs accurate allocation of the task between the CPU and the GPU according to the returned optimization result; and task completion conditions and delay data in an execution process are fed back to the FPGA chip, and real-time adjustment is performed on current PSO algorithm calculation. The CPU-GPU heterogeneous system workload dynamic allocation method and system can perform real-time adjustment on the workload according to dynamic characteristics of the task and real-time states of system resources, not only improves the utilization rate of system resources, but also greatly improves task processing efficiency.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of memory management, in particular to a CPU-GPU heterogeneous system workload dynamic allocation method and system. BACKGROUND

[0002] With the rapid development of technology, the complexity and scale of various computing tasks are growing explosively. In scientific research, such as climate simulation, molecular dynamics simulation, the amount of data and computation required is extremely large. If only relying on a single CPU or GPU to process, the efficiency is often low, and it cannot meet the needs of practical applications

[0003] In order to cope with the growing computing demand, CPU-GPU heterogeneous systems have emerged and been widely used. CPU has strong logical control and complex instruction processing capability, and is good at processing serial tasks and system management; while GPU has a highly parallel computing architecture, and shows great advantages in processing large-scale data parallel computing tasks. This heterogeneous system combines the strengths of both, and has become an important infrastructure in the field of modern computing. However, how to fully utilize the performance advantages of this heterogeneous system and achieve efficient allocation of tasks between CPU and GPU has become a key problem to be solved.

[0004] At present, in CPU-GPU heterogeneous systems, the task allocation method is mostly simple and static. Many applications use a fixed proportion of task allocation strategy, or only make a rough division according to the type of task, such as allocating all compute-intensive tasks to GPU, and allocating other tasks to CPU. This way does not fully consider the dynamic characteristics of tasks and the real-time state of system resources, and cannot adjust in real time according to these changes, resulting in low system resource utilization and prolonged task processing time.

[0005] Based on the above problems, the present application provides a CPU-GPU heterogeneous system workload dynamic allocation method and system. SUMMARY

[0006] The present application provides a simple and efficient CPU-GPU heterogeneous system workload dynamic allocation method and system to overcome the defects of the prior art.

[0007] The present application is realized by the following technical solutions:

[0008] A CPU-GPU heterogeneous system workload dynamic allocation method, characterized by comprising the following steps:

[0009] Step S1, task data preprocessing

[0010] After receiving the task data, the CPU performs preliminary parsing and preprocessing on the task data through the preprocessing unit, extracting key feature information of the task, including the amount of task data, task priority, and the current CPU and GPU load in the system; at the same time, it determines the task type.

[0011] Step S2: Data Transfer and PSO Algorithm Calculation

[0012] After preprocessing, the CPU transmits task-related data to the FPGA chip. After receiving the data, the FPGA chip uses its internal hardware logic to implement the PSO algorithm, and calculates the optimal CPU / GPU mapping ratio by combining the task completion rate and latency model.

[0013] In step S2, the FPGA chip evaluates the merits of different CPU / GPU mapping ratio schemes based on task completion rate and latency model.

[0014] The task completion rate is calculated by statistically analyzing the ratio of the number of tasks completed within a unit of time to the total number of tasks; the delay is obtained by recording the time difference between task submission and completion.

[0015] The PSO algorithm iteratively searches based on the evaluation results until it finds the optimal CPU / GPU mapping ratio.

[0016] In step S2, the PSO algorithm is implemented as follows:

[0017] Step S2.1: Initialize the particle swarm

[0018] First, determine the number of particles. Each particle represents a CPU-GPU load distribution ratio value, which ranges from 0 to 1. 0 means that all tasks are executed by the CPU, and 1 means that all tasks are executed by the GPU.

[0019] Initialize the velocity of each particle randomly, and the velocity determines the particle's movement direction and step size in the search space; set the initial position of each particle as its individual best position (pbest); assign random values ​​to the two parameters of task completion rate and delay, and calculate the fitness value at this time; find the position and fitness value with the best fitness among all particles, and set them as the global best position (gbest) and global best fitness.

[0020] Step S2.2: Construct the fitness function and calculate the fitness value (Fitness).

[0021] Taking into account both task completion rate and latency, construct the fitness function:

[0022] Fitness = ω1 × R + ω2 / log(L + 1)

[0023] Where R is the task completion rate, calculated using the following formula:

[0024] R = (N completed / N total ) / T

[0025] Where, N completed N represents the number of tasks completed after task execution time T, given the current CPU-GPU load distribution. total This represents the total number of tasks; the task completion count here is obtained through the CPU / GPU task execution record and monitoring unit.

[0026] L represents the delay time. The CPU task execution recording and monitoring unit and the GPU task execution recording and monitoring unit use timestamps to record the task submission time and the time to complete the task and obtain the result, and calculate the difference between the two to obtain the delay.

[0027] The calculation formula is as follows:

[0028] L=T result -T submit

[0029] Among them, T submit T represents the task submission time. result The time it takes to obtain the results;

[0030] ω1 and ω2 are weight coefficients, and ω1+ω2=1. The weight coefficients are customized according to the actual needs and characteristics of the task; the actual values ​​participating in the fitness function calculation are mapped according to the task type obtained by the CPU preprocessing unit.

[0031] Step S2.3: Update individual optimal and global optimal.

[0032] For each particle, its current fitness value is compared with its best fitness value. If the current fitness value is better, the best position (pbest) is updated to the current position and the best fitness value is updated to the current fitness value.

[0033] Then, compare the individual optimal fitness of all particles, find the best particle among them. If the individual optimal fitness of the found particle is better than the current global optimal fitness, then update the global optimal position (gbest) and the global optimal fitness.

[0034] Step S2.4: Update particle velocity and position

[0035] Update particle velocity according to the basic formula of the PSO algorithm:

[0036]

[0037] in, ω is the velocity of particle i in the (k+1)th iteration, and ω is the inertia weight with a value of 0.6. is the velocity of particle i in the k-th iteration; c1 and c2 are learning factors, both taking a value of 1.5; r1 and r2 are random numbers with values ​​greater than or equal to 0 and a sum less than or equal to 1, pbest i It is the optimal position of particle i. is the position of particle i in the kth iteration, and gbest is the globally optimal position;

[0038] Update particle positions based on the updated velocity:

[0039]

[0040] Values ​​exceeding 1 are set to 1, and values ​​less than 0 are set to 0.

[0041] Step S2.5: Determine the termination condition

[0042] Determine if the fitness value has converged, i.e., if the change in the global optimal fitness value is less than a custom threshold (a very small threshold, such as 0.001) in multiple consecutive iterations. If the convergence condition is met, terminate the algorithm and output the optimization result.

[0043] Step S3: Task Assignment and Execution

[0044] After the FPGA chip calculates the optimized CPU / GPU mapping ratio, it returns the result to the scheduling and allocation unit in the CPU; the scheduling and allocation unit then performs precise task allocation between the CPU and GPU based on the returned optimization result.

[0045] For tasks assigned to the CPU, the CPU processes them according to its own execution logic and scheduling policy;

[0046] For tasks assigned to the GPU, the CPU sends the task data and related instructions to the GPU; after receiving the task, the GPU allocates the task appropriately to idle SMs (streaming multiprocessors) and uses its parallel computing capabilities to execute the task efficiently.

[0047] In step S3, during task execution, the CPU task execution recording and monitoring unit and the GPU task execution recording and monitoring unit record the execution status of the task in the CPU and GPU in real time, including the amount of completed tasks and the current task execution progress, and monitor the latency during task execution, including data transmission latency and computation latency.

[0048] Step S4, Feedback and Adjustment

[0049] The CPU task execution recording and monitoring unit and the GPU task execution recording and monitoring unit feed back the task completion status and latency data during the execution process to the FPGA chip. After receiving the feedback data, the FPGA chip makes real-time adjustments to the current PSO algorithm calculation.

[0050] If the current CPU / GPU mapping ratio is found to result in a low task completion rate or excessive latency, the FPGA chip will adjust the search direction of the PSO algorithm, recalculate a better CPU / GPU mapping ratio, and then return the result to the CPU for task allocation adjustment. This process is repeated to achieve dynamic optimization of the system.

[0051] A CPU-GPU heterogeneous system for dynamic workload allocation includes a CPU-GPU heterogeneous system and an FPGA chip;

[0052] The CPU system includes a preprocessing unit, a CPU task execution recording and monitoring unit, and a scheduling and allocation unit.

[0053] The preprocessing unit is responsible for performing preliminary parsing and preprocessing of the task data after the CPU receives the task data, extracting key feature information of the task, including the amount of task data, task priority, and the current CPU and GPU load in the system, and determining the task type.

[0054] The CPU task execution recording and monitoring unit is responsible for recording the execution status of tasks in the CPU in real time during task execution, including the amount of tasks completed and the current execution progress of tasks, and monitoring the latency during task execution, including data transmission latency and computation latency.

[0055] The scheduling and allocation unit, based on the optimized CPU / GPU mapping ratio calculated by the FPGA chip, achieves precise allocation of tasks between the CPU and GPU.

[0056] The GPU system includes a GPU task execution recording and monitoring unit;

[0057] The GPU task execution recording and monitoring unit is responsible for recording the execution status of tasks in the GPU in real time during task execution, including the amount of completed tasks and the current task execution progress, and monitoring the latency during task execution, including data transmission latency and computation latency.

[0058] The FPGA chip has a PSO algorithm hardware acceleration module, which includes a data storage unit, a computing unit, and an iteration count controller.

[0059] The data storage unit is responsible for storing particle information, task information, and intermediate result information;

[0060] In the PSO algorithm, each particle represents a CPU / GPU mapping ratio. The example information includes the current position value, velocity value, and individual best position (pbest) and its corresponding fitness value. The particle's current position is the corresponding CPU / GPU mapping ratio value, which ranges from 0 to 1. The velocity value determines the particle's movement direction and step size in the search space.

[0061] The data storage unit uses a register file to store particle information. The task information includes the total number of tasks, the number of tasks completed, and the task type information.

[0062] The data storage unit uses random access memory (RAM) to store task information.

[0063] The intermediate result information is generated during the calculation process of the PSO algorithm.

[0064] The data storage unit uses a First-In-First-Out (FI) queue (FO) to store intermediate result information.

[0065] The computing unit is responsible for updating particle velocity and position according to the PSO algorithm formula. At the same time, based on task completion rate and latency data, it calculates fitness value, provides core computing support for the iteration of the PSO algorithm, and finds the optimal CPU / GPU mapping ratio.

[0066] A CPU-GPU heterogeneous system workload dynamic allocation device, characterized in that it comprises:

[0067] One or more processors, one or more memories, and one or more programs, wherein the one or more programs are stored in the one or more memories and configured to be executed by the one or more processors, and the one or more programs include instructions for performing any of the methods described above.

[0068] A readable storage medium, characterized in that: a computer program is stored on the readable storage medium, and the computer program, when executed by a processor, implements the method described above.

[0069] The beneficial effects of this invention are: the CPU-GPU heterogeneous system workload dynamic allocation method and system can adjust the workload in real time according to the dynamic characteristics of the task and the real-time status of system resources, which not only improves the utilization rate of system resources, but also greatly improves the task processing efficiency. Attached Figure Description

[0070] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0071] Appendix Figure 1 This is a schematic diagram of the CPU-GPU heterogeneous system workload dynamic allocation system architecture of the present invention.

[0072] Appendix Figure 2 This is a schematic diagram of the PSO hardware acceleration method of the present invention. Detailed Implementation

[0073] To enable those skilled in the art to better understand the technical solutions of this invention, the technical solutions in the embodiments of this invention will be clearly and completely described below in conjunction with the embodiments of this invention. Obviously, the described embodiments are merely some embodiments of this invention, and not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this invention.

[0074] The method for dynamically allocating workloads in a CPU-GPU heterogeneous system includes the following steps:

[0075] Step S1: Task Data Preprocessing

[0076] After receiving the task data, the CPU performs preliminary parsing and preprocessing on the task data through the preprocessing unit, extracting key feature information of the task, including the amount of task data, task priority, and the current CPU and GPU load in the system; at the same time, it determines the task type (whether it is computationally intensive, data-intensive, or other types).

[0077] Step S2: Data Transfer and PSO Algorithm Calculation

[0078] After preprocessing, the CPU transmits task-related data to the FPGA chip. After receiving the data, the FPGA chip uses its internal hardware logic to implement the PSO algorithm, and calculates the optimal CPU / GPU mapping ratio by combining the task completion rate and latency model.

[0079] In step S2, the FPGA chip evaluates the merits of different CPU / GPU mapping ratio schemes based on task completion rate and latency model.

[0080] The task completion rate is calculated by statistically analyzing the ratio of the number of tasks completed within a unit of time to the total number of tasks; the delay is obtained by recording the time difference between task submission and completion.

[0081] The PSO algorithm iteratively searches based on the evaluation results until it finds the optimal CPU / GPU mapping ratio.

[0082] In step S2, the PSO algorithm is implemented as follows:

[0083] Step S2.1: Initialize the particle swarm

[0084] First, determine the number of particles. Each particle represents a CPU-GPU load distribution ratio value, which ranges from 0 to 1. 0 means that all tasks are executed by the CPU, and 1 means that all tasks are executed by the GPU.

[0085] Initialize the velocity of each particle randomly, and the velocity determines the particle's movement direction and step size in the search space; set the initial position of each particle as its individual best position (pbest); assign random values ​​to the two parameters of task completion rate and delay, and calculate the fitness value at this time; find the position and fitness value with the best fitness among all particles, and set them as the global best position (gbest) and global best fitness.

[0086] Step S2.2: Construct the fitness function and calculate the fitness value (Fitness).

[0087] Taking into account both task completion rate and latency, construct the fitness function:

[0088] Fitness = ω1 × R + ω2 / log(L + 1)

[0089] Where R is the task completion rate, calculated using the following formula:

[0090] R = (N completed / N total ) / T

[0091] Where, N completed N represents the number of tasks completed after task execution time T, given the current CPU-GPU load distribution. total This represents the total number of tasks.

[0092] L represents the delay time. The CPU task execution recording and monitoring unit and the GPU task execution recording and monitoring unit use timestamps to record the task submission time and the time to complete the task and obtain the result, and calculate the difference between the two to obtain the delay.

[0093] The calculation formula is as follows:

[0094] L=Tresult -T submit

[0095] Among them, T submit T represents the task submission time. result The time it takes to obtain the results;

[0096] ω1 and ω2 are weight coefficients, and ω1+ω2=1. The weight coefficients are customized according to the actual needs and characteristics of the task; the actual values ​​participating in the fitness function calculation are mapped according to the task type obtained by the CPU preprocessing unit.

[0097] For tasks with extremely high real-time requirements, (ω1,ω2)=(0.3,0.7) is used to emphasize the importance of latency;

[0098] For batch processing tasks, (ω1,ω2)=(0.8,0.2) is used to emphasize the importance of task completion rate.

[0099] Step S2.3: Update individual optimal and global optimal.

[0100] For each particle, its current fitness value is compared with its best fitness value. If the current fitness value is better, the best position (pbest) is updated to the current position and the best fitness value is updated to the current fitness value.

[0101] Then, compare the individual optimal fitness of all particles, find the best particle among them. If the individual optimal fitness of the found particle is better than the current global optimal fitness, then update the global optimal position (gbest) and the global optimal fitness.

[0102] Step S2.4: Update particle velocity and position

[0103] Update particle velocity according to the basic formula of the PSO algorithm:

[0104]

[0105] in, ω is the velocity of particle i in the (k+1)th iteration, and ω is the inertia weight with a value of 0.6. is the velocity of particle i in the k-th iteration; c1 and c2 are learning factors, both taking a value of 1.5; r1 and r2 are random numbers with values ​​greater than or equal to 0 and a sum less than or equal to 1, pbest i It is the optimal position of particle i. is the position of particle i in the kth iteration, and gbest is the globally optimal position;

[0106] Update particle positions based on the updated velocity:

[0107]

[0108] Values ​​exceeding 1 are set to 1, and values ​​less than 0 are set to 0.

[0109] Step S2.5: Determine the termination condition

[0110] Determine if the fitness value has converged, i.e., if the change in the global optimal fitness value is less than a custom threshold (a very small threshold, such as 0.001) in multiple consecutive iterations. If the convergence condition is met, terminate the algorithm and output the optimization result.

[0111] Step S3: Task Assignment and Execution

[0112] After the FPGA chip calculates the optimized CPU / GPU mapping ratio, it returns the result to the scheduling and allocation unit in the CPU; the scheduling and allocation unit then performs precise task allocation between the CPU and GPU based on the returned optimization result.

[0113] For tasks assigned to the CPU, the CPU processes them according to its own execution logic and scheduling policy;

[0114] For tasks assigned to the GPU, the CPU sends the task data and related instructions to the GPU; after receiving the task, the GPU allocates the task appropriately to idle SMs (streaming multiprocessors) and uses its parallel computing capabilities to execute the task efficiently.

[0115] In step S3, during task execution, the CPU task execution recording and monitoring unit and the GPU task execution recording and monitoring unit record the execution status of the task in the CPU and GPU in real time, including the amount of completed tasks and the current task execution progress, and monitor the latency during task execution, including data transmission latency and computation latency.

[0116] Step S4, Feedback and Adjustment

[0117] The CPU task execution recording and monitoring unit and the GPU task execution recording and monitoring unit feed back the task completion status and latency data during the execution process to the FPGA chip. After receiving the feedback data, the FPGA chip makes real-time adjustments to the current PSO algorithm calculation.

[0118] If the current CPU / GPU mapping ratio is found to result in a low task completion rate or excessive latency, the FPGA chip will adjust the search direction of the PSO algorithm, recalculate a better CPU / GPU mapping ratio, and then return the result to the CPU for task allocation adjustment. This process is repeated to achieve dynamic optimization of the system.

[0119] This CPU-GPU heterogeneous system's workload dynamic allocation system includes a CPU-GPU heterogeneous system and an FPGA chip;

[0120] As the control core of the system, the CPU is responsible for handling system-level management tasks, logical judgments, and some serial computing tasks. It has powerful complex instruction execution capabilities and good logical control capabilities. The CPU system includes a preprocessing unit, a CPU task execution recording and monitoring unit, and a scheduling and allocation unit.

[0121] The preprocessing unit is responsible for performing preliminary parsing and preprocessing of the task data after the CPU receives the task data, extracting key feature information of the task, including the amount of task data, task priority, and the current CPU and GPU load in the system, and determining the task type (whether it is computationally intensive, data-intensive, or other types).

[0122] The CPU task execution recording and monitoring unit is responsible for recording the execution status of tasks in the CPU in real time during task execution, including the amount of tasks completed and the current execution progress of tasks, and monitoring the latency during task execution, including data transmission latency and computation latency.

[0123] The scheduling and allocation unit, based on the optimized CPU / GPU mapping ratio calculated by the FPGA chip, achieves precise allocation of tasks between the CPU and GPU.

[0124] GPUs focus on large-scale data parallel computing tasks. With their numerous computing cores and highly parallel architecture, they can efficiently handle computationally intensive tasks. GPU systems are equipped with GPU task execution recording and monitoring units.

[0125] The GPU task execution recording and monitoring unit is responsible for recording the execution status of tasks in the GPU in real time during task execution, including the amount of completed tasks and the current task execution progress, and monitoring the latency during task execution, including data transmission latency and computation latency.

[0126] FPGA chips play a crucial role in accelerating and flexibly allocating resources. They can accelerate the execution of specific algorithms through hardware programming, and play an important role in optimizing task allocation between the CPU and GPU. The FPGA chip has a PSO algorithm hardware acceleration module, which includes a data storage unit, a computing unit, and an iteration count controller.

[0127] The data storage unit is responsible for storing particle information, task information, and intermediate result information;

[0128] In the PSO algorithm, each particle represents a CPU / GPU mapping ratio. The example information includes the current position value, velocity value, and individual best position (pbest) and its corresponding fitness value. The particle's current position is the corresponding CPU / GPU mapping ratio value, which ranges from 0 to 1. The velocity value determines the particle's movement direction and step size in the search space.

[0129] The aforementioned particle information is crucial for particle updates and algorithm convergence.

[0130] The data storage unit uses a register file to store particle information. Register files are characterized by high-speed read / write operations, making them suitable for frequently accessed data storage.

[0131] The task information includes the total number of tasks, the number of tasks completed, and the type of tasks.

[0132] The task completion rate is calculated using the total number of tasks and the number of tasks completed. Tasks are categorized as either computationally intensive or data-intensive.

[0133] The data storage unit uses random access memory (RAM) to store task information.

[0134] The intermediate result information is generated during the calculation process of the PSO algorithm.

[0135] The data storage unit uses a First-In-First-Out (FIFO) queue to store intermediate results. FIFO is suitable for scenarios where data is processed sequentially, ensuring the order of data processing.

[0136] The computing unit is responsible for updating particle velocity and position according to the PSO algorithm formula. At the same time, based on task completion rate and latency data, it calculates fitness value, provides core computing support for the iteration of the PSO algorithm, and finds the optimal CPU / GPU mapping ratio.

[0137] During the calculation process, the PSO algorithm hardware acceleration module coordinates the data transmission order between the data storage unit and the computation unit. When calculating particle velocity updates, it is necessary to first read data such as the particle's current position, velocity, individual optimal position, and global optimal position from the data storage unit, and then input this data into the computation unit in the calculation order. After the calculation is completed, the control unit controls the writing of the newly calculated velocity and position values ​​back to the corresponding locations in the data storage unit. Similarly, when calculating the fitness value, task-related data and intermediate results need to be read in a similar order, and after the calculation is completed, the fitness value is stored in the data storage unit for subsequent comparison and update operations.

[0138] The CPU-GPU heterogeneous system workload dynamic allocation device includes:

[0139] One or more processors, one or more memories, and one or more programs, wherein the one or more programs are stored in the one or more memories and configured to be executed by the one or more processors, and the one or more programs include instructions for performing the methods in any of the above methods.

[0140] The readable storage medium stores a computer program that, when executed by a processor, implements the method described above.

[0141] The embodiments described above are merely one specific implementation of the present invention. Ordinary changes and substitutions made by those skilled in the art within the scope of the technical solution of the present invention should be included within the protection scope of the present invention.

Claims

1. A CPU-GPU heterogeneous system workload dynamic allocation method, characterized by: Step S1, task data preprocessing After receiving the task data, the CPU performs preliminary analysis and preprocessing of the task data through the preprocessing unit, extracts the key feature information of the task, including the task data volume, task priority, and the load of the CPU and GPU in the current system; and determines the task type; Step S2, data transfer and PSO algorithm calculation After preprocessing, the CPU transfers the data related to the task to the FPGA chip, and the FPGA chip receives the data and implements the PSO algorithm using its internal hardware logic, calculates in combination with the task completion rate and delay model, and finds the optimal CPU-GPU mapping ratio; Step S3, task allocation and execution After the FPGA chip calculates the optimized CPU-GPU mapping ratio, the result is returned to the scheduling and allocation unit in the CPU; the scheduling and allocation unit allocates the task accurately between the CPU and the GPU according to the returned optimization result; For tasks allocated to the CPU, the CPU processes them according to its own execution logic and scheduling strategy; For tasks allocated to the GPU, the CPU sends the task data and related instructions to the GPU; after receiving the task, the GPU allocates it reasonably to the idle stream multiprocessor SM, and efficiently executes the task using its high parallel computing power; Step S4, feedback and adjustment The CPU task execution record and monitoring unit and the GPU task execution record and monitoring unit feed back the task completion and delay data in the execution process to the FPGA chip, and the FPGA chip adjusts the current PSO algorithm calculation in real time after receiving the feedback data; If it is found that the current CPU-GPU mapping ratio results in a low task completion rate or excessively high delay, the FPGA chip will adjust the search direction of the PSO algorithm, recalculate a more optimal CPU-GPU mapping ratio, and then return the result to the CPU for adjustment of task allocation, and so on, to realize dynamic optimization of the system.

2. The method of claim 1, wherein: In step S2, the FPGA chip evaluates the pros and cons of different CPU-GPU mapping ratio schemes according to the task completion rate and delay model; Wherein, the task completion rate is calculated by counting the proportion of the number of tasks completed in a unit of time to the total number of tasks; the delay is obtained by recording the time difference from task submission to completion; The PSO algorithm iteratively searches according to the evaluation results until the optimal CPU-GPU mapping ratio is found.

3. The CPU-GPU heterogeneous system workload dynamic allocation method according to claim 2, characterized by: In step S2, the PSO algorithm implementation process is as follows: Step S2.1, initialize the particle swarm First, determine the number of particles, each particle represents a CPU-GPU load allocation ratio value, the value range is between 0 and 1, 0 means all tasks are executed by the CPU, and 1 means all tasks are executed by the GPU; Randomly initialize the velocity of each particle, which determines the moving direction and step length of the particle in the search space; set the initial position of each particle as its individual optimal position pbest; meanwhile, assign random values to the two parameters of task completion rate and delay, and calculate the fitness value at this time; find the optimal position and fitness value among all particles, and set them as the global optimal position gbest and global optimal fitness; Step S2.2, construct a fitness function to calculate the fitness value Fitness; Considering the task completion rate and delay, the fitness function is constructed as follows: Fitness = ω1 * R + ω2 / log(L + 1) where R is the task completion rate, and the calculation formula is as follows: R = (N completed / N total ) / T where N completed is the number of tasks completed after a task execution time T under the current CPU-GPU load distribution ratio, N total is the total number of tasks; L is the delay time, and the CPU task execution record and monitoring unit and the GPU task execution record and monitoring unit record the task submission time and the time when the task result is obtained using the time stamp, and the delay is obtained by calculating the difference between the two; The calculation formula is as follows: L = T result -T submit where T submit is the task submission time, T result is the time to get the result; ω1 and ω2 are weight coefficients, and ω1 + ω2 = 1, the weight coefficients are adjusted according to the actual demand and characteristics of the task; the task type obtained by the CPU preprocessing unit is mapped to the actual value participating in the fitness function calculation; Step S2.3, update the individual optimal and global optimal For each particle, compare its current fitness value with the individual optimal fitness, if the current fitness is better, update the individual optimal position pbest to the current position and the individual optimal fitness to the current fitness value; Then, compare the individual optimal fitness of all particles, find the optimal particle, if the individual optimal fitness of the found particle is better than the current global optimal fitness, update the global optimal position gbest and the global optimal fitness; Step S2.4, update the particle velocity and position Update the particle velocity according to the basic formula of PSO algorithm: wherein, is the velocity of particle i at the k+1th iteration, ω is the inertia weight taking value 0.6, is the velocity of particle i at the kth iteration; c1 and c2 are learning factors, both taking value 1.5; r1 and r2 are random numbers taking value greater than or equal to 0 and less than or equal to 1, pbest i is the individual optimal position of particle i, is the position of particle i at the kth iteration, gbest is the global optimal position; Update the particle position according to the updated velocity: Set the value greater than 1 to 1, and the value less than 0 to 0; Step S2.5, judge the termination condition Judge whether the fitness value converges, that is, the change of the global optimal fitness value in continuous iterations is less than a self-defined threshold, if the convergence condition is met, terminate the algorithm and output the optimization result.

4. The method of claim 1, wherein: In step S3, during the task execution, the CPU task execution record and monitoring unit and the GPU task execution record and monitoring unit record the execution of the tasks in the CPU and GPU respectively in real time, including the amount of completed tasks and the execution progress of the current task, and monitor the delay during the task execution, including data transmission delay and calculation delay.

5. A CPU-GPU heterogeneous system workload dynamic allocation system, characterized in that: It includes a CPU-GPU heterogeneous system and an FPGA chip; The CPU system is provided with a preprocessing unit, a CPU task execution record and monitoring unit, and a scheduling and distribution unit; The preprocessing unit is responsible for preliminary analysis and preprocessing of the task data received by the CPU, extracting the key feature information of the task, including the task data volume, the task priority, and the load of the CPU and GPU in the current system, and determining the task type; The CPU task execution record and monitoring unit is responsible for recording the execution of tasks in the CPU in real time during task execution, including the amount of completed tasks and the execution progress of the current task, and monitoring the delay during task execution, including data transmission delay and calculation delay. The scheduling and allocation unit is responsible for realizing the accurate allocation of tasks between the CPU and the GPU according to the optimized CPU-GPU mapping ratio calculated by the FPGA chip. The GPU system is provided with a GPU task execution record and monitoring unit. The GPU task execution record and monitoring unit is responsible for recording the execution of tasks in the GPU in real time during task execution, including the amount of completed tasks and the execution progress of the current task, and monitoring the delay during task execution, including data transmission delay and calculation delay. The FPGA chip is provided with a PSO algorithm hardware acceleration module, which includes a data storage unit, a calculation unit and an iteration number controller. The data storage unit is responsible for storing particle information, task information and intermediate result information. Each particle represents a CPU-GPU mapping ratio in the PSO algorithm, and the particle information includes a current position value, a speed value and an individual optimal position pbest and its corresponding fitness value; wherein the current position of the particle corresponds to the CPU-GPU mapping ratio value, which ranges between 0 and 1; the speed value determines the moving direction and step length of the particle in the search space. The task information includes the total task amount, the completed task amount and the type information of the task. The intermediate result information is the intermediate result generated in the calculation process of the PSO algorithm. The calculation unit is responsible for updating and calculating the particle speed and position according to the PSO algorithm formula, and completing the calculation of the fitness value based on the task completion rate and the delay data, providing core operation support for the iteration of the PSO algorithm, and finding the optimal CPU-GPU mapping ratio.

6. The CPU-GPU heterogeneous system workload dynamic allocation system of claim 5, wherein: The data storage unit uses a register file to store particle information.

7. The CPU-GPU heterogeneous system workload dynamic allocation system of claim 5, wherein: The data storage unit uses a random access memory (RAM) to store task information.

8. The CPU-GPU heterogeneous system workload dynamic allocation system of claim 5, wherein: The data storage unit uses a FIFO first-in-first-out queue to store intermediate result information.

9. A CPU-GPU heterogeneous system workload dynamic allocation device, characterized in that: One or more processors, one or more memories and one or more programs, wherein the one or more programs are stored in the one or more memories and configured to be executed by the one or more processors, and the one or more programs include instructions for executing the method according to any one of claims 1 to 4. The computer program is stored on the readable storage medium, and the computer program is executed by the processor to realize the method according to any one of claims 1 to 4.

10. A readable storage medium characterized by: ​

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