Satellite high-speed data transmission method, system and equipment based on Ethernet interface

Abstract

The invention relates to a satellite high-speed data transmission method, system and device based on an Ethernet interface. The method comprises the steps that data output by a load of a satellite platform is transmitted to a high-speed data transmission module through an Ethernet interface group, and meanwhile control information output by satellite service of the satellite platform is in two-way communication linkage with the high-speed data transmission module through a low-speed interface group. The high-speed data transmission module comprises a core operation processing unit, a monitoring processor and a clock circuit. And in the core operation processing unit, the satellite signals are subjected to operation processing according to the data and the control information, and abnormal problems in the whole operation processing process are processed through the monitoring processor, so that the transmission time interval of the satellite signals in the clock circuit is compressed. By adopting the method, the flexibility and stability of satellite high-speed data transmission can be improved.

Description

Technical Field

[0001] This application relates to the field of satellite high-speed data transmission technology, and in particular, to a satellite high-speed data transmission method, system, and device based on an Ethernet interface. Background Art

[0002] With the rise of emerging technologies such as 5G and the Internet of Things, unprecedented high requirements have been put forward for the data transmission efficiency and stability of satellite communication. High-resolution earth observation satellites need to transmit a large amount of high-definition image data in real time, and low-earth orbit satellite constellations need to ensure stable connections for a large number of user devices globally. These application scenarios urgently require a qualitative leap in satellite communication technology.

[0003] In the construction of data transmission links in traditional satellite communication technology, a relatively simple architecture model is generally adopted. Data transmission relies on simple interfaces and basic processing modules, and payload data and control information are transmitted through a unified low-speed transmission interface without distinction. Commonly used interfaces inside satellites include RS485 interface, asynchronous RS422 interface, synchronous RS422 interface, CAN bus interface, OC instruction interface, etc. These interfaces have the disadvantages of low communication rate and poor scalability, resulting in the inability of the unified low-speed transmission interface to meet the requirements of fast transmission of large amounts of data. For example, when transmitting high-definition images and a large amount of scientific research data, the transmission time is long, seriously affecting the timeliness of data. In addition, satellite signals cannot be accurately processed according to complex and changeable data and control information, making the signals extremely vulnerable to interference during transmission, with a high data loss and error rate. Moreover, the coupling degree between various parts is high, and when the system needs to be functionally extended or upgraded, a series of chain reactions will be triggered, resulting in poor system scalability. Summary of the Invention

[0004] Based on this, in view of the above technical problems, it is necessary to provide a satellite high-speed data transmission method, system, and device based on an Ethernet interface that can improve the flexibility and stability of satellite communication high-speed data transmission.

[0005] A satellite high-speed data transmission method based on an Ethernet interface, the method includes:

[0006] Data output by the payload of the satellite platform is transmitted to the high-speed data transmission module through an Ethernet interface group. At the same time, the control information output by the satellite platform's on-board services communicates bidirectionally with the high-speed data transmission module through a low-speed interface group.

[0007] The high-speed data transmission module includes: a core operation processing unit, a monitoring processor, and a clock circuit.

[0008] Within the core operation processing unit, satellite signals are processed based on data and control information, and the monitoring processor is used to handle abnormal problems during the entire operation processing to compress the time interval for satellite signals to be transmitted in the clock circuit.

[0009] A satellite high-speed data transmission system based on an Ethernet interface, the system comprising:

[0010] A sub-speed transmission subsystem for transmitting data output by the payload of the satellite platform to the high-speed data transmission module through an Ethernet interface group. At the same time, the control information output by the satellite bus of the satellite platform communicates bidirectionally with the high-speed data transmission module through a low-speed interface group.

[0011] The high-speed data transmission subsystem includes: a core operation processing unit, a monitoring processor, and a clock circuit. It is used to perform operation processing on satellite signals within the core operation processing unit, and handle abnormal problems during the entire operation processing through the monitoring processor to compress the time interval for satellite signals to be transmitted in the clock circuit.

[0012] A computer device, including a memory and a processor, where the memory stores a computer program, and when the processor executes the computer program, the following steps are implemented:

[0013] Data output by the payload of the satellite platform is transmitted to the high-speed data transmission module through an Ethernet interface group. At the same time, the control information output by the satellite bus of the satellite platform communicates bidirectionally with the high-speed data transmission module through a low-speed interface group.

[0014] The high-speed data transmission module includes: a core operation processing unit, a monitoring processor, and a clock circuit.

[0015] Within the core operation processing unit, satellite signals are processed based on data and control information, and the monitoring processor is used to handle abnormal problems during the entire operation processing to compress the time interval for satellite signals to be transmitted in the clock circuit.

[0016] A computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:

[0017] Data output by the payload of the satellite platform is transmitted to the high-speed data transmission module through an Ethernet interface group. At the same time, the control information output by the satellite bus of the satellite platform communicates bidirectionally with the high-speed data transmission module through a low-speed interface group.

[0018] The high-speed data transmission module includes: a core operation processing unit, a monitoring processor, and a clock circuit.

[0019] Within the core operation processing unit, satellite signals are processed based on data and control information, and the monitoring processor handles abnormal problems during the entire operation processing to compress the time interval of satellite signal transmission in the clock circuit.

[0020] The above satellite high-speed data transmission method, system, and device based on an Ethernet interface. First, the payload output data of the satellite platform is transmitted to the high-speed data transmission module in a high-speed and stable manner through the Ethernet interface group. At the same time, the satellite platform's on-board service output control information establishes a two-way communication link with the high-speed data transmission module through the low-speed interface group to ensure the accurate interaction of control instructions. This design not only optimizes the transmission path of data and control information but also lays the foundation for subsequent high-speed and stable communication. Second, inside the high-speed data transmission module, advanced technical modules are integrated. Among them, the core operation processing unit plays a central role. It precisely processes satellite signals based on the received data and control information. The monitoring processor is like a loyal guard, constantly monitoring the entire operation processing process. Once an abnormal problem occurs, it can quickly respond and handle it. It is worth mentioning that the use of the clock circuit greatly compresses the time interval of satellite signal transmission, further improving the communication rate. According to signal transmission theory, shortening the signal transmission time interval can improve the communication rate. The clock circuit effectively compresses the time interval of satellite signal transmission through precise timing control to achieve high-speed communication. In summary, this modular design makes the functions of each module relatively independent. When the system needs to expand functions, only targeted modules need to be upgraded or added, reducing the system expansion difficulty and improving scalability. At the same time, the modular design also reduces the overall difficulty of product development. Each module can be independently developed and tested, reducing the complexity and coupling degree during the development process. Brief Description of the Drawings

[0021] Figure 1 It is a schematic diagram of the application architecture of the satellite high-speed data transmission method based on an Ethernet interface in an embodiment;

[0022] Figure 2 It is a schematic diagram of the process of the satellite high-speed data transmission method based on an Ethernet interface in an embodiment;

[0023] Figure 3 It is a schematic diagram of the process of the satellite high-speed data transmission data stream based on an Ethernet interface in an embodiment;

[0024] Figure 4 It is a block diagram of the structure of the satellite high-speed data transmission system based on an Ethernet interface in an embodiment;

[0025] Figure 5 It is an internal structure diagram of a computer device in an embodiment. Detailed Embodiment

[0026] In order to make the objectives, technical solutions and advantages of this application more clear and understandable, the following further elaborates on this application in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely used to explain this application and are not used to limit this application.

[0027] The satellite high-speed data transmission method based on an Ethernet interface provided by this application can be applied to an application architecture as shown in Figure 1 the figure. It includes a power supply circuit, an FPGA circuit, an Ethernet interface A, an Ethernet interface B, a CAN bus interface A, a CAN bus interface B, a DDR3 memory, a monitoring ADC, a Flash memory, a monitoring processor, a clock circuit, a high-speed DAC circuit, and a data transmission radio frequency module.

[0028] The power supply circuit is used to supply power to the entire satellite high-speed data transmission module. The power supply circuit converts the voltage output by the satellite platform into the voltage required inside the high-speed data transmission module for internal use.

[0029] The FPGA is the core arithmetic processing unit of satellite high-speed data transmission. The FPGA is used for data reception, data processing, communication algorithm operation, signal encoding and modulation, etc. The FPGA can achieve parallel computing of a large amount of data, and different processing tasks can run independently without affecting each other logically. When the FPGA executes arithmetic tasks, it can achieve very low latency.

[0030] The Ethernet interface A is used to communicate with the satellite platform. It can receive data from the satellite platform and also send data to the satellite platform.

[0031] The Ethernet interface B is the same as the Ethernet interface A and is used as a backup design to improve reliability. As a part of a spacecraft, the satellite module product must meet reliability requirements in design.

[0032] The CAN bus interface A is used to communicate with the satellite platform to bidirectionally transmit some low-speed data and instructions.

[0033] The CAN bus interface B is the same as the CAN bus interface A and is used as a backup design to improve reliability. As a part of a spacecraft, the satellite module product must meet reliability requirements in design.

[0034] The DDR3 serves as the operation memory of the FPGA and is used to store some necessary data when the FPGA performs arithmetic processing.

[0035] The monitoring ADC is a low-speed ADC and is used to monitor various analog quantities such as voltage, current, and operating temperature of satellite high-speed data transmission.

[0036] The Flash memory is used for data and program storage.

[0037] The monitoring processor is used to monitor the operating status of the entire high-speed data transmission and handle exceptions and faults.

[0038] The clock circuit provides the clock required for the operation of the entire high-speed data transmission. The clock circuit has three outputs, which are respectively connected to the FPGA, the monitoring processor, and the high-speed DAC.

[0039] The high-speed DAC is used to convert the digital signal output by the FPGA into the analog signal required by the data transmission radio frequency module.

[0040] The data transmission radio frequency module is used for frequency conversion modulation of signals.

[0041] The antenna is used to transmit the modulated signal to the ground.

[0042] In one embodiment, as Figure 2 shown, a satellite high-speed data transmission method based on an Ethernet interface is provided. Taking the application architecture in Figure 1 as an example, the method includes the following steps:

[0043] Step 202, the data output by the payload of the satellite platform is transmitted to the high-speed data transmission module through the Ethernet interface group. At the same time, the control information output by the satellite platform's on-board services communicates bidirectionally with the high-speed data transmission module through the low-speed interface group.

[0044] Step 204, in the core operation processing unit, the satellite signal is processed according to the data and control information, and the monitoring processor is used to handle the exceptions during the entire operation processing process to compress the time interval of the satellite signal transmission in the clock circuit.

[0045] The high-speed data transmission module includes: a core operation processing unit, a monitoring processor, and a clock circuit.

[0046] In the above satellite high-speed data transmission method based on Ethernet interfaces, first, the data output by the payload of the satellite platform is transmitted to the high-speed data transmission module in a high-speed and stable manner through the Ethernet interface group. At the same time, the satellite platform's on-board output control information establishes a two-way communication link with the high-speed data transmission module through the low-speed interface group to ensure the accurate interaction of control instructions. This design not only optimizes the transmission paths of data and control information but also lays a foundation for subsequent high-speed and stable communication. Secondly, inside the high-speed data transmission module, advanced technical modules are integrated. Among them, the core operation processing unit plays a core role. It performs precise operation processing on satellite signals based on the received data and control information. The monitoring processor is like a loyal guard, constantly monitoring the entire operation processing process. Once an abnormal problem occurs, it can quickly respond and handle it. It is worth mentioning that the use of the clock circuit greatly compresses the time interval of satellite signal transmission, further improving the communication rate. According to signal transmission theory, shortening the signal transmission time interval can improve the communication rate. The clock circuit effectively compresses the time interval of satellite signal transmission through precise timing control to achieve high-speed communication. In summary, this modular design makes the functions of each module relatively independent. When the system needs to expand its functions, only targeted upgrades or additions of modules are required, reducing the difficulty of system expansion and improving scalability. At the same time, the modular design also reduces the overall difficulty of product development. Each module can be independently developed and tested, reducing the complexity and coupling degree in the development process.

[0047] In one embodiment, the core operation processing unit, the monitoring processor, and the high-speed digital-to-analog converter respectively serve as output connection modules of the clock circuit, and the output connection modules are arranged in parallel.

[0048] In one embodiment, the high-speed data transmission module further includes: a monitoring analog-to-digital converter, a high-speed random access memory, a Flash memory group, and a data transmission radio frequency module. The monitoring analog-to-digital converter is used to monitor the operating state of the data transmitted through the Ethernet interface group in the high-speed data transmission module and handle faults for abnormal states in the operating state. The high-speed random access memory is used as the operation memory of the core operation processing unit to access the data during the entire operation processing process. The Flash memory group module is used for the storage of data and programs. The data transmission radio frequency module is used for the frequency conversion modulation of satellite signals.

[0049] In one embodiment, the Ethernet interface group includes: a first Ethernet interface and a second Ethernet interface. The first Ethernet interface and the second Ethernet interface are connected in parallel, and the second Ethernet interface is connected in series with the core operation processing unit and the satellite platform as a backup interface for the first Ethernet interface. The first Ethernet interface is used to transmit the received data to the core operation processing unit. The parameter configurations of the first Ethernet interface and the second Ethernet interface are the same.

[0050] It should be noted that the interface design with the satellite platform adopts an Ethernet interface, which is characterized by being able to adapt to different rates, simplifying the interface wiring harness and having great expandability. The two network interfaces are backup redundant to each other, and can work independently or simultaneously between the two paths. There is no association between them in the circuit design, and the operation of one path is not affected in case of any fault in the other path. In addition, the wiring harness of each Ethernet interface has only 8 wires, that is, 4 pairs of differential signals, greatly reducing the number of wirings. The reduction of the wiring harness is very beneficial to production and manufacturing and improves the product reliability.

[0051] In one of the embodiments, the low-speed interface group includes: a first CAN bus interface and a second CAN bus interface. The first CAN bus interface and the second CAN bus interface are connected in parallel, and the second CAN bus interface is connected in series with the core computing processing unit and the satellite platform as a backup interface of the first CAN bus interface. The first CAN bus interface is used to bidirectionally transmit low-speed data of control information and data between the satellite platform and the core computing processing unit, and return the status information of the high-speed data transmission module to the satellite platform. The parameter configurations of the first CAN bus interface and the second CAN bus interface are the same.

[0052] It should be noted that using the CAN bus to transmit low-speed data and instructions enables the Ethernet interface of the satellite high-speed data transmission to be specifically used for transmitting high-speed data, separating the data transmission methods into high and low speeds without interference, flexibly adapting to different communication rate requirements, simplifying the internal wiring between the high-speed data transmission module and other modules inside the satellite, and facilitating the development and expansion of other functions by applying different protocols at the same time.

[0053] In one of the embodiments, the control information includes: control instructions and the low-speed data. The control instructions include: communication rate selection, coding method selection, and modulation method configuration.

[0054] In one of the embodiments, as Figure 3 shown, a satellite high-speed data transmission data stream based on Ethernet is provided. The data stream first outputs a large amount of data from the payload of the satellite platform, and then transmits it to the satellite high-speed data transmission module through the Ethernet interface. After the data is sent to the satellite high-speed data transmission, it is then processed by the internal signal processing module, and then transmitted to the coding and modulation module for encoding and modulation of the data signal. Finally, the signal is frequency-converted to a suitable frequency band and transmitted to the ground through the antenna.

[0055] In addition, its low-speed interface is used to transmit some low-speed data and control instructions and return some status information to the satellite platform. The control instructions include parameters and information such as communication rate selection, coding method selection, and modulation method. The status information returned to the satellite platform includes voltage, current, temperature, and instruction execution status, etc.

[0056] It should be noted that

[0057] It should be understood that although Figure 1 and 3 each step in the flowchart is shown in sequence according to the arrow indication, these steps are not necessarily executed in the order indicated by the arrow. Unless there is a clear indication in this article, the execution of these steps has no strict order limit, and these steps can be executed in other orders. Moreover, Figure 1 and 3 at least a part of the steps in can include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these sub-steps or stages is not necessarily sequential, but can be executed alternately or in turn with at least a part of other steps or sub-steps or stages of other steps.

[0058] In one embodiment, as Figure 4 shown, a satellite high-speed data transmission system based on an Ethernet interface is provided, including: a sub-speed transmission subsystem 402 and a high-speed data transmission subsystem 404, where:

[0059] The sub-speed transmission subsystem 402 is used to transmit the data output by the payload of the satellite platform to the high-speed data transmission module through the Ethernet interface group. At the same time, the control information output by the satellite platform's satellite operation is in bidirectional communication link with the high-speed data transmission module through the low-speed interface group.

[0060] The high-speed data transmission subsystem 404 includes: a core operation processing unit, a monitoring processor, and a clock circuit. It is used to perform arithmetic processing on satellite signals according to data and control information in the core operation processing unit, and process abnormal problems in the whole arithmetic processing process through the monitoring processor to compress the time interval of satellite signal transmission in the clock circuit.

[0061] For the specific limitations of the satellite high-speed data transmission system based on the Ethernet interface, reference can be made to the limitations of the satellite high-speed data transmission method based on the Ethernet interface in the above text, which will not be elaborated here. Each module in the above satellite high-speed data transmission system based on the Ethernet interface can be implemented in whole or in part by software, hardware, and their combination. The above modules can be embedded in the processor in the computer device in hardware form or independent of it, or stored in the memory in the computer device in software form, so that the processor can call and execute the operations corresponding to the above modules.

[0062] In one embodiment, a computer device is provided. This computer device can be a terminal, and its internal structure diagram can be as Figure 5As shown. The computer device includes a processor, a memory, a network interface, a display screen, and an input system connected via a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium. The network interface of the computer device is used to communicate with an external terminal via a network connection. When the computer program is executed by the processor, it realizes a satellite high-speed data transmission method based on an Ethernet interface. The display screen of the computer device can be a liquid crystal display screen or an electronic ink display screen. The input system of the computer device can be a touch layer covering the display screen, or buttons, trackballs, or touchpads provided on the computer device housing, or an external keyboard, touchpad, or mouse, etc.

[0063] Those skilled in the art can understand that Figure 4-5 the structure shown in is only a block diagram of some structures related to the solution of this application, and does not constitute a limitation on the computer device to which the solution of this application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine some components, or have different component arrangements.

[0064] In one embodiment, a computer device is provided, including a memory and a processor. The memory stores a computer program. When the processor executes the computer program, the following steps are implemented:

[0065] The data output by the payload of the satellite platform is transmitted to the high-speed data transmission module through the Ethernet interface group. At the same time, the control information output by the satellite bus of the satellite platform conducts a two-way communication link with the high-speed data transmission module through the low-speed interface group.

[0066] The high-speed data transmission module includes: a core operation processing unit, a monitoring processor, and a clock circuit.

[0067] Inside the core operation processing unit, the satellite signal is processed according to the data and control information, and the monitoring processor processes abnormal problems during the entire operation processing process to compress the time interval for the satellite signal to be transmitted in the clock circuit.

[0068] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by the processor, the following steps are implemented:

[0069] The data output by the payload of the satellite platform is transmitted to the high-speed data transmission module through the Ethernet interface group. At the same time, the control information output by the satellite bus of the satellite platform conducts a two-way communication link with the high-speed data transmission module through the low-speed interface group.

[0070] The high-speed data transmission module includes: a core operation processing unit, a monitoring processor, and a clock circuit.

[0071] Within the core operation processing unit, satellite signals are processed according to data and control information, and the monitoring processor processes abnormal problems during the entire operation processing process to compress the time interval for satellite signals to be transmitted in the clock circuit.

[0072] Those of ordinary skill in the art can understand that all or part of the processes of implementing the methods in the above embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above methods. Among them, any reference to a memory, storage, database, or other medium used in the various embodiments provided in this application can include non-volatile and / or volatile memories. Non-volatile memories can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memories can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), Rambus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and Rambus dynamic RAM (RDRAM), etc.

[0073] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0074] The above-described embodiments only represent several implementation manners of this application. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the patent application. It should be noted that for those of ordinary skill in the art, without departing from the concept of this application, several modifications and improvements can still be made, and these all belong to the protection scope of this application. Therefore, the protection scope of the patent of this application should be subject to the appended claims.

Claims

1. A satellite high-speed data transmission method based on Ethernet interface, characterized in that: The method comprises: The data output by the payload of the satellite platform is transmitted to the high-speed data transmission module through the Ethernet interface group. At the same time, the control information output by the satellite service of the satellite platform is bidirectionally communicated with the high-speed data transmission module through the low-speed interface group. The high-speed data transmission module includes: a core operation processing unit, a monitoring processor and a clock circuit; In the core operation processing unit, the satellite signal is operated and processed according to the data and the control information, and the abnormal problems in the whole operation processing process are processed by the monitoring processor to compress the time interval of the satellite signal transmitted in the clock circuit.

2. The method according to claim 1, characterized in that: The core operation processing unit, the monitoring processor and the high-speed digital-to-analog converter are respectively used as output connection modules of the clock circuit, and the output connection modules are arranged in parallel.

3. The method according to claim 1, characterized in that The high-speed data transmission module also includes: a monitoring analog-to-digital converter, a high-speed random access memory, a Flash memory group and a data transmission radio frequency module; The monitoring analog-to-digital converter is used to monitor the operating status of the data transmitted through the Ethernet interface group in the high-speed data transmission module, and perform fault processing on abnormal status in the operating status; The high-speed random access memory is used as the operation memory of the core operation processing unit to access the data during the entire operation processing process; The Flash memory group module is used for storing the data and programs; The digital transmission radio frequency module is used for frequency conversion modulation of the satellite signal.

4. The method according to any one of claims 1 to 3, characterized in that: The Ethernet interface group includes: a first Ethernet interface and a second Ethernet interface; The first Ethernet interface is connected in parallel with the second Ethernet interface, and the second Ethernet interface is connected in series with the core computing processing unit and the satellite platform as a backup interface of the first Ethernet interface; The first Ethernet interface is used to transmit the received data to the core computing processing unit; The first Ethernet interface and the second Ethernet interface have the same parameter configuration.

5. The method according to claim 4, characterized in that The low-speed interface group includes: a first CAN bus interface and a second CAN bus interface; The first CAN bus interface and the second CAN bus interface are connected in parallel, and the second CAN bus interface is connected in series with the core processing unit and the satellite platform as a backup interface of the first CAN bus interface; The first CAN bus interface is used for bidirectionally transmitting the control information and the low-speed data of the data between the satellite platform and the core computing processing unit; and returning the status information of the high-speed data transmission module to the satellite platform; The parameter configuration of the first CAN bus interface is the same as that of the second CAN bus interface.

6. The method according to claim 5, characterized in that The control information includes: control instructions and the low-speed data; The control instructions include: communication rate selection, coding mode selection and modulation mode configuration.

7. A satellite high-speed data transmission system based on Ethernet interface, characterized in that: The system comprises: The speed-differentiated transmission subsystem is used to transmit the data output by the payload of the satellite platform to the high-speed data transmission module through the Ethernet interface group. At the same time, the control information output by the satellite service of the satellite platform is bidirectionally communicated with the high-speed data transmission module through the low-speed interface group; The high-speed data transmission subsystem includes: a core operation processing unit, a monitoring processor and a clock circuit; it is used to perform operation processing on the satellite signal according to the data and the control information in the core operation processing unit, and to handle abnormal problems in the entire operation processing process through the monitoring processor to compress the time interval for the satellite signal to be transmitted in the clock circuit.

8. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 6 are implemented.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

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