Display device

Abstract

A display device may include a substrate, a display area, a non-display area, a bending area, a connection line area, a pad portion, and a first area included in the pad portion. The first region may include: a first insulating layer disposed on the substrate; the first connecting line is arranged on the first insulating layer; a second connecting line disposed on the first connecting line; a second insulating layer disposed on the second connecting line; a third connecting line disposed on the second insulating layer; and a fourth connecting line disposed on the third connecting line.

Description

[0001] Cross - reference to related applications

[0002] This application claims the benefit and priority of Korean Patent Application No. 10 - 2023 - 0171070, filed on November 30, 2023, the entire content of which is incorporated herein by reference for all purposes. Technical field

[0003] Embodiments of the present invention relate to a display device, and in particular, by way of non - limiting example, to a display device having an inorganic light - emitting diode as a light source. Background art

[0004] Electroluminescent display devices include: an organic light - emitting display device in which an organic light - emitting diode (OLED) is provided; and an inorganic light - emitting display device (hereinafter referred to as an "LED display device") in which an inorganic light - emitting diode (hereinafter referred to as an "LED") is provided.

[0005] Since an electroluminescent display device uses a self - emitting element to display an image, it does not require a separate light source, such as a backlight unit, and thus can be implemented in various thin forms.

[0006] Since the penetration of moisture and oxygen can cause oxidation between the organic light - emitting layer and the electrode, an organic light - emitting display device needs to be designed to prevent the penetration of oxygen and moisture.

[0007] Recently, as an example of an inorganic light - emitting display device, a micro - LED display device in which micro - LEDs are provided in pixels is attracting attention as a next - generation display device. A micro - LED can be an inorganic LED having a size of 100 μm or less. Micro - LEDs can be manufactured through a separate semiconductor process and transferred to pixel positions on a display panel substrate of a display device to be disposed in each sub - pixel of each color.

[0008] The description of related art should not be regarded as prior art merely because it is mentioned in this section or related to this section. The description of related art includes information describing one or more aspects of the subject technology, and the description in this section does not limit the present invention. Summary of the invention

[0009] One or more aspects of the present invention are directed to solving the following drawbacks: In a structure where a connection line is formed on an insulating layer, due to the load applied when attaching a chip on film (COF) to a pad portion and a first region using an adhesive such as an anisotropic conductive film (ACF) containing conductive balls, the insulating layer and the connection line may be damaged and disconnected. In addition, one or more aspects of the present invention are directed to reducing the bonding resistance between a circuit component and a signal line when attaching a COF to a pad portion and a first region using an adhesive such as ACF containing conductive balls and solving the drawback of cracks appearing in the insulating layer.

[0010] The problems to be solved by one or more aspects of the present invention are not limited to the above problems, and other problems not mentioned herein will be clearly understood by those of ordinary skill in the art according to the following description.

[0011] The above one or more aspects can be implemented by a display device including a substrate, a display region, a non-display region, a bending region, a connection line region, a pad portion, and a first region included in the pad portion, where the first region includes: a first insulating layer provided on the substrate; a first connection line provided on the first insulating layer; a second connection line provided on the first connection line; a second insulating layer provided on the second connection line; a third connection line provided on the second insulating layer; and a fourth connection line provided on the third connection line.

[0012] In addition, the above one or more aspects can be implemented by a display device including a substrate, the substrate including a display region, a non-display region, a bending region, a connection line region, a pad portion, and a first region included in the pad portion, where the first region includes: a first insulating layer provided on the substrate; a first connection line provided on the first insulating layer; a second insulating layer provided on the first connection line; a second connection line provided on the second insulating layer; a third connection line provided on the second connection line; and a fourth connection line provided on the third connection line.

[0013] According to one or more aspects of the present invention, in a first region included in a pad portion, at least one of a second insulating layer, a third insulating layer, and a fourth insulating layer is removed by patterning, thereby allowing at least two or more connection lines to overlap. Accordingly, when a COF is attached to the pad portion and the first region using an adhesive such as ACF including conductive balls, in a structure in which one connection line is formed on one insulating layer, defects in which the insulating layer and the connection line may be damaged and disconnected due to a load can be prevented. In addition, according to the present invention, when a COF is attached to the pad portion and the first region using an adhesive such as ACF including conductive balls, the bonding resistance between a circuit component and a signal line can be reduced, and a defect in which cracks occur in the insulating layer can be prevented.

[0014] Various advantages and beneficial effects of the present invention are not limited to the above description, and other effects not mentioned will be clearly understood by those of ordinary skill in the art according to the following description.

[0015] Additional features, advantages, and aspects of the present invention are set forth in part in the following description, will become apparent in part from the disclosure of the present invention, or may be learned by practice of the inventive concepts provided herein. Other features, advantages, and aspects of the present invention may be realized and obtained by the description provided in the disclosure of the present invention or its derivations, its claims, and the accompanying drawings. All such features, advantages, and aspects are intended to be included within this specification, fall within the scope of the present invention, and be protected by the appended claims. Nothing in this section shall be construed as a limitation on the claims. Further aspects and advantages are discussed below in connection with embodiments of the present invention.

[0016] It will be understood that the foregoing description of the present invention and the following description are both examples, which are intended to provide further explanation of the claimed invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The accompanying drawings are included to provide a further understanding of the present invention, and are incorporated in and constitute a part of this specification, illustrating various aspects and embodiments of the present invention, and together with the description are used to explain the principles and examples of the present invention. In the drawings:

[0018] Figure 1 is a diagram illustrating a display device according to an embodiment of the present invention;

[0019] Figure 2 is Figure 1 an enlarged view of region A in

[0020] Figure 3 is a diagram showing a partial region of a pixel;

[0021] Figure 4 is a cross-sectional view taken along line I-I' of Figure 3 ​

[0022] Figure 5 is a cross-sectional view taken along line II-II' of Figure 3 ;

[0023] Figure 6 is a cross-sectional view taken along line III-III' of Figure 3 ;

[0024] Figure 7 is a cross-sectional view illustrating an example in which a main light-emitting element and an auxiliary light-emitting element are electrically connected to a pixel driving circuit;

[0025] Figure 8 is a view illustrating a display device according to another embodiment of the present invention;

[0026] Figure 9 is a cross-sectional view taken along line IV-IV' of Figure 8 ;

[0027] Figure 10A is a view illustrating a display device according to yet another embodiment of the present invention;

[0028] Figure 10B is Figure 10A an enlarged view of region B in

[0029] Figure 11 is a cross-sectional view taken along line A-A' of Figure 10B ;

[0030] Figure 12 is Figure 10B an enlarged view of region X in

[0031] Figure 13A is a cross-sectional view of a pad portion according to a first embodiment of the present invention, taken along line B-B' of Figure 12 ;

[0032] Figure 13B is a cross-sectional view of a pad portion according to a first embodiment of the present invention, taken along line C-C' of Figure 12 ;

[0033] Figure 14A is a cross-sectional view of a pad portion according to a second embodiment of the present invention, taken along line B-B' of Figure 12 ;

[0034] Figure 14B is a cross-sectional view of a pad portion according to a second embodiment of the present invention, taken along line C-C' of Figure 12 ;

[0035] Figure 15A is a cross-sectional view taken along line Figure 12A cross-sectional view of the pad portion according to the third embodiment of the present invention taken along line B-B';

[0036] Figure 15B is taken along Figure 12 A cross-sectional view of the pad portion according to the third embodiment of the present invention taken along line C-C';

[0037] Figure 16A is taken along Figure 12 A cross-sectional view of the pad portion according to the fourth embodiment of the present invention taken along line B-B';

[0038] Figure 16B is taken along Figure 12 A cross-sectional view of the pad portion according to the fourth embodiment of the present invention taken along line C-C'.

[0039] Throughout the drawings and the detailed description, unless otherwise described, the same reference numerals should be understood to refer to the same elements, features, and structures. The dimensions, lengths, and thicknesses of layers, regions, and elements are illustrated and / or exaggerated for clarity, illustration, and / or convenience purposes. Detailed Embodiments

[0040] The advantages, features, and implementation methods of the present invention will become clear from the embodiments described in detail below in conjunction with the drawings. However, the present invention is not limited to the embodiments below and can be implemented in various different forms; rather, the embodiments of the present invention are provided to make the disclosure of the present invention complete and to allow those of ordinary skill in the art to fully understand the scope of the present invention, which is limited only within the scope of the appended claims.

[0041] The shapes, dimensions, ratios, angles, quantities, etc. shown in the drawings used to describe the embodiments of the present invention are merely examples, and the present invention is not limited thereto. Throughout this specification, similar reference numerals generally refer to similar elements. In addition, when describing the present invention, detailed descriptions of related known technologies may be omitted to avoid unnecessarily obscuring the subject matter of the present invention.

[0042] Terms such as "comprising", "having", "including", and "containing" used herein are generally intended to allow the addition of other components, unless these terms are used together with the term "only". Singular references will be construed to include plural, unless otherwise expressly specified. For example, an element may be one or more elements. An element may include a plurality of elements. The term "exemplary" is used to denote being used as an example or illustration. An embodiment is an exemplary embodiment. A plurality of aspects are exemplary aspects. In one or more embodiments, "embodiment", "example", "aspect", etc. should not be construed as being preferred or more advantageous than other embodiments. Embodiments, examples, exemplary embodiments, aspects, etc. may refer to one or more embodiments, one or more examples, one or more exemplary embodiments, one or more aspects, etc., unless otherwise specified. In addition, the term "may" encompasses the entire meaning of the term "can".

[0043] When interpreting an element, it is construed to include a margin of error even if not explicitly stated.

[0044] When using terms such as "on", "upper", "lower", "after", "connected or joined", "crossed", "intersected", etc. to describe the positional relationship or interconnection relationship between two components, one or more other components may be interposed between these two components, unless "immediately" or "directly" is used.

[0045] When using terms such as "after", "subsequently", "next", or "before" to describe the relationship of time before and after, it may be discontinuous on the time scale, unless "immediately" or "directly" is used.

[0046] First, second, etc. may be used before the element name to distinguish elements, but their functions or structures are not limited by these ordinal numbers or element names. For ease of description, the ordinal numbers placed in front of the same element name may be different between embodiments.

[0047] The following embodiments may be combined or associated with each other in whole or in part, and various interlocks and drives are technically possible. Embodiments may be implemented independently of each other, or implemented together in an interrelated relationship.

[0048] Hereinafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0049] A display device according to an embodiment of the present invention includes: a display panel having a display area or screen on which an image is displayed; and a pixel driving circuit for driving pixels of the display panel. The display area includes a pixel area in which pixels are arranged. The pixel area includes a plurality of light-emitting areas. A light-emitting element is provided in each light-emitting area. The pixel driving circuit may be built in the display panel.

[0050] Figure 1 FIG. is a diagram illustrating a display device according to an embodiment of the present invention. Figure 2 is Figure 1 an enlarged view of region A in Figure 3 FIG. is a diagram showing a partial region of a pixel.

[0051] Referring to Figure 1 and 2 According to an embodiment of the present invention, a display device 100 includes a display panel that visually reproduces an input image thereon. The display panel may include a display area AA where an image is displayed and a non-display area NA where no image is displayed. In the non-display area NA, various lines and driving circuits may be installed, and a pad area PAD may be provided to connect an integrated circuit, a printed circuit, etc. Here, the display panel may be a panel having a rectangular structure (having a length in the X-axis direction, a width in the Y-axis direction, and a thickness in the Z-axis direction). The width and length of the display panel may be set to different design values according to the application field of the display device. The X-axis direction may refer to the width direction, the row direction, or the horizontal direction; the Y-axis direction may refer to the length direction, the column direction, or the vertical direction; the Z-axis direction may refer to the up-down direction or the thickness direction. In addition, the X-axis direction, the Y-axis direction, and the Z-axis direction may be perpendicular to each other, but they may also refer to different directions that are not perpendicular to each other. Therefore, each of the X-axis direction, the Y-axis direction, and the Z-axis direction may be described as one of the first direction, the second direction, and the third direction. In addition, a plane extending in the X-axis direction and the Y-axis direction may refer to a horizontal plane.

[0052] The plurality of light-emitting elements 10 provided in the display area AA to form pixels PXL may be micro-sized inorganic light-emitting elements. The inorganic light-emitting elements may be grown on a silicon wafer and then attached to the display panel via a transfer process.

[0053] The transfer process of the light-emitting elements 10 may be performed for each pre-divided area. In Figure 1 FIG., the display area AA is shown as being divided into 12 transfer areas ST, but the division size or number of the transfer areas is not limited thereto. The transfer process may be performed sequentially or simultaneously for the first to twelfth transfer areas ST. The blue light-emitting elements 10, the green light-emitting elements 10, and the red light-emitting elements 10 may be transferred to the transfer areas ST in sequence.

[0054] In the non-display area NA, a data driving circuit or a gate driving circuit may be provided, and lines may be provided to supply control signals for controlling the driving circuits. Here, the control signals may include various timing signals including a clock signal, an input data enable signal, and a synchronization signal, and may be received via the pad area PAD.

[0055] The pixel PXL can be driven by a pixel driving circuit. The pixel driving circuit can receive a driving voltage, an image signal (digital signal), a synchronization signal synchronized with the image signal, etc., and can output an anode voltage and a cathode voltage of the light-emitting element 10 to drive a plurality of pixels. The driving voltage can be a high-potential voltage EVDD. The cathode voltage can be a low-potential voltage EVSS commonly applied to the pixels. The anode voltage can be a voltage corresponding to the pixel data value of the image signal. The pixel driving circuit can be disposed in the non-display area NA or can be disposed below the display area AA.

[0056] Each pixel PXL can include a plurality of sub-pixels having different colors. For example, the plurality of sub-pixels can include: a red sub-pixel in which a light-emitting element 10 that emits light having a red wavelength is provided; a green sub-pixel in which a light-emitting element 10 that emits light having a green wavelength is provided; and a blue sub-pixel in which a light-emitting element 10 that emits light having a blue wavelength is provided. The plurality of sub-pixels can further include a white sub-pixel.

[0057] Referring to Figure 2 and 3 and, a plurality of pixels PXL can be continuously arranged in a first direction (X-axis direction) and a second direction (Y-axis direction). A plurality of sub-pixels of the same color can be provided within the pixels of the display area AA. For example, each of the plurality of pixels can include: a first red sub-pixel in which a 1-1 light-emitting element 11a that emits light having a red wavelength is provided; a second red sub-pixel in which a 1-2 light-emitting element 11b that emits light having a red wavelength is provided; a first green sub-pixel in which a 2-1 light-emitting element 12a that emits light having a green wavelength is provided; a second green sub-pixel in which a 2-2 light-emitting element 12b that emits light having a green wavelength is provided; a first blue sub-pixel in which a 3-1 light-emitting element 13a that emits light having a blue wavelength is provided; and a second blue sub-pixel in which a 3-2 light-emitting element 13b that emits light having a blue wavelength is provided. The 1-1 light-emitting element 11a, the 2-1 light-emitting element 12a, and the 3-1 light-emitting element 13a can be regarded as main light-emitting elements. The 1-2 light-emitting element 11b, the 2-2 light-emitting element 12b, and the 3-2 light-emitting element 13b can be regarded as auxiliary light-emitting elements.

[0058] A sub-pixel can include at least one or more light-emitting elements, and if one light-emitting element becomes defective, the brightness of another light-emitting element can be increased to adjust the brightness of the sub-pixel. However, the embodiment is not necessarily limited thereto, and a sub-pixel can include only one light-emitting element.

[0059] Each of the plurality of first electrodes 161 may be disposed below the light-emitting element 10 and may be selectively connected to the plurality of signal lines TL1 to TL6 through the extension portion 161a. A high-potential voltage may be applied to the pixel driving circuit via the signal lines TL1 to TL6. The signal lines TL1 to TL6 and the first electrode 161 may be formed as an integral electrode pattern during the electrode patterning process.

[0060] For example, the first signal line TL1 may be connected to the anode of the first red sub-pixel, and the second signal line TL2 may be connected to the anode of the second red sub-pixel. The third signal line TL3 may be connected to the anode of the first green sub-pixel, and the fourth signal line TL4 may be connected to the anode of the second green sub-pixel. The fifth signal line TL5 may be connected to the anode of the first blue sub-pixel, and the sixth signal line TL6 may be connected to the anode of the second blue sub-pixel. In the case where one sub-pixel includes only one light-emitting element, the number of the signal lines TL may be reduced by half.

[0061] The second electrode 170 may be one cathode provided for each row and applying a cathode voltage to the light-emitting elements 10 continuously arranged in the first direction (X-axis direction). The plurality of second electrodes 170 may be separated from each other in the second direction (Y-axis direction). The plurality of second electrodes 170 may be connected to the cathode voltage via the contact electrode 163. Each of the plurality of second electrodes 170 may be electrically connected to the contact electrode 163. However, the present invention is not necessarily limited thereto, and the second electrode 170 may be configured as one electrode layer without being divided into a plurality of electrodes and may be used as a common electrode.

[0062] Figure 4 is a cross-sectional view taken along Figure 3 the line I-I'. Figure 5 is a cross-sectional view taken along Figure 3 the line II-II'. Figure 6 is a cross-sectional view taken along Figure 3 the line III-III'. Figure 7 is a cross-sectional view illustrating an example in which two light-emitting elements are electrically connected to the pixel driving circuit.

[0063] Referring to Figures 3 to 5 According to an embodiment, a display device includes: a plurality of first electrodes 161 and contact electrodes 163 disposed above a substrate 110; a plurality of light-emitting elements 10 disposed above the plurality of first electrodes 161; a first optical layer 141 disposed between the plurality of light-emitting elements 10; and a second electrode 170 disposed on the plurality of light-emitting elements 10.

[0064] The substrate 110 can be made of flexible plastic. For example, the substrate 110 can be manufactured as a single-layer or multi-layer substrate made of a material selected from polyimide, polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyethersulfone, polyacrylate, polysulfone, and cycloolefin copolymer, but not limited thereto. For example, the substrate 110 can be a ceramic substrate or a glass substrate.

[0065] The pixel driving circuit 20 can be disposed in the display area AA on the substrate 110. The pixel driving circuit 20 can include a plurality of thin film transistors using amorphous silicon semiconductors, polycrystalline silicon semiconductors, or oxide semiconductors.

[0066] The pixel driving circuit 20 can include at least one driving thin film transistor, at least one switching thin film transistor, and at least one storage capacitor. When the pixel driving circuit 20 includes a plurality of thin film transistors, it can be formed on the substrate 110 through a thin film transistor (TFT) manufacturing process. In an embodiment, the pixel driving circuit 20 can be a general term for a plurality of thin film transistors for electrically connecting to the light emitting element 10.

[0067] The pixel driving circuit 20 can be a driving driver manufactured by using a metal oxide semiconductor field effect transistor (MOSFET) manufacturing process on a single crystal semiconductor substrate 110. The driving driver can include a plurality of pixel driving circuits for driving a plurality of sub-pixels. When the pixel driving circuit 20 is implemented as a driving driver, an adhesive layer can be disposed on the substrate 110, and then the driving driver can be mounted on the adhesive layer through a transfer process.

[0068] A buffer layer 121 covering the pixel driving circuit 20 can be disposed on the substrate 110. The buffer layer 121 can be made of an organic insulating material, for example, photoacryl or photosensitive polyimide, but not limited thereto.

[0069] The buffer layer 121 can be formed by stacking inorganic insulating materials such as silicon nitride (SiNx) or silicon oxide (SiO 2 ) in multiple layers or by stacking organic insulating materials and inorganic insulating materials in multiple layers.

[0070] The insulating layer 122 may be disposed on the buffer layer 121. The insulating layer 122 may be made of an organic insulating material such as photosensitive optical acrylic or photosensitive polyimide, but is not limited thereto. The connection lines may be disposed on the buffer layer 121. The connection lines may include a plurality of connection lines such as a first connection line RT1 and a second connection line RT2. The connection lines may be connected to corresponding signal lines TL. The signal lines may include a first signal line TL1 to a sixth signal line TL6, but are not limited thereto. The connection lines may include a plurality of line patterns disposed in different layers, with one or more insulating layers interposed therebetween. The line patterns disposed in different layers may be electrically connected via contact holes penetrating the insulating layers.

[0071] A plurality of bank patterns 130 may be disposed on the insulating layer 122. At least one light-emitting element 10 may be disposed above each bank pattern 130. For example, a first light-emitting element 11 may be disposed above a first bank pattern 130a, a second light-emitting element 12 may be disposed above a second bank pattern 130b, and a third light-emitting element 13 may be disposed above a third bank pattern 130c.

[0072] The bank pattern 130 may be formed of an organic insulating material such as photosensitive optical acrylic or photosensitive polyimide, but is not limited thereto. The bank pattern 130 may guide the position to which the light-emitting element 10 is attached during the transfer process of the light-emitting element 10. The bank pattern 130 may be omitted.

[0073] A solder pattern 162 may be disposed on the first electrode 161. The solder pattern 162 may be made of indium (In), tin (Sn), or an alloy thereof, but is not limited thereto.

[0074] Each of the plurality of light-emitting elements 10 may be mounted on the solder pattern 162. One pixel may include light-emitting elements 10 of three colors. The first light-emitting element 11 may be a red light-emitting element, the second light-emitting element 12 may be a green light-emitting element, and the third light-emitting element 13 may be a blue light-emitting element. Two light-emitting elements may be mounted in each sub-pixel.

[0075] The first optical layer 141 may cover the plurality of light-emitting elements 10 and the bank patterns 130. Accordingly, the first optical layer 141 may cover between the plurality of light-emitting elements 10 and between the plurality of bank patterns 130. The first optical layer 141 may extend in a first direction (X-axis direction) and may be separated in a second direction (Y-axis direction) to separate pixels arranged to be spaced apart in the second direction. Accordingly, the first optical layer 141 may be separated between pixel rows. Here, a row may refer to the first direction. In addition, a single pixel row formed of a plurality of pixels arranged in the first direction may refer to a pixel group. Accordingly, the display panel may include a plurality of pixel groups arranged to be spaced apart from each other in the second direction. For example, since the first optical layer 141 provided in the first direction is located around the pixels and the plurality of first optical layers 141 corresponding to the plurality of pixel groups are positioned to be spaced apart from each other in the second direction, one optical layer 141 located around the pixels forming a single row may be separated from another first optical layer 141 located around the pixels forming another row.

[0076] The first optical layer 141 may include an organic insulating material in which fine metal particles such as titanium dioxide particles are dispersed. Light emitted from the plurality of light-emitting elements 10 may be scattered by the fine metal particles dispersed in the first optical layer 141 and may be emitted to the outside.

[0077] The second electrode 170 may be provided on the plurality of light-emitting elements 10. The second electrode 170 may be commonly connected to the plurality of pixels PXL. The second electrode 170 may be a thin electrode for transmitting light. The second electrode 170 may be made of a transparent electrode material such as indium tin oxide (ITO), but is not limited thereto.

[0078] The second electrode 170 may extend in a first direction (X-axis direction) and may be separated in a second direction (Y-axis direction). For example, a single second electrode 170 may be formed to extend in the first direction, and the plurality of second electrodes 170 extending in the first direction may be provided to be spaced apart from each other in the second direction. In this case, the second electrode 170 may be provided corresponding to each of the plurality of pixels spaced apart from each other in the second direction. The second electrode 170 may include: a first region 171 provided on the top surface of the light-emitting element 10 and the top surface of the first optical layer 141; a second region 172 in contact with the contact electrode 163 and electrically connected to the contact electrode 163; and a third region 173 provided on the side surface of the first optical layer 141 and connecting the first region 171 to the second region 172.

[0079] In a plan view, each of the plurality of second electrodes 170 may overlap the first optical layer 141, and the third region 173 may cover the outer side surface of the first optical layer 141.

[0080] The second optical layer 142 may be an organic insulating material surrounding the periphery of the first optical layer 141. The second optical layer 142 may be disposed above the insulating layer 122 together with the first optical layer 141. The first optical layer 141 and the second optical layer 142 may include the same material (e.g., silicone). For example, the first optical layer 141 may be a silicone containing titanium oxide (TiOx), and the second optical layer 142 may be a silicone not containing titanium oxide (TiOx). However, the present invention is not necessarily limited thereto, and the first optical layer 141 and the second optical layer 142 may be formed of the same material or different materials.

[0081] According to an embodiment, the second region 172 of the second electrode 170 is connected to the contact electrode 163 in a state where it is integrally and flatly formed, so that excessive stress does not concentrate at the connection point with the contact electrode 163. Therefore, cracks in the second electrode 170 can be effectively prevented.

[0082] The second optical layer 142 may cover the second region 172 and the third region 173 of the second electrode 170. The top surface of the second optical layer 142 and the top surface of the first region 171 of the second electrode 170 may be coplanar. That is, the first region 171 and the second optical layer 142 may be used as a planarization layer. As a result, since there is no level difference on the surface on which the black matrix 190 is formed, the pattern of the black matrix 190 can be easily formed on the first optical layer 141 and the second optical layer 142. However, the present invention is not limited thereto, and the top surfaces of the second optical layer 142 and the second electrode 170 may have different heights.

[0083] The black matrix 190 may be an organic insulating material added with a black pigment. The second electrode 170 may contact the contact electrode 163 below the black matrix 190. Transmission holes 191 may be formed between the patterns of the black matrix 190, and light from the light-emitting element 10 is emitted to the outside through the transmission holes 191. The transmission holes 191 may overlap the light-emitting element 10 in the Z-axis direction, and a partial region of the black matrix 190 may overlap the first optical layer 141 in the Z-axis direction. Here, the Z-axis direction may be referred to as the third direction. Therefore, the black matrix 190 can overcome the problem that light emitted from adjacent light-emitting elements 10 is mixed and then emitted due to the first optical layer 141.

[0084] The cover layer 180 may be an organic insulating material covering the black matrix 190 and the second electrode 170. In Figure 2 and 3 the configurations of the black matrix 190 and the cover layer 180 are omitted.

[0085] The contact electrode 163 can be electrically connected to the first connection line RT1 disposed therebelow, and the first connection line RT1 can be connected to the pixel driving circuit 20. Accordingly, the cathode voltage can be applied to the second electrode 170 via the contact electrode 163. The first electrode 161 can be electrically connected to the second connection line RT2. This will be described later.

[0086] Referring to Figure 5 , the contact electrode 163 and the signal lines TL1 to TL6 can be disposed on the same plane. The pixel driving circuit 20 can be disposed below the contact electrode 163 and the signal lines TL1 to TL6. When the pixel driving circuit 20 is a driving driver, a plurality of driving drivers can be disposed in the display panel.

[0087] The passivation layer 133 can expose the contact electrode 163 so that the contact electrode 163 and the second electrode 170 are electrically connected to each other. In addition, the passivation layer 133 can insulate the signal lines TL2 to TL5 from the second electrode 170. Herein, the passivation layer 133 can be made of an inorganic material.

[0088] Referring to Figure 6 , the connection portion 161a of the first electrode 161 can extend to one side surface 131 of the bank pattern 130 to be electrically connected to the second connection line RT2 disposed on the buffer layer 121.

[0089] The first electrode 161, the connection portion 161a, the signal line TL, and / or the connection lines RT1 and RT2 can include a single-layer or multi-layer metal layer selected from titanium (Ti), molybdenum (Mo), and aluminum (Al).

[0090] The first electrode 161 or the signal line TL can be formed to have a metal stack structure in which a plurality of metal layers are formed using metals having different materials, thicknesses, etc. In this case, the first electrode 161, the connection portion 161a, and the signal line TL can be formed simultaneously by the same manufacturing process. Herein, the thickness can represent the width between one surface and the other surface of the metal layer disposed in the Z-axis direction.

[0091] The first electrode 161 can include: a first metal layer ML1 disposed below the solder pattern 162; a second metal layer ML2 disposed below the first metal layer ML1; a third metal layer ML3 disposed below the second metal layer ML2; and a fourth metal layer ML4 disposed below the third metal layer ML3. When the first electrode 161 is formed of the first metal layer ML1, the second metal layer ML2, the third metal layer ML3, and the fourth metal layer ML4, the first electrode 161 can be deposited in the order of the fourth metal layer ML4, the third metal layer ML3, the second metal layer ML2, and the first metal layer ML1 and then patterned by performing a photolithography process and an etching process.

[0092] The first metal layer ML1 can be set to contact the lower part of the solder pattern 162 and can be electrically connected to the solder pattern 162.

[0093] In addition, the first metal layer ML1 can include a transparent conductive oxide layer such as indium tin oxide (ITO) or indium zinc oxide (IZO) having good adhesiveness, corrosion resistance, and acid resistance. Here, the first metal layer ML1 can be referred to as an adhesive layer.

[0094] The second metal layer ML2 can be formed of a material having a different resistance value from each of the first metal layer ML1 and the third metal layer ML3. In this case, the second metal layer ML2 can be formed of a material having a lower light reflectivity but a higher resistance value than the third metal layer ML3. For example, the second metal layer ML2 can contain titanium (Ti) or molybdenum (Mo).

[0095] The third metal layer ML3 can be formed of a material having a higher light reflectivity than the first metal layer ML1. In this case, the third metal layer ML3 can be formed of a material having a higher light reflectivity than the second metal layer ML2. For example, the third metal layer ML3 can contain aluminum (Al) or silver (Ag).

[0096] That is, the light reflectivity of the third metal layer ML3 can be greater than the light reflectivity of each of the first metal layer ML1 and the second metal layer ML2.

[0097] The fourth metal layer ML4 can be formed of the same material as the second metal layer ML2. For example, the fourth metal layer ML4 can contain titanium (Ti) or molybdenum (Mo).

[0098] After the first metal layer ML1 is formed, a reflective aperture OP can be formed in the first electrode 161. The reflective aperture OP can be an area where the first metal layer ML1 and the second metal layer ML2 are removed so that only a part of the third metal layer ML3 is exposed. The reflective aperture OP can have a shape surrounding the solder pattern 162 in a plan view and can be circular or quadrilateral, but is not limited thereto.

[0099] The light emitted from the light-emitting element 10 can be reflected from the surface REF of the third metal layer ML3 exposed via the reflective aperture OP, thereby improving the light efficiency of the display device.

[0100] The passivation layer 133 can be disposed on the first electrode 161 and the signal line TL and can include an aperture hole 133a exposing the solder pattern 162. Here, the aperture hole 133a exposing the solder pattern 162 can be referred to as a first aperture hole. In this case, the reflective aperture OP can be formed to surround the first aperture hole.

[0101] The light-emitting element 10 may include: a first-conductive-type semiconductor layer 10-1; an active layer 10-2 disposed on the first-conductive-type semiconductor layer 10-1; and a second-conductive-type semiconductor layer 10-3 disposed on the active layer 10-2. The first driving electrode 15 may be disposed under the first-conductive-type semiconductor layer 10-1, and the second driving electrode 14 may be disposed on the second-conductive-type semiconductor layer 10-3.

[0102] The light-emitting element 10 may be formed on a silicon wafer by using a method such as metalorganic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE), or sputtering.

[0103] The first-conductive-type semiconductor layer 10-1 may be implemented using a compound semiconductor such as a group III-V or II-VI compound, and may be doped with a first dopant. The first-conductive-type semiconductor layer 10-1 may be formed of one or more of the following semiconductor materials having a composition formula of Al x1 In y1 Ga (1-x1-y1) N (0≤x1≤1, 0≤y1≤1, 0≤x1 + y1≤1): InAlGaN, AlGaAs, GaP, GaAs, GaInP, and AlGaInP, but not limited thereto. When the first dopant is an n-type dopant such as Si, Ge, Sn, Se, or Te, the first-conductive-type semiconductor layer 10-1 may be an n-type nitride semiconductor layer. However, when the first dopant is a p-type dopant, the first-conductive-type semiconductor layer 10-1 may be a p-type nitride semiconductor layer.

[0104] The active layer 10-2 is a layer where electrons (or holes) injected via the first-conductive-type semiconductor layer 10-1 and holes (or electrons) injected via the second-conductive-type semiconductor layer 10-3 meet. The active layer 10-2 may transition to a lower energy level when electrons and holes recombine, and may generate light having a corresponding wavelength.

[0105] The active layer 10-2 may have any one of a structure selected from a single well structure, a multi-well structure, a single quantum well structure, a multi-quantum well (MQW) structure, a quantum dot structure, and a quantum wire structure, but the structure of the active layer 10-2 is not limited thereto. The active layer 10-2 may generate light in the visible wavelength band. For example, the active layer 10-2 may output light of any one wavelength band in the blue wavelength band, the green wavelength band, and the red wavelength band.

[0106] The second-conductivity-type semiconductor layer 10-3 may be disposed on the active layer 10-2. The second-conductivity-type semiconductor layer 10-3 may be implemented using a compound semiconductor such as a group III-V or II-VI compound, and may be doped with a second dopant. The second-conductivity-type semiconductor layer 10-3 may be formed of a semiconductor material having a composition formula In x2 Al y2 Ga 1-x2-y2 N (0 ≤ x2 ≤ 1, 0 ≤ y2 ≤ 1, 0 ≤ x2 + y2 ≤ 1), or may be formed of a material selected from AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, and AlGaInP. When the second dopant is a p-type dopant such as Mg, Zn, Ca, Sr, or Ba, the second-conductivity-type semiconductor layer 10-3 doped with the second dopant may be a p-type nitride semiconductor layer. When the second dopant is an n-type dopant, the second-conductivity-type semiconductor layer 10-3 may be an n-type nitride semiconductor layer.

[0107] In an embodiment, a vertical structure is described in which the driving electrodes 14 and 15 are disposed on the top and bottom of the light-emitting structure. However, in addition to the vertical structure, the light-emitting element may also have a lateral structure or a flip chip structure.

[0108] Referring to Figure 7 , the main light-emitting element 12a and the auxiliary light-emitting element 12b of the sub-pixel may be disposed on the bank pattern 130. The second light-emitting element 12 is described by way of example. The first-1 electrode 161-1 connected to the main light-emitting element 12a may extend to one side surface of the bank pattern 130 to be electrically connected to the second-1 connection line RT21 disposed therebelow. The first-2 electrode 161-2 connected to the auxiliary light-emitting element 12b may extend to the other side surface of the bank pattern 130 to be electrically connected to the second-2 connection line RT22 disposed therebelow.

[0109] The pixel driving circuit 20 may apply an anode voltage to the main light-emitting element 12a through the second-1 connection line RT21, and may apply an anode voltage to the auxiliary light-emitting element 12b through the second-2 connection line RT22. The pixel driving circuit 20 may apply a cathode voltage to the main light-emitting element 12a and the auxiliary light-emitting element 12b through the first connection line RT1 and the second electrode 170.

[0110] The pixel driving circuit 20 may adjust the brightness by driving only the main light-emitting element 12a, or may adjust the brightness by driving both the main light-emitting element 12a and the auxiliary light-emitting element 12b simultaneously. In the case where the main light-emitting element 12a turns into a dark point, the brightness may be adjusted by driving only the auxiliary light-emitting element 12b.

[0111] Figure 8 FIG. is a diagram illustrating a display device according to another embodiment of the present invention. Figure 9 is a cross-sectional view taken along line Figure 8 IV-IV' of.

[0112] Referring to Figure 8 and 9 , the second electrode 170 may be electrically connected to the contact electrode 163 through a contact hole TH1 formed in the second optical layer 142. The second optical layer 142 may include the contact hole TH1 exposing the contact electrode 163. The second electrode 170 inserted into the contact hole TH1 of the second optical layer 142 may contact the top surface of the contact electrode 163. The contact hole TH1 may be formed in an outer region of the pixel.

[0113] Figure 10A FIG. is a diagram illustrating a display device according to still another embodiment of the present invention. Figure 10B is Figure 10A an enlarged view of region B in. Figure 11 is a cross-sectional view taken along line Figure 10B A-A' of.

[0114] In the following description, details of structures similar to those included in the embodiments described in Figures 1 to 9 are omitted to avoid redundancy, and other features are mainly described.

[0115] Referring to Figure 10A and 10B , the display panel may include a display area AA where an image is displayed and a non-display area NA where no image is displayed. In the non-display area NA, various lines and driving circuits may be installed, and a pad portion PC may be provided to connect an integrated circuit, a printed circuit, etc. A bending area BE may be provided between the non-display area NA and the pad portion PC, and a connection line area CL may be provided between the bending area BE and the pad portion PC.

[0116] In the non-display area NA, a data driving circuit or a gate driving circuit may be provided, and lines may be provided to supply control signals for controlling the driving circuits. Here, the control signals may include various timing signals, including a clock signal, an input data enable signal, and a synchronization signal, and the control signals may be received from the pad portion PC through the lines provided in the connection line area CL.

[0117] The pad portion PC may include a first area (film on panel) FP to which a chip on film (COF) is attached. As will be described later, some insulating layers may be removed from the first area FP.

[0118] The circuit component SB may be directly provided on the pad portion PC or may be attached to the pad portion PC in the form of a COP or a COF.

[0119] The circuit component SB may include a printed circuit board (PCB). A chip on film (COF) may process various signals input from the printed circuit board (PCB) and output them toward the display panel. To this end, one end of the chip on film (COF) may be attached to the display panel, and the other end opposite to this end may be attached to the printed circuit board (PCB).

[0120] Various driving circuits such as a timing controller may be mounted on the printed circuit board (PCB), and various signals generated by the driving circuits may be output toward the chip on film (COF). The printed circuit board (PCB) may include, for example, a flexible printed circuit board (FPCB).

[0121] The display panel and the chip on film (COF) that at least partially overlap may be joined by an anisotropic conductive film (ACF) interposed therebetween.

[0122] Referring to Figure 11 , a display device according to another embodiment of the present invention includes: a plurality of first electrodes 161 disposed above a substrate 110; a plurality of light-emitting elements 10 disposed above the plurality of first electrodes 161; a first optical layer 141 disposed between the plurality of light-emitting elements 10; and a second electrode 170 disposed on the plurality of light-emitting elements 10.

[0123] An adhesive layer AD may be disposed on the substrate 110. In the non-display area NA or the bending area BE, there may be an area from which the adhesive layer AD has been removed. This is because there is a risk that as there are more organic layers in the bending area BE, the organic layers may be damaged or broken in the bending area BE. The adhesive layer AD may be selected, for example, from an adhesive polymer, an epoxy resist, a UV resin, a polyimide-based material, an acrylic-based material, a polyurethane-based material, and polydimethylsiloxane (PDMS), but is not limited thereto.

[0124] The pixel driving circuit 20 implemented as a driving driver may be disposed on the adhesive layer AD in the display area AA.

[0125] A protective layer 120 for protecting the pixel driving circuit 20 may be formed on the adhesive layer AD. The protective layer 120 may cover at least a part or all of the side surface of the pixel driving circuit 20, and may cover a part of the top surface of the pixel driving circuit 20. The protective layer 120 may cover the entire substrate 120, and may cover a part or all of the pad portion PC. The protective layer 120 may be made of an organic insulating material, such as photosensitive optical acrylic or photosensitive polyimide, but is not limited thereto.

[0126] The buffer layer 121 covering the pixel driving circuit 20 may be disposed on the protective layer 120. When the protective layer 120 only covers a part of the pad portion PC, the side surface of the protective layer 120 may be covered by the buffer layer 121.

[0127] The insulating layer 122 may be disposed on the buffer layer 121. The first-a connection line RT1a, the second-a connection line RT2a, and the third connection line RT3 may be disposed on the buffer layer 121 in the same process.

[0128] The first insulating layer 122a covering the first-a connection line RT1a, the second-a connection line RT2a, and the third connection line RT3 may be disposed on the buffer layer 121.

[0129] The first-b connection line RT1b, the second-b connection line RT2b, and the fourth connection line RT4 may be disposed on the first insulating layer 122a in the same process.

[0130] The second insulating layer 122b covering the first-b connection line RT1b, the second-b connection line RT2b, and the fourth connection line RT4 may be disposed on the first insulating layer 122a.

[0131] The first-c connection line RT1c, the second-c connection line RT2, and the fifth connection line RT5 may be disposed on the second insulating layer 122b in the same process.

[0132] The third insulating layer 122c covering the first-c connection line RT1c, the second-c connection line RT2, and the fifth connection line RT5 may be disposed on the second insulating layer 122b.

[0133] The first-d connection line RT1d, the second-d connection line RT2d, and the sixth connection line RT6 may be disposed on the third insulating layer 122c in the same process.

[0134] The fourth insulating layer 122d covering the first-d connection line RT1d, the second-d connection line RT2d, and the sixth connection line RT6 may be disposed on the third insulating layer 122c. The fourth insulating layer 122d covers Figure 11 the substrate 110, but this is only an example. As the number of insulating layers in the bending region BE increases, defects may occur where the insulating layers are damaged during bending. Although not shown in the figure, the fourth insulating layer 122d may not be disposed in the bending region BE, and the non-display region NA and the connection line region CL are adjacent to the bending region BE. The bending region BE may have n (0 < n < 5 and n is an integer) insulating layers disposed therein. The third connection line RT3 may extend from the pad portion PC to the display region AA, and only the third connection line RT3 and the n insulating layers may be disposed in the bending region BE.

[0135] Multiple signal lines TL, via holes 163, and a seventh signal line (or connection line) TL7 can be formed on the fourth insulating layer 122d in the same process. That is, multiple signal lines TL, via holes 163, and the seventh signal line TL7 can be formed on the same layer. The seventh signal line TL7 can further have an ITO layer formed on a metal layer. Therefore, the seventh signal line TL7 can have more metal layers or one more metal layer than other signal lines.

[0136] The term "objects formed on the same layer" can refer to "objects all formed on any one layer and then separated by a patterning process or the like". However, it is not necessarily limited to this. Even if they have different heights, as long as multiple lines or multiple electrodes are formed on the same layer, the multiple lines or multiple electrodes can be defined as being formed on the same layer.

[0137] The 1-a connection line RT1a, 1-b connection line RT1b, 1-c connection line RT1c, 1-d connection line RT1d, and multiple signal lines TL can be electrically connected via via holes penetrating the insulating layer, where via holes are respectively provided on the insulating layer.

[0138] The 2-a connection line RT2a, 2-b connection line RT2b, 2-c connection line RT2c, 2-d connection line RT2d, and contact electrode 163 can be electrically connected via via holes penetrating the insulating layer, where via holes are respectively provided on the insulating layer.

[0139] The anode voltage provided by the pixel driving circuit 20 can be provided to the light-emitting element 10 via the 1-a connection line RT1a, 1-b connection line RT1b, 1-c connection line RT1c, 1-d connection line RT1d, multiple signal lines TL, and the first electrode 161.

[0140] The cathode voltage provided by the pixel driving circuit 20 can be provided to the light-emitting element 10 via the 2-a connection line RT2a, 2-b connection line RT2b, 2-c connection line RT2c, 2-d connection line RT2d, multiple signal lines TL, and the first electrode 161.

[0141] The connection lines listed above are examples. The connection lines can include multiple line patterns formed in different layers with one or more insulating layers interposed therebetween. The line patterns formed in different layers can be electrically connected via via holes penetrating the insulating layer.

[0142] The third connection line RT3 can be formed on the buffer layer 121. The third connection line RT3 can extend from the display area AA to the pad portion PC.

[0143] The fourth connection line RT4 can be formed on the first insulating layer 122a and can extend to the pad portion PC and the connection line area CL.

[0144] The fifth connection line RT5 can be disposed on the second insulating layer 122b and can extend to the pad portion PC and the connection line region CL.

[0145] The sixth connection line RT6 can be disposed on the third insulating layer 122c and can extend to the pad portion PC and the connection line region CL.

[0146] The seventh signal line TL7 can be disposed on the fourth insulating layer 122d and can extend to the pad portion PC and the connection line region CL. Inside the pad portion PC, multiple portions of the fourth connection line RT4, the fifth connection line RT5, the sixth connection line RT6, and the seventh signal line TL7 can extend out of the first region FP. The first insulating layer 122a, the second insulating layer 122b, the third insulating layer 122c, and the fourth insulating layer 122d can be disposed in a region other than the first region FP within the pad portion PC.

[0147] Signals from a circuit component SB such as a printed circuit board (PCB) can be transmitted to the pixel driving circuit 20 disposed in the display region AA via a chip on film (COF), the seventh signal line TL7, the sixth connection line RT6, the fifth connection line RT5, the fourth connection line RT4, and the third connection line RT3.

[0148] A plurality of bank patterns 130 can be disposed on the insulating layer 122. At least one light-emitting element 10 can be disposed on each bank pattern 130. For example, referring to Figure 3 , the first light-emitting element 11 can be disposed on the first bank pattern 130a, the second light-emitting element 12 can be disposed on the second bank pattern 130b, and the third light-emitting element 13 can be disposed on the third bank pattern 130c.

[0149] The first electrode 161 can be disposed on the bank pattern 130. In an embodiment of the present invention, the first electrode 161 can include a plurality of metal layers ML2, ML3, and ML4 in addition to the first metal layer ML1 during its formation, and in a separate process, the first metal layer ML1 can be disposed only in a region overlapping with the first electrode 161 and the light-emitting element 10. A hole OP can be disposed in the first electrode 161. In an embodiment of the present invention, the hole OP can be formed by removing the second metal layer ML2. The first metal layer ML1 can not be disposed in the pad portion PC. In addition, the first metal layer ML1 can not be disposed in a region other than a region overlapping with the light-emitting element 10.

[0150] The solder pattern 162 may be disposed on the first electrode 161. The solder pattern 162 may be made of indium (In), tin (Sn), or an alloy thereof, but is not limited thereto. The solder pattern 162 may include a first portion 162a and a second portion 162b. The first portion 162a may contain indium (In), and the second portion 162b may contain gold (Au). The first portion 162a and the second portion 162b may be pressure-bonded when the light-emitting element 10 is transferred, and then may be eutectically bonded by applying heat thereto. When the second portion 162b is under pressure, a part of the second portion 162b may cover at least a part or all of the side surface of the first portion 162a. In this case, the contact area between the first portion 162a and the second portion 162b may be increased, thereby enhancing adhesion and improving the transmission of electrical signals.

[0151] Each of the plurality of light-emitting elements 10 may be mounted on the solder pattern 162.

[0152] The 1-1st optical layer 141a may cover the plurality of light-emitting elements 10 and the bank pattern 130. Accordingly, the 1-1st optical layer 141a may cover between the plurality of light-emitting elements 10 and between the plurality of bank patterns 130. The arrangement of the 1-1st optical layer 141a in a plan view is the same as the arrangement of the first optical layer 141 in a plan view.

[0153] The second electrode 170 may be disposed on the plurality of light-emitting elements 10. The second electrode 170 may be commonly connected to the plurality of pixels PXL.

[0154] The 1-2nd optical layer 141b may be disposed on the second electrode 170 to overlap with the 1-1st optical layer 141a. By disposing the 1-2nd optical layer 141b on the second electrode 170, the amount of light emitted in the forward direction can be increased.

[0155] The second optical layer 142 may be an organic insulating material surrounding the periphery of the first optical layer 141. The second optical layer 142 may be disposed on the insulating layer 122 together with the first optical layer 141. The first optical layer 142 may be disposed on the display area AA.

[0156] The black matrix 190 may be disposed on the 1-2nd optical layer 141b, the second electrode 170, and the second optical layer 142. Transmission holes may be formed between the patterns of the black matrix 190, and the light from the light-emitting element 10 is emitted to the outside through the transmission holes.

[0157] The cover layer 180 may be an organic insulating material covering the black matrix 190 and the second electrode 170.

[0158] Figure 12 is Figure 10B An enlarged plan view of the region X in.

[0159] Reference Figure 12 In Figure 12 , the planar shape of the third connection line RT3 is shown in the connection line area CL, and the upper part of the seventh signal line TL7 is shown in the pad part PC. In the connection line area CL and the pad part PC, each of the connection lines RT3, RT4, RT5, RT6 and the seventh signal line TL7 can be arranged in the Y-axis direction.

[0160] Figure 13A along Figure 12 is a cross-sectional view of the pad part according to the first embodiment of the present invention taken along the line B - B' of Figure 12 . Figure 13B along Figure 12 is a cross-sectional view of the pad part according to the first embodiment of the present invention taken along the line C - C' of Figure 12 .

[0161] In Figure 13A and 13B In one embodiment, as described with reference to Figure 11 the connection lines RT3, RT4, RT5, RT6 and the seventh signal line TL7 can be separately arranged on the insulating layers 122a, 122b, 122c and 122d in the connection line area CL and the pad part PC, and in the connection line area CL and / or the pad part PC, they can be electrically connected via at least one contact hole formed in each insulating layer.

[0162] That is, in the connection line area CL and the pad part PC, the connection lines RT3, RT4, RT5, RT6 and the seventh signal line TL7 can not meet each other in the areas other than the areas where the contact holes are formed. In Figure 13A and 13B the third connection line RT3, the fourth connection line RT4, the fifth connection line RT5 and the sixth connection line RT6 are arranged in the first area FP, but this is only an example, and other signal lines and / or connection lines except the seventh signal line TL7 may not be arranged in the first area FP.

[0163] Figure 14A along Figure 12 is a cross-sectional view of the pad part according to the second embodiment of the present invention taken along the line B - B' of Figure 12 . Figure 14B along Figure 12 is a cross-sectional view of the pad part according to the second embodiment of the present invention taken along the line C - C' of Figure 12 .

[0164] Reference Figure 14A and 14B, in the first region FP provided inside the pad portion PC, the second insulating layer 122b and the fourth insulating layer 122d can be removed by patterning. On each of the fourth connection lines RT4 included in the first region FP, a fifth connection line RT5 can be formed to further cover at least a part of the top surface including the fourth connection line RT4. The fourth connection line RT4, the fifth connection line RT5, the sixth connection line RT6, and the seventh signal line can be arranged in the first direction, and the length of the first region FP in the first direction (X-axis direction) can be shorter than the length in the second direction (Y-axis direction) perpendicular to the first direction, where each connection line extends in the second direction.

[0165] On each of the sixth connection lines RT6 included in the first region FP, a seventh signal line TL7 can be formed to further cover at least a part of the top surface including the sixth connection line RT6. A chip-on-film (COF) formed to at least partially overlap the first region FP can be bonded to the seventh signal line TL7 through an anisotropic conductive film (ACF) provided therebetween. In this case, the seventh signal line TL7 and each insulating layer and / or each connection line located thereunder can be broken or damaged due to high load, resulting in increased signal resistance or poor reliability. When at least two lines are formed to be in direct contact with each other as in the embodiments of the present invention, these lines can withstand the load even when pressed by the anisotropic conductive film (ACF).

[0166] Referring to Figure 14B , the fifth connection line RT5 can be formed in a wide range to cover the top surface and the side surface of the fourth connection line RT4. Thus, both ends of the fifth connection line RT5 can be provided on the first insulating layer 122a.

[0167] The seventh signal line TL7 can be formed in a wide range to cover the top surface and the side surface of the sixth connection line RT6. Thus, both ends of the seventh signal line TL7 can be provided on the third insulating layer 122c.

[0168] According to an embodiment, in the first region FP, the width of each of the fifth connection line RT5 and the seventh signal line TL7 can be greater than the width of each of the fourth connection line RT4 and the sixth connection line RT6. However, the present invention is not necessarily limited thereto, and the widths of the fourth connection line RT4, the fifth connection line RT5, the sixth connection line RT6, and the seventh signal line can be the same.

[0169] Figure 15A is a cross-sectional view of the pad portion according to the third embodiment of the present invention taken along the line B - B'. Figure 12 Figure 15B is Figure 12 a cross-sectional view of the pad portion according to the third embodiment of the present invention taken along the line C - C'.

[0170] Reference Figure 15A and 15B In the first region FP provided inside the pad portion PC, the third insulating layer 122c and the fourth insulating layer 122d can be removed by patterning. On each of the fifth connection lines RT5 included in the first region FP, a sixth connection line RT6 can be formed to further cover or contact at least a part of the top surface including the fifth connection line RT5. On each of the sixth connection lines RT6 included in the first region FP, a seventh signal line TL7 can be formed to further cover or contact at least a part of the top surface including the sixth connection line RT6.

[0171] Reference Figure 15B As shown in FIG. 9, the sixth connection line RT6 can be formed over a wide range to cover the top surface and the side surface of the fifth connection line RT5. Thus, both ends of the sixth connection line RT6 can be provided on the second insulating layer 122b.

[0172] The seventh signal line TL7 can be formed over a wide range to cover the top surface and the side surface of the sixth connection line RT6. Thus, both ends of the seventh signal line TL7 can be provided on the second insulating layer 122b.

[0173] According to an embodiment, in the first region FP, the width of the seventh signal line TL7 can be greater than the width of the sixth connection line RT6. In addition, the width of the sixth connection line RT6 can be greater than the width of the fifth connection line RT5. However, the present invention is not necessarily limited thereto, and the fourth connection line RT4, the fifth connection line RT5, the sixth connection line RT6, and the seventh signal line TL7 can have the same width.

[0174] Figure 16A is a cross-sectional view of the pad portion according to the fourth embodiment of the present invention taken along line B - B'. Figure 12 taken along line B - B' of FIG. Figure 16B is a cross-sectional view of the pad portion according to the fourth embodiment of the present invention taken along line C - C'. Figure 12 taken along line C - C' of FIG.

[0175] Reference Figure 16A and 16B In the first region FP provided inside the pad portion PC, the fourth insulating layer 122d can be removed by patterning. On each of the sixth connection lines RT6 included in the first region FP, a seventh signal line TL7 can be formed to further cover or contact at least a part of the top surface including the sixth connection line RT6.

[0176] In Figure 16A and 16B the third connection line RT3, the fourth connection line RT4, the fifth connection line RT5, and the sixth connection line RT6 are provided in the first region FP, but this is only an example, and other signal lines and / or connection lines except for the seventh signal line TL7 may not be provided in the first region FP.

[0177] In an embodiment, a vertical structure (wherein driving electrodes 14 and 15 are provided on the top and bottom of a light-emitting structure) is described. However, in addition to the vertical structure, the light-emitting element may also have a lateral structure or a flip-chip structure.

[0178] The display device according to an embodiment of the present invention can be applied to mobile devices, video phones, smart watches, watch phones, wearable devices, foldable devices, rollable devices, bendable devices, flexible devices, curved devices, sliding devices, variable devices, electronic notebooks, e-books, portable multimedia players (PMPs), personal digital assistants (PDAs), MP3 players, mobile medical devices, desktop PCs, laptop PCs, netbook computers, workstations, navigation, in-vehicle display devices, theater display devices, televisions, wallpaper devices, sign devices, game devices, notebooks, monitors, cameras, camcorders, household appliances, etc. In addition, the display device according to one or more embodiments of the present invention can be applied to inorganic light-emitting devices.

[0179] The display device according to one or more embodiments of the present invention can be described as follows.

[0180] The display device according to one or more embodiments of the present invention may include a substrate, a display area, a non-display area, a bending area, a connection line area, a pad part, and a first area included in the pad part, wherein the first area may include: a first insulating layer provided on the substrate; a first connection line provided on the first insulating layer; a second connection line provided on the first connection line; a second insulating layer provided on the second connection line; a third connection line provided on the second insulating layer; and a fourth connection line provided on the third connection line.

[0181] The display area may include: the first insulating layer; a 2-1 connection line and a 3-1 connection line formed in the same process as the first connection line; a third insulating layer provided on the 2-1 connection line and the 3-1 connection line; a 2-2 connection line and a 3-2 connection line formed in the same process as the second connection line and provided on the third insulating layer; the second insulating layer provided on the 2-2 connection line and the 3-2 connection line; a 2-3 connection line and a 3-3 connection line formed in the same process as the third connection line and provided on the second insulating layer; a fourth insulating layer provided on the 2-3 connection line and the 3-3 connection line; and a signal line formed in the same process as the fourth connection line and provided on the fourth insulating layer.

[0182] The first connection line, the second connection line, the third connection line, and the fourth connection line may be formed of multiple metal layers, where the fourth connection line may include one more metal layer than each of the first connection line, the second connection line, and the third connection line.

[0183] The fourth insulating layer may not be provided in the bending region.

[0184] Inside the pad portion, multiple portions of the first connection line, the second connection line, the third connection line, and the fourth connection line may extend out of the first region; the first insulating layer, the third insulating layer, the second insulating layer, and the fourth insulating layer may be provided in a region other than the first region within the pad portion; the first connection line, the second connection line, the third connection line, and the fourth connection line may be electrically connected via at least one contact hole formed in each of the first insulating layer, the second insulating layer, the third insulating layer, and the fourth insulating layer.

[0185] The first connection line, the second connection line, the third connection line, and the fourth connection line may be arranged in a first direction, and the first region may have a length in the first direction that is shorter than a length in a second direction perpendicular to the first direction.

[0186] The second connection line may cover a top surface and a side surface of the first connection line, and the fourth connection line may cover a top surface and a side surface of the third connection line.

[0187] In addition, the display device may further include: an adhesive layer provided between the substrate and the first insulating layer; a pixel driving circuit provided on the adhesive layer; a protective layer provided on the pixel driving circuit; and 2-4 connection lines and 3-4 connection lines provided in the display region and a fifth connection line provided in the first region between the protective layer and the first insulating layer.

[0188] In addition, the display device may further include: a bank pattern provided on the fourth insulating layer; a first electrode provided on the bank pattern; a first metal layer provided on the first electrode; a solder pattern provided on the first metal layer; a light-emitting element provided on the solder pattern; and a second electrode provided on the light-emitting element.

[0189] The fifth connection line may extend from the pad portion to the display region, and only the fifth connection line and n insulating layers may be provided in the bending region, where 0 < n < 5 and n is an integer.

[0190] A display device according to one or more embodiments of the present invention may include a substrate, a display area, a non-display area, a bending area, a connection line area, a pad portion, and a first area included in the pad portion, where the first area may include: a first insulating layer provided on the substrate; a first connection line provided on the first insulating layer; a second insulating layer provided on the first connection line; a second connection line provided on the second insulating layer; a third connection line provided on the second connection line; and a fourth connection line provided on the third connection line.

[0191] The display area may include: the first insulating layer; a 2-1 connection line and a 3-1 connection line formed in the same process as the first connection line; the second insulating layer provided on the 2-1 connection line and the 3-1 connection line; a 2-2 connection line and a 3-2 connection line formed in the same process as the second connection line and provided on the second insulating layer; a third insulating layer provided on the 2-2 connection line and the 3-2 connection line; a 2-3 connection line and a 3-3 connection line formed in the same process as the third connection line and provided on the third insulating layer; a fourth insulating layer provided on the 2-3 connection line and the 3-3 connection line; and a signal line formed in the same process as the fourth connection line and provided on the fourth insulating layer.

[0192] The first connection line, the second connection line, the third connection line, and the fourth connection line may be formed of multiple metal layers, where the fourth connection line may include one more metal layer than the first connection line, the second connection line, and the third connection line.

[0193] The fourth insulating layer may not be provided in the bending area.

[0194] Inside the pad portion, multiple portions of the first connection line, the second connection line, the third connection line, and the fourth connection line may extend out of the first area; the first insulating layer, the third insulating layer, the second insulating layer, and the fourth insulating layer may be provided in an area other than the first area within the pad portion; the first connection line, the second connection line, the third connection line, and the fourth connection line may be electrically connected via at least one contact hole formed in each of the first insulating layer, the second insulating layer, the third insulating layer, and the fourth insulating layer.

[0195] The first connection line, the second connection line, the third connection line, and the fourth connection line may be arranged in a first direction, and the first area may have a length in the first direction that is shorter than a length in a second direction perpendicular to the first direction.

[0196] The second connection line may cover the top surface and the side surface of the first connection line, and the fourth connection line may cover the top surface and the side surface of the third connection line.

[0197] The display device may further include: an adhesive layer disposed between the substrate and the first insulating layer; a pixel driving circuit disposed on the adhesive layer; a protective layer disposed on the pixel driving circuit; and a 2-4 connection line, a 3-4 connection line disposed in the display area between the protective layer and the first insulating layer, and a fifth connection line disposed in the first area.

[0198] In addition, the display device may further include: a bank pattern disposed on the fourth insulating layer; a first electrode disposed on the bank pattern; a first metal layer disposed on the first electrode; a solder pattern disposed on the first metal layer; a light-emitting element disposed on the solder pattern; and a second electrode disposed on the light-emitting element.

[0199] In addition, the fifth connection line may extend from the pad portion to the display area, and only the fifth connection line and n insulating layers may be disposed in the bending area, where 0 < n < 5 and n is an integer.

[0200] The above descriptions of the problems to be solved, the ways to solve the problems, and the effects do not specify the essential features of the claims, so the scope of the claims is not limited by the details described in the specification.

[0201] Although the embodiments of the present invention have been described in more detail with reference to the accompanying drawings, the present invention is not necessarily limited to these embodiments, and various modifications can be made within the scope of the present invention without departing from the technical spirit of the present invention. Therefore, the embodiments disclosed in the present invention are provided for illustrative purposes only and are not intended to limit the technical concept of the present invention. The scope of the technical concept of the present invention is not limited thereto. Therefore, it should be understood that the above embodiments are exemplary in all aspects and do not limit the present invention. The protection scope of the present invention should be interpreted based on the appended claims, and all technical concepts within the equivalent scope should be interpreted as falling within the scope of the present invention.

Claims

1. A display device, comprising a substrate, a display area, a non-display area, a bending area, a connection line area, a pad portion, and a first area included in the pad portion, The first zone comprises: a first insulating layer disposed on the substrate; A first connecting line disposed on the first insulating layer; a second connecting line disposed on the first connecting line; a second insulating layer disposed on the second connecting line; A third connecting line disposed on the second insulating layer; as well as A fourth connecting line is arranged on the third connecting line.

2. The display device according to claim 1, wherein the display area comprises: the first insulating layer; A 2-1st connecting line and a 3-1st connecting line formed in the same process as the first connecting line; a third insulating layer disposed on the 2-1 connecting line and the 3-1 connecting line; A 2-2 connection line and a 3-2 connection line formed in the same process as the second connection line and disposed on the third insulating layer; The second insulating layer is disposed on the 2-2 connecting line and the 3-2 connecting line; A 2-3 connecting line and a 3-3 connecting line formed in the same process as the third connecting line and disposed on the second insulating layer; a fourth insulating layer disposed on the 2-3 connecting line and the 3-3 connecting line; as well as A signal line is formed in the same process as the fourth connection line and disposed on the fourth insulating layer.

3. The display device according to claim 1 , wherein the first connection line, the second connection line, the third connection line, and the fourth connection line are formed of a plurality of metal layers, The fourth connection line includes one more metal layer than each of the first connection line, the second connection line and the third connection line. The display device according to claim 2 , wherein the fourth insulating layer is not disposed in the bending region.

5. The display device according to claim 2, wherein inside the pad portion, a plurality of portions of the first connection line, the second connection line, the third connection line, and the fourth connection line extend out of the first region, The first insulating layer, the third insulating layer, the second insulating layer, and the fourth insulating layer are provided in a region other than the first region within the pad portion, The first connection line, the second connection line, the third connection line, and the fourth connection line are for being electrically connected via at least one contact hole formed in each of the first insulating layer, the second insulating layer, the third insulating layer, and the fourth insulating layer. 6 . The display device according to claim 2 , wherein the first connection line, the second connection line, the third connection line, and the fourth connection line are arranged in a first direction, and the first region has a length in the first direction shorter than a length in a second direction perpendicular to the first direction. 7 . The display device according to claim 2 , wherein the second connection line covers a top surface and a side surface of the first connection line, and the fourth connection line covers a top surface and a side surface of the third connection line.

8. The display device according to claim 2, further comprising: An adhesive layer disposed between the substrate and the first insulating layer; A pixel driving circuit disposed on the adhesive layer; A protective layer disposed on the pixel driving circuit; And A second - fourth connection line and a third - fourth connection line disposed in the display area and a fifth connection line disposed in the first area between the protective layer and the first insulating layer.

9. The display device according to claim 7, further comprising: A bank pattern disposed on the fourth insulating layer; A first electrode disposed on the bank pattern; A first metal layer disposed on the first electrode; A solder pattern disposed on the first metal layer; A light - emitting element disposed on the solder pattern; And A second electrode disposed on the light - emitting element.

10. The display device according to claim 8, wherein the fifth connection line extends from the pad portion to the display area, and only the fifth connection line and n insulating layers are disposed in the bending area, where 0 < n < 5 and n is an integer.

11. The display device according to claim 9, wherein the first electrode includes: A second metal layer disposed below the first metal layer; A third metal layer disposed below the second metal layer; And A fourth metal layer disposed below the third metal layer, wherein the second metal layer is formed of a material having a different resistance value from each of the first metal layer and the third metal layer, and the fourth metal layer is formed of the same material as the second metal layer.

12. The display device according to claim 11, wherein the first metal layer is disposed in contact with the lower portion of the solder pattern and is used for electrically connecting to the solder pattern.

13. The display device according to claim 11, wherein the second metal layer is formed of a material having a lower light reflectivity but a higher resistance value than the third metal layer, and the third metal layer is formed of a material having a higher light reflectivity than the first metal layer.

14. The display device according to claim 11, wherein the first metal layer is only disposed in the area overlapping with the first electrode and the light - emitting element, and the first metal layer is not disposed in the pad portion.

15. The display device according to claim 9, wherein the solder pattern includes a first portion and a second portion, wherein the first portion contains indium, the second portion contains gold, and when the second portion is under pressure, a part of the second portion covers at least a part or all of the side surface of the first portion.

16. The display device according to claim 1, wherein in the first area, the width of each of the second connection line and the fourth connection line is greater than or equal to the width of each of the first connection line and the third connection line.

17. The display device according to claim 2, wherein the fourth insulating layer is not disposed in the bending area, and the non - display area and the connection line area are adjacent to the bending area. 18 . The display device of claim 1 , wherein the fourth connection line is disposed to contact at least a portion of a top surface of the third connection line. 19 . The display device of claim 18 , wherein the third connection line is disposed to contact at least a portion of a top surface of the second connection line.

20. A display device comprising a substrate, the substrate comprising a display area, a non-display area, a bending area, a connection line area, a pad portion, and a first area included in the pad portion, The first zone comprises: a first insulating layer disposed on the substrate; A first connecting line disposed on the first insulating layer; a second insulating layer disposed on the first connecting line; A second connecting line disposed on the second insulating layer; a third connecting line arranged on the second connecting line; as well as A fourth connecting line is arranged on the third connecting line.

21. The display device according to claim 20, wherein the display area comprises: the first insulating layer; A 2-1st connecting line and a 3-1st connecting line formed in the same process as the first connecting line; The second insulating layer is provided on the 2-1 connecting line and the 3-1 connecting line; A 2-2 connection line and a 3-2 connection line formed in the same process as the second connection line and disposed on the second insulating layer; a third insulating layer disposed on the 2-2 connecting line and the 3-2 connecting line; A 2-3 connecting line and a 3-3 connecting line formed in the same process as the third connecting line and disposed on the third insulating layer; a fourth insulating layer disposed on the 2-3 connecting line and the 3-3 connecting line; as well as A signal line is formed in the same process as the fourth connection line and disposed on the fourth insulating layer.

22. The display device according to claim 20, wherein the first connection line, the second connection line, the third connection line and the fourth connection line are formed of a plurality of metal layers, The fourth connection line includes one more metal layer than the first connection line, the second connection line and the third connection line. 23 . The display device of claim 21 , wherein the fourth insulating layer is not disposed in the bending region.

24. The display device according to claim 21, wherein inside the pad portion, a plurality of portions of the first connection line, the second connection line, the third connection line, and the fourth connection line extend out of the first region, The first insulating layer, the third insulating layer, the second insulating layer, and the fourth insulating layer are provided in a region other than the first region within the pad portion, The first connection line, the second connection line, the third connection line, and the fourth connection line are electrically connected via at least one contact hole formed in each of the first insulation layer, the second insulation layer, the third insulation layer, and the fourth insulation layer.

25. The display device according to claim 21, wherein the first connection line, the second connection line, the third connection line, and the fourth connection line are disposed in a first direction, and the first region has a length in the first direction that is shorter than a length in a second direction perpendicular to the first direction.

26. The display device according to claim 21, wherein the second connection line covers a top surface and a side surface of the first connection line, and the fourth connection line covers a top surface and a side surface of the third connection line.

27. The display device according to claim 21, further comprising: An adhesive layer disposed between the substrate and the first insulating layer; A pixel driving circuit disposed on the adhesive layer; A protective layer disposed on the pixel driving circuit; And A 2-4 connection line and a 3-4 connection line disposed in the display region and a fifth connection line disposed in the first region between the protective layer and the first insulating layer.

28. The display device according to claim 26, further comprising: A bank pattern disposed on the fourth insulating layer; A first electrode disposed on the bank pattern; A first metal layer disposed on the first electrode; A solder pattern disposed on the first metal layer; A light-emitting element disposed on the solder pattern; And A second electrode disposed on the light-emitting element.

29. The display device according to claim 27, wherein the fifth connection line extends from the pad portion to the display region, and only the fifth connection line and n insulating layers are disposed in the bending region, where 0 < n < 5 and n is an integer.

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