Display device

Abstract

A display device includes: a pixel circuit layer disposed on a substrate; a pixel electrode overlapping the emitter region on the pixel circuit layer; light emitting layers disposed on the pixel electrodes, respectively; a common electrode disposed on the light emitting layer; the packaging layer covers the common electrode; and a light shielding member disposed on the encapsulation layer. The light shielding member includes: a first light shielding member overlapping the emission region; and a second light shielding member overlapping the non-emission region between the emission regions, and the pixel electrode having openings overlapping the first light shielding members, respectively.

Description

[0001] This application claims priority and the benefit of Korean Patent Application No. 10-2023-0171221, filed on November 30, 2023, the content of which is incorporated herein by reference in its entirety. Technical Field

[0002] The present disclosure relates to a display device. Background Art

[0003] With the development of multimedia, the importance of display devices is increasing. In response thereto, various types of display devices such as organic light-emitting diode (OLED) display devices and liquid crystal displays (LCDs) are used.

[0004] A display device is a device that displays an image and includes a display panel such as an organic light-emitting display panel or a liquid crystal display panel. Among them, an organic light-emitting display panel (OLED panel) is attracting attention as a display device due to its advantages such as low-voltage driving, light weight and thinness, wide viewing angle, and fast response speed. In particular, when a color filter is used in such a display device, it is necessary to ensure reflection characteristics by reducing reflectance and increasing efficiency.

[0005] The above is only intended to help the understanding of the background art of the technical idea of the present disclosure, and thus, it cannot be understood as corresponding to the prior art known to those skilled in the art of the present disclosure. Summary of the Invention

[0006] Embodiments of the present disclosure are for providing a display device having improved efficiency.

[0007] The technical objectives to be achieved by the present disclosure are not limited to the technical objectives described herein, and other technical objectives not mentioned herein will be clearly understood by those skilled in the art from the description of the present disclosure.

[0008] According to an embodiment of the present disclosure, a display device includes: a pixel circuit layer disposed on a substrate; a pixel electrode overlapping an emission region on the pixel circuit layer; a light-emitting layer respectively disposed on the pixel electrode; a common electrode disposed on the light-emitting layer; a encapsulation layer covering the common electrode; and a light-shielding member disposed on the encapsulation layer. The light-shielding member includes: a first light-shielding member overlapping the emission region; and a second light-shielding member overlapping a non-emission region between the emission regions, and the pixel electrode has an opening respectively overlapping the first light-shielding member.

[0009] At least one of the openings may not have a region that does not overlap with the corresponding first light-shielding member among the first light-shielding members.

[0010] Each of the openings may have a width smaller than the width of the first light-shielding member among the first light-shielding members overlapping the corresponding opening.

[0011] Each of the openings and the first light-shielding member among the first light-shielding members overlapping the corresponding opening may have the same width.

[0012] Each of the openings and the first light-shielding member among the first light-shielding members overlapping the corresponding opening may have the same shape.

[0013] The light-emitting layer may fill the openings of the pixel electrodes, respectively.

[0014] The portion of the light-emitting layer filled in the opening of the pixel electrode may contact the pixel circuit layer.

[0015] The display device may further include: a reflective electrode disposed between the first light-shielding member and the encapsulation layer.

[0016] The reflective electrode may overlap the openings of the pixel electrodes, respectively.

[0017] The display device may further include: a touch array disposed between the first light-shielding member and the encapsulation layer, and the reflective electrode and the touch electrode of the touch array may include the same material.

[0018] The reflective electrode may include a metal material.

[0019] Each of the reflective electrodes may have a shape recessed in the direction facing the pixel electrode.

[0020] The first light-shielding members may be spaced apart from each other, and a corresponding one of the second light-shielding members is disposed between adjacent first light-shielding members among the first light-shielding members.

[0021] The first light-shielding member and the second light-shielding member may be disposed in the same layer.

[0022] The first light-shielding members may be respectively disposed in the central portions of the emission regions.

[0023] The display device may further include: color filters respectively overlapping the light-emitting layer, the color filters may respectively overlap the emission regions, and the colors of the color filters may respectively match the light-emitting colors of the emission regions.

[0024] Each of the color filters may contact the first light-shielding member among the first light-shielding members overlapping the corresponding color filter.

[0025] The reflective electrode may prevent the light emitted from the light-emitting layer from reaching the first light-shielding member.

[0026] The display device may further include: color filters, which overlap with the light-emitting layers respectively. The color filters may overlap with the emission regions respectively, and the colors of the color filters may match the light-emitting colors of the emission regions respectively.

[0027] At least some of the light reflected by the reflective electrode may be reflected by the first electrode and / or the second electrode of the light-emitting element, and output to the color filter. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The above and other features of the present disclosure will become more apparent by describing embodiments of the present disclosure in more detail with reference to the accompanying drawings, in which:

[0029] Figure 1 is a schematic block diagram illustrating a display device according to an embodiment of the present disclosure;

[0030] Figure 2 is Figure 1 a schematic plan view of a display panel of

[0031] Figure 3 is Figure 1 a schematic cross-sectional view of a display panel of

[0032] Figure 4 is a schematic diagram illustrating an equivalent circuit of an embodiment of a pixel included in the display device of Figure 1 ;

[0033] Figure 5 is a schematic diagram illustrating Figure 2 a schematic plan view of an embodiment of a pixel unit of

[0034] Figure 6 is a schematic cross-sectional view taken along line I-I' of a display panel according to an embodiment of the display panel Figure 5 ;

[0035] Figure 7 is a schematic cross-sectional view taken along line I-I' of a display panel according to an embodiment of the display panel Figure 5 ;

[0036] Figures 8 to 10 is a schematic enlarged view of part A of Figure 7 according to various embodiments of the display panel; and

[0037] Figure 11 and Figure 12 are schematic plan views illustrating other embodiments of the pixel unit of Figure 2 ; DETAILED DESCRIPTION

[0038] Hereinafter, one or more embodiments according to the present disclosure will be described in detail with reference to the accompanying drawings. It should be noted that in the following description, only the parts necessary for understanding the operation according to the present disclosure are described, and the description of other parts is omitted so as not to obscure the subject matter of the present disclosure. In addition, the present disclosure may be embodied in other forms and is not limited to the embodiments described herein. However, the embodiments described herein are provided to describe in sufficient detail to enable those skilled in the art to which the present disclosure pertains to easily implement the technical spirit of the present disclosure.

[0039] Throughout the specification, when a part is "connected" to another part, this case includes not only the case where the part is "directly connected", but also the case where the part is "indirectly connected" with another element intervening therebetween. The terms used herein are for describing specific embodiments and are not intended to limit the present disclosure. Throughout the specification, when a part "includes" something, this means that the part may further include another component without excluding the other component, unless otherwise stated.

[0040] For the purposes of the present disclosure, the phrase "at least one of A and B" can be understood to mean only A, only B, or any combination of A and B. In addition, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" can be interpreted to mean only X, only Y, only Z, or any combination of two or more of X, Y, and Z.

[0041] The term "and / or" includes all combinations that can be defined by one or more associated configurations. For example, "A and / or B" can be understood to mean "A, B, or A and B".

[0042] Here, terms such as first and second can be used to describe various components, but these components are not limited to these terms. These terms are used to distinguish one component from another. Therefore, without departing from the scope disclosed herein, the first component may refer to the second component within a certain range.

[0043] When an element or layer is referred to as being "on", "connected to", or "coupled to" another element or layer, it can be directly on, directly connected to, or directly coupled to the other element or layer, or there may be intervening elements or layers. However, when an element or layer is referred to as being "directly on", "directly connected to", or "directly coupled to" another element or layer, there are no intervening elements or layers. For this reason, the term "connected" can refer to a physical, electrical, and / or fluid connection with or without intervening elements.

[0044] Unless otherwise defined or implied herein, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the relevant art and the context of this disclosure, and should not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0045] Figure 1 is a schematic block diagram illustrating a display device according to an embodiment of the present disclosure.

[0046] Referring Figure 1 , the display device DD may include a display panel DP, a controller 110, a data driver 120, a scan driver 130, and / or an emission driver 140.

[0047] The display panel DP may include one or more pixels PXL. The display panel DP may be connected to scan lines SL1 to SLn, data lines DL1 to DLm, and emission control lines ECL1 to ECLn. The scan lines SL1 to SLn, the data lines DL1 to DLm, and the emission control lines ECL1 to ECLn may be disposed on the display panel DP to cross or intersect with each other, where n and m are natural numbers greater than 0. The pixel PXL may be electrically connected to the scan lines SL1 to SLn, the data lines DL1 to DLm, and / or the emission control lines ECL1 to ECLn in the display panel DP.

[0048] The display panel DP may be various types of panels such as an organic light emitting diode (OLED) panel. The types of lines disposed in the display panel DP may vary according to pixel structures, panel types, and the like.

[0049] The controller 110 may control the operations of the data driver 120, the scan driver 130, and / or the emission driver 140. The controller 110 may provide a first control signal SCS to the scan driver 130 to apply scan signals to the scan lines SL1 to SLn according to a timing implemented in each frame. The controller 110 may provide an image data signal DATA converted from the data format of an image signal to suit the interface specification of the data driver 120. In the case where the scan signals are applied to the scan lines SL1 to SLn, the controller 110 may provide a second control signal DCS to the data driver 120 to apply data voltages to the data lines DL1 to DLm. The controller 110 may provide a third control signal ECS to the emission driver 140 to apply emission control signals to the emission control lines ECL1 to ECLn.

[0050] The controller 110 can be a timing controller used in typical display technologies, or can be a control device that can perform another control function by including a timing controller.

[0051] The data driver 120 can output data signals to data lines DL1 to DLm. For example, the data driver 120 can receive a second control signal DCS and an image data signal DATA from the controller 110. The data driver 120 can convert the image data signal DATA into a data signal and output the data signal to data lines DL1 to DLm. The data signal can be an analog voltage corresponding to the gray value of the image data signal DATA. For example, when a specific scan line is selected by the scan driver 130, the data driver 120 can supply analog data voltages to data lines DL1 to DLm.

[0052] The scan driver 130 can receive a first control signal SCS from the controller 110. The scan driver 130 can output scan signals to scan lines SL1 to SLn. The scan driver 130 can sequentially supply scan signals to scan lines SL1 to SLn according to the first control signal SCS from the controller 110. The pixel PXL receiving each scan signal can receive an analog voltage of a gray value corresponding to the image data signal DATA and output light of a brightness corresponding to the received analog voltage in response to an emission control signal. Accordingly, an image can be displayed on the display panel DP.

[0053] The emission driver 140 can receive a third control signal ECS from the controller 110. The emission driver 140 can supply an emission control signal to emission control lines ECL1 to ECLn in response to the third control signal ECS. The third control signal ECS can include a start signal and a clock signal for the emission control signal. The emission control signal can be set to a cut-off level (e.g., a high voltage). A transistor receiving the emission control signal can be cut off when the emission control signal is supplied and can be set to be conductive in other cases.

[0054] In Figure 1 For ease of description, the data driver 120, the scan driver 130, and the emission driver 140 are shown as separate components, but the present disclosure is not limited thereto. For example, at least some of the data driver 120, the scan driver 130, and the emission driver 140 can be integrated into one driving circuit or module, etc.

[0055] Figure 2 is Figure 1 a schematic plan view of the display panel of

[0056] Reference Figure 2, the display panel DP and the substrate SUB for forming the display panel DP may include a display area DA for displaying an image and a non-display area NDA other than the display area DA. The display area DA may constitute a screen on which an image is displayed, and the non-display area NDA may be the remaining area other than the display area DA.

[0057] For ease of description, based on the display area DA Figure 2 the structure of the display panel DP is briefly shown. However, although not shown in Figure 2 at least one driving circuit (e.g., at least one of a scan driver, a data driver, and an emission driver), a line, and / or a pad may be further provided on the display panel DP.

[0058] Pixel units may be provided in the display area DA. Each pixel unit may include a first pixel PXL1, a second pixel PXL2, and / or a third pixel PXL3. In Figure 2 for clarity and concise description, the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 included in the pixel unit PXU are illustrated. Other pixel units may also be understood to include the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3.

[0059] Hereinafter, in any case of referring to at least one pixel among the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3, or in the case of referring to two or more types of pixels together, at least one pixel or two or more types of pixels are referred to as "pixel PXL".

[0060] The pixel PXL may be arranged (or regularly arranged) according to a stripe or an arrangement structure or the like. However, the arrangement structure of the pixel PXL is not limited thereto, and the pixel PXL may be arranged in the display area DA in various structures and / or methods.

[0061] According to an embodiment, two or more types of pixel PXLs that emit light of different colors may be provided in the display area DA. For example, in the display area DA, a first pixel PXL1 that emits light of a first color, a second pixel PXL2 that emits light of a second color, and a third pixel PXL3 that emits light of a third color may be arranged. At least one of the first to third pixels PXL1, PXL2, and PXL3 that are set to be adjacent to each other may constitute a pixel unit PXU capable of emitting light of various colors. For example, the first pixel PXL1 may be a red pixel that emits red light, the second pixel PXL2 may be a green pixel that emits green light, and the third pixel PXL3 may be a blue pixel that emits blue light, but the present disclosure is not limited thereto.

[0062] However, inFigure 2 In this case, it is shown that the pixel unit PXU includes a first pixel PXL1, a second pixel PXL2, and a third pixel PXL3, but the present disclosure is not limited thereto. For example, the pixel unit PXU may include a first pixel PXL1, two second pixels PXL2, and a third pixel PXL3.

[0063] The first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 may respectively include a first light-emitting element LD1 (see Figure 6 ) as a light source, a second light-emitting element LD2 (see Figure 6 ), and a third light-emitting element LD3 (see Figure 6 ). Accordingly, the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 may respectively emit light of a first color, light of a second color, and light of a third color. However, the color of the light emitted from each of the pixels PXL can be variously changed.

[0064] Figure 3 is Figure 1 a schematic cross-sectional view of the display panel.

[0065] Referring to Figure 3 , the display panel DP may include a substrate SUB, a pixel circuit layer PCL, a light-emitting element layer LDL, a thin film encapsulation layer TFE, a color filter layer CFL, and an outer coating OC.

[0066] The substrate SUB may include a semiconductor substrate. As an example, the substrate SUB may include a silicon bulk wafer or an epitaxial wafer. The epitaxial wafer may include a crystalline material layer such as an epitaxial layer grown on a bulk substrate by an epitaxial process. The substrate SUB is not limited to a silicon bulk wafer or an epitaxial wafer, and various wafers such as a polished wafer, an annealed wafer, and a silicon-on-insulator (SOI) wafer may be used to form it.

[0067] The pixel circuit layer PCL may be disposed on the substrate SUB and may include circuit elements of the pixel circuit PXC (see Figure 4 ) and at least one insulating layer located between the circuit elements. The circuit elements may include one or more transistors and signal lines connected to the transistors. For example, the transistors may be metal-oxide-semiconductor field-effect transistors (MOSFETs), but are not limited thereto. The circuit elements may include gate electrodes, source / drain regions, and channel regions.

[0068] The above-mentioned substrate SUB and pixel circuit layer PCL may be formed by applying semiconductor processes and equipment, but the present disclosure is not limited thereto.

[0069] The light-emitting element layer LDL may include a light-emitting element LD (see Figure 6 ) and a pixel defining layer PDL (seeFigure 6 )。The light-emitting element LD may be located in the first pixel PXL1 to the third pixel PXL3. The light-emitting element LD may include a first electrode (or pixel electrode) EL1 (see Figure 6 ), a light-emitting layer EML (see Figure 6 ), and a second electrode (or common electrode) EL2 (see Figure 6 ). The first electrode EL1 may be the anode of the light-emitting element LD, and the second electrode EL2 may be the cathode of the light-emitting element LD.

[0070] The thin-film encapsulation layer TFE may be located on the light-emitting element layer LDL. The thin-film encapsulation layer TFE may cover the light-emitting element layer LDL (or overlap therewith) to prevent the penetration of oxygen and / or moisture, etc. into the light-emitting element layer LDL.

[0071] The color filter layer CFL may be located on the thin-film encapsulation layer TFE. The color filter layer CFL may selectively transmit the light emitted from the light-emitting element LD in the image display direction (or front direction) of the display device DD, but the present disclosure is not limited thereto.

[0072] The outer coating OC may be provided on the pixel PXL having the above-described structure. The outer coating OC may cover the lower member including the color filter layer CFL. The outer coating OC may protect the above-described lower member from foreign substances such as dust. However, an embodiment in which the outer coating OC is not included in each of the pixels PXL and is a separate component is described as an example, but is not limited thereto. The outer coating OC may be a partial component included in each of the pixels PXL.

[0073] Figure 4 is a schematic diagram of an equivalent circuit illustrating an embodiment of a pixel included in the Figure 1 display device. In Figure 4 , for ease of description, a first pixel PXL1 included in any one of the pixel units in the i-th pixel row located in the Figure 1 display panel DP is shown.

[0074] Referring to Figure 2 and Figure 4 , the first pixel PXL1 may be located in the i-th pixel row and the j-th pixel column (where i is a natural number greater than 0 and less than or equal to n, and j is a natural number greater than 0 and less than or equal to m). Each of the first pixel PXL1 to the third pixel PXL3 may be configured substantially similarly. Hereinafter, the technical spirit of the present disclosure is described based on the first pixel PXL1. Each of the second pixel PXL2 and the third pixel PXL3 may be configured similarly to the first pixel PXL1.

[0075] Referring to Figure 4, the first pixel PXL1 may include a light-emitting unit EMU that generates light corresponding to a data signal and a pixel circuit PXC that drives the light-emitting unit EMU.

[0076] The light-emitting unit EMU may include a first light-emitting element LD1 connected between a first power line PL1 supplied with the voltage of a first driving power supply VDD and a second power line PL2 supplied with the voltage of a second driving power supply VSS. As an example, the light-emitting unit EMU may include a first electrode EL1_1 connected to the first driving power supply VDD via the pixel circuit PXC and the first power line PL1 and a second electrode EL2 connected to the second driving power supply VSS via the second power line PL2. During the emission period of the first pixel PXL1, the potential difference between the first driving power supply VDD and the second driving power supply VSS may be set to be substantially equal to or higher than the threshold voltage of the first light-emitting element LD1.

[0077] In an embodiment, the first light-emitting element LD1 may be an organic light-emitting diode including an organic light-emitting layer. In another embodiment, the first light-emitting element LD1 may be an inorganic light-emitting element formed of an inorganic material. In still another embodiment, the first light-emitting element LD1 may be a light-emitting element constituted by a combination of an inorganic material and an organic material. As another example, the first light-emitting element LD1 may have a form in which inorganic light-emitting elements are connected in parallel and / or in series between the second driving power supply VSS and a fourth node N4.

[0078] The pixel circuit PXC of the first pixel PXL1 may be electrically connected to the i-th first scan line SL1_i to the i-th third scan line SL3_i and the j-th data line DLj. The pixel circuit PXC may be electrically connected to the i-th emission control line ECLi.

[0079] The above pixel circuit PXC may include a first transistor M1 to a seventh transistor M7 and a storage capacitor Cst.

[0080] The first transistor M1 may be connected between a second node N2 and a third node N3. The first transistor M1 may generate a driving current and supply the driving current to the first light-emitting element LD1. The gate electrode of the first transistor M1 may be connected to a first node N1. The first transistor M1 may control the amount of current (driving current) flowing from the first driving power supply VDD to the second driving power supply VSS via the first light-emitting element LD1 based on the voltage of the first node N1.

[0081] The second transistor M2 may be connected between the j-th data line DLj and the second node N2. The gate electrode of the second transistor M2 may be connected to the i-th first scan line SL1_i. The second transistor M2 may be turned on when the first scan signal is supplied to the i-th first scan line SL1_i to electrically connect the data line DLj and the second node N2.

[0082] The third transistor M3 may be connected between the first node N1 and the third node N3. The gate electrode of the third transistor M3 may be connected to the i-th first scan line SL1_i. The third transistor M3 may be turned on simultaneously with the second transistor M2.

[0083] The fourth transistor M4 may be connected between the first node N1 and the initialization power supply Vint. The gate electrode of the fourth transistor M4 may be connected to the i-th second scan line SL2_i. The fourth transistor M4 may be turned on by the second scan signal supplied to the i-th second scan line SL2_i. When the fourth transistor M4 is turned on, the voltage of the initialization power supply Vint may be supplied to the first node N1 (e.g., the gate electrode of the first transistor M1).

[0084] The fifth transistor M5 may be connected between the first driving power supply VDD and the second node N2. The gate electrode of the fifth transistor M5 may be connected to the i-th emission control line ECLi. The sixth transistor M6 may be connected between the third node N3 and the first light-emitting element LD1. The gate electrode of the sixth transistor M6 may be connected to the i-th emission control line ECLi. The fifth transistor M5 and the sixth transistor M6 may be turned off when the emission control signal is supplied to the i-th emission control line ECLi and may be turned on in other cases.

[0085] According to an embodiment, when the fifth transistor M5 and the sixth transistor M6 are turned on, the current flowing in the first transistor M1 may be transferred to the first light-emitting element LD1, and the first light-emitting element LD1 may emit light. The emission period of the first light-emitting element LD1 may be determined in response to the on-periods of the fifth transistor M5 and the sixth transistor M6. The on-periods of the fifth transistor M5 and the sixth transistor M6 may correspond to the duty (emission period) of the emission control signal, and the off-periods of the fifth transistor M5 and the sixth transistor M6 may correspond to the non-duty (non-emission period) of the emission control signal.

[0086] The seventh transistor M7 may be connected to the first electrode (e.g., the fourth node N4) of the first light-emitting element LD1. The gate electrode of the seventh transistor M7 may be connected to the i-th third scan line SL3_i. The seventh transistor M7 may be turned on by the third scan signal supplied to the i-th third scan line SL3_i to supply the voltage of the initialization power supply Vint to the first electrode of the first light-emitting element LD1.

[0087] The storage capacitor Cst can be connected between the first driving power supply VDD and the first node N1. The storage capacitor Cst can include a first storage electrode and a second storage electrode. The first storage electrode can be electrically connected to the first driving power supply VDD, and the second storage electrode can be electrically connected to the first node N1. The storage capacitor Cst can be charged with a data voltage corresponding to the data signal supplied to the first node N1 during a frame period. Accordingly, the storage capacitor Cst can store a voltage corresponding to the potential difference between the voltage of the gate electrode of the first transistor M1 and the first driving power supply VDD.

[0088] Figure 4 An embodiment is illustrated in which all of the first transistor M1 to the seventh transistor M7 are P-type transistors, but the present disclosure is not limited thereto. For example, at least one of the first transistor M1 to the seventh transistor M7 can be an N-type transistor.

[0089] The structure of the pixel circuit PXC can be variously changed and implemented. As an example, the pixel circuit PXC can include seven transistors and two capacitors. According to an embodiment, the pixel circuit PXC can include five transistors and two capacitors. However, the present disclosure is not limited thereto.

[0090] In the following embodiments, for ease of description, the horizontal direction (or X-axis direction) on the plane is represented as the first direction DR1, the vertical direction (or Y-axis direction) on the plane is represented as the second direction DR2, and the vertical direction on the cross-section is represented as the third direction DR3.

[0091] Figure 5 is a schematic plan view of an embodiment of a pixel unit Figure 2 illustrated.

[0092] Referring to Figure 2 and Figure 5 the pixel unit PXU can be located in the display area DA and can include an emission area EMA and a non-emission area NEA.

[0093] The pixel unit PXU can include a first pixel PXL1 to a third pixel PXL3. The first pixel PXL1 to the third pixel PXL3 can be arranged according to various structures (e.g., a stripe structure and etc.) and is not limited to Figure 5 .

[0094] The first pixel PXL1 may include a first emission region EMA1 and a non-emission region NEA adjacent to the first emission region EMA1 (or surrounding at least one side of the first emission region EMA1). The second pixel PXL2 may include a second emission region EMA2 and a non-emission region NEA adjacent to the second emission region EMA2 (or surrounding at least one side of the second emission region EMA2). The third pixel PXL3 may include a third emission region EMA3 and a non-emission region NEA adjacent to the third emission region EMA3 (or surrounding at least one side of the third emission region EMA3). The first emission region EMA1, the second emission region EMA2, and the third emission region EMA3 may constitute the emission region EMA of each of the pixels PXL.

[0095] Each of the first pixel PXL1 to the third pixel PXL3 may include a light-emitting light-emitting element LD1 (see Figure 4 ), and a circuit element for driving the light-emitting element LD1.

[0096] The first emission region EMA1 may be a region that emits light from the light-emitting element LD1 driven by the circuit element of the first pixel PXL1 (see Figure 6 ). The second emission region EMA2 may be a region that emits light from the light-emitting element LD2 driven by the circuit element of the second pixel PXL2 (see Figure 6 ). The third emission region EMA3 may be a region that emits light from the light-emitting element LD3 driven by the circuit element of the third pixel PXL3 (see Figure 6 ).

[0097] The first emission region EMA1 may be a region that emits light of a first color (e.g., red). The second emission region EMA2 may be a region that emits light of a second color (e.g., green). The third emission region EMA3 may be a region that emits light of a third color (e.g., blue). However, the present disclosure is not limited thereto. The first emission region EMA1 to the third emission region EMA3 may emit light of the same color.

[0098] The light-emitting element LD1 located in the first pixel PXL1 may include a first electrode EL1_1, a first light-emitting layer EML1 located on the first electrode EL1_1 (see Figure 6 ), and a second electrode EL2 located on the first light-emitting layer EML1 (see Figure 6 ). The light-emitting element LD2 located in the second pixel PXL2 may include a second electrode EL1_2, a second light-emitting layer EML2 located on the second electrode EL1_2 (see Figure 6) and a second electrode EL2 located on the second light-emitting layer EML2. The light-emitting element LD3 in the third pixel PXL3 may include a 1st - 3rd electrode EL1_3 and a third light-emitting layer EML3 located on the 1st - 3rd electrode EL1_3 (see Figure 6 ) and a second electrode EL2 located on the third light-emitting layer EML3. The 1st - 1st electrode EL1_1, the 1st - 2nd electrode EL1_2, and the 1st - 3rd electrode EL1_3 may constitute the first electrode EL1 of the pixel PXL.

[0099] The pixel unit PXU may include a first light-shielding member BM1 and a second light-shielding member BM2. In an embodiment, the first light-shielding member BM1 and the second light-shielding member BM2 may be formed in the same process and may be disposed in the same layer. The first light-shielding member BM1 and the second light-shielding member BM2 may be arranged to be spaced apart from each other. For example, the 1st - 1st light-shielding member BM1_1 and the 1st - 2nd light-shielding member BM1_2 may be arranged to be spaced apart from each other while the second light-shielding member BM2 is between the 1st - 1st light-shielding member BM1_1 and the 1st - 2nd light-shielding member BM1_2. The 1st - 2nd light-shielding member BM1_2 and the 1st - 3rd light-shielding member BM1_3 may be arranged to be spaced apart from each other while the second light-shielding member BM2 is between the 1st - 2nd light-shielding member BM1_2 and the 1st - 3rd light-shielding member BM1_3.

[0100] The first light-shielding member BM1 and the second light-shielding member BM2 may include a light-shielding material. According to an embodiment, the first light-shielding member BM1 and the second light-shielding member BM2 may include a light-absorbing material. For example, the first light-shielding member BM1 and the second light-shielding member BM2 may include a colorant containing one or more of carbon black and lactam black. However, the present disclosure is not limited thereto, and the light-absorbing material may include various materials.

[0101] In a plan view, the first light-shielding member BM1 may overlap each of the first emission region EMA1 to the third emission region EMA3. The first light-shielding member BM1 may be respectively disposed in the central portions of the first emission region EMA1 to the third emission region EMA3. For example, in a plan view, the 1st - 1st light-shielding member BM1_1 may overlap the first emission region EMA1. In particular, the 1st - 1st light-shielding member BM1_1 may be disposed in the central portion of the first emission region EMA1. In a plan view, the 1st - 2nd light-shielding member BM1_2 may overlap the second emission region EMA2. In particular, the 1st - 2nd light-shielding member BM1_2 may be disposed in the central portion of the second emission region EMA2. In a plan view, the 1st - 3rd light-shielding member BM1_3 may overlap the third emission region EMA3. In particular, the 1st - 3rd light-shielding member BM1_3 may be disposed in the central portion of the third emission region EMA3.

[0102] The second light-shielding member BM2 may be disposed in the non-emission area NEA between the first emission area EMA1 to the third emission area EMA3. For example, in a plan view, the second light-shielding member BM2 may surround each of the first emission area EMA1 to the third emission area EMA3.

[0103] As described above, the first pixel PXL1 to the third pixel PXL3 may form the first light-shielding member BM1 in each emission area to reduce the reflectance, thereby improving the image quality of the display device DD.

[0104] Although not shown in Figure 5 , the first electrode EL1_1, the first electrode EL1_2, and the first electrode EL1_3 of the first pixel PXL1 to the third pixel PXL3 may be electrically connected to the circuit elements of the pixel circuit layer PCL (see Figure 3 ) through contact holes. Hereinafter, the present disclosure will be described based on the stacked structure (or cross-sectional structure) of the pixel PXL.

[0105] Figure 6 is a schematic cross-sectional view taken along the line I-I’ of an embodiment of the display panel. Figure 5

[0106] Referring to Figure 6 , each of the first pixel PXL1 to the third pixel PXL3 may include a substrate SUB, a pixel circuit layer PCL, a light-emitting element layer LDL, a thin-film encapsulation layer TFE, a color filter layer CFL, and an outer coating OC.

[0107] The light-emitting element layer LDL may include a light-emitting element LD and a pixel defining layer PDL. The light-emitting element LD may include a first electrode EL1, a light-emitting layer EML, and a second electrode EL2.

[0108] The first electrode EL1 may be disposed on the pixel circuit layer PCL. The first electrode EL1 may include an opaque conductive material having a reflectance and capable of reflecting light, but the present disclosure is not limited thereto.

[0109] The pixel defining layer PDL may be located on the first electrode EL1.

[0110] The light-emitting layer EML may be disposed in the area defined by the pixel defining layer PDL. The light-emitting layer EML may be respectively located on the first electrode EL1 exposed by the pixel defining layer PDL. The light-emitting layer EML may include a light-generating layer that emits light, an electron transport layer that transports electrons, a hole transport layer that transports holes, etc., but the present disclosure is not limited thereto.

[0111] The second electrode EL2 may be located on the light-emitting layer EML and may cover the light-emitting layer EML. The second electrode EL2 may be commonly provided to the first pixel PXL1 to the third pixel PXL3.

[0112] In each of the first pixel PXL1 to the third pixel PXL3 (see Figure 2 ), holes injected from the first electrode EL1 and electrons injected from the second electrode EL2 may be transferred into the light-emitting layer EML. In this way, excitons may be formed, and in the case where the excitons transition from the excited state to the ground state, light may be generated and emitted in the form of visible light.

[0113] The light-emitting element LD may include a first light-emitting element LD1 located in the first pixel PXL1, a second light-emitting element LD2 located in the second pixel PXL2, and a third light-emitting element LD3 located in the third pixel PXL3.

[0114] The first light-emitting element LD1 may include a 1-1 electrode EL1_1, a first light-emitting layer EML1, and a second electrode EL2.

[0115] The second light-emitting element LD2 may include a 1-2 electrode EL1_2, a second light-emitting layer EML2, and a second electrode EL2.

[0116] The third light-emitting element LD3 may include a 1-3 electrode EL1_3, a third light-emitting layer EML3, and a second electrode EL2.

[0117] Each of the 1-1 electrode EL1_1, the 1-2 electrode EL1_2, and the 1-3 electrode EL1_3 may be provided and / or formed on the pixel circuit layer PCL of the corresponding pixel. As an example, the 1-1 electrode EL1_1, the 1-2 electrode EL1_2, and the 1-3 electrode EL1_3 may be provided and / or formed on an insulating layer having a flat surface of the pixel circuit layer PCL using a mask through a photolithography process.

[0118] The 1-1 electrode EL1_1, the 1-2 electrode EL1_2, and the 1-3 electrode EL1_3 may be set to be spaced apart from each other. The 1-1 electrode EL1_1 may be the anode of the first light-emitting element LD1, the 1-2 electrode EL1_2 may be the anode of the second light-emitting element LD2, and the 1-3 electrode EL1_3 may be the anode of the third light-emitting element LD3.

[0119] The first - 1 electrode EL1_1, the first - 2 electrode EL1_2, and the first - 3 electrode EL1_3 may include openings OP that expose regions of the pixel circuit layer PCL. The openings OP can be formed by changing a mask without a separate additional process. Each of the openings OP can completely overlap at least one of the first light - shielding members BM1. For example, the first - 1 electrode EL1_1 may include a first opening OP1 that overlaps the first - 1 light - shielding member BM1_1. The first - 2 electrode EL1_2 may include a second opening OP2 that overlaps the first - 2 light - shielding member BM1_2. The first - 3 electrode EL1_3 may include a third opening OP3 that overlaps the first - 3 light - shielding member BM1_3.

[0120] The first - 1 electrode EL1_1 can be electrically connected to circuit elements of the pixel circuit layer PCL of the first pixel PXL1. The first - 1 electrode EL1_1 can be electrically connected to the second terminals of the sixth transistor M6 and the seventh transistor M7 of the first pixel PXL1 described with reference Figure 4 to.

[0121] The first - 2 electrode EL1_2 can be electrically connected to circuit elements of the pixel circuit layer PCL of the second pixel PXL2. The first - 3 electrode EL1_3 can be electrically connected to circuit elements of the pixel circuit layer PCL of the third pixel PXL3.

[0122] The first - 1 electrode EL1_1, the first - 2 electrode EL1_2, and the first - 3 electrode EL1_3 can be constituted by a first conductive layer (e.g., a source - drain layer) provided on the pixel circuit layer PCL.

[0123] The first - 1 electrode EL1_1, the first - 2 electrode EL1_2, and the first - 3 electrode EL1_3 can be formed by the same process, can include the same materials, and can be located in the same layer. The first - 1 electrode EL1_1, the first - 2 electrode EL1_2, and the first - 3 electrode EL1_3 can be formed of a material having a reflectivity such that light emitted from the light - emitting layer EML can travel in the image display direction. As an example, the first - 1 electrode EL1_1, the first - 2 electrode EL1_2, and the first - 3 electrode EL1_3 can be formed of a conductive material (or substance). For example, the first - 1 electrode EL1_1, the first - 2 electrode EL1_2, and the first - 3 electrode EL1_3 can include metals such as silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), titanium (Ti), and their alloys. However, this is merely an example, and the first - 1 electrode EL1_1, the first - 2 electrode EL1_2, and the first - 3 electrode EL1_3 can be provided and / or formed as multiple layers in which at least two or more materials among metals, alloys, conductive oxides, and conductive polymers are stacked.

[0124] The pixel - defining layer PDL can be located in the non - emitting area NEA and can be a structure that defines the first emitting area EMA1 to the third emitting area EMA3. As an example, the pixel - defining layer PDL can be a structure that is on the pixel circuit layer PCL located in the non - emitting area NEA and defines the first emitting area EMA1 of the first pixel PXL1, the second emitting area EMA2 of the second pixel PXL2, and the third emitting area EMA3 of the third pixel PXL3.

[0125] The pixel - defining layer PDL can be opened to at least expose the first opening OP1 of the first - 1 electrode EL1_1 in the first emitting area EMA1, the second opening OP2 of the first - 2 electrode EL1_2 in the second emitting area EMA2, and the third opening OP3 of the first - 3 electrode EL1_3 in the third emitting area EMA3.

[0126] The pixel - defining layer PDL can be constituted of an organic insulating layer including an organic material. The organic material can include, for example, acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin. According to an embodiment, the pixel - defining layer PDL can include a light - absorbing material or can be coated with a light - absorber for absorbing incident light from the outside. For example, the pixel - defining layer PDL can include a carbon - based black pigment, but is not limited thereto.

[0127] The pixel - defining layer PDL can protrude from the surface (or upper surface) of the pixel circuit layer PCL in the third direction DR3.

[0128] The first light-emitting layer EML1 may be disposed on the 1-1 electrode EL1_1 exposed by the pixel defining layer PDL. The first light-emitting layer EML1 may fill the first opening OP1 of the 1-1 electrode EL1_1. Accordingly, the portion of the first light-emitting layer EML1 filled in the first opening OP1 of the 1-1 electrode EL1_1 may contact the pixel circuit layer PCL.

[0129] The second light-emitting layer EML2 may be disposed on the 1-2 electrode EL1_2 exposed by the pixel defining layer PDL. The second light-emitting layer EML2 may fill the second opening OP2 of the 1-2 electrode EL1_2. Accordingly, the portion of the second light-emitting layer EML2 filled in the second opening OP2 of the 1-2 electrode EL1_2 may contact the pixel circuit layer PCL.

[0130] The third light-emitting layer EML3 may be disposed on the 1-3 electrode EL1_3 exposed by the pixel defining layer PDL. The third light-emitting layer EML3 may fill the third opening OP3 of the 1-3 electrode EL1_3. Accordingly, the portion of the third light-emitting layer EML3 filled in the third opening OP3 of the 1-3 electrode EL1_3 may contact the pixel circuit layer PCL.

[0131] The first light-emitting layer EML1 to the third light-emitting layer EML3 may constitute the light-emitting layer EML of the first pixel PXL1 to the third pixel PXL3. The second electrode EL2 may be disposed on the first light-emitting layer EML1 of the first pixel PXL1, the second light-emitting layer EML2 of the second pixel PXL2, and the third light-emitting layer EML3 of the third pixel PXL3.

[0132] The second electrode EL2 may be commonly provided to the first pixel PXL1 to the third pixel PXL3. The second electrode EL2 may be provided in a plate shape throughout the display area DA, but the present disclosure is not limited thereto. The second electrode EL2 may be a second conductive layer disposed on the pixel circuit layer PCL, but is not limited thereto.

[0133] The second electrode EL2 may be a thin metal layer having a thickness sufficient to transmit light emitted from each of the first light-emitting layer EML1 to the third light-emitting layer EML3. The second electrode EL2 may be formed of a metal material or a transparent conductive material to have a relatively thin thickness. For example, the second electrode EL2 may be formed of various transparent conductive materials. For example, the second electrode EL2 may include at least one of various transparent conductive materials including indium tin oxide, indium zinc oxide, indium tin zinc oxide, aluminum zinc oxide, gallium zinc oxide, zinc oxide tin, or gallium tin oxide. The second electrode EL2 may be implemented to be substantially transparent or semi-transparent to satisfy a light transmittance (e.g., a predetermined or selectable light transmittance). Accordingly, light emitted from each of the first light-emitting layer EML1 to the third light-emitting layer EML3 located under the second electrode EL2 may pass through the second electrode EL2 and may be emitted in an upward direction of the thin-film encapsulation layer TFE.

[0134] The thin-film encapsulation layer TFE may be fully provided and / or formed on the second electrode EL2.

[0135] The thin-film encapsulation layer TFE may include a first encapsulation layer to a third encapsulation layer ENC1, ENC2, and ENC3 sequentially located on the second electrode EL2. The first encapsulation layer ENC1 may be located on the light-emitting element layer LDL and may be positioned over at least a part of the display area DA and the non-display area NDA. The second encapsulation layer ENC2 may be located on the first encapsulation layer ENC1 and may be positioned over at least a part of the display area DA and the non-display area NDA. The third encapsulation layer ENC3 may be located on the second encapsulation layer ENC2 and may be positioned over at least a part of the display area DA and the non-display area NDA. According to an embodiment, the third encapsulation layer ENC3 may be positioned over the entire display area DA and the non-display area NDA.

[0136] Each of the first encapsulation layer ENC1 and the third encapsulation layer ENC3 may be formed of an inorganic layer including an inorganic material, and the second encapsulation layer ENC2 may be formed of an organic layer including an organic material. For example, the inorganic layer may include silicon nitride (SiN x ), silicon oxide (SiO x ), or silicon oxynitride (SiO x N y ), etc. The organic layer may include an organic insulating material such as an acrylic resin (polyacrylate resin), an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, an unsaturated polyester resin, a polyphenylene ether resin, a polyphenylene sulfide resin, or benzocyclobutene (BCB).

[0137] The first light-shielding member BM1, the second light-shielding member BM2, and the color filter CF may be provided on the thin-film encapsulation layer TFE.

[0138] The first light-shielding member BM1_1 can overlap with the first opening OP1 of the first electrode EL1_1 on the surface of the thin-film encapsulation layer TFE. The first light-shielding member BM1_2 can overlap with the second opening OP2 of the first electrode EL1_2 on the surface of the thin-film encapsulation layer TFE. The first light-shielding member BM1_3 can overlap with the third opening OP3 of the first electrode EL1_3 on the surface of the thin-film encapsulation layer TFE. The second light-shielding member BM2 can overlap with the pixel-defining layer PDL on the surface of the thin-film encapsulation layer TFE.

[0139] For example, the first light-shielding member BM1 and the second light-shielding member BM2 can be a black matrix. According to an embodiment, the first light-shielding member BM1 and the second light-shielding member BM2 can include at least one light-shielding material and / or reflective material such that the light emitted from the light-emitting layer EML travels in the image display direction. Accordingly, the light output efficiency of the pixel PXL can be further improved.

[0140] The color filter CF can include a first color filter CF1, a second color filter CF2, and a third color filter CF3. The first color filter CF1 can be disposed in the first pixel PXL1, the second color filter CF2 can be disposed in the second pixel PXL2, and the third color filter CF3 can be disposed in the third pixel PXL3.

[0141] The color filter CF can be a component that selectively transmits light of one color, and the display device DD can implement a full-color pixel structure and can protect other components.

[0142] The first color filter CF1 can be a color filter for forming the first pixel PXL1 and can overlap with the first emission region EMA1. The first color filter CF1 can be disposed on the surface of the thin-film encapsulation layer TFE to correspond to the first light-emitting layer EML1. The second color filter CF2 can be a color filter for forming the second pixel PXL2 and can overlap with the second emission region EMA2. The second color filter CF2 can be disposed on the surface of the thin-film encapsulation layer TFE to correspond to the second light-emitting layer EML2. The third color filter CF3 can be a color filter for forming the third pixel PXL3 and can overlap with the third emission region EMA3. The third color filter CF3 can be disposed on the surface of the thin-film encapsulation layer TFE to correspond to the third light-emitting layer EML3.

[0143] The colors of the first color filter CF1 to the third color filter CF3 may respectively match the light emitting colors of the first emission region EMA1 to the third emission region EMA3. As an example, the first color filter CF1 may selectively transmit light of a first color. The first color filter CF1 may be a red color filter and may include a red color filter material (e.g., a pigment or a dye, etc.). The second color filter CF2 may selectively transmit light of a second color. The second color filter CF2 may be a green color filter and may include a green color filter material (e.g., a pigment or a dye, etc.). The third color filter CF3 may selectively transmit light of a third color. The third color filter CF3 may be a blue color filter and may include a blue color filter material (e.g., a pigment or a dye, etc.).

[0144] Each of the first color filter CF1 to the third color filter CF3 may contact one of the first light shielding members BM1. The first color filter CF1 may contact the 1-1 light shielding member BM1_1. The second color filter CF2 may contact the 1-2 light shielding member BM1_2. The third color filter CF3 may contact the 1-3 light shielding member BM1_3.

[0145] Figure 6 The figure illustrates a case where adjacent color filters CF are arranged to be spaced apart from each other and the second light shielding member BM2 is therebetween, but adjacent color filters CF may at least partially overlap each other on the second light shielding member BM2.

[0146] The outer coating OC may be provided on the first light shielding member BM1, the second light shielding member BM2, and the color filter CF. The outer coating OC may be provided over the first pixel PXL1 to the third pixel PXL3. The outer coating OC may prevent impurities such as moisture or air from penetrating from the outside and damaging or contaminating the color filter CF. The outer coating OC may prevent the material of the color filter CF from diffusing to another component.

[0147] The outer coating OC may include an organic material such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, a polyester resin, a polyphenylene sulfide resin, or a benzocyclobutene. However, the present disclosure is not limited thereto.

[0148] Figure 7 is a schematic cross-sectional view taken along line I-I’ of an embodiment of a display panel. To avoid repetitive description of the embodiment of Figure 5 points different from those of the above-described embodiment will be described. Figure 6 For the sake of avoiding repetitive description of the embodiment of

[0149] Referring to Figure 7 a touch array TA may be further provided between the thin film encapsulation layer TFE and the first light shielding member BM1.

[0150] The touch array TA can be disposed on the thin film encapsulation layer TFE. The touch array TA can include a first insulating layer INS1, a first conductive pattern layer CP1, a second insulating layer INS2, and a second conductive pattern layer CP2.

[0151] The first conductive pattern layer CP1 and the second conductive pattern layer CP2 can be disposed in different layers to form touch electrodes TP. The connection portion CNT can connect the first conductive pattern layer CP1 and the second conductive pattern layer CP2. As an example, the first conductive pattern layer CP1 and the second conductive pattern layer CP2 can be patterned to form touch electrodes TP. For example, a part of the first conductive pattern layer CP1 can constitute a first touch electrode, and a part of each of the first conductive pattern layer CP1 and the second conductive pattern layer CP2 can constitute a second touch electrode. However, the present disclosure is not limited thereto.

[0152] The first conductive pattern layer CP1 can be disposed on the thin film encapsulation layer TFE. As described above, the thin film encapsulation layer TFE can function as a base layer for supporting the touch array TA. The first insulating layer INS1 can be disposed on the thin film encapsulation layer TFE and the first conductive pattern layer CP1. The second conductive pattern layer CP2 can be disposed on the first insulating layer INS1. The first conductive pattern layer CP1 and the second conductive pattern layer CP2 can be spaced apart from each other with the first insulating layer INS1 therebetween.

[0153] The first conductive pattern layer CP1 and the second conductive pattern layer CP2 can include a single layer or multiple layers of metal layers. The first conductive pattern layer CP1 and the second conductive pattern layer CP2 can include, for example, at least one or an alloy of various metal materials including gold (Au), silver (Ag), aluminum (Al), molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and platinum (Pt). According to an embodiment, the first conductive pattern layer CP1 can include, for example, at least one of various transparent conductive materials including silver nanowires (AgNW), indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), antimony zinc oxide (AZO), indium tin zinc oxide (ITZO), zinc oxide (ZnO), tin oxide (SnO 2 ), carbon nanotubes, and graphene.

[0154] The first insulating layer INS1 can include one or more of inorganic materials and organic materials. The second insulating layer INS2 can include one or more of inorganic materials and organic materials. The inorganic materials can include silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y) and one or more of the group of aluminum oxides (AlO x ) and the like. The organic material may include one or more of the group of, for example, acrylic resins, epoxy resins, phenolic resins, polyamide resins, and polyimide resins. However, the present disclosure is not limited thereto.

[0155] The first light-shielding member BM1, the second light-shielding member BM2, and the color filter CF may be provided on the touch array TA.

[0156] The reflective electrode RL may be further provided between the thin-film encapsulation layer TFE and the first light-shielding member BM1.

[0157] At least some of the touch electrodes TP of the touch array TA and the reflective electrode RL may be provided in the same layer and may include the same material. In an embodiment, the reflective electrode RL and the second conductive pattern layer CP2 may be provided in the same layer and may include the same material. The reflective electrode RL may be configured to reflect light and may prevent the light emitted from the light-emitting layer EML from reaching the first light-shielding member BM1. The light reflected by the reflective electrode RL may be reflected again by the second electrode EL2 and / or the first electrode EL1 and may be output to the color filter CF. Accordingly, the light output efficiency of the display device DD can be improved.

[0158] According to an embodiment, the reflective electrode RL may be included in the first pixel PXL1 to the third pixel PXL3. For example, the reflective electrode RL may include a first reflective electrode RL1 included in the first pixel PXL1, a second reflective electrode RL2 included in the second pixel PXL2, and a third reflective electrode RL3 included in the third pixel PXL3.

[0159] The reflective electrode RL may overlap with the light-emitting layer EML of the first pixel PXL1 to the third pixel PXL3. For example, the first reflective electrode RL1 may overlap with the first light-emitting layer EML1. The second reflective electrode RL2 may overlap with the second light-emitting layer EML2. The third reflective electrode RL3 may overlap with the third light-emitting layer EML3.

[0160] The reflective electrode RL may overlap with the openings OP of the 1st - 1 electrode EL1_1, the 1st - 2 electrode EL1_2, and the 1st - 3 electrode EL1_3, respectively. The reflective electrode RL may overlap with the first light-shielding member BM1, respectively. For example, the first reflective electrode RL1 may overlap with the first opening OP1 of the 1st - 1 electrode EL1_1. The first reflective electrode RL1 may also overlap with the 1st - 1 light-shielding member BM1_1. The second reflective electrode RL2 may overlap with the second opening OP2 of the 1st - 2 electrode EL1_2. The second reflective electrode RL2 may also overlap with the 1st - 2 light-shielding member BM1_2. The third reflective electrode RL3 may overlap with the third opening OP3 of the 1st - 3 electrode EL1_3. The third reflective electrode RL3 may also overlap with the 1st - 3 light-shielding member BM1_3. The following refers to Figures 8 to 10 describe the width of each of the first opening OP1 to the third opening OP3.

[0161] The reflective electrode RL may face the first light-shielding member BM1 in the third direction DR3, and may face the light-emitting layer EML in the direction opposite to the third direction DR3.

[0162] As described above, by forming the reflective electrode RL to overlap with the lower part of the first light-shielding member BM1 of each of the first pixel PXL1 to the third pixel PXL3, the light output efficiency of the display device DD can be improved by the light recycling effect.

[0163] Figures 8 to 10 is according to various embodiments of the display panel Figure 7 is a schematic enlarged view of part A. Hereinafter, referring to Figures 8 to 10 describe the structure of the second pixel PXL2, but this can be applied substantially equivalently to each of the first pixel PXL1 and the third pixel PXL3. The repeated description thereof is omitted.

[0164] Referring to Figure 8 , the second pixel PXL2 may include a pixel circuit layer PCL, the 1st - 2 electrode EL1_2, the second light-emitting layer EML2, the second electrode EL2, a thin-film encapsulation layer TFE, the second reflective electrode RL2, the 1st - 2 light-shielding member BM1_2, the second color filter CF2, and an outer coating OC.

[0165] Light L may be emitted from the region where the second light-emitting layer EML2 is provided and may be directed to the outside. Additionally, a part of the light L may be reflected by the lower surface of the second reflective electrode RL2. As described above, the light L may be directly emitted to the outside or recycled.

[0166] The 1st - 2 light-shielding member BM1_2 may be provided in the second emission region EMA2 (see Figure 5) to prevent external light OL from entering the display device DD. For example, the first to second light-shielding member BM1_2 can absorb at least a part of the external light OL. Accordingly, it is possible to prevent a decrease in visibility due to the external light OL and the reflected light based on the external light OL.

[0167] The second reflective electrode RL2 may be disposed under the first to second light-shielding member BM1_2. The second opening OP2 of the first to second electrode EL1_2 may be arranged to overlap the first to second light-shielding member BM1_2 under the second reflective electrode RL2. The second opening OP2 of the first to second electrode EL1_2 may be formed in a region that does not contribute to the circulation of light L, thereby reducing current consumption. Accordingly, the power consumption of the display device DD can be reduced, and the lifespan of the display device DD can be increased.

[0168] The second opening OP2 of the first to second electrode EL1_2 may overlap the first to second light-shielding member BM1_2, and the second opening OP2 and the first to second light-shielding member BM1_2 may have substantially the same shape. For example, when viewed in the third direction DR3, the first to second light-shielding member BM1_2 and the second opening OP2 of the first to second electrode EL1_2 may have a circular shape or a quadrilateral shape. The first to second light-shielding member BM1_2 and the second opening OP2 of the first to second electrode EL1_2 may have the same shape and the same size. However, the present disclosure is not limited thereto, and the first to second light-shielding member BM1_2 and the second opening OP2 of the first to second electrode EL1_2 may have different shapes.

[0169] The first to second light-shielding member BM1_2 may have a first width WD1 in the first direction DR1, and the second opening OP2 of the first to second electrode EL1_2 may have a second width WD2 in the first direction DR1. The first width WD1 of the first to second light-shielding member BM1_2 and the second width WD2 of the second opening OP2 of the first to second electrode EL1_2 may be substantially equal to each other. However, the present disclosure is not limited thereto.

[0170] Reference Figure 9, the second opening OP2' of the first to second electrodes EL1_2' may overlap with the first to second light-shielding members BM1_2. The first to second light-shielding members BM1_2 may have a first width WD1 in the first direction DR1, and the second opening OP2' of the first to second electrodes EL1_2' may have a second width WD2' in the first direction DR1. The second width WD2' of the second opening OP2' of the first to second electrodes EL1_2' may be smaller than the first width WD1 of the first to second light-shielding members BM1_2. For example, when the second width WD2' is smaller than the first width WD1, the recycling efficiency of the light L can be improved. For example, the light reflected by the second reflective electrode RL2 may be reflected again by the first to second electrodes EL1_2' due to the relatively narrow second width WD2', and thus, can reach the second color filter CF2. The shape and size of the second opening OP2 of the first to second electrodes EL1_2 can be variously designed to suit the product, thereby improving the light output efficiency.

[0171] Reference Figure 10 , the second reflective electrode RL2' may have a recessed shape. The second reflective electrode RL2' may extend parallel to the surface formed by the first direction DR1 and the second direction DR2, and may have a shape recessed in the direction opposite to the third direction DR3. The second reflective electrode RL2' may have a shape recessed in the direction facing the second opening OP2 of the first to second electrodes EL1_2. In this way, the second reflective electrode RL2' can relatively scatter the light reflected by the second reflective electrode RL2' to increase the chance of reaching the first to second electrodes EL1_2, thereby further improving the recycling efficiency.

[0172] For example, the edge portion EP of the second reflective electrode RL2' may be inclined at a specific angle and may have a recessed shape. When viewed in a cross-sectional view, the second reflective electrode RL2' may have a shape in which the height of the central portion CEP is relatively low and the height of the edge portion EP is relatively high. As another example, the thickness of the edge portion EP of the second reflective electrode RL2' may be thicker than the thickness of the central portion CEP. However, this is an example, and various methods can be used to form the recessed shape of the second reflective electrode RL2'.

[0173] Figure 11 and Figure 12 is a schematic plan view of other embodiments of the pixel unit shown Figure 2 .

[0174] Reference Figure 11 , the pixel unit PXU' may include a first pixel PXL1', a second pixel PXL2', and / or a third pixel PXL3'.

[0175] The first pixel PXL1’ may include an emission region EMA’ including a first emission sub-region EMA1’ and a non-emission region NEA’ surrounding the first emission sub-region EMA1’. The second pixel PXL2’ may include a second emission sub-region EMA2’ and a non-emission region NEA’ surrounding the second emission sub-region EMA2’. The third pixel PXL3’ may include a third emission sub-region EMA3’ and a non-emission region NEA’ surrounding the third emission sub-region EMA3’. The electrodes EL1’, EL1_1’, EL1_2’ and EL1_3’ may have various shapes as shown, for example, in Figure 11 as shown.

[0176] The light-shielding member BM1’ may include a plurality of light-shielding members. The 1-1 light-shielding member BM1_1’ may be disposed in the first emission sub-region EMA1’. The 1-2 light-shielding member BM1_2’ may be disposed in the second emission sub-region EMA2’. The 1-3 light-shielding member BM1_3’ may be disposed in the third emission sub-region EMA3’. In a plan view, the 1-1 light-shielding member BM1_1’, the 1-2 light-shielding member BM1_2’ and the 1-3 light-shielding member BM1_3’ may have a circular shape. However, the present disclosure is not limited thereto.

[0177] The second pixel PXL2’ and the third pixel PXL3’ may be arranged in a second direction DR2. The first pixel PXL1’ may be disposed in a direction opposite to the first direction DR1 with respect to each of the second pixel PXL2’ and the third pixel PXL3’.

[0178] The first pixel PXL1’ may have an area larger than that of each of the second pixel PXL2’ and the third pixel PXL3’. Accordingly, the first emission sub-region EMA1’ may have an area larger than that of the second emission sub-region EMA2’. The first emission sub-region EMA1’ may have an area larger than that of the third emission sub-region EMA3’. However, the embodiments are not limited thereto. For example, the second pixel PXL2’ and the third pixel PXL3’ may have different areas, and the first pixel PXL1’ may have an area smaller than that of the second pixel PXL2’ and / or the third pixel PXL3’.

[0179] Figure 5 and Figure 11 The arrangements and / or areas of the first pixel PXL1 to the third pixel PXL3 and the first pixel PXL1’ to the third pixel PXL3’ shown respectively in

[0180] Reference Figure 12, the pixel unit PXU” may include a first pixel PXL1” including a first light-shielding member BM1_1” disposed in the first emission area EMA1’. The second pixel PXL2” may include a first light-shielding member BM1_2” disposed in the second emission area EMA2’. The third pixel PXL3” may include a first light-shielding member BM1_3” disposed in the third emission area EMA3’. The light-shielding member BM1” may refer to the first light-shielding member BM1_1”, the first light-shielding member BM1_2”, and the first light-shielding member BM1_3”.

[0181] In a plan view, the first light-shielding member BM1_1”, the first light-shielding member BM1_2”, and the first light-shielding member BM1_3” may have a polygonal shape. For example, the shapes of the first light-shielding member BM1_1”, the first light-shielding member BM1_2”, and the first light-shielding member BM1_3” may be quadrilateral shapes as shown in Figure 12 . However, the present disclosure is not limited thereto.

[0182] Figure 11 and Figure 12 The shapes of the first light-shielding member BM1’ and the first light-shielding member BM1” shown respectively in are exemplary descriptions, but the present disclosure is not limited thereto.

[0183] Although specific embodiments and application examples are described herein, other embodiments and modifications can be derived from the above description. Therefore, the spirit of the present disclosure is not limited to these embodiments, but extends to the scope of the recited claims, various obvious modifications, and equivalents.

[0184] According to an embodiment of the present disclosure, a display device with improved efficiency can be provided.

[0185] The above description is an example of the technical features of the present disclosure, and those skilled in the art to which the present disclosure pertains will be able to make various modifications and changes. Therefore, the above embodiments of the present disclosure can be implemented separately or in combination with each other.

[0186] Therefore, the embodiments disclosed in the present disclosure are not intended to limit the technical spirit of the present disclosure, but are intended to describe the technical spirit of the present disclosure, and the scope of the technical spirit of the present disclosure is not limited by these embodiments. The protection scope of the present disclosure should be interpreted by the claims, and it should be understood that all technical spirits within the equivalent scope are included in the scope of the present disclosure.

Claims

1. A display device, comprising: A pixel circuit layer is disposed on the substrate; a pixel electrode, overlapping the emission area on the pixel circuit layer; Light-emitting layers are respectively arranged on the pixel electrodes; A common electrode, disposed on the light-emitting layer; an encapsulation layer, covering the common electrode; as well as A light shielding member is disposed on the encapsulation layer, wherein: The light shielding member includes: a first light shielding member overlapping the emission area; and a second light shielding member overlapping a non-emission area between the emission areas, and The pixel electrodes have openings respectively overlapping with the first light shielding members.

2. The display device according to claim 1, wherein: At least one of the openings has no region that does not overlap with a corresponding first light shielding member among the first light shielding members.

3. The display device according to claim 1, wherein: A width of each of the openings is less than or equal to a width of a first light shielding member among the first light shielding members that overlaps with the corresponding opening.

4. The display device according to claim 1, wherein: Each of the openings and a first light shielding member among the first light shielding members overlapping with the corresponding opening have the same shape.

5. The display device according to claim 1, wherein: The light emitting layers fill the openings of the pixel electrodes respectively, and Wherein, a portion of the light emitting layer filled in the opening of the pixel electrode contacts the pixel circuit layer.

6. The display device according to claim 1, further comprising: a reflective electrode disposed between the first light shielding member and the encapsulation layer, Wherein, the reflective electrodes overlap with the openings of the pixel electrodes respectively.

7. The display device according to claim 6, further comprising: A touch array is disposed between the first light shielding member and the encapsulation layer, The reflective electrode and the touch electrode of the touch array include the same material.

8. The display device according to claim 6, wherein: Each of the reflective electrodes has a shape that is concave in a direction facing the pixel electrode, Wherein, the first light shielding members are respectively arranged in the central part of the emission area.

9. The display device according to claim 1, wherein: The first light shielding member and the second light shielding member are provided in the same layer.

10. The display device according to any one of claims 1 to 9, further comprising: Color filters overlap the light-emitting layers respectively, wherein: The color filters overlap the emission regions, respectively, and The colors of the color filters are matched to the luminescent colors of the emitting regions, respectively. Each of the color filters contacts a first light shielding member among the first light shielding members that overlaps with the corresponding color filter.

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