Electronic device with brazable metal pad cover and related methods

Abstract

The invention relates to an electronic device with a brazable metal pad cover and a related method. According to various embodiments of the present disclosure, an electronic device is provided. In some embodiments, the electronic device includes a semiconductor substrate, an aluminum pad on the semiconductor substrate, and a stack. The stack includes, in order, a barrier layer deposited directly on the aluminum pad, a seed layer deposited directly on the barrier layer, the seed layer comprising copper and having a thickness of less than 800 nanometers, and a metal layer deposited directly on the seed layer, the metal layer comprising nickel and palladium.

Description

Technical Field

[0001] Example embodiments of the present disclosure generally relate to integrated circuit manufacturing, and more particularly to a brazable metal layer on an aluminum pad of an integrated circuit. Background Art

[0002] In the field of power devices (e.g., silicon carbide (SiC) technology), it is necessary to cover the aluminum pads of such devices with a brazable (or wettable) metal. A brazable metal is a metal that can be evenly covered by solder paste. This allows the clips used in the package to be stably attached to the aluminum pads.

[0003] The applicant has found that providing such a brazable metal layer to cover the aluminum pads of an electronic device involves many technical challenges and difficulties. Through efforts, ingenuity, and innovation, the applicant has solved the problems related to providing a brazable metal layer to cover the aluminum pads of an electronic device by developing the solutions implemented in the present disclosure, which will be described in detail below. Summary of the Invention

[0004] Various embodiments described herein relate to an electronic device, an integrated circuit, and a method for providing a brazable metal layer to cover an aluminum pad of an electronic device.

[0005] According to various embodiments of the present disclosure, an electronic device is provided. In some embodiments, the electronic device includes a semiconductor substrate, an aluminum pad located on the semiconductor substrate, and a stack. The stack sequentially includes: a barrier layer directly deposited on the aluminum pad; a seed layer directly deposited on the barrier layer, the seed layer including copper and having a thickness less than 800 nanometers (nm); and a metal layer directly deposited on the seed layer, the metal layer including nickel and palladium.

[0006] In some embodiments, the metal layer includes: a first metal sub-layer including nickel directly deposited on the seed layer; and a second metal sub-layer including palladium directly deposited on the first metal sub-layer.

[0007] In some embodiments, the first metal sub-layer completely covers the top surface of the seed layer.

[0008] In some embodiments, the seed layer has a thickness of 250 to 600 nm.

[0009] In some embodiments, the metal layer has a thickness greater than 500 nm.

[0010] In some embodiments, the cross-sectional profile of the seed layer has a substantially constant width from the barrier layer to the metal layer.

[0011] In some embodiments, the seed layer consists of a single layer of copper.

[0012] In some embodiments, the barrier layer comprises titanium, titanium nitride, titanium tungsten, tantalum, and / or tantalum nitride.

[0013] In some embodiments, the barrier layer consists of a layer made of titanium, titanium nitride, titanium tungsten, tantalum, and / or tantalum nitride.

[0014] In some embodiments, the metal layer consists of a first metal sub-layer and a second metal sub-layer.

[0015] According to various embodiments of the present disclosure, a method of manufacturing an electronic device is provided. In some embodiments, the method includes providing an aluminum pad on a semiconductor substrate of the electronic device and forming a stack on the aluminum pad. The forming includes: depositing a barrier layer directly on the aluminum pad; depositing a seed layer directly on the barrier layer, the seed layer comprising copper and having a thickness less than 800 nanometers (nm); and depositing a metal layer directly on the seed layer, the metal layer comprising nickel and palladium.

[0016] In some embodiments, the barrier layer is deposited as a single layer of titanium, titanium nitride, titanium tungsten, tantalum, and / or tantalum nitride.

[0017] The above summary of the invention is provided only to outline some example embodiments and to provide a basic understanding of some aspects of the present disclosure. Accordingly, it will be recognized that the above embodiments are merely examples and should not be construed as limiting the scope or spirit of the present disclosure in any way. It will also be recognized that the scope of the present disclosure covers many potential embodiments in addition to the embodiments outlined herein, some of which will be further described below. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The description of the illustrative embodiments may be read in conjunction with the accompanying drawings. It will be recognized that, for simplicity and clarity of illustration, the elements shown in the various figures are not necessarily drawn to scale. For example, the dimensions of some elements may be exaggerated relative to other elements unless otherwise described. Embodiments incorporating the teachings of the present disclosure are illustrated and described with reference to the various figures given herein, in which:

[0019] Figure 1 is a cross-sectional view of an example portion of an electronic device in accordance with some embodiments of the present disclosure; and

[0020] Figure 2 is a cross-sectional view of an example portion of an electronic device in accordance with some alternative embodiments of the present disclosure. DETAILED DESCRIPTION

[0021] Some embodiments of the present disclosure will now be described more fully hereinafter with reference to the accompanying drawings, in which some, but not all, embodiments of the present disclosure are shown. In fact, the present disclosures may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will satisfy applicable legal requirements. Like reference numerals refer to like elements throughout.

[0022] As used herein, terms such as "front", "rear", "top", etc. are used for illustrative purposes in the examples provided below to describe the relative positions of certain components or portions of components. Further, according to the present disclosure, as will be apparent to those of ordinary skill in the art, the terms "substantially" and "approximately" indicate that the referenced element or associated description is accurate within the applicable engineering tolerances.

[0023] As used herein, the term "comprising" means including but not limited to, and should be interpreted in the manner it is commonly used in the patent context. The use of broader terms such as including, containing, and having should be understood to provide support for narrower terms such as consisting of, consisting essentially of, and substantially consisting of.

[0024] The phrases "in one embodiment", "according to one embodiment", etc. generally mean that the particular feature, structure, or characteristic following the phrase can be included in at least one embodiment of the present disclosure and can be included in more than one embodiment of the present disclosure (importantly, such phrases do not necessarily refer to the same embodiment).

[0025] The word "example" or "exemplary" is used herein to mean "serving as an example, instance, or illustration". Any embodiment described herein as "exemplary" is not necessarily meant to be preferred or advantageous over other embodiments.

[0026] If the specification states that a component or feature "may", "can", "could", "should", "will", "preferably", "possibly", "generally", "optionally", "for example", "often", or "might" (or other such language) be included or have a certain property, then the particular component or feature is not required to be included or have that property. Such a component or feature may optionally be included in some embodiments or it may be excluded.

[0027] The various embodiments of the present disclosure overcome the above-mentioned technical challenges and difficulties and provide various technical improvements and advantages, such as, but not limited to, providing nickel-palladium (Ni-Pd) as a solderable metal layer on the aluminum pads of an electronic device, which provides good coverage of the solder paste for attaching a clip to the aluminum pad.

[0028] Various embodiments of the present disclosure provide different material laminated stacks (referred to herein as stacks) applied to aluminum pads of an electronic device for different purposes. In various embodiments, the stack applied to the aluminum pad of the electronic device sequentially includes a barrier layer directly deposited on the aluminum pad, a seed layer directly deposited on the barrier layer, and a metal layer directly deposited on the seed layer. In various embodiments, the seed layer includes copper and the metal layer includes nickel and palladium sub-layers.

[0029] Figure 1 A cross-sectional view of an exemplary stack of an electronic device according to some embodiments of the present disclosure is illustrated. As Figure 1 seen, the electronic device includes a semiconductor substrate 170 and an aluminum pad 110 placed thereon. For example, the aluminum pad has an area of 1000×1000 square micrometers (μm 2 ) (in a plan view). Aluminum pads of any area can be used, for example, having an area of 420×560μm 2 or an area of 2040×1900μm 2 . The electronic device further includes a stack 100, which exemplarily includes: a barrier layer 120 directly deposited on the aluminum pad 110, a seed layer 130 directly deposited on the barrier layer 120, and a metal layer 140 directly deposited on the seed layer 130. Exemplarily, the stack 100 continuously and completely covers the aluminum pad (in other words, the area of the stack in the plan view is at least equal to the area of the aluminum pad in the plan view). In some embodiments, the metal layer 140 includes a first sub-layer 150 of nickel and a second sub-layer 160 of palladium. In some embodiments, the seed layer 130 includes a copper layer. In some embodiments, the seed layer 130 includes a single layer of copper. In some embodiments, the seed layer 130 includes a copper layer with a thickness less than 800 nanometers (nm). In some embodiments, the seed layer 130 includes a copper layer with a thickness of 250 - 600nm, and in some embodiments, the thickness is approximately 300 - 500nm. In some embodiments, the barrier layer includes titanium, titanium nitride, titanium-tungsten, tantalum, and / or tantalum nitride.

[0030] In some embodiments, the nickel sub-layer of the metal layer is directly deposited on the seed layer and the palladium sub-layer of the metal layer is directly deposited on the nickel sub-layer of the metal layer. In some embodiments, the metal layer has a thickness greater than (or equal to) 500nm. In some embodiments, the nickel sub-layer is at least 500nm, while the palladium sub-layer is at least 150nm. In some embodiments, the metal layer is deposited via electroless deposition (also known as e-less deposition). In some embodiments, both the nickel and palladium sub-layers are deposited via electroless deposition. Using electroless deposition enables the thickness of the nickel and palladium sub-layers to be modulated over a wide range and the thickness to be greater than other deposition techniques.

[0031] The thickness of the nickel and palladium sub-layers is modulated according to the technical purpose. For example, regarding the nickel sub-layer, the thickness can vary in the range of 500 - 5000 nm, depending on the technical purpose (e.g., barrier function, mechanical buffering function, and / or chemical reaction function). In some embodiments, when the solder paste is positioned on the palladium, due to the wire bonding process (which occurs in a later production stage), the nickel sub-layer should have a thickness that can withstand nickel consumption (such that a certain thickness remains in the final device). For example, the palladium sub-layer has the functions of protecting the nickel sub-layer and being wettable, so a range of 150 - 500 nm is used in some embodiments.

[0032] In some embodiments, electroless deposition is used to enable the nickel sub-layer to have a thickness in the above-mentioned range of 500 nm to 5 microns. In various embodiments, using a nickel-palladium metal layer deposited by electroless deposition enables a greater total stack height to be achieved compared to other methods that have been used, which can be desirable in some applications. In some embodiments, the barrier layer and the seed layer are deposited via physical vapor deposition. Alternatively, any suitable deposition method can be used to deposit these layers.

[0033] In some embodiments, the width of the seed layer is substantially constant from the barrier layer to the metal layer. For the purposes of the embodiments of the present disclosure, the expression "substantially constant" means that the actual width value of the seed layer varies within the range of + / - 10% (preferably + / - 5%) of the nominal width value along the direction from the barrier layer to the metal layer. For example, the nominal width value is 1000 μm, and the actual width value is between 900 μm and 1100 μm. This is Figure 1 shown in the figure by dashed lines 180, 190 indicating substantially equal lengths of the width of the seed layer 130. Dashed line 180 indicates the width at the lower point of the seed layer 130 (i.e., closer to the barrier layer 120), while dashed line 190 indicates the width at the higher point of the seed layer 130 (i.e., closer to the nickel sub-layer 150).

[0034] Figure 2 A cross-sectional view of an example stack of an electronic device according to some embodiments of the present disclosure is illustrated. As Figure 2As seen, the electronic device includes a semiconductor substrate 270 and an aluminum pad 210 placed thereon. The electronic device further includes a stack 100 which, by way of example, includes a barrier layer 220 directly deposited on the aluminum pad 210, a seed layer 230 (such as copper) directly deposited on the barrier layer 220, and a metal layer 240 directly deposited on the seed layer 230. In some embodiments, the metal layer 240 includes a first sub-layer 250 of nickel and a second sub-layer 260 of palladium. In some embodiments, the nickel sub-layer 250 of the metal layer 240 substantially covers the top surface 280 of the seed layer 230. In some embodiments, as shown, electroless deposition of the nickel sub-layer 250 results in partial deposition of nickel on at least a portion of the sidewall 290 of the seed layer 230, thereby completely covering the top surface 280 of the seed layer 230.

[0035] In various embodiments, compared to other methods that have been used, the stacks described herein can provide a more uniform interface between different layers, thereby avoiding delamination. Additionally, the presence of the barrier layer and the seed layer between the aluminum pad and the nickel sub-layer allows avoiding direct deposition of nickel on aluminum, for example, by an electroless process. In fact, the applicant has confirmed that electroless chemical reactions for depositing nickel on aluminum can cause unpredictable pad damage. In the embodiments of the present disclosure, the insertion of the barrier layer and the seed layer allows on the one hand to obtain a more regular surface of the aluminum pad, while on the other hand, nickel is deposited on a surface (i.e., the seed layer) that is substantially insensitive to the action of electroless chemical reactions, thus achieving an overall better interface.

[0036] Various embodiments of the present disclosure can be used in any electronic device having aluminum pads that require wettable / solderable metals, including but not limited to SiC devices as described herein, as well as gallium nitride or silicon devices (e.g., insulated gate bipolar transistors (IGBTs)).

[0037] Conclusion

[0038] Benefiting from the teachings presented in the foregoing description and the associated drawings, those skilled in the art to which the present disclosure pertains will envision many modifications and other embodiments of the disclosure described herein. While the figures only show certain components of the devices and systems described herein, it should be understood that various other components can be used in conjunction with the systems. Accordingly, it should be understood that the present disclosure is not limited to the specific embodiments disclosed and that modifications and other embodiments are intended to be included within the scope of the appended claims. Additionally, the steps in the foregoing methods do not necessarily occur in the order depicted in the figures, and in some cases, one or more of the steps depicted may occur substantially simultaneously or may involve additional steps. Although specific terms are employed herein, they are used in a generic and descriptive sense only and not for purposes of limitation.

[0039] Although various embodiments in accordance with the principles disclosed herein have been shown and described above, those skilled in the art can make modifications thereto without departing from the spirit and teachings of the disclosure. The embodiments described herein are merely representative and are not intended to be limiting. Many variations, combinations, and modifications are possible and are within the scope of the disclosure. The disclosed embodiments relate primarily to a segmented wideband tympanometry technique for true wireless stereo, however, those skilled in the art will recognize that these principles can be applied to any audio device. Alternative embodiments resulting from combining, integrating, and / or omitting features of (one or more) embodiments are also within the scope of the disclosure. Accordingly, the scope of protection is not limited by the above description.

[0040] In addition, the section headings used herein are for the purpose of conforming to the recommendations of 37 C.F.R. 1.77 or otherwise providing organizational cues. These headings should not limit or characterize the disclosure(s) claimed in any claim that may issue from the present disclosure.

[0041] Although this detailed description has set forth some embodiments of the present disclosure, the appended claims cover other embodiments of the present disclosure that differ from the described embodiments in various modifications and improvements. For example, the appended claims may cover any form of electronic device having one or more aluminum pads, such as but not limited to silicon and / or silicon carbide (SiC) power devices. Non-limiting examples of power devices are metal oxide semiconductor field effect transistors (MOSFETs), insulated gate bipolar transistors (IGBTs), and Schottky barrier diodes.

[0042] Within the appended claims, unless a specific term "means for..." or "step for..." is used in a given claim, the claim is not intended to be construed in accordance with 35 U.S.C. 112, paragraph 6.

Claims

1. An electronic device (100, 200), comprising: Semiconductor substrate (170, 270); An aluminum pad (110, 210) is located on a semiconductor substrate (170, 270); as well as A stack, which in turn includes: A barrier layer (120, 220) deposited directly on the aluminum pad (110, 210); a seed layer (130, 230) deposited directly on the barrier layer (120, 220), the seed layer (130, 230) comprising copper and having a thickness of less than 800 nanometers; and The metal layer (140, 240) is directly deposited on the seed layer (130, 230), and the metal layer (140, 240) includes nickel and palladium.

2. An electronic device as described in claim 1, wherein the metal layer (140, 240) includes: a first metal sublayer (150, 250), the first metal sublayer comprising nickel deposited directly on the seed layer (130, 230); and a second metal sublayer (160, 260), the second metal sublayer comprising palladium deposited directly on the first metal sublayer (150, 250).

3. The electronic device of claim 2, wherein the first metal sub-layer (150, 250) completely covers the top surface of the seed layer (130, 230).

4. The electronic device as claimed in claim 2, wherein the metal layer (140, 240) consists of a first metal sub-layer (150, 250) and a second metal sub-layer (160, 260).

5. The electronic device of claim 1, wherein the seed layer (130, 230) has a thickness of 250-600 nm.

6. The electronic device of claim 1, wherein the metal layer (140, 240) has a thickness greater than 500 nm.

7. The electronic device of claim 1, wherein a cross-section of the seed layer (130, 230) has a substantially constant width from the barrier layer (120, 220) to the metal layer (140, 240).

8. The electronic device of claim 1, wherein the seed layer (130, 230) consists of a single layer of copper.

9. The electronic device of claim 1, wherein the barrier layer (120, 220) comprises titanium, titanium nitride, titanium-tungsten, tantalum and / or tantalum nitride.

10. The electronic device as claimed in claim 1, wherein the barrier layer (120, 220) consists of a layer made of titanium, titanium nitride, titanium-tungsten, tantalum and / or tantalum nitride.

11. A method for manufacturing an electronic device, the method comprising: providing an aluminum pad on a semiconductor substrate of an electronic device; as well as A stack is formed on the aluminum pad, the forming comprising: Depositing a barrier layer directly on the aluminum pad; depositing a seed layer directly on the barrier layer, the seed layer comprising copper and having a thickness less than 800 nanometers; and A metal layer is deposited directly on the seed layer, the metal layer comprising nickel and palladium.

12. The method of claim 11, wherein depositing the metal layer is performed via electroless deposition.

13. The method of claim 11, wherein depositing the barrier layer and the seed layer is performed via physical vapor deposition.

14. The method of claim 11, wherein depositing a metal layer directly on the seed layer comprises depositing a first metal sublayer comprising nickel directly on the seed layer and depositing a second metal sublayer comprising palladium directly on the first metal sublayer, wherein the first metal sublayer substantially completely covers a top surface of the seed layer.

15. The method of claim 11, wherein the seed layer is deposited as a single copper layer.

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