Multi-chip time base synchronous operation method based on EPS dual-redundancy system

Abstract

The invention relates to the technical field of steering systems, in particular to a multi-chip time base synchronous operation method based on an EPS dual-redundancy system. According to the multi-chip time base synchronous operation method based on the EPS dual-redundancy system, the EPS dual-redundancy system is composed of two MCUs, two sensor units and a six-phase motor, each MCU controls three phases of the motor, and the two MCUs are connected through internal communication. The synchronization method is characterized by comprising a time base synchronization method and a period synchronization method. Compared with the prior art, the multi-chip time base synchronous operation method based on the EPS dual-redundancy system is provided, it is guaranteed that the two MCUs collect and process sensor signals at the same time, motor control is executed at the same time, and the influence of time delay is eliminated.

Description

Technical Field

[0001] The invention relates to the technical field of steering systems, in particular to a multi-chip time base synchronous operation method based on an EPS dual redundant system. Background Art

[0002] With the rapid development of autonomous driving technology, safety and availability have gradually become hot topics in automotive design. The failure rate of current automotive products is too high to meet the requirements of autonomous driving. Therefore, in order to reduce the system failure rate, existing automotive products use a dual redundant system. When some components in the system fail, they can still maintain normal operation or degraded operation. The dual redundant system can meet more failure scenarios and effectively reduce the failure rate. However, there is a certain delay between the MCUs in the dual redundant system. If synchronous operation cannot be guaranteed, the system will be unstable, which will affect product performance. Therefore, it is particularly important to ensure the synchronous operation of the dual redundant system. Summary of the invention

[0003] In order to overcome the deficiencies of the prior art, the present invention provides a multi-chip time base synchronous operation method based on an EPS dual redundant system, which ensures that dual MCUs collect and process sensor signals at the same time and execute motor control at the same time, eliminating the influence of time delay.

[0004] To achieve the above purpose, a multi-chip time base synchronous operation method based on an EPS dual redundant system is designed, including an EPS dual redundant system, wherein the EPS dual redundant system is composed of two MCUs, two sensor units and a six-phase motor, each MCU controls three phases of the motor, and the two MCUs are connected through internal communication, characterized in that: the synchronization method includes a time base synchronization method and a cycle synchronization method, and the time base synchronization method is as follows: S11, the master MCU and the slave MCU are powered on and initialized respectively; S12, the interrupt trigger source of the master MCU in the master control position is set to the local time base trigger, and the interrupt trigger source of the slave MCU in the slave position is set to the TIM0 trigger; S13, the main MCU in the master control position periodically sends a PWM synchronous control signal sequence with duty cycles of 80%, 20%, 40%, and 60% respectively through the TOM module, and the frequency is 16KHZ. The slave MCU receives the hard-line synchronous control signal through the TIM module and measures the PWM signal period and duty cycle; S14, after receiving the complete multi-state synchronization signal from the MCU, the time base is synchronized, that is, TOM0 synchronization. At this time, the master MCU and the slave MCU start to execute case 1 at the same time, and then switch the interrupt trigger source of the slave MCU to the local time base trigger; S15, if the complete synchronization sequence is not received within 5ms, the slave MCU reports a synchronization timeout fault, notifies the master MCU to switch the leading role of PWM synchronization through internal communication, and re-executes steps S12 to S14; S16, after the time base is synchronized, trigger TOM1-TOM7 in ascending order according to the channel number; S17, after the time base is synchronized, the master MCU and slave MCU use their respective local clock sources to execute the motor interrupt handler every 62.5us; The cycle synchronization method is as follows: S21, dividing the cycle synchronization into a trigger shielding area, a trigger capture area, and a timeout detection area; S22, in the trigger shielding area, the master MCU and the slave MCU both use the local clock source to stably run the control programs case 1 and case 2.

[0005] S23, at Trs, triggered by the timing interrupt generated by the TOM0CH9 channel, the MCU executes the trigger source modification interrupt program, and switches the trigger source of TOMCH0 from local to TIM trigger; S24, TIM captures the PWM edge change signal of the main MCU. Under normal circumstances, T0 captures the rising edge signal, TIM0CH1 immediately triggers the TOMCH0 channel to execute the motor control interrupt program, and completes the interrupt synchronization; S25, if the TIM0CH1 channel cannot receive the PWM edge change signal in the trigger capture area, that is, the system reaches the Ttd time, the timeout detection TOM0CH10 channel will be triggered, triggering the diagnostic timeout interrupt program, the fault count is increased by one, and steps S22-S25 are re-executed; S26, if the number of times accumulates to more than 5 times, a synchronization timeout fault is reported and the main MCU is notified through internal communication to switch the leading role of PWM synchronization, and the initialization step is re-executed; S27: During normal operation, steps S22-S26 are executed every 500us.

[0006] In the master MCU and slave MCU, the trigger channels of TOM0 include TOM0CH1~TOM0CH10.

[0007] In the time base synchronization method, the triggering modes of TOM0 include local triggering and TIM triggering. The local triggering is to trigger TOM0CH0 through the local clock source, and the TIM triggering is to capture the remote PWM edge change signal through TIM0CH1 and then immediately trigger TOM0CH0.

[0008] The case 1 is a sensor signal processing program, and the case 2 is a motor control program.

[0009] In step S16, the timer interrupt generated by the TOM1 channel executes the voltage, current, and speed sensor signal acquisition, analysis processing program and motor control program; the TOM2~TOM7 channels generate PWM signals for motor control.

[0010] In the cycle synchronization method, the trigger cycle includes a trigger shielding area, a trigger capture area, and a timeout detection area.

[0011] The T0 moment is the expected interrupt trigger moment; Trs is the lead tolerance time of the expected capture moment, and the timing interrupt program for modifying the trigger source is entered at the Trs moment; Ttd is the lag tolerance time of the expected capture moment. If the remote trigger signal is captured in the trigger capture area, the time base is considered to be synchronized, and the timing of the timeout interrupt is reset to ensure that the timeout interrupt program is no longer executed. If it is not captured, the timeout timing interrupt program will be entered at the Ttd moment.

[0012] Compared with the prior art, the present invention provides a multi-chip time base synchronous operation method based on EPS dual redundant system, which ensures that the dual MCUs collect and process sensor signals at the same time and execute motor control at the same time, eliminating the influence of time delay.

[0013] The present invention not only solves the inter-chip delay problem of the current EPS dual-redundancy system, but also designs a polymorphic PWM synchronization signal and an advance suppression and lag diagnosis strategy for the interference trigger signal and a dual-redundancy system synchronization failure processing strategy in order to cope with strong magnetic interference and prevent the hard wire from being accidentally tampered with, thereby effectively improving the anti-interference ability during the synchronization process. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is the overall block diagram of the dual redundant system of the present invention.

[0015] Figure 2 It is a schematic diagram of the execution of the interrupt program of the present invention.

[0016] Figure 3 It is a schematic diagram of the inter-chip time base interrupt synchronization triggering of the present invention.

[0017] Figure 4 This is a synchronous trigger area division diagram of the present invention.

[0018] Figure 5 This is a cycle synchronization flow chart of the present invention. DETAILED DESCRIPTION

[0019] The present invention will be further described below with reference to the accompanying drawings.

[0020] The method for realizing synchronous operation of multiple MCU time bases proposed by the present invention is based on a dual redundant system. Figure 1 As shown, the dual redundant system in the present invention is composed of two sets of MCUs, two sets of sensor units and six-phase motors, and each MCU controls three phases of the motor. Under normal circumstances, the MCU collects the signal of the sensor unit at a fixed period and performs analysis. Then, the MCU inputs the sensor analysis signal and the motor control instruction into the motor control program and uses it to calculate the PWM output signal of the motor in real time. Finally, the output signal is passed through the power amplifier unit to control the motor.

[0021] In order to meet the real-time requirements of motor output, the sensor signal processing program and the motor control program are executed in the interrupt program. The two processing programs maintain the same update frequency and are triggered to execute at a fixed interval of period T0. If the system cannot synchronize the time base between the two MCUs, the interrupt program will always have execution deviations, such as Figure 2 As shown, this will keep the system in an unstable working state and affect the system performance. In order to ensure the synchronization in the dual redundant system, the two MCUs should collect and process the sensor signals at the same time and execute the motor control program at the same time. Therefore, only when the system achieves time base synchronization can the interrupt synchronization execution be completed.

[0022] TOM0CH0 is the time base for other channels of TOM0. There are two trigger modes: local trigger and TIM trigger. Figure 3 shown.

[0023] Local trigger: trigger TOM0CH0 through the local clock source.

[0024] TIM trigger: Capture the remote PWM edge signal through TIM0CH1 and then trigger TIM0CH0 immediately.

[0025] For the master role of PWM synchronization, the local trigger mode is used; for the slave role, the local trigger and TIM0 trigger are used alternately for control.

[0026] 1. The specific steps for time base synchronization are as follows: S11, the master MCU and the slave MCU are powered on and initialized respectively; S12, the interrupt trigger source of the master MCU in the master position is set to the local time base trigger, and the interrupt trigger source of the slave MCU in the slave position is set to the TIM0 trigger; S13, the master MCU in the master position periodically sends a PWM synchronous control signal sequence with duty cycles of 80%, 20%, 40%, and 60% through the TOM module, and the frequency is 16KHZ; the slave MCU receives the hard-line synchronous control signal through the TIM module and measures the PWM signal period and duty cycle; S14, after receiving the complete multi-state synchronization signal from the MCU, the time base is synchronized, that is, TOM0 synchronization. At this time, the master MCU and the slave MCU start to execute case 1 at the same time, and then switch the interrupt trigger source of the slave MCU to the local time base trigger; S15, if the complete synchronization sequence is not received within 5ms, the slave MCU reports a synchronization timeout fault, notifies the master MCU to switch the leading role of PWM synchronization through internal communication, and re-executes steps S12-S14; S16, after the time base is synchronized, trigger TOM1-TOM7 in sequence according to the channel number increment, such as Figure 3 As shown in the figure, the timer interrupt generated by the TOM1 channel executes the voltage, current, speed and other sensor signal acquisition, analysis and processing procedures and motor control procedures. The TOM2 to TOM7 channels generate PWM signals for motor control; S17, after the time base is synchronized, the master MCU and slave MCU use their respective local clock sources to execute the motor interrupt handler every 62.5us.

[0027] Therefore, the two MCUs ensure that the sensor signals are collected and processed through interrupts at the same time and the motor control program is executed at the same time. In this way, the time base synchronization of the two MCUs is guaranteed and the output is performed at the same time.

[0028] During normal operation, the slave MCU performs synchronization operations at regular intervals to avoid the problem of excessive deviation in the interrupt time of the bilateral MCUs due to the accumulation of errors in different MCU clock sources, which in turn causes the case to be out of sync.

[0029] In order to achieve cycle synchronization, the present invention also designs a trigger shielding area, a trigger capture area and a timeout detection area, such as Figure 4 shown.

[0030] T0 is the expected interrupt trigger time. Trs is the lead tolerance time of the expected capture time. At Trs, the timing interrupt program for modifying the trigger source is entered. Ttd is the lag tolerance time of the expected capture time. If the remote trigger signal is captured in the trigger capture area, the time base is considered to be synchronized, and the timing of the timeout interrupt is reset to ensure that the timeout interrupt program is no longer executed. If it is not captured, the timeout timing interrupt program will be entered at Ttd.

[0031] The purpose of using a local trigger source in the trigger shielding area is to deal with strong magnetic interference, prevent accidental tampering of hard lines, and reduce the probability of motor control interruption being interfered with by the outside world. Perform source switching operations in the capture area and capture the PWM edge change signal of the main control MCU to complete the synchronization of the time bases on both sides. Detect synchronization timeout in the timeout detection area.

[0032] 2. The specific steps of periodic synchronization are as follows: Figure 5 As shown: S21, in the trigger shielding area, the master MCU and the slave MCU both use the local clock source to stably run the motor control program case 1 and case 2; S22, at Trs, triggered by the timing interrupt generated by the TOM0CH9 channel, the MCU executes the trigger source modification interrupt program to switch the trigger source of TOMCH0 from local to TIM trigger; S23, TIM captures the PWM edge change signal of the main MCU. Under normal circumstances, T0 captures the rising edge signal, TIM0CH1 immediately triggers the TOMCH0 channel to execute the motor control interrupt program, and completes the interrupt synchronization; S24, if the TIM0CH1 channel cannot receive the PWM edge change signal within the trigger capture area, that is, the system reaches the Ttd time, the timeout detection TOM0CH10 channel will be triggered, triggering the diagnostic timeout interrupt program, the fault count is increased by one, and steps S21-S24 are re-executed; S25, if the number of times accumulates to 5, a synchronization timeout fault is reported and the main MCU is notified through internal communication to switch the leading role of PWM synchronization, and the initialization step is re-executed; S26: During normal operation, steps S21-S25 are executed every 500us.

[0033] When a synchronization timeout occurs, the slave MCU will switch its synchronization control role to the dominant position and inform the master MCU of the role switching instruction through the internal communication module. The master MCU will also switch its synchronization control role to the slave position, completing a role switch. At this time, the role change between the two MCUs will not affect the execution of the plan, but only switch the trigger control direction. The slave MCU will subsequently perform interrupt synchronization control on the master MCU. Therefore, the system still has 100% output capacity. If another synchronization failure occurs, the system will cut off the motor output of the slave MCU control end, retaining the motor output of the dominant slave MCU, so that the dual redundant system still has 50% output capacity.

Claims

1. A multi-chip time base synchronous operation method based on an EPS dual redundant system, comprising an EPS dual redundant system, wherein the EPS dual redundant system is composed of two MCUs, two sensor units and a six-phase motor, each MCU controls three phases of the motor, and the two MCUs are connected via internal communication, characterized in that: The synchronization method includes a time base synchronization method and a period synchronization method. The time base synchronization method is as follows: S11, the master MCU and the slave MCU are powered on and initialized respectively; S12, the interrupt trigger source of the master MCU in the master control position is set to the local time base trigger, and the interrupt trigger source of the slave MCU in the slave position is set to the TIM0 trigger; S13, the main MCU in the master control position periodically sends a PWM synchronous control signal sequence with duty cycles of 80%, 20%, 40%, and 60% respectively through the TOM module, and the frequency is 16KHZ. The slave MCU receives the hard-line synchronous control signal through the TIM module and measures the PWM signal period and duty cycle; S14, after receiving the complete multi-state synchronization signal from the MCU, the time base is synchronized, that is, TOM0 synchronization. At this time, the master MCU and the slave MCU start to execute case 1 at the same time, and then switch the interrupt trigger source of the slave MCU to the local time base trigger; S15, if the complete synchronization sequence is not received within 5ms, the slave MCU reports a synchronization timeout fault, notifies the master MCU to switch the leading role of PWM synchronization through internal communication, and re-executes steps S12 to S14; S16, after the time base is synchronized, trigger TOM1-TOM7 in ascending order according to the channel number; S17, after the time base is synchronized, the master MCU and slave MCU use their respective local clock sources to execute the motor interrupt handler every 62.5us; The cycle synchronization method is as follows: S21, dividing the cycle synchronization into a trigger shielding area, a trigger capture area, and a timeout detection area; S22, in the trigger shielding area, the master MCU and the slave MCU both use the local clock source to stably run the control programs case 1 and case 2.

2. S23, at Trs, triggered by the timer interrupt generated by the TOM0CH9 channel, the MCU executes the trigger source modification interrupt program to switch the trigger source of TOMCH0 from local to TIM trigger; S24, TIM captures the PWM edge change signal of the main MCU. Under normal circumstances, T0 captures the rising edge signal, TIM0CH1 immediately triggers the TOMCH0 channel to execute the motor control interrupt program, and completes the interrupt synchronization; S25, if the TIM0CH1 channel cannot receive the PWM edge change signal in the trigger capture area, that is, the system reaches the Ttd time, the timeout detection TOM0CH10 channel will be triggered, triggering the diagnostic timeout interrupt program, the fault count is increased by one, and steps S22-S25 are re-executed; S26, if the number of times accumulates to more than 5 times, a synchronization timeout fault is reported and the main MCU is notified through internal communication to switch the leading role of PWM synchronization, and the initialization step is re-executed; S27: During normal operation, steps S22-S26 are executed every 500us.

3. The method for synchronous operation of multiple chips based on EPS dual redundant system according to claim 1, characterized in that: In the master MCU and slave MCU, the trigger channels of TOM0 include TOM0CH1~TOM0CH10.

4. The method for synchronous operation of multiple chips based on EPS dual redundant system according to claim 1, characterized in that: In the time base synchronization method, the triggering modes of TOM0 include local triggering and TIM triggering. The local triggering is to trigger TOM0CH0 through the local clock source, and the TIM triggering is to capture the remote PWM edge change signal through TIM0CH1 and then immediately trigger TOM0CH0.

5. The method for synchronous operation of multiple chips based on EPS dual redundant system according to claim 1, characterized in that: The case 1 is a sensor signal processing program, and the case 2 is a motor control program.

6. The method for synchronous operation of multiple chips based on EPS dual redundant system according to claim 1, characterized in that: In step S16, the timer interrupt generated by the TOM1 channel executes the voltage, current, and speed sensor signal acquisition, analysis processing program and motor control program; the TOM2~TOM7 channels generate PWM signals for motor control.

7. The method for synchronous operation of multiple chips based on EPS dual redundant system according to claim 1, characterized in that: In the cycle synchronization method, the trigger cycle includes a trigger shielding area, a trigger capture area, and a timeout detection area.

8. The method for synchronous operation of multiple chips based on EPS dual redundant system according to claim 1, characterized in that: The T0 time is the expected interrupt triggering time; Trs is the lead tolerance time of the expected capture moment, and the timing interrupt program for modifying the trigger source is entered at Trs; Ttd is the lag tolerance time of the expected capture moment. If the remote trigger signal is captured in the trigger capture area, the time base is considered to be synchronized, and the timing of the timeout interrupt is reset to ensure that the timeout interrupt program is no longer executed. If it cannot be captured, the timeout timing interrupt program will be entered at Ttd.

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