Clock error data processing method of Beidou timing system device
By designing a clock difference data processing method in the Beidou time system device, processing the real-time clock difference value and adjusting the rubidium clock, the problem of the rubidium clock tame the fast convergence speed and poor stability of the output signal are solved, and better frequency stability and convergence speed balance are achieved.
Patent Information
- Application Number
- CN202510254833.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-05
- Publication Date
- 2025-06-06
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Figure CN120103379A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of satellite navigation positioning and timing, and in particular to a clock error data processing method for a Beidou time system device. Background Art
[0002] Beidou timing technology has been widely used in national economy, national defense construction, and people's life. Beidou timing often uses Beidou one-way timing training rubidium clock technology. Beidou one-way timing training rubidium clock technology uses the fixed frequency signal provided by the satellite timing receiver to compare with the oscillation signal generated by the Beidou rubidium clock module to obtain the frequency deviation between the two, and then adjust the local rubidium clock module to make the oscillation frequency of the rubidium clock basically consistent with the oscillation frequency of the Beidou satellite. In the process of frequency adjustment, the phase of the rubidium clock module is compensated to achieve the purpose of Beidou training the rubidium clock. Due to the large deviation in frequency characteristics between different types of rubidium clocks, or even between different rubidium clocks of the same type, there is often a contradiction between the convergence speed of rubidium clock taming and the frequency stability characteristics of the rubidium clock output signal when designing the rubidium clock taming data processing algorithm strategy, that is, the faster the convergence speed of the algorithm strategy, the worse the stability index (especially the short-term frequency stability) of the rubidium clock output signal. Therefore, it is often necessary to sacrifice a certain convergence speed in exchange for a better frequency stability index. In the face of this problem, it is urgent to invent and design a rubidium clock taming data processing algorithm strategy with excellent convergence speed and output signal stability. Summary of the invention
[0003] In view of this, the present invention aims at the problem that the faster the convergence speed of the algorithm strategy during the rubidium clock training data processing often leads to the deterioration of the stability index of the rubidium clock output signal, and invents a clock error data processing method for the Beidou time system device. The method can effectively balance the contradiction between the rubidium clock training convergence speed and the rubidium clock output signal frequency stability characteristic, and can obtain the effect of faster rubidium clock training convergence speed and better output signal stability.
[0004] A Beidou time system device comprises an antenna and a host, wherein the host comprises a Beidou receiver, a rubidium clock, a branch module, a clock error measurement module and a data processing module;
[0005] The antenna receives Beidou navigation satellite signals and transmits the radio frequency signal RF to the Beidou receiver via a radio frequency cable;
[0006] The Beidou receiver processes and resolves the RF signal transmitted by the antenna and outputs a timing signal of 1pps JSJ To the clock error measurement module;
[0007] The rubidium clock outputs a second pulse signal of 1pps Rb To the branch module, and output the frequency signal 10MHz OUT;
[0008] The branch module responds to the 1pps pulse signal output by the rubidium clock. Rb The signal is split and processed to output 2 pulse-per-second signals, of which one pulse-per-second signal is recorded as 1pps Rb-1 And transmitted to the clock difference measurement module, the other second pulse signal is recorded as 1pps OUT And export it outward;
[0009] The clock difference measurement module realizes 1pps of Beidou receiver timing signal JSJ With second pulse signal 1pps Rb-1 The time difference is measured to obtain the real-time clock difference ΔT and transmit it to the data processing module;
[0010] In the data processing module, a clock error adjustment parameter table is preset, and the rubidium clock adjustment value ΔTZL is calculated according to the real clock difference ΔT and the clock error adjustment parameter table;
[0011] The rubidium clock adjusts the pulse per second signal 1pps according to the rubidium clock adjustment value ΔTZL Rb Adjust to achieve 1pps pulse signal Rb Timing signal to Beidou receiver 1pps JSJ calibration.
[0012] A clock error data processing method of a Beidou time system device is provided, wherein a rubidium clock is calibrated based on the above-mentioned Beidou time system device, and specifically comprises the following steps:
[0013] Step 1: The output frequency of the real-time clock difference ΔT is 1 time / second. The data processing module performs average segmentation processing on the received continuous real-time clock difference ΔT: that is, each time L is received, 0 The real-time clock difference ΔT is processed once, L 0 The value is a multiple of 60;
[0014] Step 2: For the currently received L 0 The sub-real clock difference ΔT is recorded as ΔT i , i=1~L 0 , i is a positive integer; for ΔT i Sort from largest to smallest, discarding the largest data; get The valid data is recorded as ΔT j , j is a positive integer;
[0015] ΔT j Find the average and get the currently received L 0 The mean clock error corresponding to the sub-real clock difference ΔT
[0016]
[0017] Step 3: record the number of received real-time clock difference ΔT during the kth rubidium clock calibration as L k ; L k =N k ×L 0 , k and N k are all positive integers; calculate L k The mean clock error corresponding to the sub-real clock difference ΔT
[0018]
[0019] in, Indicates that L k In the sub-real clock difference ΔT, the nth group L 0 The mean clock error corresponding to the sub-real clock difference ΔT
[0020] Calculate the rubidium clock adjustment ΔTZL during the kth rubidium clock calibration k :
[0021]
[0022] Among them, α k is the adjustment coefficient of the kth rubidium clock calibration;
[0023] For the first rubidium clock calibration, L k =L 0 , α k =α 0 ; α 0 is the initial value of the adjustment coefficient, α 0 The value range of is 0.5~1;
[0024] When k ≥ 2, according to The value of L is obtained by combining the clock adjustment parameter table shown in Table 1. k With α k Values:
[0025] Table 1 Clock adjustment parameter table
[0026]
[0027] Step 4: The rubidium clock is adjusted according to the rubidium clock adjustment value ΔTZL k For pulse per second signal 1pps Rb Make adjustments;
[0028] Step 5: Repeat steps 2 to 4 to achieve a pulse per second signal of 1 pps. Rb Timing signal to Beidou receiver 1ppsJSJ calibration.
[0029] The beneficial effects of the present invention are:
[0030] Aiming at the problem that the faster the convergence speed of the algorithm strategy during the rubidium clock training data processing often leads to the deterioration of the stability index of the rubidium clock output signal, a clock error data processing method for the Beidou time system device was invented. Based on this method, the user can effectively balance the contradiction between the rubidium clock training convergence speed and the rubidium clock output signal frequency stability characteristics through parameter configuration, which can effectively solve the problem that the fast convergence speed of the rubidium clock training leads to the deterioration of the rubidium clock output signal frequency stability characteristics. BRIEF DESCRIPTION OF THE DRAWINGS
[0031] Figure 1 The present invention is a diagram showing the equipment composition of a Beidou time system device in an embodiment of the present invention.
[0032] Figure 2 The present invention is a flowchart of data processing of a Beidou time system device in an embodiment of the present invention.
[0033] Figure 3 The present invention is a flowchart of a data processing process of a Beidou time system device in an embodiment of the present invention. DETAILED DESCRIPTION
[0034] The present invention will be further described below in conjunction with the accompanying drawings.
[0035] A clock error data processing method for a Beidou time system device, such as Figure 1 , Figure 2 and Figure 3 As shown, it is characterized in that, based on the processing result of the clock difference data between the rubidium clock second pulse and the Beidou receiver timing signal, the rubidium clock adjustment parameter is queried from the preset "clock difference adjustment parameter table", and then the rubidium clock adjustment is calculated and the automatic calibration of the rubidium clock is realized accordingly. Specifically, the following steps are included:
[0036] (1) The Beidou time system device consists of an antenna and a host. The host integrates a Beidou receiver, a rubidium clock, a branch module, a clock error measurement module, and a data processing module. The modules cooperate with each other to calibrate the Beidou timing signal to the rubidium clock, thereby ensuring that the Beidou time system device outputs high-precision time and frequency signals.
[0037] (2) In the data processing module, a "clock adjustment parameter table" is preset, and the clock adjustment parameter for this time is obtained from the "clock adjustment parameter table" according to the processing result of the previous data (data length L k , adjustment coefficient α k ), and then calculate the corresponding adjustment amount ΔTZL k (k is a positive integer).
[0038] (3) Beidou time system device adjusts the value ΔTZL k Realize Beidou-based rubidium clock automatic calibration and output high-precision frequency signal 10MHz OUT And second pulse signal 1pps Rb .
[0039] The specific contents of step (1) include the following steps:
[0040] (101) The antenna of the Beidou time system device receives the Beidou navigation satellite signal in space and transmits the radio frequency signal RF to the Beidou receiver module through the radio frequency cable.
[0041] (102) The main unit of the Beidou time system device integrates a Beidou receiver, a rubidium clock, a branch module, a clock error measurement module, and a data processing module.
[0042] Beidou receiver can output timing signal 1pps after data processing and solution JSJ .
[0043] Rubidium clock output frequency signal 10MHz OUT And second pulse signal 1pps Rb .
[0044] The splitter module is for pulse per second signal 1pps Rb The signal is processed and output 2 second pulse signals, of which one second pulse signal is 1pps Rb-1 , the other pulse signal is 1pps OUT .
[0045] The second pulse signal is 1pps Rb , pulse per second signal 1pps Rb-1 And the second pulse signal is 1pps OUT They are all the same signal;
[0046] The clock error measurement module achieves 1pps for the Beidou receiver timing signal JSJ With second pulse signal 1pps Rb-1 The time difference is measured to obtain the real-time clock difference ΔT i (i is a positive integer).
[0047] The data processing module realizes the clock error data ΔT i The adjustment value ΔTZL of the rubidium clock is calculated by k (k is a positive integer).
[0048] The specific contents of step (2) include the following steps:
[0049] (201) Clock error data ΔT i The output frequency is 1 time / second, and the received continuous clock error data ΔTi Perform average segmentation processing, and collect 120 (here L 0 The value is 120) and each piece of data is processed once.
[0050] (202) for ΔT i (i = positive integers from 1 to 120) are sorted from large to small, and the 10 largest data are discarded (the purpose is to effectively remove the influence of accidental values on the time difference results), and 110 valid data ΔT are obtained. j (j=1~110, j is a positive integer).
[0051] (203) for ΔT j Find the mean and get the mean clock error of each segment of data
[0052]
[0053] (204) The length of the data involved in the calculation of the mean clock error is L k (k is a positive integer) the mean of the clock error data (k is a positive integer) can be expressed as:
[0054]
[0055] (205) According to the previous clock error mean The size of the rubidium clock adjustment parameter is obtained from the "clock error adjustment parameter table": data length L k , adjustment coefficient α k .
[0056] The preset "clock error adjustment parameter table" is shown in Table 1. The initial value of the data length is 120 (L 0 is the length of a single segment of data, L 0 The value is 120), and the initial value of the adjustment coefficient is α 0 (α 0 The value is 0.9).
[0057] Table 1 Clock adjustment parameter table
[0058]
[0059] Note: When calculating the first set of data after the Beidou time system device is turned on, the data length is 120 and the adjustment coefficient is 0.9.
[0060] (206) Adjustment value of rubidium clock ΔTZL k It can be expressed as:
[0061]
[0062] α kis the rubidium clock adjustment value ΔTZL k The adjustment coefficient is adjusted according to the mean clock error. The purpose of gradually decreasing is to achieve a 1pps rubidium clock second pulse signal through increasingly fine clock error adjustment. Rb-1 Timing signal to Beidou receiver 1pps JSJ Infinitely approaching.
[0063] (207) According to the adjustment value ΔTZL of the rubidium clock k Adjust the rubidium clock and repeat steps (202) to (206) to calculate the new rubidium clock adjustment value ΔTZL. k (k is a positive integer).
[0064] The above is the length L of a single segment of data. 0 The value is 120.
[0065] When L k The corresponding values are 120, 240, 360, 480, and 600. k The corresponding values are 0.9, 0.72, 0.63, 0.54, and 0.45, respectively. The user can adjust the parameter L according to the needs. 0 , L k , α k By performing other configurations, different rubidium clock taming convergence speeds and rubidium clock output signal frequency stability characteristics can be obtained, which is universal.
[0066] In summary, the present invention proposes a clock error data processing method for a Beidou time system device. Based on this method, the user configures different L 0 , L k , α k The parameters can effectively balance the contradiction between the rubidium clock taming convergence speed and the rubidium clock output signal frequency stability characteristics, and can effectively solve the problem that the rubidium clock output signal frequency stability characteristics deteriorate due to the fast rubidium clock taming convergence speed.
[0067] Those skilled in the art will appreciate that the embodiments described are intended to help readers understand the principles of the present invention, and should be understood that the scope of protection of the present invention is not limited to the embodiments described. For those skilled in the art, the present invention may have various changes and variations. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of the claims of the present invention.
Claims
1. A Beidou time system device, characterized in that: It includes an antenna and a host, wherein the host includes a Beidou receiver, a rubidium clock, a branch module, a clock error measurement module and a data processing module; The antenna receives the Beidou navigation satellite signal and transmits the radio frequency signal RF to the Beidou receiver through the radio frequency cable; The Beidou receiver processes and resolves the RF signal transmitted by the antenna and outputs a timing signal of 1pps JSJ To the clock error measurement module; The rubidium clock outputs a second pulse signal of 1pps Rb To the branch module, and output the frequency signal 10MHz OUT ; The branch module responds to the 1pps pulse signal output by the rubidium clock. Rb The signal is split and processed to output 2 pulse-per-second signals, of which one pulse-per-second signal is recorded as 1pps Rb-1 And transmitted to the clock difference measurement module, the other second pulse signal is recorded as 1pps OUT And export it outward; The clock difference measurement module realizes 1pps of Beidou receiver timing signal JSJ With second pulse signal 1pps Rb-1 The time difference is measured to obtain the real-time clock difference ΔT and transmit it to the data processing module; In the data processing module, a clock error adjustment parameter table is preset, and the rubidium clock adjustment value ΔTZL is calculated according to the real clock difference ΔT and the clock error adjustment parameter table; The rubidium clock adjusts the pulse per second signal 1pps according to the rubidium clock adjustment value ΔTZL Rb Adjust to achieve a pulse per second signal of 1pps Rb Timing signal to Beidou receiver 1pps JSJ calibration.
2. A method for processing clock error data of a Beidou time system device, characterized in that: Calibration of a rubidium clock based on the Beidou time system device described in claim 1 specifically includes the following steps: Step 1, the output frequency of the real-time clock difference ΔT is 1 time / second, and the data processing module performs average segmentation processing on the received continuous real-time clock difference ΔT: that is, it processes once every L0 real-time clock difference ΔT is received, and L0 is a multiple of 60; Step 2: For the currently received L0 real-time clock difference ΔT, record it as ΔT i , i = 1 ~ L0, i is a positive integer; for ΔT i Sort by size, discarding the largest data; get The valid data is recorded as ΔT j , j is a positive integer; ΔT j Calculate the average value and obtain the clock difference average corresponding to the L0 real-time clock difference ΔT currently received Step 3: record the number of received real-time clock difference ΔT during the kth rubidium clock calibration as L k ; L k =N k ×L0, k and N k are all positive integers; calculate L k The mean clock error corresponding to the sub-real clock difference ΔT in, Indicates that L k The mean clock difference corresponding to the nth group L0 real clock difference ΔT in the real clock difference ΔT n=1,2,...,N k ; Calculate the rubidium clock adjustment ΔTZL during the kth rubidium clock calibration k : Among them, α k is the adjustment coefficient of the kth rubidium clock calibration; For the first rubidium clock calibration, L k =L0,α k =α0; α0 is the initial value of the adjustment coefficient, and the value range of α0 is 0.5~1; When k ≥ 2, according to The value of L is obtained by combining the clock adjustment parameter table shown in Table 1. k With α k Values: Table 1 Clock adjustment parameter table Step 4: The rubidium clock is adjusted according to the rubidium clock adjustment value ΔTZL k For pulse per second signal 1pps Rb Make adjustments; Step 5: Repeat steps 2 to 4 to achieve a pulse per second signal of 1 pps. Rb Timing signal to Beidou receiver 1pps JSJ calibration.