Power over Ethernet (PoE) device with multiple output transformers to produce output PoE power and device operating power

Abstract

The present disclosure generally relates to a Power over Ethernet (PoE) device having a multi-output transformer to produce output PoE power and device operating power. A power over Ethernet (PoE) PD / PSE device includes a powered device (PD) interface configured to connect to an uplink power supply device (PSE) and to receive input PoE power from the PSE, and a PSE interface configured to connect to a downlink PD and to provide output PoE power to the PD. The PD / PSE also includes a device power rail for providing operating power to one or more components of the PD / PSE, and a DC-DC converter including a multi-output transformer including a transformer input, a first transformer output electrically connected to the PSE interface, and a second transformer output electrically connected to the device power rail. The DC-DC converter is configured to receive input PoE power, provide the input PoE power in response to the transformer input, generate output PoE power at the first transformer output, and generate operating power at the second transformer output.

Description

Background Art

[0001] Power over Ethernet (Power-over-ethernet, PoE) allows data signals and power signals to be transmitted through the same Ethernet cable. This ability to receive power and data via the same cable can provide greater flexibility for how to deploy equipment (for example, the device no longer needs to be placed near a power outlet or no longer needs to have a long power line to reach the power outlet), and / or can provide power redundancy for the device. In a PoE system, the device that provides PoE power to other connected devices is called a power supply device (Power Sourcing Equipment, PSE), and the device that receives PoE power from the PSE is called a powered device (Powered Device, PD). Typically, PSE also acts as a networking element (such as a network switch or router) for guiding data traffic through the network. PD can also be a networking element (for example, a wireless access point, a PoE repeater / hub, etc.), or a client device (for example, a security camera, an Internet of Things (IoT) device, etc.), or any other electronic device with PoE capabilities.

[0002] Some networking devices can function as both PDs and PSEs. These devices may be referred to herein as "hybrid PD / PSEs" or simply "PD / PSEs." A hybrid PD / PSE may include circuitry that receives PoE power from an upstream PSE (thus acting as a PD) and circuitry that provides PoE power to a downstream PD (thus acting as a PSE). The circuitry that receives PoE power includes ports that are commonly referred to as PD ports, while the circuitry that supplies PoE power includes ports that are commonly referred to as PSE ports. In some hybrid PD / PSEs, an input power port may also be provided that can receive a power line plugged into a power source (such as mains power), thereby allowing the device to be powered by both PoE and power lines. BRIEF DESCRIPTION OF THE DRAWINGS

[0003] can be obtained from the following detailed description alone or in conjunction with the attached Figure 1 The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated into and constitute a part of this specification. The accompanying drawings illustrate one or more examples of the present disclosure and together with the description explain certain principles and operations. In the drawings:

[0004] Figure 1 is a block diagram illustrating an example hybrid PD / PSE.

[0005] Figure 2 It is shown that Figure 1 A block diagram of an example system of a PD / PSE.

[0006] Figure 3 It is shown that Figure 1 Block diagram of another example system of a PD / PSE.

[0007] Figure 4 is a schematic diagram illustrating another example hybrid PD / PSE.

[0008] Figure 5 is a process flow diagram illustrating an example method. DETAILED DESCRIPTION

[0009] In many hybrid PD / PSEs, the PD port and / or the input power port (if present) are electrically connected to the PSE port. For example, a positive power rail may be connected to the PD port, the input power port (if present), and to the PSE port, thereby forming a current path between the PD port and the PSE port, or between the input power port and the PSE port. Thus, the input power received at the PD port or the input power port is more or less unchanged and directed directly to the PSE port to be output as output PoE power.

[0010] In a hybrid PD / PSE as described above, a situation may arise where the PoE power output by the PD / PSE is out of specification (e.g., the voltage drops below the specified minimum PSE output voltage). If the input power received via the PD port or the input power port is at a voltage below the specified minimum PSE output voltage, the output PoE power may drop below the specified minimum PSE output voltage (because in these devices, the output PoE power has substantially the same voltage as the input power). A drop in PoE power out of specification may cause the PD connected to the PSE port to fail to power on or otherwise impair the functionality of the network. It may also result in unnecessary and wasteful repair calls or equipment returns to the manufacturer.

[0011] For a variety of reasons, the input power may be lower than the specified minimum PSE output voltage and, therefore, cause the output PoE power to be out of specification. For example, the cable and other circuits between the upstream PSE and the PD / PSE have a certain resistance that increases with the length of the cable (e.g., about 0.188 ohms per meter for CAT5e cable), and this resistance causes a voltage drop between the upstream PSE and the PD / PSE. Therefore, if the PD / PSE is powered by PoE, the voltage of the received PoE power will be lower than the voltage that the PoE power had when it was generated at the upstream PSE, and the drop in voltage may be sufficient to drop the output PoE power out of specification. It is important to note that this may occur even if the upstream PSE is operating correctly and even if the received PoE power is within specification when received.

[0012] The reason why the received PoE power within the specification may not be sufficient to generate the output PoE power within the specification is because there are different specified standards for the PoE power output by the PSE (referred to as the PSE output voltage requirement in this article) and the PoE power received at the PD (referred to as the PD input voltage requirement in this article). For example, IEEE 802.3at (PoE+) specifies that the PSE output voltage requirement is 50-57V and the PD input voltage requirement is 42-57V. Therefore, for example, it may happen that the upstream PSE generates an output PoE signal of 50V (which is within the PSE output voltage requirement), and then the PoE signal received at the PD port may drop to 48V (which is within the PD input voltage requirement) due to the resistance, and then the PSE port can output the PoE signal at 48V (which is lower than the specified minimum value of the PSE output requirement). Therefore, although the original PoE signal output by the upstream PoE is within the PSE output voltage requirement and the received PoE signal is also within the PD input voltage requirement, the PoE signal output from the PSE port is lower than the PSE output voltage requirement.

[0013] Another way that the input power may drop below the specified minimum PSE output voltage is if the input power port is used to power the PD / PSE and the power source providing the input power does not provide sufficient voltage. For example, many power adapters that provide input power to network devices provide 48V or less, so the PoE power output from the PSE port may also be limited to 48V or less, which may be lower than the specified minimum PSE output voltage (e.g., 50V minimum in IEEE802.3at, PoE+; 52V minimum in IEEE802.3bt).

[0014] In addition to potentially failing to generate output PoE power within specification, existing PD / PSEs may also be at increased risk of damage due to surge currents. Specifically, because the PD port and the PSE port are not electrically isolated, surges that occur on one port or the other can pass through the device and potentially damage circuitry therein.

[0015] In addition, in some PD / PSE, the positive leg and ground / negative leg of the circuit between the PD port and the PSE port are unbalanced. In particular, the positive branch includes the positive rail mentioned above, which connects the PD port to the PSE port. The ground / negative branch also includes a track referred to as a ground rail in this article, but unlike the positive rail, the ground rail is not directly connected to the PD port and the PSE port. Instead, the PD chip and the PSE chip (described in more detail below) are inserted between the PD port and the ground rail and between the ground rail and the PSE port, respectively. The current path through these PD and PSE chips has a limited resistance, for example, due to transistors in the current path (e.g., each MOSFET may introduce a resistance of about 0.1 ohms). Because the ground / negative branch has this resistance, and the positive branch does not have this resistance, a DC voltage offset is introduced between the two branches.

[0016] To address the above issues, the examples disclosed herein include a hybrid PD / PSE having a multi-output transformer deployed between a PD port and a PSE port. More specifically, the multi-output transformer includes an input connected to the PD port, a first transformer output coupled to the PSE port, and one or more second transformer outputs coupled to one or more device power rails (the device power rails provide operating power to other components of the PD / PSE). In some examples, the PD / PSE also includes an input power port that receives input power from some other power source (e.g., a mains power source), and both the PD port and the input power port are electrically connected to the input of the multi-output transformer. The switching circuit and the multi-output transformer together form a DC-DC converter that converts input power from the PD port or from the input power port into: (1) an output PoE power signal provided to the PSE port (via the first transformer output); and (2) one or more operating power signals provided to the device power rail (via the second transformer output). The conversion may include boosting (amplifying) the input power into a higher voltage output PoE power signal. Specifically, the output PoE voltage is monitored, and the switch circuit controls the gain of the DC-DC converter based thereon so as to maintain the output PoE voltage above a specified minimum value. In this way, even if the input power has a voltage below the specified minimum value (e.g., for any of the reasons discussed above), the output PSE voltage is still within specification.

[0017] In addition to ensuring that the output PoE power remains within specifications, the transformer also provides electrical isolation between the PD port and the PSE port, and between the power input port and the PSE port. This can reduce the possibility of damage from surge events. In addition, this separation between the PD port side and the PSE port side also reduces the magnitude of the DC offset mentioned above.

[0018] Turning now to the drawings, various apparatus, systems, and methods in accordance with aspects of the present disclosure will be described.

[0019] Figure 1 1 is a block diagram conceptually illustrating a hybrid PD / PSE ("PD / PSE") 10 for a Power over Ethernet ("PoE") system. It should be understood that Figure 1 The specific shapes, sizes, or other structural details are not intended to be shown accurately or to scale, and implementations of the PD / PSE 10 may have a different number and arrangement of components than those shown, and may also include other components not shown.

[0020] like Figure 1 As shown, the PD / PSE 10 includes a PoE PD interface 20 to connect to an Ethernet cable, a PoE power receiving circuit 45 to receive and process a PoE power signal from the PoE PD interface 20, a communication and control circuit 50 to receive and process a digital signal from the PoE PD interface 20, a DC-DC converter 60, a PSE power output circuit 70, and a PoE PSE interface 75. These and other components of the PD / PSE 10 will be described in turn below.

[0021] The PoE PD interface 20 includes a port (not shown) such as an RJ45 jack, which is configured to receive a connector of an Ethernet cable, which may include an RJ45 connector. The PoE PD interface 20 is configured to send and receive data signals and also receive PoE power signals via an Ethernet cable (when the Ethernet cable is connected between the PoE PD interface 20 and the PSE). In addition, the PoE PD interface 20 may also include circuits (not shown) for receiving and routing data and PoE power signals, such as electrical pins / contacts, transformers, switches and / or other circuits familiar to those of ordinary skill in the art. In particular, the PoEPD interface 20 is configured to direct input PoE power to the power line 26, while the data signal is transmitted via the data line 28. In some examples, each PoE power signal is a DC electrical signal comprising a relatively constant voltage difference applied between a pair 27 of the power line 26, and each data signal comprises a differential signal comprising two alternating signals having opposite polarities to each other and applied to a pair of data lines 28. Specifically, the PoE power signal includes a voltage difference between a larger potential PD+ carried on one power line 26 and a smaller potential PD- carried on another power line 26. Therefore, the input PoE power signal may be referred to herein by the notation PD+ / PD- (in this context, the character " / " is a forward slash or stroke, not a mathematical operator). Figure 1 One PoE PD interface 20 is shown in FIG. 1 , but any number of PoE PD interfaces 20 equal to or greater than one may be included in the PD / PSE 10 .

[0022] As described above, the PD / PSE 10 also includes a PoE receiving circuit 45 connected to the PoE PD interface 20. The PoE receiving circuit 45 may include a rectifier, a PD chip, an EMI capacitor, and other components familiar to those skilled in the art. If the input PoE power PD+ / PD- is received from the PD interface 20, the input power PD+ / PD- is provided to the PoE receiving circuit 45, and then the input power PD+ / PD- flows from the PoE receiving circuit 45 to nodes 46 and 47, wherein PD+ is applied to the node 46 and PD- is applied to the node 47.

[0023] In some examples, the PD / PSE 10 also includes a DC input 48. The DC input 48 includes a port for receiving a power line that can provide DC power from an external power source (such as from an external AC to DC power adapter 149 plugged into a mains power source or any other desired power source). The DC input 48 receives input power that includes a voltage difference between a larger potential DC+ on one power line and a smaller potential DC- on another power line. Therefore, DC+ / DC- may be used herein to refer to the input DC power signal. The input DC power DC+ / DC- then flows from the DC input terminal 48 to nodes 46 and 47, where DC+ is applied to node 46 and DC- is applied to node 47.

[0024] like Figure 1 As shown, in the example of providing a DC input 48, both the input DC power DC+ / DC- from the DC input 48 and the input PoE power PD+ / PD- from the PoE power receiving circuit 45 are directed to the same nodes 46 and 47. The potentials of these nodes 46 and 47 are Figure 1 The V DD and V SS The input power signal received on this part of the circuit is referred to herein as input power V DD / V SS . Input power V DD / V SS will be the same as the input PoE power PD+ / PD- or the input DC power DC+ / DC-, depending on which power source is currently powering the PD / PSE 10. That is, if the PD / PSE 10 is currently powered via the DC input 48, then the potential V DD and V SS will be equal to the potentials DC+ and DC- respectively; if the PD / PSE 10 is currently powered via the PoE PD interface 20, the potential V DD and V SS will be equal to the voltages PD+ and PD-, respectively. Therefore, the term "input power" or similar terms (including "input power V DD / V SS ”) is used herein as a general term for any input power received at nodes 46 and 47.

[0025] In some examples, the PD chip in the PoE power receiving circuit 45 monitors whether the input DC power DC+ / DC- is received at the DC input terminal 48. If received, the PoE power receiving circuit 45 can prevent the input PoE power PD+ / PD- from being transmitted to the nodes 46 and 47. If not received, the PoE power receiving circuit 45 can allow the PoE power PD+ / PD- to be transmitted to the nodes 46 and 47. The nodes 46 and 47 are coupled to the input of the DC-DC converter 60, so the input power V at the nodes 46 and 47 is DD / V SS (i.e., the voltage difference V between nodes 46 and 47 DD -V SS ) is provided to the DC-DC converter 60 for conversion (eg, step-up or step-down).

[0026] The DC-DC converter 60 includes a pulse width modulation (PWM) switching circuit 61 and a multi-output transformer 65. The pulse width modulation (PWM) switching circuit 61 receives input power V from nodes 46 and 47. DD / V SS and the input power V DD / V SS The input 67 of the pulse width modulation (PWM) switching circuit 61 is provided in a pulse manner that repeats at a predetermined frequency. These pulses are generated by turning on and off one or more switches disposed in the current path between the node 46 or 47 and the input 67 of the transformer 65. For example, V between the node 46 and the transformer input 67 may be DD The V in the current path or between node 47 and transformer input 67 SS The switch is arranged in series in the current path so that when the switch is turned on (conducting), the input power voltage V DD -V SS is applied to the transformer input 67, and when the switch is off (non-conducting), the input power voltage V DD -V SS is not applied to the transformer input 67. During each pulse cycle, the amount of time the switch is on relative to the total cycle period is referred to as the duty cycle of the switching circuit 61. For example, if a pulse is applied once every microsecond, a duty cycle of 50% would mean that during each pulse cycle, the switch is on for 0.5 microseconds and then off for 0.5 microseconds. The signal that controls the duty cycle may be referred to as a PWM signal. The PWM switching circuit 61 is configured to adjust the gain of the DC-DC converter by adjusting the duty cycle.

[0027] The multi-output transformer 65 includes a primary side including an input 67 and a primary winding coupled to the input 67. The transformer 65 also includes a secondary side including a first output 66-1, a first secondary winding coupled to the first output 66-1, a second output 66-2, and a second secondary winding coupled to the second output 66-2. The transformer 65 also includes an iron core around which the primary side winding, the first secondary side winding, and the second secondary side winding are wound.

[0028] Based on the voltage V DD -V SS The input signal V DD / V SS , the transformer 65 generates a voltage V including an output voltage via the first transformer output 66-1 DD_2 -V SS_2 Output PoE power signal V DD_2 / V SS_2 Then, the output PoE power signal V DD_2 / V SS_2 is fed to the PSE power output circuit 70, which will be described below. In addition, based on the input signal V DD / V SS , the transformer 65 generates a voltage V including an output voltage via a second transformer output 66-2 DD_3 -V SS_3 Working power signal V DD_3 / V SS_3 Then, the working power signal V DD_3 / V SS_3 The output PoE power signal V DD_2 / V SS_2 And the working power signal V DD_3 / V SS_3 For example, in some embodiments, the PoE power signal V DD_2 / V SS_2 The voltage V DD_2 -V SS_2 It can be 24V, 48V, 54V or any other voltage that complies with one of the PoE industry standards, while the working power signal V DD_3 / V SS_3 The voltage V DD_3 -V SS_3 It can be 12V, 5V or 3.3V.

[0029] Different output voltages can be achieved by providing different turns ratios between the primary winding and the two secondary windings. In this paper, the turns ratio between the primary winding and the first secondary winding is designed to be Np / N s1 In this paper, the turns ratio between the primary winding and the second secondary winding is designed to be N p / N s2 , where N p is the number of turns of the primary winding, N s1 is the number of turns of the first secondary winding, N s2 is the number of turns of the second secondary winding. The output voltage at each transformer output is generally inversely proportional to the turns ratio of the corresponding winding, so in various embodiments, the desired output voltage can be achieved by appropriately setting the turns ratio of the primary winding and the plurality of secondary windings. For example, in some embodiments, approximately N p / N s1 = 0.5 and N p / N s2 =2 (in some examples, N p / N s1 = 0.5 and N p / N s2 =2.25), which can be used to generate an output PoE power signal V with a voltage of 54V. DD_2 / V SS_2 and a 12V working power signal V DD_3 / V SS_3 .

[0030] The output voltage from transformer 65 also depends on the input power V DD / V SS voltage and the duty cycle of the switch circuit 61. Therefore, if the input power V DD / V SS If the voltage of the input voltage changes, the change in the input voltage can be compensated by changing the duty cycle of the switch circuit 61, thereby maintaining the desired output voltage at the transformer outputs 66-1 and 66-2. Specifically, the following equation represents the relationship between the output voltage and the other variables mentioned above:

[0031]

[0032] Among them, V out_i is the i-th (i th ) The output voltage of the transformer output 66-i (e.g., V out_1 =V DD_2 -V SS_2 And V out_2 =V DD_3 -V SS_3 ), D is the duty cycle, V in is the input voltage (V DD -V SS ), N s_i is the i-th (ith ) Number of windings of the secondary winding, N p is the number of windings of the primary winding. If the desired target output voltage is known, Equation 1 can be rearranged to express the duty cycle required to achieve the target output voltage as a function of the input voltage:

[0033]

[0034] The PWM switch circuit 61 may be configured to monitor the output PoE power signal V at the first transformer output 66 - 1 . DD_2 / V SS_2 And control the duty cycle D to make the voltage V DD_2 -V SS_2 To maintain the voltage V DD_2 -V SS_2 , and feeds back information indicating the measured voltage to the PWM switch circuit 61, which can then adjust the duty cycle accordingly. That is, if the voltage V DD_2 -V SS_2 If the voltage V DD_2 -V SS_2 If the voltage V is higher than the predetermined target, the switch circuit may reduce the duty cycle D by a predetermined amount (or by an amount determined by the algorithm). For example, the adjustment amount determined by the algorithm may include an amount determined according to a proportional integral derivative (PID) control method. In addition, in some examples, some hysteresis may be added to the adjustment process to prevent the duty cycle from continuously changing back and forth around the target value; for example, when the voltage V DD_2 -V SS_2 Instead of adjusting the duty cycle D when it is slightly below or slightly above the target value, a threshold value on either side of the target value can be used and the duty cycle D can be adjusted only when the voltage V DD_2 -V SS_2 Adjustments occur only when the threshold is exceeded.

[0035] For example, in one embodiment, the output PoE power V DD_2 / V SS_2 The target voltage is 54V, which complies with multiple PoE industry standards, including IEEE802.3af, 802.3at, 802.3bt Type 3, and 803.3bt Type 4. In addition, in this example, the turns ratio of the primary winding to the first secondary winding is N p / N s1 =0.5. In this embodiment, by setting the duty cycle as shown in Table 1 below, the output PoE power can be maintained at 54V for various input power voltages:

[0036]

[0037] Table 1

[0038] Furthermore, continuing the above example, if the operating power V DD_3 / V SS_3 The target voltage is 12V. If the turns ratio of the primary winding to the second secondary winding is N p / N s2 If it is set to 2.25, all the above input voltages can reach the target voltage.

[0039] It should be noted that in addition to the above turns ratios, other turns ratios can also be used. For a given desired target output power, there are multiple combinations of turns ratios that can be used to produce the desired target output power. For example, to achieve the same 54V and 12V output power as described above, the following (non-exhaustive) turns ratio combinations can be used: N p / N s1 =.4 and N p / N s2 =1.8; N p / N s1 =.45 and N p / N s2 =2; N p / N s1 =.5 and N p / N s2 =2.25; and N p / N s1 =.6 and N p / N s2 =2.7. In addition, in some cases, for the working power V DD_3 / V SS_3 Precision is not required, so the turns ratio of the second secondary winding does not have to be exact. For example, in some embodiments N p / N s1 =.5, N p / N s2 =2 turns ratio, which can maintain the output PoE power voltage at 54V and produce an operating voltage of 13.5V - although this will overshoot the required 12V of the operating voltage, in some cases, this small overshoot is acceptable.

[0040] exist Figure 1In order to simplify the discussion and aid understanding, only the second transformer output 66-2 is shown. However, any number of second transformer outputs 66-n may be included, each having its own associated secondary winding of the transformer 65 and each receiving its own operating power signal. As with the above-described outputs 66-1 and 66-2, the voltage of the operating power signal provided to these additional second transformer outputs 66-n will be based on their respective turns ratios.

[0041] It can be noted that, in some examples, the operating power signal V output to the second transformer output 66-2 is DD_3 / V SS_3 In other words, the PWM switch circuit 61 does not actively monitor the voltage V DD_3 -V SS_3 However, by properly setting the turns ratio N p / N s1 and N p / N s2 (If there are other second transformer outputs, their respective turns ratios should be the same), the voltage V DD_3 -V SS_3 More specifically, the voltage output to the second transformer output 66-2 is proportional to the voltage output to the first transformer output 66-1, and the ratio is controlled by the turns ratio thereof. Therefore, if the turns ratio is appropriately set, the PWM switch circuit 61 can output the PoE power signal V DD_2 / V SS_2 To indirectly control the working power signal V DD_3 / V SS_3 If the desired output voltage is known, the appropriate turns ratio can be determined using the following equation:

[0042]

[0043] As mentioned above, the output PoE power V DD_2 / V SS_2 The first transformer output 66-1 is provided to the PSE power output circuit 70. The PSE power output circuit 70 includes a circuit for controlling the provision of PoE power to the downstream PD via the PoE PSE interface 75. For example, the PSE power output circuit 70 may include a PSE chip. The PSE chip may perform operations such as PD detection and PD classification, and based on these operations, control the provision of output PoE power to the PoE PSE interface 75. DD_2 / V SS_2 When referring to the downstream part of the PSE power output circuit 70, the output PoE power V DD_2 / V SS_2It can also be called output PoE power PSE+ / PSE-.

[0044] The PoE PSE interface 75 includes a port (not shown) such as an RJ45 jack, which is configured to receive a connector of an Ethernet cable, which may include an RJ45 connector. The PoE PSE interface 75 is configured to send and receive data signals via an Ethernet cable (when the Ethernet cable is connected between the PoE PSE interface 75 and the PD) and provide output PoE power signals PSE+ / PSE-. The PoE PSE interface 75 is configured to receive output PoE power PSE+ / PSE- via power lines 76, wherein one power line 76 carries a larger potential PSE+ and the other power line 76 carries a smaller potential PSE-. (It should be noted that PSE+ and PSE- are respectively connected to V DD_2 and V SS_2 The PoE PSE interface 75 is also configured to transmit data via the data line 29 . Figure 1 One PoE PSE interface 75 is shown in FIG. 1 , but any number of PoE PD interfaces 20 equal to or greater than one may be included in the PD / PSE 10 .

[0045] The PD / PSE 10 also includes a communication and control circuit 50. The communication and control circuit 50 is connected to the data line 28 and the data line 29 and is configured to receive, apply, route and / or process data signals transmitted through the data lines 28 and 29. In some examples, the communication and control circuit 50 may include an Ethernet PHY chip that handles conversion between physical layer Ethernet communications and higher layer communication signals that communicate with other parts of the circuit 50 (such as a CPU) or other parts of the PD / PSE 10. In particular, a first Ethernet PHY chip may handle communication conversion between the PD interface 20 and the rest of the circuit 50, while a second Ethernet PHY chip may handle communication conversion between the PSE interface 75 and the rest of the circuit 50. In some examples, the PD / PSE 10 is configured to have switching and / or routing functions, and the communication and control circuit 50 may include a switching circuit (e.g., a switching crossbar, a switching ASIC, etc.) that is configured to switchably connect the data lines 28 and / or 29 to other communication interfaces (e.g., other ports) to allow communication to flow between these interfaces. For example, such switching circuitry may route communications between PD interface 20 and PSE interface 75, between PD interface 20 and another communication interface (not shown), between PSE interface 75 and another communication interface (not shown), and / or between PD interface 20 or PSE interface 75 and some other component of PD / PSE 10. In some examples, communication and control circuitry 50 may include processing circuitry, such as a processor, system on chip (SoC), ASIC, or other processing circuitry, configured to control various operations of PD / PSE 10.

[0046] Now turn to Figure 2 , an example system 5 will be described. The system 5 includes the above-mentioned PD / PSE 10, upstream PSE 90 and downstream PD 94. Figure 2 As shown, the upstream PSE 90 is connected to the PD / PSE 10 via a cable 92, which is inserted into the PSE port 91 of the upstream PSE 90 and the PD interface 20 of the PD / PSE 10. In addition, the downstream PD 94 is connected to the PD / PSE 10 via a cable 96, which is inserted into the PSE interface 75 of the PD / PSE 10 and the PD port 95 of the PD 94. Figure 2 As shown by the dotted arrow in FIG. 1 , the input PoE power PD+ / PD- can flow from the upstream PSE 90 to the PD / PSE 10 via the PD interface 20 to become the input power V DD / V SS , then input power V DD / V SSThe power is guided to the DC-DC converter 60 via the PoE power receiving circuit 45, and is converted by the DC-DC converter 60 into the output PoE power V output from the first transformer output 66-1 to the PSE power output circuit 70. DD_2 / V SS_2 , then the output PoE power V DD_2 / V SS_2 The output PoE power PSE+ / PSE- is output from the PSE interface 75 to the PD 94. In addition, the input power V DD / V SS The DC-DC converter 60 also converts the operating power signal V output from the second transformer output 66-2 into DD_3 / V SS_3 , and supplies the device power rail 71.

[0047] Now turn to Figure 3 , an example system 6 will be described. The system 6 includes the above-mentioned PD / PSE 10, an external power supply 97, and a downstream PD 94. The external power supply 97 may include an AC-DC power adapter plugged into an AC power source (such as a mains power supply), or a DC power line plugged into a DC power source. Figure 3 As shown, an external power source 97 is connected to the PD / PSE 10 via a power line 98, which is plugged into the DC input 48 of the PD / PSE 10. In addition, a downstream PD 94 is connected to the PD / PSE 10 via a cable 96, which is plugged into the PSE interface 75 of the PD / PSE 10 and the PD port 95 of the PD 94. Figure 3 As shown by the dashed arrows in FIG. 1 , the input DC power DC+ / DC- can flow from the power supply 97 into the PD / PSE 10 via the DC input 48 to become the input power V DD / V SS , then input power V DD / V SS The power is guided to the DC-DC converter 60 via the PoE power receiving circuit 45 and converted by the DC-DC converter 60 into the output PoE power V output from the first transformer output 66-1. DD_2 / V SS_2 , then the output PoE power V DD_2 / V SS_2 The power V is supplied to the PD 94 via the PSE power output circuit 70 and the PSE interface 75. DD / V SS It is also converted by the DC-DC converter 60 into an operating power signal V output from the second transformer output 66-2. DD_3 / V SS_3 , and provides power rail 71 to the device.

[0048] Now turn to Figure 4 , an example PD / PSE 100 will be described. PD / PSE 100 is an example implementation of the PD / PSE 10 described above, and therefore certain components of PD / PSE 100 correspond to components of PD / PSE 10 (i.e., are the same as components of PD / PSE 10 or are example implementations of components of PD / PSE 10). The above description of the components of PD / PSE 10 also applies to the corresponding components of PD / PSE 100 with appropriate modifications, and will not be repeated below. Although PD / PSE 100 is an example implementation of PD / PSE 10, PD / PSE 10 may include other implementation examples and is not limited to PD / PSE 100.

[0049] like Figure 3 As shown, the PD / PSE 100 includes a PoE PD interface 120, which is an example implementation of the PoE PD interface 20. The PD / PSE 100 also includes a PoE receiving circuit 145, which is an example implementation of the PoE receiving circuit 45; the PoE receiving circuit 145 includes a rectifier 130 and a PD chip 140. The PD / PSE 100 also includes a DC-DC converter 160, which is an example implementation of the DC-DC converter 60; a PSE chip 170, which is an example implementation of the PSE power output circuit 70; and a PoE PSE interface 175, which is an example implementation of the PoE PSE interface 75. These components and other components of the PD / PSE 100 will be described in turn below.

[0050] The PoE PD interface 120 includes a port (e.g., an RJ45 jack) having a plurality of electrical contacts 121 that are configured to electrically connect to complementary contacts of a connector of an Ethernet cable plugged into the port of the PoE PD interface 20. The contacts 121 are grouped into pairs 122 (only one pair is labeled), wherein each pair 122 has a differential signal pair applied thereto. That is, one contact 121 of the pair 122 carries one of the alternating signals that make up the differential signal pair, and the other contact 121 of the same pair 122 carries the other alternating signal that makes up the differential signal pair. In some examples, the PoE PD interface 120 includes eight contacts 121 arranged in four pairs 122. The contacts 121 are generally numbered 1 to 8, and the pairings between these contacts 121 are as shown in FIG. Figure 4 shown.

[0051] The two contacts 121 of a given pair 122 are connected to a corresponding pair of data lines 128 via a transformer 125. The transformer 125 transfers the differential signal pair carried by the pair 122 to the data lines 128 while providing electrical isolation between the data lines 128 for safety. The differential signal pair includes data communications encoded in the alternation of the signals, as is familiar to those of ordinary skill in the art. The two contacts 121 of the pair 122 are connected to opposite ends of the same winding of the transformer 125.

[0052] In addition to encoding data communications, some differential signal pairs may also carry PoE power signals. These PoE power signals may be extracted from the differential signal pairs via the center taps 123 of the transformers 125. The power lines 126 are each connected to one of the center taps 123 of the center taps 123 of a corresponding one of the transformers 125. Specifically, the power line 126 labeled CM1 is connected to the center taps 123 of the 1 and 2 contact pairs 122, the power line 126 labeled CM2 is connected to the center taps 123 of the 3 and 6 contact pairs 122, the power line 126 labeled CM3 is connected to the center taps 123 of the 4 and 5 contact pairs 122, and the power line 126 labeled CM4 is connected to the center taps 123 of the 7 and 8 contact pairs 122. In some examples, to provide a PoE power signal, the PSE shifts the center voltage of one of the differential signal pair relative to the center voltage of the other of the differential signal pair, which causes the potential of one of the center taps 123 to be greater than the potential of the other of the center taps, thereby causing a DC voltage difference applied between the pair 127 of power lines 126. This DC voltage difference between the pair 127 of power lines 126 forms the PoE power signal.

[0053] For example, if the PSE sets the center voltage of the differential signal pair applied to the 1, 2 contact pair 122 to the potential V A , and at the same time, the center voltage of the differential signal pair applied to the 3 and 6 contact pairs 122 is set to the potential V B , then the potential V A The electric power line 126 is applied to the electric power line 126 labeled CM1, and the potential V B will be applied to the power line 126 labeled CM2. Therefore, V C =V A -V B The voltage difference will be applied between the power lines 126 labeled CM1 and CM2, which form the first power line pair 127-1. A Greater than V B , then CM1 will be for the "hot" line 126 in 127-1, and CM2 will be for the "neutral" line 126 in 127-1. Conversely, if V A Less than V B, then CM1 will be the "neutral" line 126 in 127-1, and CM2 will be the "hot" line 126 in 127-1.

[0054] Alternatively, the PSE may choose to provide the PSE power signal via differential signal pairs applied to the 4,5 and 7,8 contact pairs, which will result in a DC voltage difference between the power lines 126 labeled CM3 and CM4, thereby forming a second power line pair 127-2.

[0055] like Figure 3 As shown, the PD / PSE 100 further includes two rectifiers 130, namely a first rectifier 130-1 and a second rectifier 130-2. The first rectifier 130-1 is connected to the first power line pair 127-1 (i.e., power lines 126 CM1 and CM2), and the second rectifier 130-2 is connected to the second power line pair 127-2 (i.e., power lines 126 CM3 and CM4). The rectifiers 130 each use a diode as a rectifying element and include a diode bridge. In various other examples (not shown) of the PD / PSE 100, a diode bridge is used. Figure 3 The rectifier structure shown in , except that the diode is replaced by a replaceable rectifying element, such as a thyristor, a silicon-controlled rectifier, or any other rectifying element known in the art. In other examples, a rectifier structure other than a diode bridge can be used as the rectifier 130. Rectifiers are generally used to convert AC signals into DC signals, but as described above, in the PD / PSE 110, the PoE power signal is generally already in DC form when applied to the power line 126. Therefore, in some examples, the rectifier 130 is not used for the purpose of converting AC to DC, and the rectifier 130 is provided mainly to ensure that each PoE power signal has the required voltage polarity when it is received at the input end of the PD chip 140. This function is required because in some PoE systems, the polarity of the PoE power signal applied to the power line 126 does not have to be fixed. In other words, a given PSE may apply a larger potential to the first power line 126 in the pair 127, making it the "hot" line, but a different PSE may then apply a smaller potential to the first power line 126 in the pair 127, making it the "neutral" line. Therefore, the PD / PSE 110 cannot know in advance which power line 126 is the "hot" line and which is the "neutral" line, and the rectifier 130 ensures that the correct polarity reaches the PD chip 140 regardless of the arrangement.

[0056] like Figure 4 As shown, if the PD / PSE 100 is currently powered by the input PoE power PD+ / PD- received from the PD interface 120, the input PoE power PD+ / PD- passes through the rectifier 130 and is provided to the input of the PD chip 140. The PD+ potential is also directly provided to the node 146 and becomes the potential VDD (In this case, V DD PD- is the same potential as PD+, just given a different label). On the other hand, PD- is at V SS The output passes through the internal circuit (V SS 140). PD chip 140 can selectively disconnect or establish this connection from PD- to node 147, and in this way, PD chip 140 can control whether the input PoE power PD+ / PD- flows through PD chip 140 or is blocked by PD chip 140.

[0057] PD chip 140 includes a microchip configured to perform various operations related to managing PoE power received via PD interface 120, such as negotiating with an upstream PSE for PD detection and PD classification, controlling a power-on sequence, performing surge control, and / or measuring power consumption. Similarly, PD / PSE 100 also includes a PSE chip 170 having a microchip configured to perform various operations related to managing PoE power supply from PSE interface 175, such as negotiating with a downstream PD for PD detection and PD classification and / or measuring power consumption.

[0058] If the PD / PSE 100 is currently powered by the DC input 148, the input DC power DC+ / DC- received from the DC input 148 will be delivered to nodes 146 and 147 where it becomes a potential V DD and V SS (In this case, DC+ and V DD Same, DC- and V SS same).

[0059] Nodes 146 and 147 are coupled to the input of a DC-DC converter 160. The DC-DC converter 160 includes a PWM controller 162, a switch in the form of a transistor 163, and a multi-output transformer 165. The PWM controller 162 and the transistor 163 form a PWM switch circuit, which is an example implementation of the above-mentioned PWM switch circuit 161. The PWM controller 162 generates a PWM signal, which is applied to the control terminal (e.g., gate) of the transistor 163 for turning the transistor on and off in a pulsed manner, the pulse having a duty cycle determined by the PWM signal.

[0060] Node 146 and the potential V carried thereon DDA first end 166a of a transformer input 166 of a transformer 165 is connected to a second end 166b of the transformer input 166, which is connected to one side of a transistor 163. The other side of the transistor 163 is connected to a terminal 169 of a PWM controller 162, which is connected to the node 147 via an internal circuit of the PWM controller 162 and thus carries a potential V SS Thus, when transistor 163 is turned on (conducting), a current path from node 146 to node 147 is established through transformer input 166. This causes current to also flow through transformer outputs 167 and 168, generating a power signal V at the first transformer output 167. DD_2 / V SS_2 , and generates a power signal V on the second transformer output 168 DD_3 / V SS_3 As mentioned above about Figure 1 As mentioned above, the power signal V DD_2 / V SS_2 The PoE power signal is output to the PSE chip 170, and the power signal V DD_3 / V SS_3 The operating power signals are formed to be output to the device power rail 171. The voltage of these output power signals depends on the turns ratio of the input and the first and second outputs, and the duty cycle of transistor 163, as described above with respect to Figure 1 Therefore, the PWM controller 162 can control the voltage V by changing the duty cycle (via the PWM signal). DD_2 -V SS_2 and V DD_2 -V SS_2 .

[0061] A voltage measurement and feedback circuit 164 is provided to monitor the voltage V DD_2 -V SS_2 , and feeds the measurement back to PWM controller 162. Circuit 164 may include a voltage monitoring device, such as one or more resistors of known resistance across a potential V DD_2 and V SS_2 The voltage measurement can be fed back to the PWM controller 162 via an opto-isolator, which can transmit information via an optical signal without establishing a direct electrical connection. This maintains electrical isolation between the primary and secondary sides of the transformer 165. The voltage measurement information can be used by the PWM controller 162 to determine the duty cycle of the transistor 163. Specifically, the PWM controller 162 can control the duty cycle to set the voltage V DD_2 -V SS_2 Maintained within the target value (or specified range) specified above.

[0062] exist Figure 4In order to simplify the discussion and aid understanding, only one second transformer output 166-2 is shown. However, any number of second transformer outputs 166-n may be included, each having its own associated secondary winding of transformer 165, and each receiving its own operating power signal. As with the above-described outputs 166-1 and 166-2, the voltage of the operating power signal provided to these additional second transformer outputs 166-n will be based on their respective turns ratios.

[0063] As described above, the output PoE power V is supplied from the first transformer output 166-1 to the PSE chip 170. DD_2 / V SS_2 , the PSE chip 170 performs operations such as PD detection and PD classification. Potential V DD_2 It is also directly supplied to the power line 176. Potential V SS_2 V is also provided to power line 176, but first passes through the internal circuitry of PSE chip 170. PSE chip 170 can selectively disconnect or establish V SS This connection to the power line 176, therefore, the PSE chip 170 can switch V SS_2 The internal connection of the potential to the power line 176 is used to control the PoE power V DD_2 / V SS_2 Can it flow through PSE interface 175. In other examples, V SS_2 potential is directly supplied to the power line 176, and V DD_2 The potential passes through the internal circuit of the PSE chip 170 .

[0064] After passing through the PSE chip 170, the PoE power V DD_2 / V SS_2 The output PoE power (also referred to as output PoE power PSE+ / PSE-) flows to the PSE interface 175 via power lines 176. The PoE PSE interface 175 may be similar in structure to the PD interface 120, except that it is configured to output PoE power rather than receive PoE power. The PSE interface 175 includes a port (e.g., an RJ45 jack) having a plurality of electrical contacts 173, which are configured to electrically connect to complementary contacts of a connector of an Ethernet cable inserted into the port of the PoE PSE interface 175. The contacts 173 are grouped into pairs 172 (only one is labeled), each pair 172 having a differential signal pair applied thereto. The contacts 173 are connected to a transformer 177 in a manner similar to the connection to the PD interface 120. In addition, at least two of the center taps of the transformer 177 are connected to a pair of output power lines 176 to receive the output PoE power. Specifically, in some examples, such as Figure 4As shown by the solid line in FIG, the center tap of the transformer 177 connected to contacts 1, 2 and 3, 6 is coupled to the power line 176, so that the PoE power is output from the PSE interface 175 via contacts 1, 2, 3 and 6. In other examples, as Figure 4 As shown by the dashed line in FIG. 4 , the center tap of the transformer 177 connected to contacts 4, 5 and 7, 8 is coupled to the power line 176, so that PoE power is output from the PSE interface 175 via contacts 4, 5, 7, and 8. In other examples, the power line 176 is coupled to the center taps of all transformers 177 (e.g., the solid line connection and the dashed line connection shown in FIG. 4 ), so that PoE power is output via all contacts. Figure 4 In the middle, the potential V DD_2 Shown as connected to contacts 3, 6 or 6, 8, and potential V SS_2 It is shown connected to contacts 1, 2 or 4, 5, but this is just an example and in other embodiments the potential may be provided to different contacts.

[0065] PD / PSE 100 also includes communications and control circuitry 150 , which is similar to communications and control circuitry 50 described above.

[0066] Now turn to Figure 5 , the method 500 will be described. Figure 5 As shown, method 500 includes operations of blocks 502, 504, 506, and 508, which are described in more detail below. Method 500 may be performed by a hybrid PD / PSE, such as PD / PSE 10 or PD / PSE 100 described above, or by a person using such a PD / PSE.

[0067] In block 502, the PD / PSE receives input power. The input power may be input PoE power received from an upstream PSE, or input DC power received from an external power source.

[0068] In block 504, the PD / PSE directs the received input power to a DC-DC converter including a multiple output transformer.

[0069] In block 506, the PD / PSE converts the input power using a DC-DC converter into at least two output power signals: (1) a PoE output power signal provided to a PSE port of the PD / PSE from a first transformer output of the transformer; and (2) an operating power signal provided to a device power rail of the PD / PSE from a second transformer output of the transformer.

[0070] In block 508, the PD / PSE monitors the PoE output power and controls the gain of the DC-DC converter based on the PoE output power. More specifically, in some examples, controlling the gain includes controlling a duty cycle of a switching circuit that pulses input power to the transformer.

[0071] In the above description, various types of electronic circuits are described. As used herein, "electronic" should be broadly understood to include all types of circuits that utilize electricity, including digital and analog circuits, direct current (DC) and alternating current (AC) circuits, and circuits for converting electricity into another form of energy and circuits for using electricity to perform other functions. In other words, as used herein, there is no distinction between "electronic" circuits and "electrical" circuits.

[0072] It should be understood that both the general description and the detailed description provide examples that are illustrative in nature and are intended to provide an understanding of the present disclosure without limiting the scope of the present disclosure. Various mechanical, compositional, structural, electronic and operational changes may be made without departing from the scope of the present specification and claims. In some cases, well-known circuits, structures and techniques are not shown or described in detail to avoid confusing the examples. The same numbers in two or more drawings represent the same or similar elements.

[0073] In addition, unless the context indicates otherwise, the singular forms "a", "an", and "the" are also intended to include the plural forms. In addition, the terms "include", "comprise", "have", etc. specify the presence of stated features, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, elements, components and / or groups. The connected components described may be directly connected electronically or mechanically, or they may be indirectly connected via one or more intermediate components, unless otherwise specifically indicated. Unless the context of the specification indicates otherwise, mathematical and geometric terms are not necessarily intended to be used according to their strict definitions, because those of ordinary skill in the art will understand that, for example, substantially similar elements that function in a substantially similar manner may also easily fall within the scope of the descriptive term, even if the term also has a strict definition.

[0074] And / or: From time to time, the phrase "and / or" will be used with a list of items. The phrase is meant to include any combination of the items in the list - from a single item to all of the items and any permutations in between. Thus, for example, "A, B, and / or C" means one of {a}, {b}, {c}, {a, b}, {a, c}, {c, b}, and {a, c, b}.

[0075] Whenever practicable, elements and their associated aspects described in detail with reference to one example may be included in other examples not specifically shown or described. For example, if an element is described in detail with reference to one example but not described with reference to a second example, the element may still be claimed to be included in the second example.

[0076] Unless otherwise indicated herein or implied by the context, when approximate terms such as "substantially," "approximately," "about," "substantially," "roughly," and the like are used, it should be understood that mathematical precision is not required, but rather a range of variation is included but not strictly limited to the stated value, property, or relationship. In particular, the range of variation implied by the use of such approximate terms includes at least any insignificant variations, as well as those variations that are typical in the relevant art for the type of item in question due to manufacturing or other tolerances, in addition to any ranges expressly indicated herein, if any. In any case, unless otherwise indicated, the range of variation may at least include values ​​within ±1% of the stated value, property, or relationship.

[0077] According to the disclosure of this article, further modifications and alternative examples will be obvious to those of ordinary skill in the art, for example, the device and method may include additional components or steps omitted from the diagram and description for clarity of operation. Therefore, this description should be interpreted as being merely illustrative, and is for the purpose of teaching those skilled in the art to implement the general manner of this teaching. It should be understood that the various examples shown and described herein will be considered exemplary. Elements and materials and the arrangement of those elements and materials may replace those elements and materials shown and described herein, parts and processes may be reversed, and certain features of this teaching may be used independently, all of which will be obvious to those skilled in the art after benefiting from the description herein. Without departing from the scope of this teaching and the appended claims, the elements described herein may be changed.

[0078] It is to be understood that the specific examples set forth herein are non-limiting and that modifications in structure, dimensions, materials, and methods may be made without departing from the scope of the present teachings.

[0079] Other examples according to the present disclosure will be readily apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. The specification and examples are to be considered exemplary only, and the appended claims are to be given their fullest breadth under applicable law, including equivalents.

Claims

1. A hybrid powered device / power supply equipment (PD / PSE), the hybrid powered device / power supply equipment comprising: a powered device (PD) interface configured to removably receive a connector of an Ethernet cable to communicatively connect the PD / PSE to an upstream power sourcing equipment (PSE) and to receive input Power over Ethernet (PoE) power from the PSE; a PSE interface configured to removably receive another connector of another Ethernet cable to communicatively connect the PD / PSE to a downstream PD and provide output (PoE) power to the PD; a device power rail that provides operating power to one or more components of the PD / PSE; as well as a DC-DC converter comprising a multi-output transformer including a transformer input, a first transformer output electrically connected to the PSE interface, and a second transformer output electrically connected to the device power rail, Wherein, the DC-DC converter is configured to receive the input PoE power and in response provide the input PoE power to the transformer input, generate the output PoE power at the first transformer output, and generate the operating power at the second transformer output.

2. The PD / PSE according to claim 1, in, The DC-DC converter is configured to monitor the output PoE power generated at the second transformer output and adjust a gain of the DC-DC converter based on the output PoE power.

3. The PD / PSE according to claim 2, in, The DC-DC converter includes a switching circuit configured to provide the input PoE power to the transformer input in a pulsed manner with a duty cycle; and Wherein, the DC-DC converter is configured to adjust the gain by adjusting the duty cycle.

4. The PD / PSE according to claim 3, The switch circuit comprises: a switch configured to provide the input power to the transformer input according to the duty cycle; as well as A pulse width modulation (PWM) controller is configured to control the duty cycle by providing a PWM signal to a control terminal of the switch.

5. The PD / PSE according to claim 4, in, The PWM controller is configured to control the duty cycle based on the output PoE power so that the output PoE power is maintained at a predetermined target voltage or within a predetermined target voltage range.

6. The PD / PSE according to claim 5, comprising: in, The predetermined target voltage is 54V, and the turns ratio of the primary winding to the first secondary winding is N p / N s1 =0.5, wherein the primary winding is associated with the transformer input and the first secondary winding is associated with the first transformer output.

7. The PD / PSE according to claim 6, comprising: in, The turns ratio of the primary winding to the second secondary winding is N p / N s2 =2.25, where the second secondary winding is associated with the second transformer output.

8. The PD / PSE according to claim 4, comprising: A voltage measurement and feedback circuit is configured to measure a voltage of the output PoE power generated at the second transformer and to feed back information indicative of the measured voltage to the PWM controller.

9. The PD / PSE according to claim 1, comprising: a DC power port configured to receive input DC power from an external power source, and Wherein a DC-DC converter is configured to receive the input DC power and in response provide the input DC power to the transformer input, generate the output PoE power at the first transformer output, and generate the operating power at the second transformer output.

10. The PD / PSE according to claim 1, comprising: A PD chip is configured to receive the input PoE power from the PD interface and provide the input PoE power to the DC-DC converter.

11. The PD / PSE according to claim 1, comprising: A PSE chip is configured to receive the output PoE power from the first transformer output and provide the output PoE power to the PSE interface.

12. A system, comprising: The PD / PSE according to claim 1; an upstream PSE connected to the PD / PSE via a first Ethernet cable connected to the PD interface; a downstream PD, the downstream PD being connected to the PD / PSE via a second Ethernet cable connected to the PSE interface; wherein the PSE is configured to provide the input PoE power to the PD / PSE, and The PD / PSE is configured to provide the output PoE power to the PD.

13. A system, comprising: The PD / PSE of claim 9, wherein the external power source is connected to the DC power port to provide the input DC power; The downstream PD is connected to the PD / PSE via an Ethernet cable connected to the PSE interface; The PD / PSE is configured to provide the output PoE power to the PD.

14. A method comprising: receiving input power at a hybrid powered device / power sourcing equipment (PD / PSE); directing the received input power to a DC-DC converter including a multiple output transformer; The input power is converted into at least two output power signals by the DC-DC converter, and the output power signals include: a PoE output power signal generated at a first transformer output of the transformer; and an operating power signal generated at a second transformer output of the transformer; providing the output PoE power from the first transformer output to a PSE port of the PD / PSE; and The operating power signal is provided from the second transformer output to a device power rail of the PD / PSE.

15. The method according to claim 14 comprises: monitoring the output PoE power; as well as A gain of the DC-DC converter is controlled based on the output PoE power.

16. The method according to claim 15, in, Controlling the gain includes controlling a duty cycle of a switching circuit that provides the input power to the transformer in a pulsed manner.

17. The method according to claim 16, in, Controlling the gain includes controlling the duty cycle so that the voltage of the output PoE power is maintained at a predetermined target voltage or within a predetermined target range.

18. The method according to claim 14, in, The input power includes input PoE power received from an upstream PSE.

19. The method according to claim 14, in, The input power includes input DC power received from an external power source.

20. The method according to claim 14, The output PoE power is provided from the PSE port of the PD / PSE to a downstream PD connected to the PSE port via an Ethernet cable.

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