Display panel and display device

Abstract

The invention provides a display panel and a display device.The display panel comprises a display area and a non-display area, the non-display area comprises a special-shaped non-display area, and the edge of the special-shaped non-display area comprises a bent part; the display panel further comprises a plurality of pixel driving circuits which are located in the display area and arranged in an array mode in the first direction and the second direction, and the first direction and the second direction intersect. The pixel driving circuit comprises a first-type transistor, and the first-type transistor comprises an oxide transistor. The first wire is at least located in the special-shaped non-display area; the first wire is made of titanium and molybdenum; the first wire receives a fixed potential signal. According to the display panel, bright spots of the special-shaped display area of the display panel under the low gray scale can be relieved, and the first wire is prevented from being damaged by static electricity.

Description

Technical Field

[0001] The present disclosure relates to the field of display, and in particular, to a display panel and a display device. Background Art

[0002] In the current LTPO (Low Temperature Polycrystalline Oxide) display panel, in the special-shaped display area, the wiring of the bias adjustment signal line is different from that of the main display area, which causes the characteristics of the IGZO (Indium-Gallium-Zinc-Oxide) transistors at the edge of the special-shaped display area to be affected, resulting in bright spots in the special-shaped display area at low grayscale.

[0003] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute the prior art known to ordinary technicians in the field. Summary of the invention

[0004] In view of this, the present disclosure provides a display panel and a display device to at least solve the problem of bright spots occurring in the irregular display area of ​​the conventional display panel at low grayscale.

[0005] In one aspect, an embodiment of the present disclosure provides a display panel, including a display area and a non-display area, the non-display area including a special-shaped non-display area, and the edge of the special-shaped non-display area including a curved portion; the display panel also includes: a plurality of pixel driving circuits, the plurality of pixel driving circuits are located in the display area, and are arranged in an array along a first direction and a second direction, and the first direction and the second direction intersect; the pixel driving circuit includes a first type of transistor, the first type of transistor includes an oxide transistor; a first routing line, the first routing line is at least located in the special-shaped non-display area; the material of the first routing line includes titanium and molybdenum; the first routing line receives a fixed potential signal.

[0006] On the other hand, an embodiment of the present disclosure further provides a display device, comprising the above-mentioned display panel.

[0007] Compared with the prior art, the present invention has at least the following technical effects:

[0008] The display panel and display device disclosed in the present invention, by setting a first wiring whose material includes titanium metal and molybdenum metal in the special-shaped non-display area of ​​the display panel, since the crystals of titanium metal grow horizontally and the crystals of molybdenum metal grow vertically, the first wiring can enhance the blocking effect of hydrogen elements in the oxide transistor at the edge of the display area close to the special-shaped non-display area, reduce the leakage current of the oxide transistor, and reduce the negative bias of the threshold voltage of the oxide transistor, thereby alleviating the problem of bright spots at the edge of the display area of ​​the display panel close to the special-shaped non-display area at low gray scale; by making the first wiring receive a fixed potential signal, it is possible to avoid the first wiring from being floated and prevent the first wiring from being damaged by electrostatic shock. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The accompanying drawings herein are incorporated into the specification and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the specification are used to explain the principles of the present disclosure. Obviously, the accompanying drawings described below are only some embodiments of the present disclosure, and for ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without creative work.

[0010] Figure 1 It is a schematic diagram of area division of a display panel in the related art;

[0011] Figure 2 yes Figure 1 A partial enlarged view of a special-shaped display area;

[0012] Figure 3 yes Figure 1 A partial enlarged view of another special-shaped display area;

[0013] Figure 4 is a schematic diagram of area division of a display panel provided by an embodiment of the present disclosure;

[0014] Figure 5 It is a schematic diagram of circuit wiring distribution of a display panel provided by an embodiment of the present disclosure;

[0015] Figure 6 is a circuit diagram of a pixel driving circuit provided by an embodiment of the present disclosure;

[0016] Figure 7 is a schematic diagram of a cross-sectional structure of a display panel provided by an embodiment of the present disclosure;

[0017] Figure 8 is a schematic diagram of circuit wiring distribution of another display panel provided by an embodiment of the present disclosure;

[0018] Fig. 9 is a schematic diagram of a first wiring distribution of a display panel provided by an embodiment of the present disclosure;

[0019] Fig.10 is a schematic diagram of first wiring distribution of another display panel provided by an embodiment of the present disclosure;

[0020] Fig.11 yes Fig.10 A partial enlarged view of the first special-shaped non-display area;

[0021] Fig.12 yes Fig.10 A partial enlarged view of the second special-shaped non-display area;

[0022] Fig.13 yes Fig. 9 A partial enlarged view of the second special-shaped non-display area;

[0023] Fig.14 is a structural schematic diagram of a display device provided by an embodiment of the present disclosure;

[0024] Reference numerals:

[0025] 100. Display panel;

[0026] 110. Display area;

[0027] 111. Main display area;

[0028] 112. Special-shaped display area;

[0029] 113. Rounded corner display area;

[0030] 114. A first special-shaped display area;

[0031] 115. Second special-shaped display area;

[0032] 120, non-display area;

[0033] 121. Special-shaped non-display area;

[0034] 122. a first special-shaped non-display area;

[0035] 123. Light transmission hole;

[0036] 124. a second special-shaped non-display area;

[0037] 130. Pixel driving circuit;

[0038] 131. The first type of transistor;

[0039] 132. a first gate;

[0040] 133. Channel;

[0041] 134, second gate;

[0042] 140, first routing;

[0043] 150, substrate;

[0044] 160, second routing;

[0045] 161, the first child is routed;

[0046] 162. The second child moves along the line;

[0047] 170, the third route;

[0048] 180, binding area;

[0049] 190, a first semiconductor layer;

[0050] DVH, bias adjustment signal line;

[0051] X, first direction;

[0052] Y, second direction;

[0053] 200. Display device. DETAILED DESCRIPTION

[0054] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that the disclosure will be comprehensive and complete and the concepts of the example embodiments will be fully conveyed to those skilled in the art. The same reference numerals in the figures represent the same or similar structures, and thus their repeated description will be omitted.

[0055] The words "first", "second" and similar words used in the specific description do not indicate any order, quantity or importance, but are only used to distinguish different components. In addition, in the description of the present disclosure, the orientation or position relationship indicated by the terms "upper" and "lower" are based on the orientation or position relationship shown in the drawings, which are only for the convenience of description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as a limitation of the present disclosure.

[0056] It should be noted that, in the absence of conflict, the embodiments of the present disclosure and the features in different embodiments may be combined with each other.

[0057] LTPO display panels are a combination of the mainstream LTPS (Low Temperature Poly-silicon) transistor solution in OLED (Organic Light-Emitting Diode) display panels and the IGZO (Indium-Gallium-Zinc-Oxide) transistor solution. LTPO display panels can achieve a lower refresh rate and reduce the power consumption of the display panel, so they are very popular.

[0058] In the related technology, the concentration of hydrogen elements in the IGZO transistor of the LTPO display panel is relatively high. The existing bias adjustment signal line has a blocking effect on the hydrogen elements in the IGZO transistor, preventing leakage of the IGZO transistor and avoiding negative bias of the threshold voltage (Vth) of the IGZO transistor, thereby avoiding the problem of bright spots in the display area 110 of the LTPO display panel at low grayscale.

[0059] However, if Figure 1 As shown, the display panel includes a display area 110 and a non-display area 120, wherein the display area 110 includes a main display area 111 and a special-shaped display area 112, and the special-shaped display area 112 includes a rounded display area located at the edge of the display area 110 and areas on both sides of the hole inside the display area 110.

[0060] like Figure 2 and Figure 3 As shown, in the special-shaped display area 112 of the LTPO display panel, the wiring of the bias adjustment signal line DVH will be designed differently from that of the main display area 111. The difference in the wiring of the bias adjustment signal line DVH in the special-shaped display area 112 will cause the bias adjustment signal line DVH in the special-shaped display area 112 to have a poor blocking effect on the hydrogen element in the IGZO transistor, thereby causing the IGZO transistor in the special-shaped display area 112 to leak, causing the threshold voltage (Vth) of the IGZO transistor to be negatively biased, and causing bright spots in the special-shaped display area 112 at low grayscale.

[0061] In the LTPO display panel, if there is enough space in the non-display area 120 adjacent to the special-shaped display area 112, redundant pixels or redundant sub-pixels can be added to the non-display area 120 to ensure that the wiring and hole density of the IGZO transistors in the special-shaped display area 112 are consistent with those in the main display area 111, thereby avoiding the above-mentioned problem. However, as the demand for narrow bezels of display panels gradually increases, the space of the non-display area 120 is limited, and redundant pixels or redundant sub-pixels cannot be arranged, thereby being unable to avoid the problem of bright spots in the special-shaped display area 112 at low grayscales.

[0062] In view of this, one aspect, such as Figure 4 , Figure 5 and Figure 6 As shown, an embodiment of the present disclosure provides a display panel 100, which includes: a display area 110 and a non-display area 120, wherein the non-display area 120 includes a special-shaped non-display area 121, and the edge of the special-shaped non-display area 121 includes a curved portion. The display panel 100 also includes: a plurality of pixel driving circuits 130 and a first wiring 140. The plurality of pixel driving circuits 130 are located in the display area 110, and are arranged in an array along a first direction X and a second direction Y, and the first direction X and the second direction Y intersect; the pixel driving circuit 130 includes a first type of transistor 131, and the first type of transistor 131 includes an oxide transistor. The first wiring 140 is at least located in the special-shaped non-display area 121; the material of the first wiring 140 includes titanium and molybdenum; the first wiring 140 receives a fixed potential signal.

[0063] Specifically, when the display panel 100 is a rounded rectangle, the irregular non-display area 121 may include R corner areas located at the four rounded corners of the rounded rectangle and a hole area located inside the display area 110. When the display panel 100 is circular, the irregular non-display area 121 may include a non-display area 120 surrounding the display area 110. The display panel 100 may also be in other shapes, and accordingly, the irregular non-display area 121 may also include other areas with curved edges, which is not limited in the present application.

[0064] Due to the existence of the irregular non-display area 121, part of the display area 110 is also irregular. In the irregular part of the display area 110, the distribution of the pixel driving circuit 130 will be different from that in other areas, and accordingly, the distribution of the bias adjustment signal line electrically connected to each pixel driving circuit 130 will also be different from that in other areas. For example, the bias adjustment signal line at the rounded corner position of the display area 110 will be shorter than that in other areas, and the bias adjustment signal lines on both sides of the hole-punching area of ​​the display area 110 will not be connected due to the existence of the hole-punching area, and the bias adjustment signal lines on the same side of the hole-punching area may also vary in length depending on the shape of the hollowing. Therefore, the wiring of the bias adjustment signal line at the edge of the display area 110 near the irregular non-display area 121 is different from that in other parts of the display area 110. In addition, the oxide transistors (such as Figure 6 The T4 and T5 transistors in the display panel 100 may be IGZO transistors. The T5 transistor may be an N-type MOS transistor (MOS is the abbreviation of MOSFET, Metal-Oxide-Semiconductor Field-Effect Transistor). For the T5 transistor, the over-scan signal S1N may be adjusted to a normal low, and the first reference signal Vref1 may be gradually raised, so that the brightness of the bright spot of the display panel 100 is reduced, and therefore it can be determined that the T5 transistor is leaking.

[0065] also, Figure 6 The pixel driving circuit 130 in the figure is only an example, and the pixel driving circuit 130 of the display panel 100 disclosed in the present invention may include multiple types, but is not limited to this.

[0066] In this embodiment, a first wiring 140 made of titanium and molybdenum is arranged in the irregular non-display area 121 of the display panel 100. Since the crystals of titanium grow horizontally and the crystals of molybdenum grow vertically, the first wiring 140 can enhance the blocking effect of hydrogen elements in the oxide transistor at the edge of the display area 110 near the irregular non-display area 121, reduce the leakage of the oxide transistor, and reduce the negative bias of the threshold voltage of the oxide transistor, thereby alleviating the problem of bright spots at the edge of the display area 110 of the display panel 100 near the irregular non-display area 121 at low grayscale. In addition, in this embodiment, by allowing the first wiring 140 to receive a fixed potential signal, it is possible to avoid floating of the first wiring 140 and prevent electrostatic damage to the first wiring 140.

[0067] In some embodiments, Figure 7 As shown, the first type of transistor 131 includes a first gate 132, and the first wiring 140 is arranged in the same layer as the first gate 132. The first wiring 140 and the first gate 132 are arranged in the same layer does not mean that they are the same in absolute height, but that they are made of the same film layer. In this embodiment, the first wiring 140 is prepared by using the existing film layer of the first gate 132, and the existing film layer can be reused, simplifying the preparation process of the first wiring 140.

[0068] In some embodiments, continue to refer to Figure 7 The display panel 100 includes a substrate 150 and a first semiconductor layer 190, a channel 133 of the first type transistor 131 is located in the first semiconductor layer 190, and a first gate 132 is located on a side of the first semiconductor layer 190 away from the substrate 150. Specifically, the material of the first semiconductor layer 190 may be IGZO (indium gallium zinc oxide), and the first gate 132 may be a top gate of the first type transistor 131.

[0069] In some embodiments, continue to refer to Figure 7 The first type transistor 131 further includes a second gate 134, which is located on a side of the first semiconductor layer 190 close to the substrate 150. Specifically, the first type transistor 131 may be a dual-gate transistor, and the second gate 134 may be a bottom gate of the first type transistor 131.

[0070] In some embodiments, continue to refer to Figure 5 and Figure 6The pixel driving circuit 130 includes a driving transistor and a bias adjusting transistor, the bias adjusting transistor is electrically connected to the source and / or drain of the driving transistor, and the bias adjusting transistor is electrically connected to the second wiring 160. The second wiring 160 is located in the display area 110, and the first wiring 140 is electrically connected to the second wiring 160; the second wiring 160 transmits a bias adjusting signal, and the fixed potential signal includes the bias adjusting signal.

[0071] The driving transistor may be an M3 transistor, the bias adjusting transistor may be an M8 transistor, the source of the driving transistor M3 may be the second node N2, the drain may be the third node N3; or the source of the driving transistor M3 may be the third node N3, the drain may be the second node N2.

[0072] Specifically, in the pixel driving circuit 130, the driving transistor M3 is used to provide a driving current for the light emitting element. The driving transistor M3 can determine the magnitude of its driving current according to its gate potential, thereby adjusting the luminous brightness of the driving light emitting element by controlling the gate voltage of the driving transistor M3. When the pixel driving circuit 130 is used for a long time, since the driving transistor M3 is controlled by voltage for a long time, it will be affected by the bias pressure, resulting in a voltage bias in the driving transistor M3, which affects the effect of controlling the light emitting element to emit light. Therefore, the pixel driving circuit 130 also includes a bias regulating transistor M8, which can pull up the source or drain potential of the driving transistor M3, that is, the second node N2 or the third node N3, to improve the voltage bias of the driving transistor M3.

[0073] Further, the control end of the bias adjustment transistor M8 is electrically connected to the bias control signal line SPX, the first end of the bias adjustment transistor M8 is electrically connected to the second node N2, and the second end of the bias adjustment transistor M8 is electrically connected to the bias adjustment signal line DVH. The bias control signal line SPX is connected to the bias control signal, and the bias adjustment signal line DVH is connected to the bias adjustment signal. The bias control signal includes an enable level and a non-enable level, the enable level can turn on the bias adjustment transistor M8, and the non-enable level can turn off the bias adjustment transistor M8. When the bias control signal line SPX controls the bias adjustment transistor M8 to turn on, the bias adjustment transistor M8 can transmit the bias adjustment signal transmitted on the bias adjustment signal line DVH to the control end of the driving transistor M3, that is, the first node N1, so as to reset the bias state of the driving transistor M3, eliminate the influence of the data signal written in the previous frame on the device characteristics (that is, the threshold voltage) of the driving transistor M3, and improve the voltage bias of the driving transistor M3.

[0074] The second wiring 160 may include a bias adjustment signal line DVH, which is connected to the bias adjustment signal. The bias adjustment signal line DVH extends along the first direction X in the display area 110 and is arranged along the second direction Y. Each bias adjustment signal line DVH is electrically connected to a row of pixel driving circuits 130 along the first direction X. The first wiring 140 is also connected to the bias adjustment signal by being electrically connected to the second wiring 160, so as to prevent the first wiring 140 from floating and prevent the first wiring 140 from being damaged by electrostatic shock.

[0075] In some embodiments, Figure 8 As shown, the display panel 100 also includes a third line 170 and a binding area 180 located in the non-display area 120; the binding area 180 includes a binding terminal, the third line 170 is electrically connected to the binding terminal, and is electrically connected to the second line 160 and the first line 140; at least part of the third line 170 is arranged in a different layer from the first line 140. Specifically, the third line 170 extends along the second direction Y in the non-display area 120. Each third line 170 extending along the second direction Y is electrically connected to a second line 160 extending along the first direction X. The third line 170 is directly electrically connected to the first line 140 or is electrically connected to the first line 140 through the second line 160. The first line 140 and the second line 160 can access a fixed potential signal through the third line 170. The binding area 180 includes a flexible circuit board or a driver chip, and the binding terminal can be located on the flexible circuit board or the driver chip. The third line 170 receives a fixed potential signal through the binding terminal. At least a portion of the third wiring 170 is disposed at a different layer from the first wiring 140 , so as to reduce the width of the non-display area 120 , that is, reduce the border width of the display panel 100 .

[0076] In some embodiments, Fig. 9 As shown, the display area 110 includes a main display area 111 and a special-shaped display area 112, the length of the special-shaped display area 112 in the first direction X is less than the length of the main display area 111 in the first direction X; the special-shaped display area 112 includes a rounded display area 113, and the edge of the rounded display area 113 is bent in a direction away from the display area 110; the special-shaped non-display area 121 includes a first special-shaped non-display area 122 corresponding to the rounded display area 113, and at least a portion of the first wiring 140 is located in the first special-shaped non-display area 122; and / or, the display panel 100 also includes a light-transmitting hole 123, the special-shaped non-display area 121 includes a second special-shaped non-display area 124 located between the light-transmitting hole 123 and the display area 110, and at least a portion of the first wiring 140 is located in the second special-shaped non-display area 124. Since the special-shaped display area 112 includes the rounded display area 113 and the like, the length of the special-shaped display area 112 in the first direction X is smaller than the length of the main display area 111 in the first direction X.

[0077] Due to the irregular shape of the rounded display area 113, the wiring of the bias adjustment signal line DVH in the rounded display area 113 is different from that in the main display area 111, which leads to a poor blocking effect of the bias adjustment signal line DVH in the rounded display area 113 on hydrogen elements in the oxide transistor. The first wiring 140 is at least partially located in the first special-shaped non-display area 122 corresponding to the rounded display area 113, which can enhance the blocking effect on hydrogen elements in the oxide transistor of the rounded display area 113 close to the first special-shaped non-display area 122, thereby alleviating the problem of bright spots in the rounded display area 113 at low grayscale.

[0078] The light-transmitting hole 123 of the display panel 100 can be used to transmit natural light to realize the front camera of the display panel 100, or to transmit infrared rays to realize face recognition, etc. Due to the existence of the light-transmitting hole 123, the display area 110 of the display panel 100 includes a special-shaped display area 112 around the light-transmitting hole 123. Accordingly, in the special-shaped display area 112 around the light-transmitting hole 123, the wiring of the bias adjustment signal line DVH is different from that of the main display area 111, which will cause the bias adjustment signal line DVH in the special-shaped display area 112 around the light-transmitting hole 123 to have a poor blocking effect on the hydrogen element in the oxide transistor. At least a portion of the first wiring 140 is located in the second special-shaped non-display area 124 between the light-transmitting hole 123 and the display area 110, which can enhance the blocking effect of the hydrogen element in the oxide transistor of the special-shaped display area 112 around the light-transmitting hole 123 close to the second special-shaped non-display area 124, thereby alleviating the problem of bright spots in the special-shaped display area 112 around the light-transmitting hole 123 at low grayscale.

[0079] In some embodiments, continue to refer to Fig. 9, at least a portion of the first routing line 140 is located in the first special-shaped non-display area 122, the first routing line 140 includes a closed loop, and the orthographic projection of the first routing line 140 on the substrate 150 of the display panel 100 surrounds the display area 110; and / or, at least a portion of the first routing line 140 is located in the second special-shaped non-display area 124, the first routing line 140 includes a closed loop, and the orthographic projection of the first routing line 140 on the substrate 150 of the display panel 100 surrounds the orthographic projection of the light-transmitting hole 123 on the substrate 150. The closed loop setting of the first routing line 140 of the present embodiment can simplify the pattern design of the first routing line 140 and reduce the difficulty of preparing the first routing line 140; the orthographic projection of the first routing line 140 located at least partially in the first special-shaped non-display area 122 on the substrate 150 surrounds the display area 110, which can avoid the problem of bright spots occurring in the main display area 111 at low grayscale, and at the same time increase the electrostatic protection capability of the non-display area 120 near the main display area 111; the orthographic projection of the first routing line 140 located at least partially in the second special-shaped non-display area 124 on the substrate 150 surrounds the orthographic projection of the light-transmitting hole 123 on the substrate 150, which can avoid the problem of bright spots occurring in the special-shaped display area 112 close to the second special-shaped non-display area 124 at low grayscale, and at the same time increase the electrostatic protection capability of the second special-shaped non-display area 124.

[0080] In some embodiments, Fig.10 , Fig.11 and Fig.12 As shown, the first wiring 140 is located in the first special-shaped non-display area 122, and the first wiring 140 includes independent arcs corresponding to each first special-shaped non-display area 122, and the center direction of the arc is toward the rounded display area 113; and / or, the first wiring 140 is located in the second special-shaped non-display area 124, and the first wiring 140 includes independent arcs corresponding to the bending area of ​​each second special-shaped non-display area 124, and the center direction of the arc is away from the special-shaped display area 112 close to the bending area. The independent arc setting of the first wiring 140 located in the first special-shaped non-display area 122 of this embodiment can reduce the material usage of the first wiring 140, and at the same time avoid the first wiring 140 occupying the space of the non-display area 120, thereby reducing the border width of the display panel 100. The independent arc setting of the first routing line 140 located in the second special-shaped non-display area 124 of this embodiment can reduce the material usage of the first routing line 140, while avoiding the first routing line 140 occupying the space of the second special-shaped non-display area 124, reducing the hole area of ​​the display panel 100, and improving the screen-to-body ratio of the display panel 100.

[0081] In some embodiments, Figure 6 and Fig.13As shown, the special-shaped display area 112 includes a first special-shaped display area 114 and a second special-shaped display area 115 located on both sides of the light-transmitting hole 123 along the first direction X; the pixel driving circuit 130 includes a driving transistor and a bias adjustment transistor, the bias adjustment transistor is electrically connected to the source and / or drain of the driving transistor, and the bias adjustment transistor is electrically connected to the second wiring 160; the second wiring 160 includes a first sub-wiring 161 located in the first special-shaped display area 114 and a second sub-wiring 162 located in the second special-shaped display area 115, and the first sub-wiring 161 and the second sub-wiring 162 are electrically connected through the first wiring 140 located in the second special-shaped non-display area 124. The first sub-route 161 and the second sub-route 162 of the present embodiment are electrically connected to the first route 140 located in the second special-shaped non-display area 124, which can avoid the problem that the first sub-route 161 and the second sub-route 162 both need to have a third route 170 separately set in the non-display area 120 to be electrically connected to the first sub-route 161 and the second sub-route 162, so that the first sub-route 161 and the second sub-route 162 are respectively connected to fixed potential signals, thereby reducing the number of third routes 170 in the non-display area 120, thereby reducing the border width of the display panel 100.

[0082] In some embodiments, for example, continue to refer to Fig.11 , the distance between the edge of the special-shaped non-display area 121 close to the display area 110 and the first wiring 140 is H1, and the distance between the edge of the special-shaped non-display area 121 far from the display area 110 and the first wiring 140 is H2; wherein, H1<H2. Specifically, H1 can be positioned as any point on the first wiring 140, the shortest distance between the point and the edge of the special-shaped non-display area 121 close to the display area 110, and correspondingly, H2 can be positioned as the shortest distance between the point and the edge of the special-shaped non-display area 121 far from the display area 110. Any point on the first wiring 140 can satisfy H1<H2. The above-mentioned arrangement of the present embodiment can make the first wiring 140 be located closer to the display area 110 in the irregular non-display area 121, thereby improving the blocking effect of the first wiring 140 on the hydrogen element in the oxide transistor at the edge of the display area near the irregular non-display area 121, reducing the leakage of the oxide transistor, and reducing the negative bias of the threshold voltage of the oxide transistor, thereby alleviating the problem of bright spots occurring at the edge of the display area 110 of the display panel 100 near the irregular non-display area 121 at low grayscale.

[0083] In some embodiments, for example, continue to refer to Fig.11, the distance between the edge of the irregular non-display area 121 close to the display area and the first wiring 140 is H1, H1≤30 microns. Specifically, the value of H1 can be any one of 5 microns, 10 microns, 15 microns, 20 microns, 25 microns or 30 microns, and the present disclosure does not limit this. The above-mentioned setting of this embodiment can make the first wiring 140 close to the oxide transistor located in the display area 110, thereby improving the blocking effect of the first wiring 140 on the hydrogen element in the oxide transistor.

[0084] In some embodiments, the first wiring 140 includes a molybdenum metal film and a titanium metal film, the molybdenum metal film is located on the side of the titanium metal film close to the light emitting direction of the display panel 100, and the ratio of the film thickness of the molybdenum metal film to the titanium metal film is in the range of 4 to 8. Specifically, since the first wiring 140 and the second wiring 160 are arranged in the same layer, that is, the first wiring 140 and the second wiring 160 are prepared using the same metal film layer. The ratio of the film thickness of the molybdenum metal film and the titanium metal film can be any value of 4, 5, 6, 7 or 8, and the present disclosure does not limit this. The above-mentioned arrangement of this embodiment can further enhance the blocking effect of the first wiring 140 on the hydrogen element in the oxide transistor located in the display area 110 close to the special-shaped non-display area 121 based on the crystal growth characteristics of the molybdenum metal film and the titanium metal film.

[0085] In some embodiments, the line width of the first wiring 140 is 3 microns to 10 microns. Specifically, the line width of the first wiring 140 can be any value of 3 microns, 4 microns, 5 microns, 6 microns, 7 microns, 8 microns, 9 microns or 10 microns, and the present disclosure does not limit this. The above-mentioned setting of this embodiment can further improve the blocking effect of the first wiring 140 on the hydrogen element in the oxide transistor located in the display area close to the special-shaped non-display area 121, while avoiding excessive occupation of the space of the non-display area 120, and reducing the border width of the display panel 100.

[0086] In some embodiments, the line width of the second wiring 160 is 2 to 3 microns. The above configuration of this embodiment can further improve the blocking effect of the second wiring 160 on the hydrogen element in the oxide transistor located in the display area 110 (such as the rounded display area 113, the first special-shaped display area 114 or the second special-shaped display area 115) close to the special-shaped non-display area 121.

[0087] On the other hand, Fig.14 As shown, the embodiment of the present disclosure further provides a display device 200, including the above-mentioned display panel. The display device 200 can be: a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, or any other product or component with a display function.

[0088] The specific implementation manner and technical effects of the display device disclosed in the present invention can refer to the specific embodiments of the display panel mentioned above, and the repeated parts will not be repeated here.

[0089] In summary, the display panel and the display device disclosed in the present invention, by setting a first wiring whose materials include titanium metal and molybdenum metal in the special-shaped non-display area of ​​the display panel, since the crystals of titanium metal grow laterally and the crystals of molybdenum metal grow vertically, the first wiring can enhance the blocking effect of hydrogen elements in the oxide transistor at the edge of the display area near the special-shaped non-display area, reduce the leakage of the oxide transistor, and reduce the negative bias of the threshold voltage of the oxide transistor, thereby alleviating the problem of bright spots occurring at the edge of the display area of ​​the display panel near the special-shaped non-display area at low grayscale; by making the first wiring receive a fixed potential signal, it is possible to avoid the first wiring from floating, thereby preventing the first wiring from being damaged by electrostatic shock.

[0090] The above contents are further detailed descriptions of the present disclosure in combination with specific optional implementation methods, and it cannot be determined that the specific implementation of the present disclosure is limited to these descriptions. For ordinary technicians in the technical field to which the present disclosure belongs, several simple deductions or substitutions can be made without departing from the concept of the present disclosure, which should be regarded as falling within the scope of protection of the present disclosure.

Claims

1. A display panel, characterized in that: The display panel includes a display area and a non-display area, the non-display area includes a special-shaped non-display area, and the edge of the special-shaped non-display area includes a curved portion; The display panel further includes: A plurality of pixel driving circuits, the plurality of pixel driving circuits are located in the display area and arranged in an array along a first direction and a second direction, the first direction and the second direction intersecting; the pixel driving circuits include a first type of transistor, the first type of transistor includes an oxide transistor; A first wiring, wherein the first wiring is at least located in the special-shaped non-display area; the material of the first wiring comprises titanium and molybdenum; and the first wiring receives a fixed potential signal.

2. The display panel according to claim 1, characterized in that: The first type of transistor includes a first gate, and the first wiring is arranged on the same layer as the first gate.

3. The display panel according to claim 2, characterized in that: The display panel includes a substrate and a first semiconductor layer. The channel of the first type of transistor is located in the first semiconductor layer. The first gate is located on a side of the first semiconductor layer away from the substrate.

4. The display panel according to claim 3, characterized in that: The first type of transistor further includes a second gate, and the second gate is located on a side of the first semiconductor layer close to the substrate.

5. The display panel according to claim 1, characterized in that: The pixel driving circuit comprises a driving transistor and a bias adjusting transistor, the bias adjusting transistor is electrically connected to a source and / or a drain of the driving transistor, and the bias adjusting transistor is electrically connected to a second wiring; The second wiring is located in the display area, and the first wiring is electrically connected to the second wiring; the second wiring transmits a bias adjustment signal, and the fixed potential signal includes the bias adjustment signal.

6. The display panel according to claim 5, characterized in that: The display panel further includes a third wiring and a binding area located in the non-display area; the binding area includes a binding terminal, the third wiring is electrically connected to the binding terminal, and is electrically connected to the second wiring and the first wiring; At least a portion of the third routing line is disposed in a different layer from the first routing line.

7. The display panel according to claim 1, characterized in that: The display area includes a main display area and a special-shaped display area, and the length of the special-shaped display area in the first direction is smaller than the length of the main display area in the first direction; The special-shaped display area includes a rounded display area, and the edge of the rounded display area is bent in a direction away from the display area; the special-shaped non-display area includes a first special-shaped non-display area corresponding to the rounded display area, and at least a part of the first wiring is located in the first special-shaped non-display area; And / or, the display panel further includes a light-transmitting hole, the special-shaped non-display area includes a second special-shaped non-display area located between the light-transmitting hole and the display area, and at least a portion of the first wiring is located in the second special-shaped non-display area.

8. The display panel according to claim 7, characterized in that: At least a portion of the first routing line is located in the first special-shaped non-display area, the first routing line comprises a closed loop, and an orthographic projection of the first routing line on the substrate of the display panel surrounds the display area; And / or, at least part of the first routing line is located in the second special-shaped non-display area, the first routing line includes a closed loop, and the orthographic projection of the first routing line on the substrate of the display panel surrounds the orthographic projection of the light-transmitting hole on the substrate.

9. The display panel according to claim 7, characterized in that: The special-shaped display area includes a first special-shaped display area and a second special-shaped display area located on both sides of the light-transmitting hole along the first direction; The pixel driving circuit comprises a driving transistor and a bias adjusting transistor, the bias adjusting transistor is electrically connected to a source and / or a drain of the driving transistor, and the bias adjusting transistor is electrically connected to a second wiring; The second routing includes a first sub-routing located in the first special-shaped display area and a second sub-routing located in the second special-shaped display area, and the first sub-routing and the second sub-routing are electrically connected through the first routing located in the second special-shaped non-display area.

10. The display panel according to claim 1, characterized in that: The distance between the edge of the irregular non-display area close to the display area and the first wiring is H1, and the distance between the edge of the irregular non-display area far from the display area and the first wiring is H2; wherein H1<H2.

11. The display panel according to claim 1, characterized in that: The distance between the edge of the special-shaped non-display area close to the display area and the first wiring is H1, and H1≤30 micrometers.

12. The display panel according to claim 1, characterized in that: The first wiring includes a molybdenum metal film and a titanium metal film. The molybdenum metal film is located on a side of the titanium metal film close to the light emitting direction of the display panel, and the ratio of the film thickness of the molybdenum metal film to the titanium metal film ranges from 4 to 8.

13. The display panel according to claim 1, characterized in that: The line width of the first wiring is 3 micrometers to 10 micrometers.

14. A display device, characterized in that: Comprising the display panel according to any one of claims 1 to 13.

Images