Integrated AI data processing system

Abstract

The invention provides an integrated AI data processing system which comprises a GPU, an IPU, an FPGA, a board card, temperature monitoring modules, ADCs, an MCU, a PWM and at least two fans, the GPU, the IPU, the FPGA and the board card are each provided with at least one temperature monitoring module, each temperature monitoring module is connected with at least one ADC, and the FPGA is used for performing parallel artificial intelligence tasks according to the parallel artificial intelligence tasks; the MCU is used for matching with a set fan control logic based on the digital temperature signal so as to obtain the fan control logic and generate a fan control instruction according to the fan control logic; the PWM is used for adjusting a power supply signal of the fan by changing the width of an output pulse according to a fan control instruction; and at least one of the two fans generates a corresponding airflow velocity according to the power supply signal so as to evacuate heat energy generated when the GPU, the IPU, the FPGA and the board card cooperatively run the parallel artificial intelligence task. The technical problems of how to accurately and efficiently control the cooling fan according to the temperature conditions of different hardware and how to prolong the service life of the hardware are solved.

Description

Technical Field

[0001] This application belongs to the technical field of AI chips, and in particular, to an integrated AI data processing system. Background Art

[0002] In current high-performance GPU cards or AI computing power acceleration cards, generally a single temperature sensor is used to control the working mode of the main heat-generating components, and this temperature sensor is integrated inside the heat-generating components, only detecting the core temperature of the GPU or AI chip. When the GPU or AI chip is higher than a certain temperature T1, the component reduces its frequency to lower the temperature; but if the temperature still continues to rise after frequency reduction and exceeds a certain temperature T2, the component directly stops working to avoid permanent damage to the component.

[0003] The heat dissipation methods of the board are divided into two types: passive heat dissipation and active heat dissipation. Passive heat dissipation has no self-fan and only relies on the chassis fan for heat dissipation; active heat dissipation, the board comes with several fans and has a built-in heat dissipation algorithm to control the fan speed.

[0004] Regarding the control of multiple temperature sensors and multiple fans in high-performance GPU cards or AI computing power acceleration cards, the technology for achieving efficient heat dissipation still needs to be studied. Summary of the Invention

[0005] This application provides an integrated AI data processing system to solve the technical problem of how to accurately and efficiently control the cooling fan according to the temperature conditions of different hardware, give full play to the best performance of each hardware in AI data processing, and at the same time extend the service life of the hardware.

[0006] The solution provided by this application is as follows: This embodiment introduces an integrated AI data processing system, including: GPU, IPU, FPGA, board, temperature monitoring module, ADC, MCU, PWM, and at least two fans, where: At least one temperature monitoring module is respectively arranged on the GPU, IPU, FPGA, and the board, each temperature detection module is respectively connected to at least one ADC, the data input end of the MCU is connected to the digital signal output end of the ADC, the control signal output end of the MCU is connected to the control input end of the PWM, and the output end of the PWM is connected to the power control ends of each fan; The GPU is used to execute computing acceleration tasks to accelerate the parallel AI tasks in the training and inference processes of the target AI model; The IPU is used to execute model inference tasks to call the trained target AI model to run parallel AI tasks and obtain AI speculation results accordingly; The FPGA is used for on-site hardware programming according to parallel artificial intelligence tasks to run the target logic that matches the parallel artificial intelligence tasks; The board is used to carry the GPU, IPU, and FPGA, and control the cooperation among the GPU, IPU, and FPGA according to the set cooperation logic to run parallel artificial intelligence tasks; The temperature monitoring module is used to detect the temperature information when the GPU, IPU, FPGA, and board cooperate to run parallel artificial intelligence tasks and generate an analog temperature signal accordingly; The ADC is used to convert the analog temperature signal output by the temperature monitoring module into a digital temperature signal; The MCU is used to match the digital temperature signal with the set fan control logic to obtain the fan control logic and generate a fan control instruction accordingly; The PWM is used to adjust the power supply signal of the fan by changing the width of the output pulse according to the fan control instruction; At least one of the two fans generates a corresponding air flow velocity according to the power supply signal to evacuate the heat energy generated when the GPU, IPU, FPGA, and board cooperate to run parallel artificial intelligence tasks.

[0007] Optionally, the GPU, IPU, FPGA, and board are divided into the following two groups of heat sources: the first heat source includes the GPU and IPU, the second heat source includes the FPGA and board, and the two fans include the first heat source cooling fan and the second heat source cooling fan; The MCU is used to match the digital temperature signal with the set fan control logic to obtain the fan control logic and generate a fan control instruction, including at least one of the following: The MCU receives the digital temperature signals converted by the ADC corresponding to the GPU and IPU, and compares the digital temperature values with three temperature thresholds preset for the GPU and IPU respectively: the low temperature threshold (T1_GPU, T1_IPU), the medium temperature threshold (T2_GPU, T2_IPU), and the high temperature threshold (T3_GPU, T3_IPU) to generate the following first comparison results; When the MCU detects that the temperature of the GPU is lower than T1_GPU and the temperature of the IPU is lower than T1_IPU, it determines that the first heat source is in an overall low temperature state, and sends a fan control instruction to the PWM controlling the first heat source cooling fan to reduce the rotation speed of the first heat source cooling fan; When the MCU detects that the temperature of the GPU is between T1_GPU and T2_GPU, or the temperature of the IPU is between T1_IPU and T2_IPU, it determines that the temperature of the first heat source begins to rise, and sends a fan control instruction to the PWM to increase the rotation speed of the first heat source cooling fan; The MCU receives the digital temperature signals converted by the ADC corresponding to the FPGA and the board, and compares the digital temperature values with three temperature thresholds preset for the FPGA and the board respectively: the low temperature threshold (T1_FPGA, T1_board), the medium temperature threshold (T2_FPGA, T2_board), and the high temperature threshold (T3_FPGA, T3_board) to generate the following second comparison results; When the MCU detects that the temperature of the FPGA is lower than T1_FPGA and the temperature of the board is lower than T1_board, it determines that the second heat source is in a relatively low temperature state as a whole, and sends a fan control instruction to reduce the rotation speed of the second heat source cooling fan to the PWM that controls the second heat source cooling fan; When the MCU detects that the temperature of the FPGA is between T1_FPGA and T2_FPGA, or the temperature of the board is between T1_board and T2_board, it determines that the temperature of the second heat source begins to rise, and sends a fan control instruction to increase the rotation speed of the second heat source cooling fan to the one that controls the second heat source cooling fan.

[0008] Optionally, the GPU, IPU, FPGA, and board are divided into the following two groups of heat sources: the first heat source includes the GPU and IPU, the second heat source includes the FPGA and board, and the two fans include the first heat source cooling fan and the second heat source cooling fan; The MCU is used to match with the set fan control logic based on the digital temperature signal to obtain the fan control logic to generate the fan control instruction, and further includes: When the MCU detects that the temperature of the FPGA is higher than T3_GPU and the temperature of the IPU is higher than T3_IPU, it determines that the temperature of the first heat source is too high, and sends a fan control instruction to start the second heat source cooling fan to the PWM that controls the second heat source cooling fan.

[0009] Optionally, the MCU is also used to initialize parameters such as the reference voltage setting, sampling frequency, and resolution of the ADC.

[0010] Optionally, the MCU is also used to receive the interrupt trigger signal of the ADC, and respectively obtain the latest values of 'temp_GPU' and 'temp_IPU' through the corresponding data reading interface based on the interrupt trigger signal. 'temp_GPU' and 'temp_IPU' are respectively the digital temperature signals converted by the ADC corresponding to the GPU and IPU.

[0011] Optionally, the MCU compares 'temp_GPU' with 'T1_GPU', 'T2_GPU', 'T3_GPU' in sequence, and at the same time compares 'temp_IPU' with 'T1_IPU', 'T2_IPU', 'T3_IPU' in sequence, thereby generating a first comparison result, and determining a PWM drive signal with a corresponding duty cycle according to the first comparison result to control the wind speed of the first heat source cooling fan.

[0012] Optionally, the MCU compares 'temp_FPGA' with 'T1_FPGA', 'T2_FPGA', 'T3_FPGA', and at the same time compares 'temp_board' with 'T1_board', 'T2_board', 'T3_board' to generate a second comparison result, and determines a PWM drive signal with a corresponding duty cycle according to the second comparison result to control the wind speed of the second heat source cooling fan.

[0013] Optionally, the fan control instruction includes a frame header, control parameters, and a frame tail.

[0014] Optionally, the control parameter of the fan control instruction is the PWM duty cycle parameter encoding.

[0015] Advantages of the present application: Through the entire operation process of the MCU in this application to read the data after ADC conversion in real time, compare and judge, and send a control instruction to the PWM according to the judgment result to generate a control signal for the corresponding fan, the real-time monitoring of the temperatures of the first heat source and the second heat source is realized, and the rotation speeds of the two cooling fans are adjusted in a timely manner according to the temperature change situation, ensuring that the hardware such as GPU, IPU, FPGA, and board in the entire integrated AI data processing system always operates within a suitable temperature range and guaranteeing the stable operation of the system.

[0016] During the whole process, the program realizes the function of dynamically controlling the rotation speed of the cooling fan based on the temperatures of different heat sources from the perspective of a computer executing a program through precise logical judgment, instruction construction and sending, and close cooperation with hardware (such as ADC, PWM, fan, etc.). Description of the Drawings

[0017] Figure 1 It is a schematic diagram of the hardware of an integrated AI data processing system provided by the present application. Detailed Embodiments

[0018] The technical solutions in the embodiments of the present application will be clearly described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are some, but not all, of the embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application belong to the scope of protection of the present application.

[0019] The terms "first", "second", etc. in the description and claims of this application are used to distinguish similar objects, rather than to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of this application can be implemented in an order other than those illustrated or described herein, and the objects distinguished by "first", "second", etc. are generally of the same category, and do not limit the number of objects. For example, the first object can be one or more. In addition, "and / or" in the description and claims means at least one of the connected objects, and the character " / ", generally indicates an "or" relationship between the associated objects before and after.

[0020] The embodiments of this application have been described above in conjunction with the accompanying drawings. However, this application is not limited to the above specific implementation manners. The above specific implementation manners are merely illustrative and not restrictive. Under the inspiration of this application, those of ordinary skill in the art can also make many forms without departing from the purpose of this application and the scope protected by the claims, and all of them fall within the protection scope of this application.

[0021] This application proposes an integrated AI data processing system, including: GPU, IPU, FPGA, board, temperature monitoring module, ADC, MCU, PWM and at least two fans, as Figure 1 A specific high-performance GPU card and AI computing power acceleration card are given. Among them, two independent fans are used to dissipate the heat of the entire board. In addition to the temperature sensors inside the GPU / IPU, a temperature sensor is also placed at other heat sources, such as FPGA, and a temperature sensor is also placed at a position on a certain board between the GPU / IPU and the FPGA to monitor whether this position will overheat.

[0022] Among them, at least one temperature monitoring module is respectively arranged on the GPU, IPU, FPGA and the board. Each temperature detection module is respectively connected to at least one ADC. The data input end of the MCU is connected to the digital signal output end of the ADC. The control signal output end of the MCU is connected to the control input end of the PWM. The output end of the PWM is connected to the power control ends of each fan; the GPU is used to execute the computing acceleration task to accelerate the parallel artificial intelligence tasks in the training and inference processes of the target artificial intelligence model; the IPU is used to execute the model inference task to call the trained target artificial intelligence model to run the parallel artificial intelligence task and obtain the artificial intelligence speculation result accordingly; the FPGA is used to perform hardware in-situ programming according to the parallel artificial intelligence task to run the target logic matching the parallel artificial intelligence task; the board is used to carry the GPU, IPU, FPGA, and control the cooperation between the GPU, IPU, and FPGA according to the set cooperation logic to run the parallel artificial intelligence task; the temperature monitoring module is used to detect the temperature information when the GPU, IPU, FPGA and the board cooperate to run the parallel artificial intelligence task and generate an analog temperature signal accordingly; the ADC is used to convert the analog temperature signal output by the temperature monitoring module into a digital temperature signal; the MCU is used to match the digital temperature signal with the set fan control logic to obtain the fan control logic and generate a fan control instruction accordingly; the PWM is used to adjust the power supply signal of the fan by changing the width of the output pulse according to the fan control instruction; at least one of the two fans generates a corresponding air flow velocity according to the power supply signal to evacuate the heat energy generated when the GPU, IPU, FPGA and the board cooperate to run the parallel artificial intelligence task.

[0023] When running the system, first initialize the system. The control program run by the MCU first performs the initialization operation, defines a series of variables to store relevant data, as follows: ‘digitalTemp_GPU’: used to store the digital temperature signal value converted by the ADC corresponding to the GPU, initialized to 0.

[0024] ‘digitalTemp_IPU’: used to store the digital temperature signal value converted by the ADC corresponding to the IPU, initialized to 0.

[0025] ‘digitalTemp_FPGA’: used to store the digital temperature signal value converted by the ADC corresponding to the FPGA, initialized to 0.

[0026] ‘digitalTemp_board’: used to store the digital temperature signal value converted by the ADC corresponding to the board, initialized to 0.

[0027] Optionally, the MCU is also used to initialize parameters such as the reference voltage setting, sampling frequency, and resolution of the ADC.

[0028] In one embodiment, when the MCU configures the relevant parameters of the ADC module, at startup of the integrated AI data processing system, the MCU first initializes the ADC module, which involves setting multiple key parameters to ensure that the ADC can accurately convert the analog temperature signal into a digital temperature signal.

[0029] Reference voltage setting: Set the reference voltage value of the ADC according to the power supply situation of the system hardware MCU and the range of the output signal of the temperature sensor. For example, if the system power supply is 5V and the range of the analog temperature signal output by the temperature sensor is between 0 - 5V, the reference voltage of the ADC is set to 5V to determine the measurement range during ADC conversion.

[0030] Sampling frequency determination: Set the sampling frequency based on the rate of change of the hardware temperature and the real - time requirement of the system for temperature monitoring. Suppose after analyzing the temperature change characteristics of the GPU, IPU, FPGA, and board when running parallel artificial intelligence tasks by the MCU, it is determined that it is appropriate to collect the analog signal of the temperature sensor every 100 milliseconds. Then the sampling frequency of the ADC is configured to 10Hz (1 second / 100 milliseconds).

[0031] Resolution (quantization bit number) selection: Select an appropriate quantization bit number according to the requirement for temperature monitoring accuracy. For example, if the system can distinguish a temperature change of 0.5°C, after calculating and considering factors such as the ADC conversion range and the hardware temperature range, it is determined to use a 12 - bit quantization bit number. In this way, the analog signal can be divided into 4096 different quantization levels, which can meet the required temperature resolution accuracy.

[0032] At the same time, initialize the memory buffer for storing the converted digital temperature signal, and set up a dedicated storage area. For example, define an array variable 'digitalTempBuffer[NUM_TEMP_SENSORS]' (where 'NUM_TEMP_SENSORS' is the total number of temperature monitoring modules in the system, which is pre - counted and defined), to store the converted digital temperature values of each temperature monitoring module later, and initialize it to 0.

[0033] In addition, configure the interrupt mechanism for the completion of ADC conversion, and set the entry address of the corresponding interrupt service program in the interrupt vector table, so that after the ADC completes a conversion from an analog signal to a digital signal, it can trigger an interrupt in time to notify the MCU to read the converted digital temperature signal.

[0034] Based on the integrated AI data processing system provided by this application, after completing the system initialization, it enters the main loop execution stage.

[0035] First, during the normal operation of the system, the MCU enters the main loop and continuously waits for the trigger of the ADC conversion completion interrupt. During this period, the MCU can simultaneously execute some other low-priority tasks related to system management, task scheduling, etc., but always maintains the listening state for the ADC interrupt.

[0036] Second, respond to the interrupt and read the digital temperature signal. Once it detects that the ADC conversion completion interrupt is triggered, the MCU immediately pauses other tasks currently being executed and instead executes the interrupt service routine for the ADC conversion completion.

[0037] In the interrupt service routine, first, according to the preset communication protocol and data reading interface between the ADC and the MCU, in the order configured previously, read the digital temperature signals corresponding to each temperature monitoring module in sequence. As Figure 1 shown, if there are 4 temperature monitoring modules in the system (corresponding to GPU, IPU, FPGA, and the board respectively), through the corresponding ADC channels and communication interfaces, the read digital temperature values are stored into 'digitalTempBuffer[0]' (the digital temperature signal after conversion of the temperature monitoring module corresponding to the GPU), 'digitalTempBuffer[1]' (the digital temperature signal after conversion of the temperature monitoring module corresponding to the IPU), 'digitalTempBuffer[2]' (the digital temperature signal after conversion of the temperature monitoring module corresponding to the FPGA), 'digitalTempBuffer[3]' (the digital temperature signal after conversion of the temperature monitoring module corresponding to the board).

[0038] It should be noted that during the process of reading the digital temperature signal, some simple data verification operations will also be performed. For example, check whether the read digital value is within a reasonable range (the theoretical digital signal range calculated based on parameters such as the previously set ADC reference voltage and quantization bits). If a value outside the reasonable range appears, it may mean that there is an error in the ADC conversion or a temperature sensor failure, etc. At this time, the corresponding error flag can be set, and some simple error handling measures can be taken, such as recording the error information in the system log, attempting to re-initialize the ADC, or sending an alarm message to the system administrator. The specific error handling strategy can be preset according to the reliability requirements of the system and is not limited here.

[0039] In addition, when the integrated AI data processing system starts, the MCU will also perform a series of initialization configuration operations on the PWM module, laying the foundation for accurately adjusting the fan power supply signal in the future.

[0040] Including clock source selection and frequency setting: According to the overall clock architecture of the system and the requirements for the accuracy of fan speed regulation, select a suitable clock source to provide a timing reference for the PWM module and set the corresponding clock frequency. For example, select a stable clock signal obtained by dividing the system main clock by a specific divider as the clock source for the PWM module, and set its frequency to 100 kHz (kilohertz). The selection of this frequency value needs to comprehensively consider factors such as the response characteristics of the fan motor and the expected speed regulation resolution. A higher clock frequency can theoretically provide finer pulse width adjustment, but at the same time, the hardware needs to have corresponding processing capabilities and may increase power consumption, which requires a trade-off to determine.

[0041] Duty cycle range setting: Based on the electrical characteristics of the connected fan and the expected speed range to be achieved, set the duty cycle range of the PWM output pulse. Usually, the fan motor will have different speeds under power supply signals with different duty cycles. For example, set the minimum value of the duty cycle to 0% (corresponding to the fan being completely stopped, but in actual applications, a very small non-zero duty cycle may be set to avoid motor startup problems), the maximum value to 100% (corresponding to the fan running at full speed), and divide the entire duty cycle range into appropriate adjustment steps according to needs. For example, each 1% is an adjustment step, which means that 101 different states of the fan speed from complete stop to full speed can be finely adjusted.

[0042] Determining the correspondence between channel configuration and the fan: If there are multiple PWM channels in the system (for connecting different fans or performing multi-dimensional control on the same fan, etc.), it is necessary to clarify which fan each channel corresponds to and its role in the entire cooling system. For example, define that PWM channel 0 is connected to the first heat source cooling fan, and PWM channel 1 is connected to the second heat source cooling fan. Establish a corresponding mapping table or configuration structure in memory to record this corresponding information, which is convenient for accurately operating the corresponding PWM channel according to the control instructions of different fans later.

[0043] Interrupt and communication interface configuration: Configure the interrupt function of the PWM module. For example, when key events such as the PWM completing a pulse cycle output or duty cycle update occur, an interrupt can be triggered to notify the MCU, so that the MCU can make further control adjustments or status monitoring according to the actual situation. At the same time, initialize the communication interface between the PWM module and the MCU (such as an interface for data transmission through specific register read and write operations, which specifically depends on the hardware circuit design), to ensure that the MCU can correctly send fan control instructions to the PWM and obtain the current status information of the PWM.

[0044] Finally, after completing the reading and preliminary verification of the digital temperature signals, the interrupt service routine will pass these valid digital temperature signals read to the relevant modules or functions responsible for subsequent processing in the system. For example, the pointer of the 'digitalTempBuffer' array is passed to the function in the MCU responsible for making fan control logic judgments based on the temperature signals, so that the function can obtain the latest temperature data for analysis and thus generate appropriate fan control instructions.

[0045] Specifically, the MCU transmits the collected temperature data to the FPGA through the serial communication interface. The FPGA receives the temperature data transmitted by the MCU, determines whether the current temperature meets the preset conditions according to the preset control algorithm and logic, and then generates corresponding control signals. It should be noted that the control signals generated by the FPGA are fan control instructions, mainly by selecting PWM square waves with different duty cycles to trigger the corresponding fans to achieve the switching of different wind speeds of a certain fan, which can be specifically implemented by the look-up table method. As shown in Table 1.

[0046]

[0047] It should be noted that the duty cycle here can be divided according to the actual division of the fan wind speed gears. Those skilled in the art can understand that only a specific division method is given here, not the only division method. Among them, when it is detected that the temperature values of each current module all fall within the above temperature range, the corresponding fan can be controlled to switch to the wind speed gear required for the current temperature to achieve efficient heat dissipation.

[0048] At the same time, the MCU can also pass the digital temperature signals to the monitoring module of the system for real-time display of the hardware temperature information, recording the temperature change curve, etc., which is convenient for the operation and maintenance personnel to monitor and analyze the running state of the system.

[0049] In this embodiment, the process of the ADC converting the analog temperature signal output by the temperature monitoring module into a digital temperature signal can be executed more accurately, reliably and orderly in the integrated AI data processing system, providing an important data basis for the subsequent stable operation of the entire system and functions such as heat dissipation control.

[0050] Optionally, the GPU, IPU, FPGA, and board are divided into the following two groups of heat sources: the first heat source includes the GPU and IPU, the second heat source includes the FPGA and board, and the two fans include the first heat source cooling fan and the second heat source cooling fan; The MCU is used to match the digital temperature signal with the set fan control logic to obtain the fan control logic and generate fan control instructions, including at least one of the following: The MCU receives the digital temperature signals converted by the ADC corresponding to the GPU and IPU, and compares the digital temperature values with three temperature thresholds preset for the GPU and IPU respectively: the low-temperature threshold (T1_GPU, T1_IPU), the medium-temperature threshold (T2_GPU, T2_IPU), and the high-temperature threshold (T3_GPU, T3_IPU) to generate the following first comparison results; When the MCU detects that the temperature of the GPU is lower than T1_GPU and the temperature of the IPU is lower than T1_IPU, it determines that the overall temperature of the first heat source is in a lower temperature state, and sends a fan control instruction to reduce the rotation speed of the first heat source cooling fan to the PWM that controls the first heat source cooling fan; When the MCU detects that the temperature of the GPU is between T1_GPU and T2_GPU, or the temperature of the IPU is between T1_IPU and T2_IPU, it determines that the temperature of the first heat source starts to rise, and sends a fan control instruction to increase the rotation speed of the first heat source cooling fan to the PWM.

[0051] In one embodiment, the MCU receives the interrupt trigger signal of the ADC, and based on the interrupt trigger signal, through the corresponding data reading interface, respectively obtains the latest values of 'temp_GPU' and 'temp_IPU'. After 'temp_GPU' and 'temp_IPU' are the digital temperature signals converted by the ADC corresponding to the GPU and IPU respectively, the MCU compares 'temp_GPU' with 'T1_GPU', 'T2_GPU', 'T3_GPU' in sequence, and at the same time compares 'temp_IPU' with 'T1_IPU', 'T2_IPU', 'T3_IPU' in sequence, thereby generating the first comparison result, and determining the PWM drive signal with the corresponding duty cycle according to the first comparison result to control the wind speed of the first heat source cooling fan.

[0052] For example: in the configuration area of the program, the temperature thresholds for each hardware are preset in advance. These thresholds are generally constants, and the specific settings are as follows: Three temperature thresholds for the GPU and IPU: 'T1_GPU' (low-temperature threshold, set to a specific value, such as the digital value corresponding to 30°C, depending on the quantization standard of the ADC). 'T2_GPU' (medium-temperature threshold, such as set to the digital value corresponding to 60°C). 'T3_GPU' (high-temperature threshold, set to the digital value corresponding to 80°C). Similarly for the IPU, there are 'T1_IPU', 'T2_IPU', 'T3_IPU', and the corresponding low-temperature, medium-temperature, and high-temperature threshold values are set respectively (assuming they are the digital values corresponding to 35°C, 55°C, and 75°C respectively).

[0053] Specifically, the MCU performs a comparison operation, comparing 'temp_GPU' with 'T1_GPU', 'T2_GPU', and 'T3_GPU' in sequence, and at the same time comparing 'temp_IPU' with 'T1_IPU', 'T2_IPU', and 'T3_IPU' in sequence, thereby generating a first comparison result. The specific logical judgment is as follows: Judgment on the low-temperature state of the first heat source and instruction sending: If 'temp_GPU < T1_GPU' and 'temp_IPU < T1_IPU', then the overall first heat source is in a lower temperature state. At this time, the MCU generates a fan control instruction according to the preset fan control logic to control the relevant parameters for reducing the output pulse width of the PWM (for example, setting a specific duty cycle value, such as setting it to 25% represents the pulse width modulation parameter corresponding to low speed). After constructing the instruction, the MCU sends the instruction to the PWM through the communication interface. After receiving the instruction, the PWM parses the relevant parameters and outputs a PWM square wave with a duty cycle of 25% to control the cooling fan of the first heat source to rotate at a speed of 500 PRM. If the current fan rotates at a speed of 1000 PRM, it switches to a speed of 500 PRM, or gradually switches within the operating range according to a certain compensation, so that the cooling fan of the first heat source operates at a lower speed.

[0054] Judgment on the start of temperature rise of the first heat source and instruction sending: If ('temp_GPU >= T1_GPU' && 'temp_GPU < T2_GPU') || ('temp_IPU >= T1_IPU' && 'temp_IPU < T2_IPU'), it is determined that the temperature of the first heat source starts to rise. The MCU constructs a fan control instruction to increase the rotation speed of the cooling fan of the first heat source according to the fan control logic. This instruction also has a specific identifier indicating that it is for the fan of the first heat source, and sets appropriate duty cycle parameters to increase the fan speed (such as the pulse width modulation parameter corresponding to a duty cycle of 65%), and then sends the instruction to the PWM through the communication interface. The PWM outputs a jump from a duty cycle of 25% to a duty cycle of 65%, so that the rotation speed of the cooling fan of the first heat source is appropriately increased, enhancing the heat dissipation capacity of the GPU and IPU.

[0055] The MCU receives the digital temperature signals converted by the ADC corresponding to the FPGA and the board, and compares the digital temperature values with three temperature thresholds preset for the FPGA and the board respectively: low-temperature threshold (T1_FPGA, T1_board), medium-temperature threshold (T2_FPGA, T2_board), and high-temperature threshold (T3_FPGA, T3_board) to generate the following second comparison result; When the MCU detects that the temperature of the FPGA is lower than T1_FPGA and the temperature of the board is lower than T1_board, it determines that the second heat source is in an overall low-temperature state and sends a fan control instruction to the PWM that controls the cooling fan of the second heat source to reduce the rotational speed of the cooling fan of the second heat source; When the MCU detects that the temperature of the FPGA is between T1_FPGA and T2_FPGA, or the temperature of the board is between T1_board and T2_board, it determines that the temperature of the second heat source starts to rise and sends a fan control instruction to increase the rotational speed of the cooling fan of the second heat source to the PWM that controls the cooling fan of the second heat source.

[0056] In one embodiment, the determination of the low-temperature state of the second heat source and the instruction sending: When 'temp_FPGA < T1_FPGA' and 'temp_board < T1_board', it is determined that the second heat source is in an overall low-temperature state. The MCU constructs a fan control instruction to reduce the rotational speed of the cooling fan of the second heat source according to the fan control logic. A unique identifier is set in the instruction to indicate that it is for the cooling fan of the second heat source (for example, the instruction header uses another specific byte value for differentiation), and the corresponding duty cycle parameter is configured to reduce the fan speed (such as setting it to a 25% duty cycle). Then, this instruction is sent to the PWM through the communication interface, so that the PWM adjusts the output to make the cooling fan of the second heat source operate at a lower rotational speed.

[0057] Optionally, the GPU, IPU, FPGA, and board are divided into the following two groups of heat sources: the first heat source includes the GPU and IPU, the second heat source includes the FPGA and board, and the two fans include the cooling fan of the first heat source and the cooling fan of the second heat source; The MCU is used to match the digital temperature signal with the set fan control logic to obtain the fan control logic to generate a fan control instruction, and further includes: When the MCU detects that the temperature of the FPGA is higher than T3_GPU and the temperature of the IPU is higher than T3_IPU, it determines that the temperature of the first heat source is too high and sends a fan control instruction to start the cooling fan of the second heat source to the PWM that controls the cooling fan of the second heat source.

[0058] Optionally, the MCU compares 'temp_FPGA' with 'T1_FPGA', 'T2_FPGA', 'T3_FPGA', and at the same time compares 'temp_board' with 'T1_board', 'T2_board', 'T3_board' to generate a second comparison result, and determines the PWM drive signal with the corresponding duty cycle according to the second comparison result to control the wind speed of the cooling fan of the second heat source.

[0059] In one embodiment, the determination of the rising temperature of the second heat source and the sending of instructions: If (`temp_FPGA >= T1_FPGA` && `temp_FPGA < T2_FPGA`) || (`temp_board >= T1_board` && `temp_board < T2_board`), it is determined that the temperature of the second heat source starts to rise. Based on this, the MCU constructs a fan control instruction to increase the rotation speed of the cooling fan for the second heat source. The instruction carries an identifier for the fan of the second heat source and a suitable duty cycle parameter (such as a duty cycle set to 90%) to increase the fan speed, and then sends the instruction to the PWM. The PWM adjusts the output according to the instruction to enhance the heat dissipation effect for the FPGA and the board.

[0060] It should be noted that the MCU will continuously execute and monitor in a loop. The main loop will continuously execute the above operations of data reading, comparison and judgment, and instruction sending to achieve real-time monitoring of the temperatures of the first heat source and the second heat source, and timely adjust the rotation speeds of the two cooling fans according to the temperature changes, ensuring that the hardware such as the GPU, IPU, FPGA, and board in the entire integrated AI data processing system always operates within a suitable temperature range to ensure the stable operation of the system.

[0061] Throughout the process, the program fully realizes the function of dynamically controlling the rotation speed of the cooling fan based on the temperature conditions of different heat sources from the perspective of a computer executing a program through precise logical judgment, instruction construction and sending, and close cooperation with hardware (such as ADC, PWM, fans, etc.).

[0062] Optionally, the fan control instruction includes a frame header, control parameters, and a frame tail.

[0063] Optionally, the control parameter of the fan control instruction is the PWM duty cycle parameter encoding.

[0064] In one embodiment, when parsing the fan control instruction, when it is detected that a fan control instruction from the MCU arrives, the PWM module first performs a parsing operation on the instruction. According to the pre-agreed instruction format and communication protocol, key information is extracted from the received data, such as: Judgment of instruction type: Determine whether the instruction is for different types of operations such as starting / stopping the fan, adjusting the rotation speed (i.e., changing the duty cycle), or querying the current status of the fan. The instruction type is determined by checking a specific identification byte in the instruction header (for example, the hexadecimal value '0x01' represents a start instruction, '0x02' represents a stop instruction, '0x03' represents an instruction to adjust the rotation speed, etc.).

[0065] Target Fan Determination: Based on the fan identification information included in the instruction (which may be a one-byte encoding corresponding to different fans, for example, '0x00' represents the cooling fan of the first heat source, '0x01' represents the cooling fan of the second heat source, etc.), determine which fan the instruction is operating on, and then find the corresponding PWM channel for subsequent processing.

[0066] Parameter Extraction (for speed adjustment instructions): If the instruction type is a speed adjustment instruction, further extract the duty cycle parameter information. For example, a specific byte range in the instruction (such as the 3rd - 4th bytes) stores the encoding corresponding to the duty cycle value. Convert it to the actual duty cycle value according to the preset encoding rule. For example, if the received encoding is '0x32', according to the pre-defined conversion table, the corresponding duty cycle is 50%, which means setting the duty cycle of the power supply pulse for the corresponding fan to 50% to adjust the fan to the corresponding speed.

[0067] Based on the parsed instruction information, the PWM module performs corresponding pulse width (duty cycle) update operations. Start / Stop Fan Operations: If the parsed instruction type is a fan start instruction (such as determining that the instruction header identifier is '0x01'), for the corresponding fan (finding the corresponding PWM channel through the target fan determination step), the PWM module will set the output enable bit of this channel to valid (for example, writing the enable bit in a specific register as 1), and at the same time set the initial pulse duty cycle according to the preset default start duty cycle (such as set to 30% to ensure the fan can start smoothly and avoid problems such as excessive starting current), so that the fan starts to run.

[0068] Conversely, if the instruction type is a fan stop instruction (identifier '0x02'), then clear the output enable bit of the corresponding PWM channel (write as 0). At this time, the pulse output stops, and the fan gradually stops rotating due to the loss of power supply.

[0069] Rotation speed adjustment operation (changing the duty cycle): When the parsed instruction is a rotation speed adjustment instruction and the corresponding duty cycle parameter is obtained, the PWM module updates the duty cycle of the pulse for the PWM channel corresponding to the target fan by operating the relevant duty cycle configuration register. For example, using a specific register write operation, the calculated duty cycle value (converted into a binary coding form recognizable by the corresponding hardware) is written into the register that controls the duty cycle of this channel. Suppose we want to increase the rotation speed of a certain fan currently, and it is parsed that the duty cycle needs to be adjusted from the original 30% to 50%. The PWM module will write the coding value corresponding to the 50% duty cycle into the corresponding duty cycle register according to the requirements of the hardware circuit design. Then, the hardware logic inside the PWM module (such as comparators, counters, etc. working together) will change the width of the output pulse in real time according to the new duty cycle setting, causing the power supply signal of the fan to change, so that the rotation speed of the fan is correspondingly increased to the speed matching the 50% duty cycle.

[0070] Through the above detailed design and implementation from the perspective of the computer execution program, the PWM module can accurately and reliably change the power supply signal of the fan by finely adjusting the width of the output pulse according to the fan control instruction sent by the MCU, and then effectively regulate the rotation speed of the fan, meet the heat dissipation requirements of the integrated AI data processing system under different working conditions, and ensure that each hardware in the system can operate stably in a suitable temperature environment.

[0071] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application and not to limit them. Although the present application has been described in detail with reference to the above embodiments, those of ordinary skill in the art should understand that: it is still possible to modify the specific implementation manners of the present application or make equivalent replacements, and any modification or equivalent replacement that does not depart from the spirit and scope of the present application shall be covered by the protection scope of the claims of the present application.

Claims

1. An integrated AI data processing system, characterized in that: include: GPU, IPU, FPGA, board, temperature monitoring module, ADC, MCU, PWM and at least two fans, including: The GPU, IPU, FPGA and board are respectively provided with at least one temperature monitoring module, each temperature detection module is respectively connected to at least one ADC, the data input end of the MCU is connected to the digital signal output end of the ADC, the control signal output end of the MCU is connected to the control input end of the PWM, and the output end of the PWM is connected to the power control end of each fan; The GPU is used to perform computing acceleration tasks to accelerate parallel artificial intelligence tasks during the training and reasoning process of the target artificial intelligence model; The IPU is used to perform model reasoning tasks to call the trained target artificial intelligence model to run the parallel artificial intelligence tasks and obtain artificial intelligence inference results accordingly; The FPGA is used to perform hardware field programming according to the parallel artificial intelligence task to run the target logic matching the parallel artificial intelligence task; The board is used to carry the GPU, IPU, and FPGA, so as to control the cooperation between the GPU, IPU, and FPGA according to the set collaborative logic to run the parallel artificial intelligence task; The temperature monitoring module is used to detect the temperature information of the GPU, IPU, FPGA and board when they cooperate to run the parallel artificial intelligence task and generate a simulated temperature signal accordingly; The ADC is used to convert the analog temperature signal output by the temperature monitoring module into a digital temperature signal; The MCU is used to match the digital temperature signal with the set fan control logic to obtain the fan control logic and generate a fan control instruction accordingly; The PWM is used to adjust the power supply signal of the fan by changing the width of the output pulse according to the fan control instruction; At least one of the two fans generates a corresponding airflow rate according to the power supply signal to evacuate the heat energy generated when the GPU, IPU, FPGA, and board cooperate to run the parallel artificial intelligence task.

2. The integrated AI data processing system according to claim 1, characterized in that: The GPU, IPU, FPGA, and board are divided into the following two groups of heat sources: the first heat source includes the GPU and IPU, the second heat source includes the FPGA and board, and the two fans include a first heat source cooling fan and a second heat source cooling fan; The MCU is used to match the digital temperature signal with the set fan control logic to obtain the fan control logic to generate a fan control instruction, including at least one of the following: The MCU receives a digital temperature signal converted from an ADC corresponding to the GPU and the IPU, and compares the digital temperature value with three temperature thresholds preset for the GPU and the IPU: a low temperature threshold (T1_GPU, T1_IPU), a medium temperature threshold (T2_GPU, T2_IPU) and a high temperature threshold (T3_GPU, T3_IPU) to generate the following first comparison result; When the MCU detects that the temperature of the GPU is lower than T1_GPU and the temperature of the IPU is lower than T1_IPU, it determines that the first heat source is in a relatively low temperature state as a whole, and sends a fan control instruction to reduce the speed of the first heat source cooling fan to the PWM controlling the first heat source cooling fan; When the MCU detects that the temperature of the GPU is between T1_GPU and T2_GPU, or the temperature of the IPU is between T1_IPU and T2_IPU, it determines that the temperature of the first heat source begins to rise, and sends a fan control instruction to the PWM to increase the speed of the first heat source cooling fan; The MCU receives the digital temperature signal converted by the ADC corresponding to the FPGA and the board, and compares the digital temperature value with three temperature thresholds preset for the FPGA and the board: a low temperature threshold (T1_FPGA, T1_board), a medium temperature threshold (T2_FPGA, T2_board) and a high temperature threshold (T3_FPGA, T3_board) to generate the following second comparison result; When the MCU detects that the temperature of the FPGA is lower than T1_FPGA and the temperature of the board is lower than T1_board, it determines that the second heat source is in a relatively low temperature state as a whole, and sends a fan control instruction to reduce the speed of the second heat source cooling fan to the PWM controlling the cooling fan of the second heat source; When the MCU detects that the temperature of the FPGA is between T1_FPGA and T2_FPGA, or the temperature of the board is between T1_board and T2_board, it determines that the temperature of the second heat source begins to rise, and sends a fan control instruction to increase the speed of the second heat source cooling fan to control the second heat source cooling fan.

3. The integrated AI data processing system according to claim 1, characterized in that: The GPU, IPU, FPGA, and board are divided into the following two groups of heat sources: the first heat source includes the GPU and IPU, the second heat source includes the FPGA and board, and the two fans include a first heat source cooling fan and a second heat source cooling fan; The MCU is used to match the digital temperature signal with the set fan control logic to obtain the fan control logic to generate a fan control instruction, and also includes: When the MCU detects that the temperature of the FPGA is higher than T3_GPU and the temperature of the IPU is higher than T3_IPU, it determines that the temperature of the first heat source is too high, and sends a fan control instruction to start the second heat source cooling fan to the PWM controlling the second heat source cooling fan.

4. The integrated AI data processing system according to claim 1, characterized in that: The MCU is also used to initialize parameters such as reference voltage setting, sampling frequency, and resolution of the ADC.

5. The integrated AI data processing system according to claim 1, characterized in that: The MCU is also used to receive an interrupt trigger signal from the ADC, and based on the interrupt trigger signal, obtain the latest values ​​of 'temp_GPU' and 'temp_IPU' through a corresponding data reading interface, where 'temp_GPU' and 'temp_IPU' are digital temperature signals converted by the ADC corresponding to the GPU and IPU, respectively.

6. An integrated AI data processing system as claimed in claim 5, characterized in that: The MCU compares 'temp_GPU' with 'T1_GPU', 'T2_GPU', and 'T3_GPU' in sequence, and compares 'temp_IPU' with 'T1_IPU', 'T2_IPU', and 'T3_IPU' in sequence to generate a first comparison result, and determines a PWM drive signal corresponding to a duty cycle according to the first comparison result to control the wind speed of the first heat source cooling fan.

7. An integrated AI data processing system as claimed in claim 5, characterized in that: The MCU compares 'temp_FPGA' with 'T1_FPGA', 'T2_FPGA', and 'T3_FPGA', and compares 'temp_board' with 'T1_board', 'T2_board', and 'T3_board' to generate a second comparison result, and determines a PWM drive signal corresponding to the duty cycle according to the second comparison result to control the wind speed of the second heat source cooling fan.

8. An integrated AI data processing system as claimed in claim 2 or 3, characterized in that: The fan control instruction includes a frame header, a control parameter, and a frame tail.

9. An integrated AI data processing system as claimed in claim 8, characterized in that: The control parameter of the fan control instruction is a PWM duty cycle parameter code.

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