Display module, manufacturing method and display device

By using a flat insulating layer as the pixel defining layer for defining sub-pixels in the OLED display module, the problem of large-sized OLED display products being susceptible to their own gravity deformation and overuse of materials during the evaporation process is solved, and the effect of simplifying structural design and improving product yield is achieved.

CN120129425APending Publication Date: 2025-06-10BOE TECHNOLOGY GROUP CO LTD +2
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202510294358.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-12
Publication Date
2025-06-10

AI Technical Summary

Technical Problem

Large-sized OLED display products are susceptible to the disadvantages of its own gravity deformation and excessive use of materials during the evaporation process, which affects the development, mass production and display effects.

Method used

The pixel-definition layer that defines sub-pixels is adopted to reduce the film layer thickness and structural complexity, reduce the dependence of high-precision metal mask process, and improve production efficiency and product yield.

Benefits of technology

The structural design of the display module is simplified, the damage probability of the second electrode is reduced, and the process yield and display effect of the product are improved.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120129425A_ABST
    Figure CN120129425A_ABST
Patent Text Reader

Abstract

The invention discloses a display module, a manufacturing method and a display device. The display module of one embodiment comprises a substrate, a driving circuit layer and a light-emitting device layer, and the light-emitting device layer comprises a first electrode arranged on the surface of the side, away from the substrate, of a driving insulating layer of the driving circuit layer; the flat insulating layer is provided with sub-pixel openings corresponding to different sub-pixels, and the orthographic projection of the first electrode and the orthographic projection of the sub-pixel openings on the substrate at least have overlapped projection; the second electrodes are arranged in the sub-pixel openings and are electrically connected with the driving circuit layer, and orthographic projections of the second electrodes and the first electrodes on the substrate are spaced; the light-emitting material layer is arranged in the sub-pixel opening and covers the second electrode; the third electrode is arranged in the sub-pixel opening and covers the light-emitting material layer, and the first electrode is electrically connected with the third electrode.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the field of display technologies. More specifically, it relates to a display module, a manufacturing method, and a display device. Background Art

[0002] With the further development of OLED (organic light-emitting diode) display technology, it has currently evolved from small and medium-sized displays to large and medium-sized displays. However, due to the influence of the FMM (Fine Metal Mask) evaporation process, large-sized metal mask plates are prone to deformation caused by their own gravity and excessive material usage during the evaporation process, which is not conducive to the development and mass production of OLED display products and affects the display effect of the formed OLED display products. Summary of the Invention

[0003] An object of the present invention is to provide a display module, a manufacturing method, and a display device to solve at least one of the problems existing in the prior art.

[0004] To achieve the above object, the present invention adopts the following technical solutions:

[0005] In a first aspect of the present invention, a display module is provided. The display module includes a substrate, a driving circuit layer, and a light-emitting device layer.

[0006] Wherein the light-emitting device layer includes:

[0007] A first electrode disposed on a surface of the driving insulating layer of the driving circuit layer away from the substrate side;

[0008] A planar insulating layer having sub-pixel openings corresponding to different sub-pixels, and at least an overlapping projection of the first electrode and the sub-pixel openings on the substrate;

[0009] A second electrode disposed in the sub-pixel opening and electrically connected to the driving circuit layer, and having a gap between the second electrode and the first electrode in the orthographic projection on the substrate;

[0010] A light-emitting material layer disposed in the sub-pixel opening and covering the second electrode;

[0011] A third electrode disposed in the sub-pixel opening and covering the light-emitting material layer, and the first electrode and the third electrode are electrically connected.

[0012] In an optional embodiment, a first opening of the sub-pixel opening near the substrate side has a first width in a horizontal direction perpendicular to the stacking direction;

[0013] The opening width of the second opening on the side of the sub-pixel opening away from the substrate in the horizontal direction perpendicular to the stacking direction is the second width; the first width is greater than the second width.

[0014] In an optional embodiment, the positive projection of the second electrode on the substrate falls within the positive projection of the second opening on the substrate, and the width of the second electrode in the horizontal direction is less than or equal to the second width.

[0015] In an optional embodiment, the first electrode includes:

[0016] An annular portion, the positive projection of the annular portion on the substrate includes a plurality of grid structures, and each of the grid structures surrounds the positive projection of at least one sub-pixel on the substrate;

[0017] A connecting portion, one end of the connecting portion is connected to a side portion of the annular portion, and the other end is electrically connected to the third electrode corresponding to the surrounded sub-pixel, and the connecting portion does not overlap with the positive projection of the second electrode on the substrate.

[0018] In an optional embodiment, the driving circuit layer includes:

[0019] An active layer;

[0020] A gate layer insulated from the active layer;

[0021] A source-drain electrode layer insulated from the gate layer, the source layer of the source-drain electrode layer is electrically connected to one end of the active layer, the drain layer of the source-drain electrode layer is electrically connected to the other end of the active layer, and one of the source layer or the drain layer is electrically connected to the second electrode.

[0022] In an optional embodiment, the surface of the first electrode close to the substrate side and the surface of the source-drain electrode layer close to the substrate side are located on the same surface, and the first electrode and the source-drain electrode layer are provided on the same layer.

[0023] In an optional embodiment, the display module further includes:

[0024] A power signal line disposed in the non-display area; and

[0025] A connection signal line that electrically connects the power signal line and the first electrode, and the connection signal line is provided on the same layer as the second electrode.

[0026] In an optional embodiment, the display module further includes a packaging layer, and the packaging layer is disposed on the surfaces of the third electrode and the flat insulating layer away from the substrate side,

[0027] Or,

[0028] The encapsulation layer further includes:

[0029] A patterned first inorganic encapsulation layer, which is disposed on the surface of the third electrode in the sub-pixel opening away from the substrate side and overlaps the planar insulating layer at the edge of the sub-pixel opening. The first inorganic encapsulation layer includes a groove corresponding to the position of the sub-pixel opening;

[0030] An organic encapsulation layer, which is disposed in the groove of each first inorganic encapsulation layer; and

[0031] A second inorganic encapsulation layer, which covers the organic encapsulation layer and the surface of the planar insulating layer away from the substrate side.

[0032] In an optional embodiment, the planar insulating layer includes a plurality of insulating material layers stacked in sequence. The sub-pixel opening includes a sub-opening formed at the same position of the plurality of insulating material layers. In the stacking direction, the opening width of the sub-opening in the horizontal direction gradually decreases.

[0033] Wherein, the opening width of the sub-opening of the insulating material layer closest to the driving circuit layer in the horizontal direction is used as the first width, and the opening width of the sub-opening of the insulating material layer farthest from the driving circuit layer in the horizontal direction is used as the second width.

[0034] In an optional embodiment, the opening angle of the second opening is 50-70°, and the evaporation angle of the evaporation source is between the opening angles.

[0035] Or

[0036] The pixel distance between the first inorganic encapsulation layers corresponding to adjacent sub-pixels is 20-30 μm;

[0037] Or

[0038] The first electrode is formed by a patterned mask plate masking process, and the third electrode is formed by an evaporation source evaporation process.

[0039] A second aspect of the present invention proposes a method for manufacturing the display module of the first aspect of the present invention. The method includes:

[0040] Forming a driving circuit layer on a substrate;

[0041] Forming a light-emitting device layer on the driving circuit layer, further including:

[0042] Forming a first electrode for driving all sub-pixels on the surface of the driving insulating layer of the driving circuit layer away from the substrate side;

[0043] A planar insulating layer is formed on the surface of the first electrode and on the side of the driving insulating layer away from the substrate;

[0044] The planar insulating layer is etched to form sub-pixel openings for sub-pixels of the same color, and a light-emitting device layer for the sub-pixels of the same color is formed in the sub-pixel openings;

[0045] The etching of the planar insulating layer is repeated to form sub-pixel openings for sub-pixels of the same color and to form a light-emitting device layer for the sub-pixels of the same color in the sub-pixel openings until light-emitting device layers for sub-pixels of different colors are formed.

[0046] In an optional embodiment, the etching of the planar insulating layer to form sub-pixel openings for sub-pixels of the same color and forming a light-emitting device layer for the sub-pixels of the same color in the sub-pixel openings further includes:

[0047] The planar insulating layer is etched to form sub-pixel openings for sub-pixels of the same color, and the first electrode and the sub-pixel openings have at least an overlapping projection in the orthographic projection on the substrate;

[0048] A second electrode is formed on the surface of the driving circuit layer in the sub-pixel opening on the side away from the substrate. The second electrode is electrically connected to the driving circuit layer, and the second electrode and the first electrode have a gap in the orthographic projection on the substrate;

[0049] A light-emitting material layer covering the second electrode is formed on the second electrode in the sub-pixel opening, and the light-emitting material layer corresponds to sub-pixels of the same color;

[0050] A third electrode is formed on the light-emitting material layer in the sub-pixel opening, and the first electrode and the third electrode are electrically connected.

[0051] In an optional embodiment, the first electrode is formed by a patterned mask plate masking process, and the third electrode is formed by an evaporation source evaporation process;

[0052] Or

[0053] The method further includes forming a packaging layer on the surface of the light-emitting device layer and on the side of the planar insulating layer away from the substrate, and further includes:

[0054] Before etching the flat insulating layer repeatedly to form sub-pixel openings for the same-color sub-pixels and forming a light-emitting device layer for the same-color sub-pixels in the sub-pixel openings, a patterned first inorganic encapsulation layer is formed on the surface of the corresponding third electrode of the same-color sub-pixels on the side away from the substrate. The first inorganic encapsulation layer overlaps the flat insulating layer at the edge of the sub-pixel opening, and the first inorganic encapsulation layer includes a groove corresponding to the position of the sub-pixel opening.

[0055] After forming the light-emitting device layers of different-color sub-pixels, the process of forming the patterned first inorganic encapsulation layer on the surface of the corresponding third electrode of the same-color sub-pixels on the side away from the substrate is repeated until the first inorganic encapsulation layers of different sub-pixels are formed on the side of the light-emitting device layer away from the substrate.

[0056] An organic encapsulation layer is formed in the groove of the first inorganic encapsulation layer corresponding to each sub-pixel.

[0057] A second inorganic encapsulation layer is formed on the organic encapsulation layer and on the surface covering the flat insulating layer on the side away from the substrate.

[0058] The third aspect of the present invention provides a display device, including the display module described in the first aspect of the present invention or a display module manufactured by the method described in the second aspect of the present invention.

[0059] The beneficial effects of the present invention are as follows:

[0060] The display module according to the embodiment of the present invention utilizes the flat insulating layer to be reused as a pixel defining layer for defining sub-pixels, thereby reducing the film thickness of the display module, simplifying the structural design of the display module, improving the manufacturing efficiency of the display module, and the display module according to the embodiment of the present invention can reduce the high-precision metal mask process for forming sub-pixel openings in the pixel defining layer in terms of process, reduce the damage probability of the second electrode, and improve the product yield. Description of the Drawings

[0061] The following further describes in detail the specific embodiments of the present invention with reference to the drawings.

[0062] Figure 1 A schematic diagram showing sub-pixel defects of a display product in the related art;

[0063] Figure 2 A schematic diagram showing the structure of a display module according to an embodiment of the present invention;

[0064] Figure 3 and Figure 4 A schematic diagram showing the structures of different embodiments of the first electrode in a top view state;

[0065] Figure 5a andFigure 5b Schematic cross-sectional and top-view structures showing the formation of a planar insulating layer according to an embodiment of the present invention;

[0066] Figure 6a and Figure 6b Schematic cross-sectional and top-view structures showing the formation of a sub-pixel opening in a display module according to an embodiment of the present invention;

[0067] Figure 7a and Figure 7b Schematic cross-sectional and top-view structures showing the formation of a second electrode in a display module according to an embodiment of the present invention;

[0068] Figure 8a and Figure 8b Schematic cross-sectional and top-view structures showing the formation of a light-emitting material layer in a display module according to an embodiment of the present invention;

[0069] Figure 9a and Figure 9b Schematic cross-sectional and top-view structures showing the formation of a third electrode in a display module according to an embodiment of the present invention;

[0070] Figure 10a and Figure 10b Schematic cross-sectional and top-view structures showing the formation of a first inorganic encapsulation layer in a display module according to an embodiment of the present invention;

[0071] Figure 11 Schematic cross-sectional structure showing the formation of a first inorganic encapsulation layer for all sub-pixels in a display module according to an embodiment of the present invention;

[0072] Figure 12 Schematic diagram showing the sub-pixel distribution of a standard pixel arrangement;

[0073] Figure 13 Schematic diagram showing the sub-pixel distribution of a diamond pixel arrangement;

[0074] Figure 14 Schematic cross-sectional structure of a stacked encapsulation layer of a display module according to an embodiment of the present invention;

[0075] Figure 15 Flowchart showing a method for manufacturing a display module according to another embodiment of the present invention. Detailed implementation manners

[0076] To more clearly illustrate the present invention, the present invention will be further described below in conjunction with embodiments and the accompanying drawings. Similar components in the drawings are denoted by the same reference numerals. Those skilled in the art should understand that the content specifically described below is illustrative rather than restrictive, and should not be used to limit the protection scope of the present invention.

[0077] With the further development of OLED (organic light-emitting diode) display technology, it has currently evolved from small and medium-sized displays to large and medium-sized displays. However, due to the influence of the FMM (Fine Metal Mask) evaporation process, large-sized metal mask plates are prone to deformation caused by their own gravity and excessive material usage during the evaporation process, which is not conducive to the development and mass production of OLED display products and affects the display effect of the formed OLED display products.

[0078] The current mainstream solution is to use pixel lithography technology to replace the FMM evaporation solution. However, pixel lithography technology is relatively immature and has many problems, such as:

[0079] 1. When etching the film layer structure of the display module, it will cause damage to the anode of the display module. Exposure of the film layer on the anode or corrosion by the chemical solution leads to damage to the anode material. Frequent anode damage in the pixel evaporation process will cause pixel failure, resulting in abnormal display of the picture, such as Figure 1 the sub-pixels at the intermediate position shown cannot function properly.

[0080] 2. During the etching process of the display module, impurities such as etching solution will remain. After the display module is powered on, the residual impurities will attract impurities and water vapor to gather, causing electrolysis and forming an acidic or alkaline environment, resulting in corrosion of the encapsulation layer of the display module and thus encapsulation failure.

[0081] In view of this, the present invention proposes a display module, a manufacturing method, and a display device to solve the above problems.

[0082] The first embodiment of the present invention proposes a display module, as Figure 2 shown, the display module includes a substrate 10, a driving circuit layer 20, and a light-emitting device layer 30.

[0083] Wherein the light-emitting device layer 30 includes:

[0084] A first electrode 31, disposed on the surface of the driving insulating layer 24 of the driving circuit layer 20 away from the substrate 10;

[0085] A planar insulating layer 32, the planar insulating layer 32 is provided with sub-pixel openings 32H corresponding to different sub-pixels, and the first electrode 31 and the sub-pixel openings 32H have at least partial overlapping projections in the orthographic projection on the substrate 10;

[0086] A second electrode 33 disposed in the sub-pixel opening 32H, electrically connected to the driving circuit layer 20, and the second electrode 33 and the first electrode 31 have a gap in the orthographic projection on the substrate 10;

[0087] A light-emitting material layer 34 disposed in the sub-pixel opening 32H and covering the second electrode 33;

[0088] A third electrode 35 is disposed in the sub-pixel opening 32H and covers the light-emitting material layer 34, and the first electrode 31 and the third electrode 35 are electrically connected.

[0089] In the display module according to the embodiment of the present invention, the planar insulating layer 32 is reused as a pixel defining layer for defining sub-pixels, thereby reducing the film thickness of the display module, simplifying the structural design of the display module, improving the manufacturing efficiency of the display module, and in the process of the display module according to the embodiment of the present invention, the high-precision metal mask process for forming the sub-pixel opening 32H by the pixel defining layer can be reduced, and the damage probability of the second electrode 33 can be reduced to improve the product yield.

[0090] Now, the display module according to the embodiment of the present invention will be described by way of examples:

[0091] In an alternative embodiment, as Figure 2 shown, the driving circuit layer 20 includes:

[0092] An active layer 21;

[0093] A gate layer 23 insulated from the active layer 21;

[0094] A source-drain electrode layer 25 insulated from the gate layer 23. Exemplarily, a via hole is formed in the insulating layer between the active layer 21 and the source-drain electrode layer 25. The source electrode layer 251 of the source-drain electrode layer 25 is electrically connected to one end of the active layer 21 through the via hole 20H, and the drain electrode layer 252 of the source-drain electrode layer 25 is electrically connected to the other end of the active layer 21 through the via hole 20H. One of the source electrode layer 251 or the drain electrode layer 252 is electrically connected to the second electrode 33. Exemplarily, as Figure 2 shown, the drain electrode layer 252 is disposed in the sub-pixel opening 32H.

[0095] In this embodiment, the driving insulating layer 24 is the insulating layer on the side of the driving circuit layer 20 farthest from the substrate 10, and the source-drain electrode layer 25 is located on the side of the driving insulating layer 24 away from the substrate 10.

[0096] The planar insulating layer 32 of this embodiment covers the surface of the source-drain electrode layer 25 on the side away from the substrate 10 to insulate the first electrode 31 and the third electrode 35 formed in subsequent processes. Exemplarily, the planar insulating layer 32 is disposed on the side of the driving insulating layer 24 away from the substrate 10.

[0097] In an alternative embodiment, as Figure 2As shown, the source layer 251 or the drain layer 252 electrically connected to the second electrode 33 is disposed in the sub-pixel opening 32H, and the second electrode 33 is disposed on the surface of the connected source layer 251 or drain layer 252 away from the substrate 10 side, so that the second electrode 33 is electrically connected to one of the source-drain electrode layers 25.

[0098] In an alternative embodiment, as Figure 2 shown, the surface of the first electrode 31 close to the substrate 10 side and the surface of the source-drain electrode layer 25 close to the substrate 10 side are located on the same surface, and the first electrode 31 and the source-drain electrode layer 25 are provided in the same layer.

[0099] That is to say, in the manufacturing process of the first electrode 31 and the source-drain electrode layer 25, the material layers of the first electrode 31 and the source-drain electrode layer 25 are formed simultaneously, thereby improving the manufacturing efficiency of the display module.

[0100] In an alternative embodiment, Figure 3 and Figure 4 show a schematic structural view of the first electrode 31 in a top view state. The first electrode 31 includes an annular portion 311 and a connecting portion 312.

[0101] In this embodiment, the orthographic projection of the annular portion 311 on the substrate 10 includes a plurality of grid structures, and each grid structure surrounds the orthographic projection of at least one sub-pixel on the substrate 10. The grid structure of the embodiment of the present invention can be as Figure 3 shown in a neat arrangement, that is, the edges of adjacent grid structures are located on the same straight line. In another embodiment, the grid structure of the embodiment of the present invention can also be as Figure 4 shown in a staggered arrangement, that is, the edges of adjacent grid structures in one direction are not on the same straight line.

[0102] In other embodiments, the orthographic projection of the grid structure on the substrate 10 is not limited to Figure 3 or Figure 4 the square grid structure shown. The orthographic projection of the grid structure on the substrate 10 includes a polygonal structure or an annular structure, such as a triangular structure, a rhombic structure, a trapezoidal structure, a hexagonal structure, a circular shape, an elliptical structure, etc., which are all within the protection scope of the embodiment of the present invention.

[0103] It should be noted that the orthographic projection of the sub-pixel of the embodiment of the present invention is not limited to Figure 3 or Figure 4The circular projection shown can also be structures such as triangles, rectangles, hexagons, etc., to adapt to different pixel arrangement methods, such as standard pixel arrangement, diamond pixel arrangement, delta pixel arrangement, etc., with the orthographic projection of the grid structure around the orthographic projection of the sub-pixels on the substrate 10 as the design criterion.

[0104] In the embodiments of the present invention, as Figure 3 and Figure 4 shown, one end of the connecting portion 312 is connected to one side portion of the annular portion 311, and the other end of the connecting portion 312 is electrically connected to the third electrode 35 corresponding to the surrounded sub-pixel PIX, so as to enable all sub-pixels to access the same voltage signal through the annular portion 311 of the grid structure.

[0105] In the embodiments of the present invention, the orthographic projection of the connecting portion 312 and the second electrode 33 on the substrate 10 do not overlap, so as to avoid the conduction between the connecting portion 312 of the first electrode 31 and the second electrode 33, resulting in circuit anomalies.

[0106] After forming the film layer structure of the driving circuit layer 20 and the first electrode 31, as Figure 5a and Figure 5b shown, a planar insulating layer 32 is provided on the first electrode 31 and the driving circuit layer 20. In an alternative embodiment, the planar insulating layer 32 includes a plurality of insulating material layers stacked in sequence. Exemplarily, as Figure 5a shown, the planar insulating layer 32 includes a first planar layer 321 and a passivation layer 322 provided on the first planar layer 321, and the thickness of the first planar layer 321 is greater than the thickness of the passivation layer 322.

[0107] Furthermore, the planar insulating layer 32 is etched to form a sub-pixel opening 32H, and the sub-pixel opening 32H includes sub-openings opened at the same position of a plurality of insulating material layers.

[0108] Exemplarily, as Figure 6a shown, both the first planar layer 321 and the passivation layer 322 are provided with sub-openings, and the top opening on the side away from the substrate 10 of the sub-opening of the first planar layer 321 is the bottom opening on the side close to the substrate 10 of the sub-opening of the passivation layer 322. That is to say, when the planar insulating layer 32 includes a plurality of insulating material layers, in the stacking direction from bottom to top, the sub-openings of each insulating material layer gradually decrease to form a step difference, so as to form the patterned second electrode 33 in the subsequent process.

[0109] As Figure 6bAs shown in the figure, in the top-down direction, the orthographic projection of the via hole 20H corresponding to the drain layer 252 on the substrate 10 falls within the orthographic projection of the second opening of the sub-pixel opening 32H on the substrate 10. The orthographic projection of the first opening of the sub-pixel opening 32H on the substrate 10 overlaps with the orthographic projection of the connection portion 312 of the first electrode 31 on the substrate 10. There is a gap between the orthographic projection of the via hole 20H on the substrate 10 and the orthographic projection of the first electrode 31 on the substrate 10, so as to form a circuit for driving the sub-pixel subsequently.

[0110] In an alternative embodiment, as Figure 6a shown,

[0111] The opening width of the first opening 321H of the sub-pixel opening 32H near the substrate 10 in the horizontal direction perpendicular to the stacking direction is the first width D1;

[0112] The opening width of the second opening 322H of the sub-pixel opening 32H far from the substrate 10 in the horizontal direction perpendicular to the stacking direction is the second width D2; the first width D1 is greater than the second width D2.

[0113] That is to say, as Figure 6a shown, the cross-sectional structure of the sub-pixel opening 32H in the embodiment of the present invention is a regular trapezoid. In this structure, the top edge on the side far from the substrate 10 of the flat insulating layer 32 has a raised edge compared with the bottom edge on the side close to the substrate 10. The step width D3 of the raised edge in the horizontal direction is greater than the width of the first electrode 31 located in the sub-pixel opening 32H in the horizontal direction, that is, the step width D3 is greater than the width of the overlapping projection of the first electrode 31 and the sub-pixel opening 32H on the substrate 10 in the horizontal direction. In other words, the step width D3 is the first width D1 minus the second width D2.

[0114] With the structure of the regular trapezoid sub-pixel opening 32H, in the manufacturing process of the second electrode 33 of the display module, the raised edge can serve as a partition structure. Combining with the vertical evaporation characteristic of the electrode material of the second electrode 33, the surface of the driving circuit layer 20 at the corresponding position of the raised edge can be blocked by the raised edge. Under the blockage of the raised portion, in the manufacturing process, the first electrode 31 and the second electrode 33 both located in the sub-pixel opening 32H will not form a lap joint and will be disconnected, avoiding circuit abnormalities.

[0115] In this embodiment, in the stacking direction, the opening width of the sub-pixel opening 32H in the horizontal direction gradually decreases. Among them, the opening width of the sub-opening closest to the insulating material layer of the driving circuit layer 20 in the horizontal direction is used as the first width D1, and the opening width of the sub-opening farthest from the insulating material layer of the driving circuit layer 20 in the horizontal direction is used as the second width D2.

[0116] Exemplarily, as Figure 6a shown, the opening width of the bottom sub-opening on the side of the first flat layer 321 close to the substrate 10 is the first width D1, and the opening width of the bottom sub-opening on the side of the passivation layer 322 away from the substrate 10 is the second width D2.

[0117] As Figure 7a and Figure 7b shown, a second electrode 33 is provided in the sub-pixel opening 32H. In an alternative embodiment, as Figure 7a shown, the orthographic projection of the second electrode 33 on the substrate 10 falls within the orthographic projection of the second opening 322H on the substrate 10. As Figure 7b shown, the width D4 of the second electrode 33 in the horizontal direction is less than or equal to the second width D2.

[0118] In the process of manufacturing the second electrode 33, a patterned second electrode 33 can be formed without using a mask process. The entire material layer of the second electrode 33 is formed on the surface of the flat insulating layer 32 and in the sub-pixel opening 32H. Due to the vertical evaporation characteristics of the material of the second electrode 33, the sub-pixel opening 32H structure with a smaller upper part and a larger lower part on the sub-pixel opening 32H in this embodiment is used as a partition structure, so that the second electrode 33 formed in the sub-pixel opening 32H and the electrode material layer formed on the surface of the flat insulating layer 32 will not conduct, avoiding circuit abnormalities, and the second electrode 33 in the sub-pixel opening 32H will not be damaged when etching the electrode material layer of the flat insulating layer 32. Therefore, the process yield and process efficiency of the display module in this embodiment are both improved.

[0119] In an alternative embodiment, as Figure 7a shown, the opening angle α of the second opening 322H is 50 to 70°, and the evaporation angle of the evaporation source is between the opening angles. For example, the evaporation angle is 65°. In this embodiment, after the second electrode 33 is formed in the sub-pixel, preferably, the light-emitting material layer 34 is formed by an evaporation source evaporation process. By flexibly adjusting the evaporation angle, the light-emitting material layer 34 is formed in the sub-pixel opening 32H.

[0120] In an alternative embodiment, at least a part of the surface of the light-emitting material layer 34 close to the substrate 10 leaks out the part of the surface of the first electrode 31 away from the substrate 10. That is, as Figure 8a shown, the light-emitting material layer 34 may not cover the first electrode 31, or, as Figure 8bTaking the first sub-pixel R in the first column as an example, the orthographic projection of the light-emitting material layer 34 on the substrate 10 may also partially overlap with the orthographic projection of the first electrode 31 on the substrate 10. Structurally, it shows that a part of the surface of the light-emitting material layer 34 leaks out from the side of the first electrode 31 away from the substrate 10, so as to ensure the electrical connection between the third electrode 35 and the first electrode 31 in subsequent process steps.

[0121] In an alternative embodiment, the first electrode 31 of the embodiment of the present invention is formed by a patterned mask plate masking process, and the third electrode 35 is formed by an evaporation source evaporation process. The evaporation angle of the evaporation source for forming the third electrode 35 is also within the opening angle of the second opening 322H.

[0122] As Figure 9a shown, the width of the bottom of the third electrode 35 of the embodiment of the present invention on the side close to the substrate 10 in the horizontal direction is greater than the width of the top on the side away from the substrate 10 in the horizontal direction. That is, the shape of the third electrode 35 is similar to that of the sub-pixel opening 32H, and it is also a structure with a smaller top and a larger bottom. As Figure 9b shown, the orthographic projection of the connection portion 312 between the third electrode 35 and the first electrode 31 on the substrate 10 has an overlapping projection. The orthographic projection of the top surface of the third electrode 35 on the side away from the substrate 10 falls within the first opening 321H.

[0123] In the evaporation process of the third electrode 35, a patterned third electrode 35 can be formed without using an FMM mask plate process. The entire material layer of the third electrode 35 is formed on the surface of the planar insulating layer 32 and in the sub-pixel opening 32H. Due to the vertical evaporation characteristics of the material of the third electrode 35, the sub-pixel opening 32H structure with a smaller top and a larger bottom of the sub-pixel opening 32H in this embodiment is used as a partition structure, so that the third electrode 35 formed in the sub-pixel opening 32H and the electrode material layer formed on the surface of the planar insulating layer 32 will not conduct, avoiding circuit abnormalities, and the third electrode 35 in the sub-pixel opening 32H will not be damaged when etching the electrode material layer of the planar insulating layer 32, thereby forming the electrode stack structure in the sub-pixel opening 32H of the embodiment of the present invention. Therefore, the process yield and process efficiency of the display module in this embodiment are both improved.

[0124] In an alternative embodiment, the first electrode 31 and the third electrode 35 form a cathode, and the second electrode 33 is an anode. In the display module according to the embodiment of the present invention, the electrode structure is designed such that the first electrode 31 partially disposed in the sub-pixel opening 32H is electrically connected to the third electrode 35 disposed in the sub-pixel opening 32H to provide a first voltage signal, such as a ground signal, to all sub-pixels. The second electrode 33 entirely disposed in the sub-pixel opening 32H is used to access a control signal to each sub-pixel, thereby realizing the driving of different sub-pixels.

[0125] In an alternative embodiment, as Figure 10a shown, the display module further includes a packaging layer 40 disposed on the surfaces of the third electrode 35 and the planar insulating layer 32 away from the substrate 10 to block the intrusion of water and oxygen by means of the packaging layer 40.

[0126] Figure 10b FIG. shows a schematic diagram of the sub-pixel arrangement showing the same color sub-pixels. That is, in the manufacturing process of the display module according to the embodiment of the present invention, the sub-pixel openings 32H of the same color, the second electrodes 33 in the sub-pixel openings 32H of the same color, the light-emitting material layer 34, the third electrodes 35, and the packaging layer 40 of the same color are first formed, and then the sub-pixel structures of other colors are formed. As Figure 11 shown, the packaging layer 40 packages each sub-pixel to ensure a good packaging effect.

[0127] In an alternative embodiment, the pixel pitch between the edges of the first inorganic packaging layers corresponding to adjacent sub-pixels is 20 - 30 μm. Those skilled in the art design according to the resolution of the display module and the actual application.

[0128] Figure 12 FIG. shows a schematic diagram of the sub-pixel distribution of the standard pixel arrangement. As Figure 12 shown, for the sub-pixels in the same column, the pixel pitch a in the column direction is the minimum distance between the edges of the first inorganic packaging layers of two adjacent sub-pixels of the same color in the column direction. For the sub-pixels in the same row, the pixel pitch b in the row direction is the minimum distance between the edges of the first inorganic packaging layers of two adjacent sub-pixels of the same color in the row direction.

[0129] Figure 13 FIG. shows a schematic diagram of the sub-pixel distribution of the diamond pixel arrangement. As Figure 13 shown, for the sub-pixels in the same column, the pixel pitch a in the column direction is the minimum distance between the edges of the first inorganic packaging layers of two adjacent sub-pixels of the same color in the column direction. For the sub-pixels in the same row, the pixel pitch b in the row direction is the minimum distance between the edges of the first inorganic packaging layers of two misaligned sub-pixels in the row direction.

[0130] In an alternative embodiment, as Figure 14 shown, the encapsulation layer 40 further includes:

[0131] A patterned first inorganic encapsulation layer 41, the first inorganic encapsulation layer 41 being disposed on the surface of the third electrode 35 in the sub-pixel opening 32H away from the substrate 10, and overlapping the planar insulating layer 32 at the edge of the sub-pixel opening 32H, the first inorganic encapsulation layer 41 including a groove corresponding to the position of the sub-pixel opening 32H;

[0132] An organic encapsulation layer 42, disposed in the groove of each of the first inorganic encapsulation layers 41; and

[0133] A second inorganic encapsulation layer 43, covering the organic encapsulation layer 42 and covering the surface of the planar insulating layer 32 away from the substrate 10.

[0134] The encapsulation layer of the embodiment of the present invention adopts a laminated structure. The first inorganic encapsulation layer 41 is partially formed in the sub-pixel opening 32H, and the other part encapsulates the planar insulating layer 32 at the edge position of the sub-pixel opening 32H. As shown in FIG. 10, the first inorganic encapsulation layer 41 is a patterned film layer structure, so as to completely encapsulate the sub-pixels in the sub-pixel opening 32H and ensure the encapsulation effect.

[0135] In this embodiment, since the structure of the current film layer is formed according to the structure of the previous process, the first inorganic encapsulation layer 41 of the sub-pixel opening 32H forms a groove structure, and the organic encapsulation layer 42 is formed in the groove. In an alternative embodiment, the surface of the organic encapsulation layer 42 in the groove away from the substrate 10 is flush with the surface of the first inorganic encapsulation layer 41 overlapping the planar insulating layer 32 away from the substrate 10, ensuring the organic encapsulation effect.

[0136] As Figure 14 shows a schematic diagram of the sub-pixel arrangement under multiple sub-pixels. In this embodiment, the second inorganic encapsulation layer 43 covers the organic encapsulation layers 42 of all sub-pixels and covers the surface of the planar insulating layer 32 away from the substrate 10. As Figure 14 shown, the thickness of the second inorganic encapsulation layer 43 disposed on the planar insulating layer 32 is greater than the thickness of the first inorganic encapsulation layer 41 at the overlapping position, which not only ensures the encapsulation of the organic encapsulation layers 42 of all sub-pixels but also improves the process efficiency.

[0137] In an embodiment of the present invention, the material of the first flat layer 321 includes organic materials such as polyimide, and the thickness is generally 1.5 - 3 μm. The material of the passivation layer 322 includes inorganic materials such as SiN and SiO, and the thickness is 2000 - 5000 Å. By utilizing the material characteristic that organic materials are easy to form a relatively large thickness, a flat layer structure design is formed in which the first flat layer 321 has a relatively thick thickness and the passivation layer 322 has a relatively thin thickness. The sub-pixels are arranged in the flat insulating layer 32 to achieve the purpose of multiplexing the pixel defining layer of the flat insulating layer 32, thereby simplifying the film layer structure of the display module and improving the process efficiency and process yield.

[0138] In this embodiment, the first electrode 31 and the source-drain electrode layer 25 are a stacked structure, for example, a stacked structure of Ti - Al - Ti in the direction from bottom to top. The material of the third electrode 35 includes a stacked structure composed of Mg and Ag. The thicknesses of the first electrode 31, the source-drain electrode layer 25, and the third electrode 35 are 7000 Å. In an alternative embodiment, the thickness of the light-emitting layer is 4000 Å.

[0139] In an alternative embodiment, the height between the surface of the second electrode 33 close to the substrate 10 and the surface of the third electrode 35 far from the substrate 10 is 5000 Å, that is, the thickness of the second electrode 33 is 5000 Å.

[0140] In an embodiment of the present invention, the size of the sub-pixel opening 32H of the flat insulating layer 32 affects the area of the sub-pixels. Exemplarily, the pixel size range in the related art is in the micron level. For example, the size of the sub-pixels is 1 - 100 μm, preferably 20 - 30 μm. When the display module is a display product with a high-resolution size, such as a resolution of 1000 PPI, the size of the sub-pixels can be optimized to 1 - 10 μm. Those skilled in the art design the corresponding sub-pixel size according to the resolution of the actual display product, which will not be elaborated here.

[0141] In an alternative embodiment, the display module further includes:

[0142] Power signal lines disposed in the non-display area; and

[0143] Connection signal lines, the connection signal lines electrically connecting the power signal lines and the first electrode 31, and the connection signal lines are disposed on the same layer as the second electrode 33, thereby providing voltage signals to the sub-pixels.

[0144] Another embodiment of the present invention proposes a method for manufacturing the display module of the above embodiment of the present invention. As Figure 15 shown, the method includes:

[0145] S10. Form a driving circuit layer 20 on the substrate 10;

[0146] S30. Form a light-emitting device layer 30 on the driving circuit layer 20, further including:

[0147] S31. Form a first electrode 31 for driving all sub-pixels on the surface of the driving insulating layer of the driving circuit layer 20 on the side away from the substrate 10;

[0148] S33. Form a planar insulating layer 32 on the first electrode 31 and the surface of the driving insulating layer on the side away from the substrate 10;

[0149] S35. Etch the planar insulating layer 32 to form a sub-pixel opening 32H for sub-pixels of the same color, and form a light-emitting device layer 30 for sub-pixels of the same color in the sub-pixel opening 32H;

[0150] S37. Repeat the etching of the planar insulating layer 32 to form a sub-pixel opening 32H for sub-pixels of the same color and form a light-emitting device layer 30 for sub-pixels of the same color in the sub-pixel opening 32H until light-emitting device layers 30 for sub-pixels of different colors are formed.

[0151] An exemplary description is now given of the manufacturing method of the display module according to the embodiments of the present invention:

[0152] S10. Form a driving circuit layer 20 on the substrate 10 to form a layer structure of the driving circuit layer 20 as shown in Figure 2 shown.

[0153] S31. Form a first electrode 31 for driving all sub-pixels on the surface of the driving insulating layer of the driving circuit layer 20 on the side away from the substrate 10. The structure of the first electrode 31 in a top view is as shown in Figure 3 or Figure 4 shown. In an optional embodiment, the first electrode 31 is formed by using a patterned mask plate masking process.

[0154] S33. Form a planar insulating layer 32 on the first electrode 31 and the surface of the driving insulating layer on the side away from the substrate 10 to form a layer structure schematic diagram as shown in Figure 5a and Figure 5b shown;

[0155] S35. Referring to the process flow chart as shown in Figures 6a to 9b shown, etch the planar insulating layer 32 to form a sub-pixel opening 32H for sub-pixels of the same color, and form a light-emitting device layer 30 for sub-pixels of the same color in the sub-pixel opening 32H.

[0156] In an optional embodiment, step S35 includes:

[0157] S351. Etch the flat insulating layer 32 to form a sub-pixel opening 32H for sub-pixels of the same color. The positive projection of the first electrode 31 and the sub-pixel opening 32H on the substrate 10 has at least an overlapping projection, thereby forming Figure 6a and Figure 6b the layer structure schematic diagram shown.

[0158] S353. Form a second electrode 33 on the surface of the driving circuit layer 20 in the sub-pixel opening 32H away from the substrate 10, thereby forming Figure 7a and Figure 7b the layer structure schematic diagram shown.

[0159] In this embodiment, the second electrode 33 is electrically connected to the driving circuit layer 20, and the positive projections of the second electrode 33 and the first electrode 31 on the substrate 10 have a gap.

[0160] S355. Form a light-emitting material layer 34 covering the second electrode 33 on the second electrode 33 in the sub-pixel opening 32H. The light-emitting material layer 34 corresponds to sub-pixels of the same color, thereby forming Figure 8a and Figure 8b the layer structure schematic diagram shown.

[0161] S357. Form the third electrode 35 on the light-emitting material layer 34 in the sub-pixel opening 32H. The first electrode 31 and the third electrode 35 are electrically connected, thereby forming Figure 9a and Figure 9b the layer structure schematic diagram of a sub-pixel shown.

[0162] In this embodiment, the third electrode 35 is formed by an evaporation source evaporation process, that is, there is no need to form the third electrode 35 by using the FMM mask plate process, avoiding the process difficulty of the FMM mask plate process to improve the process efficiency and process yield.

[0163] In an optional embodiment, between step S357 and step S37, the method further includes step S36: forming a patterned first inorganic encapsulation layer 41 on the surface of the corresponding third electrode 35 of the sub-pixels of the same color away from the substrate 10, thereby forming as Figure 10a and Figure 10b the structure shown.

[0164] S37. Repeat the etching of the flat insulating layer 32 to form the sub-pixel opening 32H for sub-pixels of the same color and form the light-emitting device layer 30 of sub-pixels of the same color in the sub-pixel opening 32H until the light-emitting device layers 30 of sub-pixels of different colors are formed.

[0165] Further, after step S37 "forming the light-emitting device layer 30 of different-color sub-pixels", the method further includes step S38: repeating the process of "forming a patterned first inorganic encapsulation layer 41 on the surface of the corresponding third electrode 35 of the same-color sub-pixel away from the substrate 10 side" until the first inorganic encapsulation layers 41 of different sub-pixels are formed on the side of the light-emitting device layer 30 away from the substrate 10. For example Figures 11 to 13 The schematic diagrams of the layer structure and top view structure shown.

[0166] In this embodiment, the sub-pixel openings 32H of different colors and the film layer materials in the sub-pixel openings 32H are separately evaporated. Considering that if the sub-pixel openings 32H of different colors and the second electrodes 33 in the sub-pixel openings 32H are formed simultaneously, when the light-emitting materials of different-color sub-pixels are subsequently evaporated, there may be residues of the light-emitting material layers 34 of other-color sub-pixels in the light-emitting material layer 34 in the sub-pixel opening 32H corresponding to the green sub-pixel, affecting the light-emitting effect.

[0167] S39. Form an organic encapsulation layer 42 in the grooves of the first inorganic encapsulation layer 41 corresponding to each sub-pixel;

[0168] S40. Form a second inorganic encapsulation layer 43 on the organic encapsulation layer 42 and on the surface of the covering planar insulating layer 32 away from the substrate 10 side, thereby forming Figure 14 The schematic diagram of the layer structure shown to completely encapsulate all the sub-pixels and ensure the encapsulation effect.

[0169] The manufacturing method of the display module according to the embodiment of the present invention first forms the first cathodes of all the sub-pixels, and further separately forms the sub-pixel openings 32H of different-color sub-pixels, the light-emitting device layer 30 of the same-color sub-pixels located in the sub-pixel openings 32H, and the encapsulation layer 40. Based on the display module formed by the above manufacturing method,

[0170] Utilize the planar insulating layer 32 to be reused as the pixel defining layer for defining the sub-pixels, cancel the FMM mask process of opening the sub-pixel openings 32H in the pixel defining layer, reduce the damage probability of the second electrode 33, and utilize the overlap of the first electrode 31 and the third electrode 35 to realize a high-resolution product without the FMM mask process in the process of manufacturing the display module, improving the process yield and product yield of the display module.

[0171] It should be noted that for the specific embodiments of the manufacturing method of the display module according to the embodiment of the present invention, reference can be made to the display module in the foregoing embodiments, which will not be elaborated herein.

[0172] The present invention provides a display device, which includes the display module of the above embodiments of the present invention. The display device of the embodiments of the present invention can be an electronic paper, a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, or any other product or component with a display function. This embodiment does not limit this.

[0173] In the description of the present invention, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprise", "include" or any other variant thereof are intended to cover non-exclusive inclusion, such that a process, method, article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or also includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or device comprising the element.

[0174] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, rather than limitations on the implementation manners of the present invention. For those of ordinary skill in the art, other different forms of changes or variations can be made based on the above description. It is impossible to enumerate all the implementation manners here. Any obvious changes or variations derived from the technical solutions of the present invention still fall within the protection scope of the present invention.

Claims

1. A display module, characterized in that: The display module includes a substrate, a driving circuit layer and a light emitting device layer. The light emitting device layer comprises: A first electrode is arranged on a surface of a driving insulating layer of the driving circuit layer away from the substrate; A flat insulating layer, wherein the flat insulating layer is provided with sub-pixel openings corresponding to different sub-pixels, and the orthographic projections of the first electrode and the sub-pixel opening on the substrate at least have partially overlapping projections; A second electrode disposed in the sub-pixel opening, electrically connected to the driving circuit layer, wherein the second electrode and the first electrode are spaced apart in their orthographic projections on the substrate; A light emitting material layer disposed in the sub-pixel opening and covering the second electrode; A third electrode is disposed in the sub-pixel opening and covers the light-emitting material layer, and the first electrode and the third electrode are electrically connected.

2. The display module according to claim 1, characterized in that: The opening width of the first opening of the sub-pixel opening close to the substrate side in the horizontal direction perpendicular to the stacking direction is a first width; The second opening of the sub-pixel opening away from the substrate has a second width in a horizontal direction perpendicular to the stacking direction; The first width is greater than the second width.

3. The display module according to claim 2, characterized in that: The orthographic projection of the second electrode on the substrate falls within the orthographic projection of the second opening on the substrate, and the width of the second electrode in the horizontal direction is less than or equal to the second width.

4. The display module according to claim 2, characterized in that: The first electrode comprises: An annular portion, wherein the orthographic projection of the annular portion on the substrate includes a plurality of grid structures, each of the grid structures surrounds the orthographic projection of at least one sub-pixel on the substrate; A connecting portion, one end of which is connected to an edge of the annular portion, and the other end of which is electrically connected to the third electrode corresponding to the surrounded sub-pixel, and the connecting portion and the second electrode do not overlap in their orthographic projection on the substrate.

5. The display module according to claim 1, characterized in that: The driving circuit layer comprises: Active layer; a gate layer insulated from the active layer; A source-drain electrode layer is insulated from the gate layer, the source layer of the source-drain electrode layer is electrically connected to one end of the active layer, the drain layer of the source-drain electrode layer is electrically connected to the other end of the active layer, and one of the source layer or the drain layer is electrically connected to the second electrode.

6. The display module according to claim 5, characterized in that: A surface of the first electrode close to the substrate and a surface of the source-drain electrode layer close to the substrate are located on the same surface, and the first electrode and the source-drain electrode layer are arranged in the same layer.

7. The display module according to claim 6, characterized in that: The display module also includes: A power signal line disposed in a non-display area; and A connecting signal line is provided, wherein the connecting signal line is electrically connected to the power signal line and the first electrode, and the connecting signal line is provided in the same layer as the second electrode.

8. The display module according to any one of claims 1 to 7, characterized in that: The display module further includes an encapsulation layer, which is arranged on a surface of the third electrode and the flat insulating layer away from the substrate. or, The encapsulation layer further comprises: A patterned first inorganic encapsulation layer, wherein the first inorganic encapsulation layer is disposed on a surface of a side of the third electrode in the sub-pixel opening away from the substrate and overlaps a flat insulating layer at an edge of the sub-pixel opening, and the first inorganic encapsulation layer includes a groove corresponding to a position of the sub-pixel opening; an organic encapsulation layer disposed in each groove of the first inorganic encapsulation layer; and The second inorganic encapsulation layer covers the organic encapsulation layer and covers a surface of the flat insulating layer away from the substrate.

9. The display module according to claim 8, characterized in that: The flat insulating layer includes a plurality of insulating material layers stacked in sequence, the sub-pixel opening includes a sub-opening opened at the same position of the plurality of insulating material layers, and in the stacking direction, the opening width of the sub-opening in the horizontal direction gradually decreases, The opening width of the sub-opening of the insulating material layer closest to the driving circuit layer in the horizontal direction is the first width, and the opening width of the sub-opening of the insulating material layer farthest from the driving circuit layer in the horizontal direction is the second width.

10. The display module according to claim 9, characterized in that: The opening angle of the second opening is 50-70°, and the evaporation angle of the evaporation source is between the opening angles. or The pixel distance between the first inorganic encapsulation layers corresponding to adjacent sub-pixels is 20-30 μm; or The first electrode is formed by using a patterned mask plate mask process, and the third electrode is formed by using an evaporation source evaporation process.

11. A method for manufacturing the display module according to any one of claims 1 to 10, characterized in that: The method comprises: forming a driving circuit layer on the substrate; Forming a light emitting device layer on the driving circuit layer further comprises: Forming a first electrode for driving all sub-pixels on a surface of the driving insulating layer of the driving circuit layer away from the substrate; forming a flat insulating layer on the surface of the first electrode and the driving insulating layer away from the substrate; Etching the flat insulating layer to form a sub-pixel opening of a sub-pixel of the same color, and forming a light-emitting device layer of the sub-pixel of the same color in the sub-pixel opening; The etching of the planar insulating layer is repeated to form sub-pixel openings of the sub-pixels of the same color and to form light-emitting device layers of the sub-pixels of the same color in the sub-pixel openings until light-emitting device layers of sub-pixels of different colors are formed.

12. The method according to claim 11, characterized in that The etching of the flat insulating layer to form a sub-pixel opening of a sub-pixel of the same color, and forming a light-emitting device layer of the sub-pixel of the same color in the sub-pixel opening, further comprises: The flat insulating layer is etched to form a sub-pixel opening of a sub-pixel of the same color, wherein the first electrode and the sub-pixel opening have at least an overlapping projection in terms of their orthographic projection on the substrate; A second electrode is formed on a surface of the driving circuit layer in the sub-pixel opening away from the substrate, the second electrode is electrically connected to the driving circuit layer, and there is a gap between the second electrode and the first electrode in their orthographic projection on the substrate; forming a light-emitting material layer covering the second electrode on the second electrode in the sub-pixel opening, wherein the light-emitting material layer corresponds to sub-pixels of the same color; The third electrode is formed on the light emitting material layer in the sub-pixel opening, and the first electrode and the third electrode are electrically connected.

13. The method according to claim 12, characterized in that The first electrode is formed by using a patterned mask plate mask process, and the third electrode is formed by using an evaporation source evaporation process; or The method further includes forming the encapsulation layer on the surface of the light emitting device layer and the flat insulating layer away from the substrate, and further includes: Before repeatedly etching the flat insulating layer to form a sub-pixel opening of the same color sub-pixel and forming a light-emitting device layer of the same color sub-pixel in the sub-pixel opening, a patterned first inorganic encapsulation layer is formed on a surface of a third electrode corresponding to the same color sub-pixel away from the substrate, the first inorganic encapsulation layer overlaps the flat insulating layer at the edge of the sub-pixel opening, and the first inorganic encapsulation layer includes a groove corresponding to the position of the sub-pixel opening; After forming the light-emitting device layers of sub-pixels of different colors, repeating the process of forming a patterned first inorganic encapsulation layer on the surface of the third electrode corresponding to the sub-pixel of the same color away from the substrate, until the first inorganic encapsulation layer of the different sub-pixels is formed on the side of the light-emitting device layer away from the substrate; forming an organic encapsulation layer in the groove of the first inorganic encapsulation layer corresponding to each sub-pixel; A second inorganic encapsulation layer is formed on the surface of the organic encapsulation layer and the covering flat insulating layer away from the substrate.

14. A display device, characterized in that: The display device comprises a display module according to any one of claims 1 to 10 or a display module manufactured by the method according to any one of claims 11 to 13.