Band-gap reference circuit for low-voltage circuit

Abstract

The invention provides a band-gap reference circuit for a low-voltage circuit, which comprises a clamping operational amplifier circuit for receiving an input voltage and outputting an amplified input voltage under the control of a bias voltage; the feedback adjustment circuit performs feedback adjustment on the amplified input voltage to obtain a feedback voltage; the current mirror circuit generates reference voltage and reference current according to the feedback voltage; the transistor circuit generates a positive / negative temperature coefficient current by using a reference voltage and generates an input voltage. The reference voltage output circuit generates and outputs a bandgap reference voltage using the reference current. The threshold voltage of a transistor in the circuit is reduced by using a substrate bias technology, the input node of the clamping operation amplification circuit is optimized, the minimum power supply voltage for working of the circuit is reduced, the loop is improved by using the feedback adjustment circuit, the power supply suppression capability is improved, and the stability of the output band-gap reference voltage is improved; the problems of how to improve the minimum power supply voltage of the band-gap reference circuit and how to optimize the power supply suppression effect are solved.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit design, and particularly relates to a bandgap reference circuit for a low-voltage circuit. Background Art

[0002] The function of a bandgap reference (BGR) circuit is to generate a reference voltage independent of process, power supply, and temperature (PVT). Since the generated reference voltage is approximately the same as the bandgap voltage of silicon, it is called a bandgap reference. The bandgap reference circuit is a key component in analog circuits and is widely used in various fields of analog circuits.

[0003] The working principle of the bandgap reference circuit is as follows: The difference (ΔV BE ) between the base-emitter voltage differences (V BE ) of two bipolar junction transistors (BJTs) generates a positive temperature coefficient current through a resistor, and then generates a positive temperature coefficient voltage through a resistor, which is superimposed on V BE to generate the bandgap reference voltage V REF . As long as the current densities of the two BJT transistors are kept in a fixed ratio and a certain ratio is ensured between the resistors, a V REF with zero temperature coefficient can be generated.

[0004] With the development of manufacturing processes, some circuit modules need to be powered by a low voltage to reduce the overall power consumption of the circuit. Therefore, the bandgap reference circuit also needs to work under the same low-voltage power supply. Currently, the bandgap reference voltage V REF output by the bandgap reference circuit for a voltage source less than 1V is obtained by using a current proportional to the absolute temperature (PTAT) and a current inversely proportional to the absolute temperature (CTAT) to obtain a temperature-independent current and a temperature-independent reference voltage.

[0005] However, the minimum power supply voltage of the existing bandgap reference circuit for low-voltage circuits is limited by the threshold voltage V TH of the MOS transistor, the base-emitter voltage difference V BE of the triode, and the set overdrive voltage V DSAT , thus limiting its application range by various factors. In addition, there is also noise generated by the power supply, operational amplifier, and each feedback loop and component in the existing bandgap reference circuit for low-voltage circuits, resulting in poor power supply rejection effect and poor stability of the output bandgap reference voltage V REF . Summary of the Invention

[0006] The object of the present invention is to provide a bandgap reference circuit for a low-voltage circuit, so as to solve the problem of how to improve the minimum power supply voltage of the bandgap reference circuit and optimize the power supply rejection effect.

[0007] To solve the above technical problems, the present invention provides a bandgap reference circuit for a low-voltage circuit, including a clamping operational amplifier circuit, a feedback adjustment circuit, a current mirror circuit, a transistor circuit, and a reference voltage output circuit; The clamping operational amplifier circuit is used to receive an input voltage and, under the control of a bias voltage, perform operational amplification on the input voltage to output the amplified input voltage; The feedback adjustment circuit is used to change the amplification factor of the power supply to perform feedback adjustment on the amplified input voltage to obtain a feedback voltage; The current mirror circuit is used to generate a reference voltage and a reference current according to the feedback voltage; The transistor circuit is used to generate a proportional positive temperature coefficient current and a negative temperature coefficient current by using the reference voltage, and generate the input voltage; The reference voltage output circuit is used to generate and output a bandgap reference voltage by using the reference current.

[0008] Optionally, in the bandgap reference circuit for a low-voltage circuit, the clamping operational amplifier circuit includes a first operational amplifier transistor, a second operational amplifier transistor, a third operational amplifier transistor, a fourth operational amplifier transistor, a fifth operational amplifier transistor, a sixth operational amplifier transistor, a seventh operational amplifier transistor, and an operational amplifier capacitor; The substrates of the first operational amplifier transistor, the second operational amplifier transistor, the third operational amplifier transistor, and the fourth operational amplifier transistor are all connected to the substrate voltage; the sources of the first operational amplifier transistor and the fourth operational amplifier transistor are connected to the power supply; the gate of the first operational amplifier transistor is connected to the bias voltage; the sources of the second operational amplifier transistor and the third operational amplifier transistor are both connected to the drain of the first operational amplifier transistor, and the gates are respectively connected to a first input voltage and a second input voltage; the drain of the second operational amplifier transistor is connected to the gate and drain of the fifth operational amplifier transistor and is connected to the gate of the sixth operational amplifier transistor; the drain of the third operational amplifier transistor is connected to the gate of the fourth operational amplifier transistor, the drain of the sixth transistor, and the upper plate of the operational amplifier capacitor; the lower plate of the operational amplifier capacitor is connected to the gate of the seventh operational amplifier transistor; the drain of the seventh operational amplifier transistor and the drain of the fourth operational amplifier transistor are connected and an output terminal is led out to output the amplified input voltage; the sources of the fifth operational amplifier transistor, the sixth operational amplifier transistor, and the seventh operational amplifier transistor are grounded; wherein, the input voltage includes a first input voltage and a second input voltage.

[0009] Optionally, in the bandgap reference circuit for low-voltage circuits, the first operational amplifier transistor, the second operational amplifier transistor, the third operational amplifier transistor, and the fourth operational amplifier transistor are PMOS; the fifth operational amplifier transistor, the sixth operational amplifier transistor, and the seventh operational amplifier transistor are NMOS.

[0010] Optionally, in the bandgap reference circuit for low-voltage circuits, the feedback adjustment circuit includes a first adder transistor and a second adder transistor; The drain of the first adder transistor is connected to the power supply, the source is connected to the substrate, and the gate is connected to the voltage fed back by the current mirror circuit; the drain of the second adder transistor is connected to the source of the first adder transistor and leads out an output terminal to output the adjusted input voltage; the source of the second adder transistor is connected to the substrate and grounded, and the gate is connected to the amplified input voltage output by the clamping operational amplifier.

[0011] Optionally, in the bandgap reference circuit for low-voltage circuits, the first adder transistor and the second adder transistor have the same size and the same current.

[0012] Optionally, in the bandgap reference circuit for low-voltage circuits, the current mirror circuit includes a first replication transistor, a second replication transistor, and a third replication transistor; The reference voltage includes a first reference voltage and a second reference voltage; The sources of the first replication transistor, the second replication transistor, and the third replication transistor are all connected to the power supply, the gates are all connected to the adjusted input voltage output by the feedback adjustment circuit, and the substrates are all connected to the substrate voltage; the drain of the first replication transistor outputs the first reference voltage, the drain of the second replication transistor outputs the second reference voltage, and the drain of the third replication transistor is connected to the reference voltage output circuit.

[0013] Optionally, in the bandgap reference circuit for low-voltage circuits, the first replication transistor, the second replication transistor, and the third replication transistor have the same size.

[0014] Optionally, in the bandgap reference circuit for low-voltage circuits, the transistor circuit includes a first transistor, a second transistor, a first resistor, a second resistor, a third resistor, a fourth resistor, and a fifth resistor; The emitter of the first transistor is connected to the drain of the first copy transistor, and the base is shorted to the collector and grounded; the first end of the first resistor is connected to the drain of the second copy transistor, and the second end is connected to the emitter of the second transistor; the base of the second transistor is shorted to the collector and grounded; the first end of the second resistor is connected to the emitter of the first transistor, and the second end is connected to the first end of the third resistor; the second end of the third resistor is grounded; the first end of the fourth resistor is connected to the first end of the third resistor, and the second end is connected to the first end of the fifth resistor; the second end of the fifth resistor is grounded.

[0015] Optionally, in the bandgap reference circuit for a low-voltage circuit, the first transistor and the second transistor are PNP bipolar junction transistors.

[0016] Optionally, in the bandgap reference circuit for a low-voltage circuit, the reference voltage output circuit includes a sixth resistor; the first end of the sixth resistor is connected to the drain of the third copy transistor and leads out an output terminal to output a bandgap reference voltage; the second end of the sixth resistor is grounded.

[0017] Optionally, in the bandgap reference circuit for a low-voltage circuit, the bandgap reference circuit for a low-voltage circuit further includes a bias voltage generation circuit; the bias voltage generation circuit is used to generate a bias voltage and a substrate voltage; The bias voltage generation circuit includes a current source, a first bias transistor, a second bias transistor, a third bias transistor, and a bias resistor; the source of the first bias transistor is connected to the power supply, the gate and the drain are shorted to output a bias voltage, and the substrate is connected to the substrate voltage; the source of the second bias transistor is connected to the drain of the first bias transistor, the drain is grounded to the substrate, and the gate is connected to the output terminal of the current source; the source of the third bias transistor is connected to the power supply through the bias resistor and leads out the substrate voltage, the drain is grounded to the substrate, and the gate is connected to the output terminal of the current source.

[0018] Optionally, in the bandgap reference circuit for a low-voltage circuit, the current source includes a first current transistor, a second current transistor, a third current transistor, a fourth current transistor, a fifth current transistor, a sixth current transistor, a seventh current transistor, an eighth current transistor, a ninth current transistor, and a tenth current transistor; The sources and substrates of the first current transistor, the second current transistor, the third current transistor, and the fourth current transistor are all connected to a power supply; the gates of the first current transistor and the second current transistor are connected to the gate of the third current transistor; the drain of the first current transistor is connected to the drain of the fifth current transistor; the drain of the second current transistor is connected to the drain of the seventh current transistor; the drain of the third current transistor is connected to the drain of the eighth current transistor; the gate of the fourth current transistor is connected to the gates of the fifth current transistor and the ninth current transistor, and the drain is connected to the drain of the ninth current transistor and the gate of the tenth current transistor; the gate and drain of the fifth current transistor are shorted, and the source is grounded; the gate of the sixth current transistor is connected to the gate of the fifth current transistor, the drain is connected to the source of the seventh current transistor, and the source is grounded; the gate of the seventh current transistor is connected to the gate of the eighth current transistor; the gate and drain of the eighth current transistor are shorted, and the source is grounded; the source of the ninth current transistor is grounded; the source of the tenth current transistor is grounded, and the drain outputs a bias voltage.

[0019] Optionally, in the bandgap reference circuit for a low-voltage circuit, the first current transistor, the second current transistor, the third current transistor, and the fourth current transistor are PMOS, and the fifth current transistor, the sixth current transistor, the seventh current transistor, the eighth current transistor, and the ninth current transistor are NMOS; the fifth current transistor is in the saturation region; the sixth current transistor is in the linear region; the seventh current transistor and the eighth current transistor are in the subthreshold region.

[0020] The bandgap reference circuit for low-voltage circuits provided by the present invention includes a clamping operational amplifier circuit, a feedback adjustment circuit, a current mirror circuit, a transistor circuit, and a reference voltage output circuit; the clamping operational amplifier circuit is used to receive an input voltage and, under the control of a bias voltage, perform operational amplification on the input voltage to output the amplified input voltage; the feedback adjustment circuit is used to change the amplification factor of the power supply to perform feedback adjustment on the amplified input voltage to obtain a feedback voltage; the current mirror circuit is used to generate a reference voltage and a reference current according to the feedback voltage; the transistor circuit is used to generate a proportional positive temperature coefficient current and a negative temperature coefficient current using the reference voltage and generate the input voltage; the reference voltage output circuit is used to generate and output a bandgap reference voltage using the reference current. Through circuit design of the bandgap reference circuit, the substrate bias technology is used to reduce the threshold voltage of the transistors in the circuit, the input node of the clamping operational amplifier circuit is optimized, the minimum power supply voltage at which the circuit can operate is reduced, and the feedback adjustment circuit is used to improve the loop to enhance the power supply rejection ability and improve the stability of the output bandgap reference voltage, solving the problem of how to improve the minimum power supply voltage of the bandgap reference circuit and optimize the power supply rejection effect. Description of the Drawings

[0021] Figure 1 It is a structural block diagram of the bandgap reference circuit for low-voltage circuits provided by this embodiment; Figure 2 It is a circuit schematic diagram of the clamping operational amplifier circuit provided by this embodiment; Figure 3 It is a circuit schematic diagram of the feedback adjustment circuit provided by this embodiment; Figure 4 It is a circuit schematic diagram of the bandgap reference circuit for low-voltage circuits provided by this embodiment; Figure 5 It is a circuit schematic diagram of the bias voltage generation circuit provided by this embodiment; Figure 6 It is a circuit schematic diagram of the current source provided by this embodiment. Detailed Embodiment

[0022] The following further elaborates in detail on the bandgap reference circuit for low-voltage circuits proposed by the present invention in combination with the drawings and specific embodiments. It should be noted that the drawings are all in very simplified forms and use non-precise scales, only for conveniently and clearly assisting in explaining the purpose of the embodiments of the present invention. In addition, the structures shown in the drawings are often part of the actual structures. In particular, the focus that each drawing needs to show is different, and sometimes different scales are used.

[0023] It should be noted that the "first", "second", etc. in the description, claims and drawings of the present invention are used to distinguish similar objects in order to describe the embodiments of the present invention, rather than to describe a specific order or sequence. It should be understood that the structures used in this way can be interchanged under appropriate circumstances. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device comprising a series of steps or units need not be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0024] This embodiment provides a bandgap reference circuit for a low-voltage circuit, as Figure 1 shown, which includes a clamping operational amplifier circuit, a feedback adjustment circuit, a current mirror circuit, a transistor circuit, and a reference voltage output circuit; The clamping operational amplifier circuit is used to receive an input voltage and, under the control of a bias voltage, perform operational amplification on the input voltage to output the amplified input voltage; The feedback adjustment circuit is used to change the amplification factor of the power supply to perform feedback adjustment on the amplified input voltage to obtain a feedback voltage; The current mirror circuit is used to generate a reference voltage and a reference current according to the feedback voltage; The transistor circuit is used to generate a proportional positive temperature coefficient current and a negative temperature coefficient current by using the reference voltage and generate the input voltage; The reference voltage output circuit is used to generate and output a bandgap reference voltage by using the reference current.

[0025] The bandgap reference circuit for a low-voltage circuit provided by this embodiment solves the problem of how to improve the minimum power supply voltage of the bandgap reference circuit and optimize the power supply rejection effect by circuit design of the bandgap reference circuit, using the substrate bias technology to reduce the threshold voltage of the transistors in the circuit, optimizing the input nodes of the clamping operational amplifier circuit, reducing the minimum power supply voltage at which the circuit can operate, and using the feedback adjustment circuit to improve the loop and improve the power supply rejection ability and the stability of the output bandgap reference voltage.

[0026] Specifically, in this embodiment, as Figure 2 shown, the clamping operational amplifier circuit includes a first operational amplifier transistor M01, a second operational amplifier transistor M02, a third operational amplifier transistor M03, a fourth operational amplifier transistor M04, a fifth operational amplifier transistor M05, a sixth operational amplifier transistor M06, a seventh operational amplifier transistor M07, and an operational amplifier capacitor C.

[0027] Among them, the substrates of the first operational amplifier transistor M01, the second operational amplifier transistor M02, the third operational amplifier transistor M03, and the fourth operational amplifier transistor M04 are all connected to the substrate voltage V B ; the sources of the first operational amplifier transistor M01 and the fourth operational amplifier transistor M04 are connected to the power supply VDD; the gate of the first operational amplifier transistor M01 is connected to the bias voltage V BP ; the sources of the second operational amplifier transistor M02 and the third operational amplifier transistor M03 are both connected to the drain of the first operational amplifier transistor M01, and the gates are respectively connected to the first input voltage Vin- and the second input voltage Vin+; the drain of the second operational amplifier transistor M02 is connected to the gate and drain of the fifth operational amplifier transistor M05, and is also connected to the gate of the sixth operational amplifier transistor M06; the drain of the third operational amplifier transistor M03 is connected to the gate of the fourth operational amplifier transistor M04, the drain of the sixth transistor M06, and the upper plate of the operational amplifier capacitor C; the lower plate of the operational amplifier capacitor C is connected to the gate of the seventh operational amplifier transistor M07; the drain of the seventh operational amplifier transistor M07 is connected to the drain of the fourth operational amplifier transistor M04, and an output terminal is led out to output the amplified input voltage Vout1; the sources of the fifth operational amplifier transistor M05, the sixth operational amplifier transistor M06, and the seventh operational amplifier transistor M07 are grounded to GND; among them, the input voltage includes the first input voltage Vin- and the second input voltage Vin+.

[0028] In a specific embodiment, the first operational amplifier transistor M01, the second operational amplifier transistor M02, the third operational amplifier transistor M03, and the fourth operational amplifier transistor M04 are PMOS; the fifth operational amplifier transistor M05, the sixth operational amplifier transistor M06, and the seventh operational amplifier transistor M07 are NMOS.

[0029] Of course, in other embodiments, the clamping operational amplifier circuit can also be composed of other clamping operational amplifiers, and the specific circuit structure is not limited in this application.

[0030] Furthermore, in this embodiment, as Figure 3 shown, the feedback adjustment circuit includes a first adder transistor M11 and a second adder transistor M12.

[0031] Among them, the drain of the first adder transistor M11 is connected to the power supply VDD, the source is connected to the substrate, and the gate is connected to the voltage V fed back by the current mirror circuit FB; The drain of the second addition transistor M12 is connected to the source of the first addition transistor M11, and an output terminal is led out to output the adjusted input voltage Vout2; the source of the second addition transistor M12 is connected to the substrate and grounded to GND, and the gate is connected to the amplified input voltage Vout1 output by the clamping operational amplifier.

[0032] In this embodiment, the feedback adjustment circuit changes the amplification factor of the circuit for the power supply, thereby effectively improving the power supply rejection ability.

[0033] In practical applications, both the first addition transistor M11 and the second addition transistor M12 are NMOS transistors. In this way, by connecting the sources of the first addition transistor M11 and the second addition transistor M12 to the substrate, the threshold voltage VTH difference caused by the body bias effect can be effectively avoided, so that the first addition transistor M11 and the second addition transistor M12 have the same input transconductance gm and the same output resistance go under the conditions of the same current and the same size.

[0034] Preferably, in order to achieve a better power supply rejection effect, in this embodiment, the first addition transistor M11 and the second addition transistor M12 have the same size and the same current.

[0035] Furthermore, in this embodiment, as Figure 4 shown, the current mirror circuit includes a first copy transistor M21, a second copy transistor M22, and a third copy transistor M23. And, the reference voltage includes a first reference voltage Va and a second reference voltage Vb.

[0036] Among them, the sources of the first copy transistor M21, the second copy transistor M22, and the third copy transistor M23 are all connected to the power supply VDD, the gates are all connected to the adjusted input voltage Vout2 output by the feedback adjustment circuit, and the substrates are all connected to the substrate voltage V B ; The drain of the first copy transistor M21 outputs the first reference voltage Va, the drain of the second copy transistor M22 outputs the second reference voltage Vb, and the drain of the third copy transistor M23 is connected to the reference voltage output circuit.

[0037] Preferably, in order to make the reference current provided by each branch in the current mirror circuit consistent while reducing the process difficulty, so as to facilitate the subsequent generation of a stable bandgap reference voltage, in this embodiment, the first copy transistor M21, the second copy transistor M22, and the third copy transistor M23 are controlled to have the same size.

[0038] And, in this embodiment, as Figure 4As shown, the transistor circuit includes a first transistor Q1, a second transistor Q2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, and a fifth resistor R5.

[0039] Among them, the emitter of the first transistor Q1 is connected to the drain of the first replica transistor M21, and the base is shorted to the collector and grounded to GND; the first end of the first resistor R1 is connected to the drain of the second replica transistor M22, and the second end is connected to the emitter of the second transistor Q2; the base of the second transistor Q2 is shorted to the collector and grounded to GND; the first end of the second resistor R2 is connected to the emitter of the first transistor Q1, and the second end is connected to the first end of the third resistor R3; the second end of the third resistor R3 is grounded to GND; the first end of the fourth resistor R4 is connected to the first end of the third resistor R3, and the second end is connected to the first end of the fifth resistor R5; the second end of the fifth resistor R5 is grounded to GND.

[0040] In a specific embodiment, the first transistor Q1 and the second transistor Q2 are PNP bipolar junction transistors.

[0041] In practical applications, for the convenience of layout design, the area ratio of the first transistor Q1 and the second transistor Q2 can be 1:8.

[0042] In this embodiment, through the action of the transistor circuit under the current mirror circuit, a second input voltage Vin+ can be generated between the second resistor R2 and the third resistor R3, and a first input voltage Vin- can be generated between the fourth resistor R4 and the fifth resistor R5, so as to input the voltage to the clamping operational amplifier circuit. At the same time, under the combined action of the clamping operational amplifier circuit and the current mirror circuit, the transistor circuit generates a positive temperature coefficient current and a negative temperature coefficient current with a certain proportional relationship, and outputs a reference current with zero temperature drift at a specific temperature at the first reference voltage Va and the second reference voltage Vb of the current mirror circuit.

[0043] Further, in this embodiment, as Figure 4 shown, the reference voltage output circuit includes a sixth resistor; the first end of the sixth resistor R6 is connected to the drain of the third replica transistor M23 and leads out an output terminal to output a bandgap reference voltage V REF ; the second end of the sixth resistor R6 is grounded to GND.

[0044] In this embodiment, by applying the reference current provided by the current mirror circuit to the sixth resistor of the reference voltage output circuit, a bandgap reference voltage is generated.

[0045] To provide a bias voltage for the clamping operation amplifier circuit and a substrate voltage for the substrates of each transistor in the circuit, the bandgap reference circuit for a low-voltage circuit may further include a bias voltage generation circuit.

[0046] Specifically, in this embodiment, as Figure 5 shown, the bias voltage generation circuit includes a current source IB, a first bias transistor M31, a second bias transistor M32, a third bias transistor M33, and a bias resistor R7; the source of the first bias transistor M31 is connected to the power supply VDD, and the gate and drain are short-circuited to output a bias voltage V BP , and the substrate is connected to the substrate voltage V B ; the source of the second bias transistor M32 is connected to the drain of the first bias transistor M31, the drain is grounded to GND, and the gate is connected to the output terminal of the current source IB; the source of the third bias transistor M33 is connected to the power supply VDD through the bias resistor R7 and a substrate voltage V B is led out, the drain is grounded to GND, and the gate is connected to the output terminal of the current source IB.

[0047] Furthermore, in this embodiment, as Figure 6 shown, the current source IB includes a first current transistor M41, a second current transistor M42, a third current transistor M43, a fourth current transistor M44, a fifth current transistor M45, a sixth current transistor M46, a seventh current transistor M47, an eighth current transistor M48, a ninth current transistor M49, and a tenth current transistor M40.

[0048] Among them, the sources and substrates of the first current transistor M41, the second current transistor M42, the third current transistor M43, and the fourth current transistor M44 are all connected to the power supply VDD; the gates of the first current transistor M41 and the second current transistor M42 are connected to the gate of the third current transistor M43; the drain of the first current transistor M41 is connected to the drain of the fifth current transistor M45; the drain of the second current transistor M42 is connected to the drain of the seventh current transistor M47; the drain of the third current transistor M43 is connected to the drain of the eighth current transistor M48; the gate of the fourth current transistor M44 is connected to the gates of the fifth current transistor M45 and the ninth current transistor M49, and the drain is connected to the drain of the ninth current transistor M49 and the gate of the tenth current transistor M40; the gate and drain of the fifth current transistor M45 are short-circuited, and the source is grounded to GND; the gate of the sixth current transistor M46 is connected to the gate of the fifth current transistor M45, the drain is connected to the source of the seventh current transistor M47, and the source is grounded to GND; the gate of the seventh current transistor M47 is connected to the gate of the eighth current transistor M48; the gate and drain of the eighth current transistor M48 are short-circuited, and the source is grounded to GND; the source of the ninth current transistor M49 is grounded to GND; the source of the tenth current transistor M40 is grounded to GND, and the drain outputs the bias voltage V BP 。

[0049] In a specific embodiment, the first current transistor M41, the second current transistor M42, the third current transistor M43, and the fourth current transistor M44 are PMOS, and the fifth current transistor M45, the sixth current transistor M46, the seventh current transistor M47, the eighth current transistor M48, and the ninth current transistor M49 are NMOS.

[0050] Moreover, the fifth current transistor M45 is in the saturation region; the sixth current transistor M46 is in the linear region; the seventh current transistor M47 and the eighth current transistor M48 are in the subthreshold region.

[0051] Next, in combination with Figures 1 to 6 ,the working principle and the achieved technical effects of the bandgap reference circuit for low-voltage circuits provided by the present application will be described in detail.

[0052] First, the principle that the bandgap reference circuit for low-voltage circuits provided by the present application has a lower supply voltage VDD is described as follows: Such as Figure 4As shown, for the bandgap reference circuit for low-voltage circuits provided in this embodiment, the minimum value of its supply voltage VDD obtained from the current mirror circuit is:

[0053] where VEB1 represents the base-emitter voltage difference of the first transistor Q1; VDSAT represents the overdrive voltage of the transistor, that is, VDSAT = V GS -V TH , V GS represents the gate-drain voltage of the transistor, and V TH represents the threshold voltage of the transistor; represents the overdrive voltage of the first replica transistor M21.

[0054] Combined with Figure 2 , the minimum value of its supply voltage VDD obtained from the clamping operational amplifier circuit is:

[0055] where Vin+ is provided by VEB1; represents the overdrive voltage of the first operational amplifier transistor M01; VTHP represents the threshold voltage of the PMOS transistor, and according to the existing conventional process, this value is generally negative.

[0056] From the above formula, for the bandgap reference circuit for low-voltage circuits provided in this embodiment, its minimum supply voltage is:

[0057] It can be seen from this that if you want to reduce the minimum supply voltage of the bandgap reference circuit, there are three ways, that is, ① reducing Vin+, ② reducing , ③ increasing VTHP.

[0058] ① Considering from the aspect of Vin+, Vin+ = VEB1, then the minimum supply voltage can be expressed as:

[0059] Referring to Figure 4 , when in the transistor circuit, the resistance values of the second resistor R2 and the fourth resistor R4 are equal, and the resistance values of the third resistor R3 and the fifth resistor R5 are equal, through the clamping operational amplifier circuit, it can be obtained that:

[0060] And the first reference voltage Va = VBE, then the above formula can be rewritten as:

[0061] At this time, the current passing through the second resistor R2 is:

[0062] This current is a negative temperature current.

[0063] In addition, considering from the aspect of VEB1, since the first transistor Q1 is a PNP bipolar junction transistor (BJT), there is , therefore, if the current flowing through the first transistor Q1 is smaller, then VEB1 is smaller. However, considering that when the current becomes smaller, the resistance values of the resistors for temperature compensation (the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, and the fifth resistor R5) all need to become larger. At the same time, in order to obtain the required bandgap reference voltage, the resistance value of the sixth resistor R6 also needs to become larger, which will increase the circuit area and is very unfavorable for area miniaturization. Therefore, in this embodiment, the transistor circuit is not modified to ensure that the circuit area will not increase.

[0064] In summary, in this embodiment, without changing the feedback and functions, by adjusting the feedback position, the voltage at the Vin+ node (between the second resistor R2 and the third resistor R3) can be reduced, thereby reducing the minimum supply voltage .

[0065] ② Considering from the aspect of VTHP, since the threshold voltage of the MOS transistor can be expressed as:

[0066] where VTH0 represents the threshold voltage of the MOS transistor at absolute temperature; represents the body bias coefficient; represents the bulk Fermi potential; VBS represents the substrate bias voltage.

[0067] It can be seen from the above formula that if VBS > 0, making the substrate positively biased, then can be reduced, thereby reducing the minimum supply voltage .

[0068] Specifically, as in Figure 4 the substrate voltage VB connected to the substrates of the first copy transistor M21, the second copy transistor M22, and the third copy transistor M23 in the current mirror circuit can generate a current independent of the power supply through a small-area current source IB with threshold adjustment and independent of the power supply, and copy it to the third bias transistor M33. A substrate voltage VB that changes with the power supply is generated through the bias resistor R7, so that after the power supply is given, a stable VBS bias voltage can be provided, thereby reducing .

[0069] Among them, as in Figure 6The shown current source structure, where the fifth current transistor M45 is in the saturation region; the sixth current transistor M46 is in the linear region; the seventh current transistor M47 and the eighth current transistor M48 are in the subthreshold region. At this time, the current output by the current source is:

[0070]

[0071] where n represents the linear region correction printing, S 46 represents the aspect ratio of the sixth current transistor M46, K1 = S 48 / S 47 and K2 = S 46 / S 45 .

[0072] Copy the current I generated by the current source to the bias resistor R7, then VB = VDD - I × R7, to achieve the adjustment of VTH. However, it should be noted that since the emitter of the parasitic PNP will conduct due to the positive bias when the substrate is positively biased to a certain extent, the positive bias voltage cannot be too high.

[0073] In summary, this embodiment uses the threshold adjustment technology to reduce VTH, thereby reducing the minimum supply voltage .

[0074] Second, the principle of the better power supply rejection effect of the bandgap reference circuit for low-voltage circuits provided by this application is explained as follows: As Figure 4 shown, in the bandgap reference circuit for low-voltage circuits provided by this embodiment, a feedback adjustment circuit is added to the clamping operational amplifier circuit and the current mirror circuit. At this time, by introducing the power supply voltage, the system power supply rejection function is:

[0075] where, , respectively represent the output resistances of the first adder transistor M11 and the second adder transistor M12, , respectively represent the transconductances of the first adder transistor M11 and the second adder transistor M12.

[0076] Since in this embodiment, the first adder transistor M11 and the second adder transistor M12 have the same size and the same flowing current, therefore, , so that the dominant term in PSR is canceled, thereby improving the power supply rejection ability.

[0077] Third, the bandgap reference voltage finally output by the bandgap reference circuit for low-voltage circuits provided in this application is described as follows: Similar to the prior art, by setting the resistance values of the respective resistors in the transistor circuit. Specifically, the resistance values of the second resistor R2 and the fourth resistor R4 are set to be the same, and the resistance values of the third resistor R3 and the fifth resistor R5 are set to be the same. As a result, the current flowing through the second resistor R2 and the third resistor R3 is VEB1 / (R2 + R3), obtaining a CTAT current. At the same time, under the action of the clamping operational amplifier circuit, the first reference voltage Va is equal to the second reference voltage Vb, such that the current flowing through the fourth resistor R4 and the fifth resistor R5 is also VEB1 / (R2 + R3).

[0078] Since , where , represents the thermal voltage; N represents the area ratio of the second transistor Q2 and the first transistor Q1. Taking the area ratio of the first transistor Q1 and the second transistor Q2 as 1:8 in the above example, then . At this time, the obtained bandgap reference voltage .

[0079] The bandgap reference circuit for low-voltage circuits provided in this embodiment, under the trade-off between area and the lowest voltage, reduces the lowest power supply voltage at which the circuit can operate by adjusting the feedback loop and using threshold adjustment techniques. At the same time, on this basis, the feedback loop is adjusted to improve the power supply rejection, thereby reducing the impact of power supply noise on the output voltage and ensuring the stability of the output bandgap reference voltage.

[0080] The bandgap reference circuit for low-voltage circuits provided in this embodiment reduces the threshold voltage of the PMOS through the substrate bias technology, optimizes the input node of the clamping operational amplifier circuit, reduces the minimum power supply voltage at which the clamping operational amplifier circuit can operate, and thus reduces the minimum power supply voltage at which the entire bandgap reference circuit can operate. In practical applications, the minimum power supply voltage at which the bandgap reference circuit can operate can be reduced to about 200 mV. The bandgap reference circuit for low-voltage circuits provided in this embodiment improves the power supply rejection ability of the bandgap reference through the improvement of the feedback loop. In practical applications, the power supply rejection ability is increased by approximately 20 dB.

[0081] It should be noted that the various embodiments in this specification are described in a progressive manner. The key point of each embodiment is to illustrate the differences from other embodiments. The same or similar parts among the various embodiments can be referred to each other. In addition, the different parts among the various embodiments can also be combined and used with each other. The present invention does not limit this.

[0082] The bandgap reference circuit for a low-voltage circuit provided in this embodiment includes a clamping operational amplifier circuit, a feedback adjustment circuit, a current mirror circuit, a transistor circuit, and a reference voltage output circuit; the clamping operational amplifier circuit is used to receive an input voltage and, under the control of a bias voltage, perform operational amplification on the input voltage to output the amplified input voltage; the feedback adjustment circuit is used to change the amplification factor of the power supply to perform feedback adjustment on the amplified input voltage to obtain a feedback voltage; the current mirror circuit is used to generate a reference voltage and a reference current according to the feedback voltage; the transistor circuit is used to generate a proportional positive temperature coefficient current and a negative temperature coefficient current by using the reference voltage and generate the input voltage; the reference voltage output circuit is used to generate and output a bandgap reference voltage by using the reference current. Through circuit design of the bandgap reference circuit, the substrate biasing technology is used to reduce the threshold voltage of the transistors in the circuit, the input node of the clamping operational amplifier circuit is optimized, the minimum power supply voltage at which the circuit can operate is reduced, and the feedback adjustment circuit is used to improve the loop to enhance the power supply rejection ability and improve the stability of the output bandgap reference voltage, thus solving the problem of how to improve the minimum power supply voltage of the bandgap reference circuit and optimize the power supply rejection effect.

[0083] The above description is only a description of the preferred embodiments of the present invention and does not limit the scope of the present invention in any way. Any changes and modifications made by those of ordinary skill in the art of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A bandgap reference circuit for a low voltage circuit, characterized in that: It includes a clamping operational amplifier circuit, a feedback adjustment circuit, a current mirror circuit, a transistor circuit and a reference voltage output circuit; The clamp operational amplifier circuit is used to receive an input voltage and, under the control of a bias voltage, perform operational amplification on the input voltage to output an amplified input voltage; The feedback adjustment circuit is used to change the amplification factor of the power supply to perform feedback adjustment on the amplified input voltage to obtain a feedback voltage; The current mirror circuit is used to generate a reference voltage and a reference current according to the feedback voltage; The transistor circuit is used to generate a proportional positive temperature coefficient current and a negative temperature coefficient current using the reference voltage, and to generate the input voltage; The reference voltage output circuit is used to generate and output a bandgap reference voltage using the reference current.

2. The bandgap reference circuit for low voltage circuit according to claim 1, characterized in that: The clamping operational amplifier circuit includes a first operational amplifier transistor, a second operational amplifier transistor, a third operational amplifier transistor, a fourth operational amplifier transistor, a fifth operational amplifier transistor, a sixth operational amplifier transistor, a seventh operational amplifier transistor and an operational amplifier capacitor; The substrates of the first operational amplifier transistor, the second operational amplifier transistor, the third operational amplifier transistor and the fourth operational amplifier transistor are all connected to a substrate voltage; The sources of the first operational amplifier transistor and the fourth operational amplifier transistor are connected to a power supply; the gate of the first operational amplifier transistor is connected to a bias voltage; The sources of the second operational amplifier transistor and the third operational amplifier transistor are both connected to the drain of the first operational amplifier transistor, and the gates are connected to the first input voltage and the second input voltage respectively; the drain of the second operational amplifier transistor is connected to the gate and drain of the fifth operational amplifier transistor, and is connected to the gate of the sixth operational amplifier transistor; the drain of the third operational amplifier transistor is connected to the gate of the fourth operational amplifier transistor, the drain of the sixth transistor and the upper plate of the operational amplifier capacitor; the lower plate of the operational amplifier capacitor is connected to the gate of the seventh operational amplifier transistor; the drain of the seventh operational amplifier transistor is connected to the drain of the fourth operational amplifier transistor, and leads to an output end to output the amplified input voltage; the sources of the fifth operational amplifier transistor, the sixth operational amplifier transistor and the seventh operational amplifier transistor are grounded; wherein the input voltage includes the first input voltage and the second input voltage.

3. The bandgap reference circuit for low voltage circuit according to claim 2, characterized in that: The first operational amplifier transistor, the second operational amplifier transistor, the third operational amplifier transistor and the fourth operational amplifier transistor are PMOS; the fifth operational amplifier transistor, the sixth operational amplifier transistor and the seventh operational amplifier transistor are NMOS.

4. The bandgap reference circuit for low voltage circuit according to claim 1, characterized in that: The feedback adjustment circuit includes a first adding transistor and a second adding transistor; The drain of the first adding transistor is connected to the power supply, the source is connected to the substrate, and the gate is connected to the voltage fed back by the current mirror circuit; the drain of the second adding transistor is connected to the source of the first adding transistor, and an output terminal is led out to output the adjusted input voltage; the source of the second adding transistor is connected to the substrate and grounded, and the gate is connected to the amplified input voltage output by the clamping operational amplifier.

5. The bandgap reference circuit for low voltage circuit according to claim 4, characterized in that: The first adding transistor and the second adding transistor have the same size and the same current.

6. The bandgap reference circuit for low voltage circuit according to claim 1, characterized in that: The current mirror circuit includes a first replica transistor, a second replica transistor and a third replica transistor; The reference voltage includes a first reference voltage and a second reference voltage; The sources of the first replica transistor, the second replica transistor and the third replica transistor are all connected to a power supply, the gates are all connected to the feedback-adjusted input voltage output by the feedback adjustment circuit, and the substrates are all connected to a substrate voltage; the drain of the first replica transistor outputs a first reference voltage, the drain of the second replica transistor outputs a second reference voltage, and the drain of the third replica transistor is connected to the reference voltage output circuit.

7. The bandgap reference circuit for low voltage circuit according to claim 6, characterized in that: The first replica transistor, the second replica transistor, and the third replica transistor have the same size.

8. The bandgap reference circuit for low voltage circuit according to claim 6, characterized in that: The transistor circuit includes a first transistor, a second transistor, a first resistor, a second resistor, a third resistor, a fourth resistor and a fifth resistor; The emitter of the first transistor is connected to the drain of the first replica transistor, and the base and collector are short-circuited and grounded; the first end of the first resistor is connected to the drain of the second replica transistor, and the second end is connected to the emitter of the second transistor; the base and collector of the second transistor are short-circuited and grounded; the first end of the second resistor is connected to the emitter of the first transistor, and the second end is connected to the first end of the third resistor; the second end of the third resistor is grounded; the first end of the fourth resistor is connected to the first end of the third resistor, and the second end is connected to the first end of the fifth resistor; the second end of the fifth resistor is grounded.

9. The bandgap reference circuit for low voltage circuit according to claim 8, characterized in that: The first transistor and the second transistor are PNP bipolar junction transistors.

10. The bandgap reference circuit for low voltage circuit according to claim 6, characterized in that: The reference voltage output circuit comprises a sixth resistor; a first end of the sixth resistor is connected to the drain of the third replica transistor and leads to an output end to output a bandgap reference voltage; a second end of the sixth resistor is grounded.

11. The bandgap reference circuit for low voltage circuit according to claim 1, characterized in that: The bandgap reference circuit for low voltage circuit further comprises a bias voltage generating circuit; the bias voltage generating circuit is used to generate a bias voltage and a substrate voltage; The bias voltage generating circuit includes a current source, a first bias transistor, a second bias transistor, a third bias transistor and a bias resistor; The source of the first bias transistor is connected to a power supply, the gate and the drain are short-circuited to output a bias voltage, and the substrate is connected to a substrate voltage; The source of the second bias transistor is connected to the drain of the first bias transistor, the drain is grounded to the substrate, and the gate is connected to the output end of the current source; the source of the third bias transistor is connected to the power supply through the bias resistor and draws out the substrate voltage, the drain is grounded to the substrate, and the gate is connected to the output end of the current source.

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