Burning loss prevention control method, device and equipment of central processing unit, medium and product

Abstract

The invention discloses a burning loss prevention control method and device for a central processing unit, equipment, a medium and a product, and relates to the technical field of short circuit detection, and the method comprises the steps: obtaining at least one piece of monitoring data of a target memory riser card if the target memory riser card does not have a pin defect, and calculating the plugging confidence coefficient of the target memory riser card, when the plugging confidence coefficient of the target memory riser card is greater than a preset threshold value, calculating a target resistance value and an equivalent resistance value of each pin of the target memory riser card according to the test data of the target memory riser card; according to the target resistance value and the equivalent resistance value of each pin, carrying out short-circuit detection on the target memory adapter card to obtain a short-circuit detection result of the target memory adapter card, and carrying out burning loss prevention control on the central processing unit according to the short-circuit detection result. The problem that large potential safety hazards exist in power-on of the central processing unit due to the fact that an existing short circuit detection technology for the memory adapter card is low in detection accuracy is solved, the detection accuracy is improved, and the power-on safety of the central processing unit is guaranteed.

Description

Technical Field

[0001] The present invention relates to the technical field of short - circuit detection, and particularly to a method, device, equipment, medium and product for preventing the burnout of a central processing unit. Background Art

[0002] As a core storage component of a computer system, a memory module is usually directly connected to a motherboard through a memory slot. However, in specific testing, verification, and special adaptation scenarios, the physical connection between the memory module and the motherboard interface needs to be completed through a memory adapter card. The memory adapter card introduces a multi - level plug - in connection method in its structural design, and its pin layout is extremely complex and dense. Once an electrical short - circuit or poor contact occurs, when the central processing unit (CPU) module is powered on, it is very likely to cause serious hardware failures such as CPU burnout, resulting in huge economic losses. Therefore, it is of great significance to perform reliable electrical short - circuit detection on the memory adapter card before it is put into use.

[0003] However, the current short - circuit detection technologies have many deficiencies. Some detection links still rely on manual visual inspection, and the accuracy of this detection method is extremely vulnerable to the experience level and fatigue degree of the detection personnel. Not only is the detection efficiency low, but also the phenomenon of missed detection is very likely to occur. In addition, some design solutions use special short - circuit test cards, but when conditions such as the test environment, test fixtures, or wear caused by frequent plugging and unplugging change greatly, these test cards are often difficult to adapt to different situations and lack sufficient universality. They are difficult to dynamically adjust the detection threshold according to the actual situation and cannot automatically identify subtle electrical abnormalities, resulting in an incomplete detection coverage and a large potential safety hazard.

[0004] In view of the above problems, there is an urgent need for an efficient, intelligent and adaptable short - circuit detection technology for memory adapter cards to ensure the safety and reliability of the CPU module power - on process. Summary of the Invention

[0005] The present invention provides a method, device, equipment, medium and product for preventing the burnout of a central processing unit, so as to at least solve the problem that the current short - circuit detection technology for memory adapter cards has low detection accuracy, resulting in a large potential safety hazard in the power - on of the central processing unit.

[0006] The present invention provides a method for preventing a central processing unit from burning out, comprising the following steps: detecting whether a target memory adapter card has pin defects; if the target memory adapter card does not have the pin defects, acquiring at least one monitoring data of the target memory adapter card, calculating an insertion and extraction confidence level of the target memory adapter card based on the at least one monitoring data, and when the insertion and extraction confidence level of the target memory adapter card is greater than a preset threshold, calculating a target resistance value and an equivalent resistance value of each pin of the target memory adapter card according to test data of the target memory adapter card; performing a short circuit detection on the target memory adapter card according to the target resistance value and the equivalent resistance value of each pin, obtaining a short circuit detection result of the target memory adapter card, and performing a burn-out prevention control on the central processing unit according to the short circuit detection result.

[0007] The present invention further provides a device for preventing a central processing unit from burning out, comprising: a defect detection module, configured to detect whether a target memory adapter card has pin defects; a calculation module, configured to, if the target memory adapter card does not have the pin defects, acquire at least one monitoring data of the target memory adapter card, calculate an insertion and extraction confidence level of the target memory adapter card based on the at least one monitoring data, and when the insertion and extraction confidence level of the target memory adapter card is greater than a preset threshold, calculate a target resistance value and an equivalent resistance value of each pin of the target memory adapter card according to test data of the target memory adapter card; and a control module, configured to perform a short circuit detection on the target memory adapter card according to the target resistance value and the equivalent resistance value of each pin, obtain a short circuit detection result of the target memory adapter card, and perform a burn-out prevention control on the central processing unit according to the short circuit detection result.

[0008] The present invention further provides an electronic device, comprising: a memory, configured to store a computer program; and a processor, configured to implement the steps of the method for preventing a central processing unit from burning out as described above when executing the computer program.

[0009] The present invention further provides a computer-readable storage medium, in which a computer program is stored, and wherein the computer program, when executed by a processor, implements the steps of the method for preventing a central processing unit from burning out as described above.

[0010] The present invention further provides a computer program product, comprising a computer program, and the computer program, when executed by a processor, implements the method for preventing a central processing unit from burning out as described above.

[0011] Through the present invention, it is detected whether there are pin defects in the target memory adapter card; if there are no pin defects in the target memory adapter card, at least one monitoring data of the target memory adapter card is obtained, and the plugging confidence of the target memory adapter card is calculated based on the at least one monitoring data. When the plugging confidence of the target memory adapter card is greater than a preset threshold, the target resistance value and equivalent resistance value of each pin of the target memory adapter card are calculated according to the test data of the target memory adapter card; short-circuit detection is performed on the target memory adapter card according to the target resistance value and equivalent resistance value of each pin, and the short-circuit detection result of the target memory adapter card is obtained, and anti-burning control is performed on the central processing unit according to the short-circuit detection result. Thus, the problem that the current short-circuit detection technology of the memory adapter card has low detection accuracy, resulting in a large safety hazard when the central processing unit is powered on, is solved, the detection accuracy is improved, and the safety and reliability of the central processing unit when powered on are ensured. Brief Description of the Drawings

[0012] In order to more clearly illustrate the embodiments of the present invention, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0013] Figure 1 It is a flowchart of a method for anti-burning control of a central processing unit according to an embodiment of the present invention; Figure 2 It is a schematic structural diagram of a detection device for preventing CPU burning according to an embodiment of the present invention; Figure 3 It is a schematic flow diagram of a method for anti-burning control of a central processing unit according to an embodiment of the present invention; Figure 4 It is a schematic diagram of an anti-burning control device for a central processing unit according to an embodiment of the present invention; Figure 5 It is a schematic diagram of the structure of an electronic device according to an embodiment of the present invention. Detailed Embodiments

[0014] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, rather than all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the protection scope of the present invention.

[0015] It should be noted that in the description of the present invention, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or elements inherent to such process, method, article or device. The terms "first", "second", etc. in the present invention are used to distinguish similar objects, rather than to describe a specific order or sequence.

[0016] Before specifically introducing the embodiments of the present invention, the present invention briefly introduces the following technical problems mainly existing in the current short-circuit detection technology of memory adapter cards: Problems relying on manual visual inspection: (1) The detection accuracy is interfered by human factors: Manual visual inspection highly depends on the experience of the inspectors. There are differences in the judgment criteria for short-circuit problems among personnel with different experience levels, which may lead to misjudgment or missed judgment of some subtle short-circuit hidden dangers.

[0017] (2) Prone to be affected by fatigue factors: Long-time visual inspection will make the inspectors fatigued, and it is difficult to always maintain a high degree of concentration, reducing the detection accuracy.

[0018] (3) Low detection efficiency: Manual inspection requires observing and judging each electrical connection point of the memory adapter card one by one. The process is cumbersome and time-consuming, unable to meet the requirements of large-scale production or rapid detection, resulting in low overall detection efficiency and increasing the production cycle and cost.

[0019] Problems existing in dedicated short-circuit test cards: (1) Lack of universality: Dedicated short-circuit test cards are usually designed for specific test environments, test fixtures, and plugging and unplugging wear conditions. When these conditions change, the test cards may not work properly or accurately detect short-circuit problems.

[0020] Difficult to dynamically adjust the threshold: During the test process, the electrical parameters may change due to various factors. Dedicated short-circuit test cards often cannot dynamically adjust the detection threshold according to the actual detection situation to adapt to these changes.

[0021] Unable to automatically identify subtle electrical anomalies: The short-circuit problems of memory adapter cards may manifest as some subtle electrical anomalies, such as weak current leakage or voltage fluctuations. Dedicated short-circuit test cards may lack sufficient sensitivity and intelligent recognition capabilities to automatically identify these subtle anomalies, resulting in insufficient detection coverage, unable to comprehensively discover potential short-circuit hidden dangers, and increasing the risk of failures after the CPU module is powered on.

[0022] To solve the above problems, an embodiment of the present invention provides a method for preventing the central processing unit from burning out, specifically as follows Figure 1 shown.

[0023] Before specifically introducing the method for preventing the central processing unit (CPU) from burning out, it is necessary to introduce the modules involved in the embodiments of the present invention, including a defect detection module, a plugging and unplugging detection module, and a short-circuit detection module, as shown in Figure 2 shown.

[0024] The defect detection module integrates an industrial vision detection model, and uses the pre-trained industrial vision detection model to detect the pin defects of the memory adapter card, and filters out the memory adapter cards without appearance defects; The plugging and unplugging detection module integrates a Hall sensor, a micro-displacement sensor, and a contact impedance detector, and is used to jointly monitor the plugging and unplugging state of the memory adapter card through the Hall sensor, the micro-displacement sensor, and the contact impedance detector, calculate the plugging and unplugging confidence level of the memory adapter card according to the joint monitoring results. If the confidence level of the memory adapter card is lower than the confidence level threshold, the CPU module is prohibited from being powered on.

[0025] The short-circuit detection module is used to perform low-voltage voltage excitation and current acquisition on the pins of the memory adapter card after confirming that the plugging and unplugging state is normal, calculate the equivalent resistance value based on the measurement data, and perform short-circuit determination in combination with the adaptive resistance value calculated by multiple parameters.

[0026] Specifically, the method for preventing the central processing unit from burning out includes the following steps: Step S101, detecting whether there are pin defects in the target memory adapter card.

[0027] Specifically, in the embodiment of the present invention, the pre-trained detection model is used to detect the pin defects of the target memory adapter card, and it is judged whether the target memory adapter card is a memory adapter card without appearance defects. Among them, the pre-trained detection model is the pre-trained industrial vision detection model mentioned above.

[0028] Optionally, in some embodiments, before detecting whether there are pin defects in the target memory adapter card, it includes: collecting pin defect sample images, and preprocessing the pin defect sample images to obtain data to be trained; dividing the data to be trained based on a preset ratio to obtain a training set and a test set, and using the training set to train the initial detection model, and using the test set to test the trained detection model to obtain the accuracy of the trained detection model; stopping training when the number of training times of the trained detection model reaches the preset number of times and the accuracy is greater than or equal to the preset accuracy, to obtain the pre-trained detection model, so as to use the pre-trained detection model to detect whether there are pin defects in the target memory adapter card.

[0029] Among them, the preset ratio, preset number of times, and preset accuracy rate can be thresholds preset by the user, can be thresholds obtained through a limited number of experiments, or can be thresholds obtained through a limited number of computer simulations, and are not specifically limited here.

[0030] It is important to understand that the model training steps for the pre-trained detection model are as follows: Collect and annotate pin defect sample images and preprocess the pin defect sample images to obtain a defect data set, i.e., data to be trained; The data to be trained is divided into a training set and a test set according to a preset ratio, and the training set is used to train the initial detection model, and the test set is used to test the trained detection model; When the training times of the trained detection model reaches the preset times and the accuracy reaches the preset accuracy, the training is stopped to obtain the pre-trained detection model.

[0031] Specifically, the embodiment of the present invention uses a high-resolution industrial camera to collect a large number of memory adapter card samples to obtain pin defect sample images, and manually annotates pin defect features such as missing pins, crooked pins, wear and abnormal incoming materials. After expanding the data set through an image enhancement algorithm (such as rotation, cropping, and brightness change), it is input into the initial detection model (the initial detection model in the embodiment of the present invention uses the YOLOv8 model), and the preset number of times is set to 500 times, and the preset accuracy is 98%. When the training number of the trained detection model reaches 500 times and the accuracy is ≥98%, the training is stopped and the model is solidified to obtain the pre-trained detection model.

[0032] Through the above technical solution, a pre-trained detection model is used to perform defect detection on the target memory adapter card pins, which can quickly and accurately screen out memory adapter cards with appearance defects such as bending, defects, and contamination before power-on testing, avoiding the risks of omissions in human visual inspection, thereby improving the degree of automation of the test process, reducing the risk of short circuits caused by physical defects, and effectively ensuring the safety of the CPU module in subsequent testing links.

[0033] Step S102: If the target memory adapter card does not have a pin defect, at least one monitoring data of the target memory adapter card is obtained, and the plugging confidence of the target memory adapter card is calculated based on the at least one monitoring data; and when the plugging confidence of the target memory adapter card is greater than a preset threshold, the target resistance value and equivalent resistance value of each pin of the target memory adapter card are calculated according to the test data of the target memory adapter card.

[0034] Among them, in some embodiments, the plug-in confidence is: ; (1) in, is the plug-in confidence, is the standard displacement, is the displacement sensor reading in the monitoring data, is the Hall reference value, is the Hall sensor reading in the monitoring data, is the impedance qualification threshold, is the measured value of the contact impedance in the monitoring data, is the plug - and - unplug weight, is the displacement weight, is the impedance weight.

[0035] Among them, the preset threshold can be a threshold preset by the user, a threshold obtained through a finite number of experiments, or a threshold obtained through a finite number of computer simulations, and no specific limitation is made here.

[0036] Specifically, in the embodiment of the present invention, the plug - and - unplug state of the target memory adapter card is jointly monitored by a Hall sensor, a micro - displacement sensor, and a contact impedance detector to obtain the data of the target memory adapter card monitored by the Hall sensor, the data of the target memory adapter card monitored by the micro - displacement sensor, and the data of the target memory adapter card monitored by the contact impedance detector, so as to calculate the plug - and - unplug confidence of the target memory adapter card through formula (1).

[0037] When the plug - and - unplug confidence of the target memory adapter card is greater than the preset threshold, the target resistance and equivalent resistance of each pin of the target memory adapter card can be calculated according to the test data of the target memory adapter card.

[0038] Through the above technical solution, by jointly monitoring the plug - and - unplug state of the memory adapter card by a Hall sensor, a micro - displacement sensor, and a contact impedance detector, it is possible to comprehensively evaluate the plug - and - unplug reliability from three dimensions of magnetic field change, micro - displacement amount, and electrical contact quality, effectively avoiding the risks brought by misjudgment of a single sensor. By calculating the plug - and - unplug confidence obtained by fusing multiple monitoring data, it is possible to intelligently determine whether the plug - and - unplug state of the target memory adapter card meets the standard.

[0039] Optionally, in some embodiments, after calculating the plug - and - unplug confidence of the target memory adapter card based on at least one monitoring data, it includes: if the plug - and - unplug confidence of the target memory adapter card is less than or equal to the preset threshold, the central processing unit is prohibited from powering on.

[0040] As a key component connecting the CPU and the memory, the plug - and - unplug state of the memory adapter card directly affects the hardware compatibility and stability of the system. If the plug - and - unplug confidence is low, it may mean that the adapter card is not correctly installed or there are problems such as poor contact. These problems may cause the CPU to be unable to access the memory normally, and further lead to system crashes or hardware damage. Allowing the CPU to power on in this case may exacerbate the development of the fault and even cause more serious hardware damage.

[0041] Therefore, if the plugging and unplugging confidence level of the target memory adapter card is less than or equal to the preset threshold, the CPU power-on is prohibited at this time.

[0042] Through the above technical solution, when the plugging and unplugging confidence level of the memory adapter card is less than or equal to the preset threshold, the power-on is timely blocked, significantly improving the accuracy and safety of detection, and avoiding short-circuit faults and CPU burnout caused by improper plugging or poor contact.

[0043] Further, in some embodiments, the target resistance value and equivalent resistance value of each pin of the target memory adapter card are calculated according to the test data of the target memory adapter card, including: applying a first voltage excitation signal to each pin one by one according to the pin number sequence, and collecting the current of each pin based on the first voltage excitation signal; calculating the equivalent resistance value of each pin by using the first voltage excitation signal and the current of each pin.

[0044] It can be understood that when the plugging and unplugging confidence level of the memory adapter card is greater than the preset threshold, it is determined that the plugging and unplugging state of the target memory adapter card is normal, then a low-voltage voltage excitation signal (i.e., applying a first voltage excitation signal) is applied to the pins of the target memory adapter card, and the current of each pin is collected, and the equivalent resistance value of each pin is calculated based on the collected voltage and current measurement data to combine with the target resistance value for short-circuit determination.

[0045] Among them, the calculation process of the equivalent resistance value is: Select a low-voltage constant excitation signal, apply a low-voltage voltage excitation to each pin one by one according to the pin number sequence. While applying the low-voltage voltage excitation, ensure that other pins remain in a high-resistance state, and obtain the current flowing through the pin through a current acquisition chip. According to Ohm's law, calculate the equivalent resistance value of each pin in real time.

[0046] The specific operation process is: select a low-voltage constant excitation signal with a voltage range of 0.1V to 0.5V to ensure that the test process will not damage the device or trigger abnormal current. Apply a low-voltage voltage excitation to each pin one by one according to the pin number sequence, and ensure that other pins remain in a high-resistance state at the same time; collect the current flowing through the pin through a high-precision current acquisition chip, and the acquisition resolution is preferably 10 μA level. According to Ohm's law, calculate the equivalent resistance value in real time: ; (2) Among them, represents the equivalent resistance value, represents the excitation voltage, represents the test line loss correction value, represents the collected current. It should be noted that the test line itself has resistance, inductance and contact resistance, resulting in a certain difference between the voltage applied to the measured pin and the theoretical voltage. Therefore, it is necessary to introduce To reduce the calculation error.

[0047] Through the above technical solution, by applying a low-voltage constant excitation signal to each pin to apply voltage and combining a high-precision current acquisition chip for real-time current detection, the equivalent resistance of each pin can be accurately obtained without damaging the device. At the same time, other pins remain in a high-impedance state to avoid signal interference, ensuring the purity and accuracy of the measurement results. Based on the real-time calculated equivalent resistance, potential short circuits or low-resistance anomalies can be detected in a timely manner, giving early warnings, significantly improving the safety and reliability during the test phase, and preventing the CPU module from burning out after being powered on due to hidden faults.

[0048] Furthermore, in some embodiments, calculating the target resistance and equivalent resistance of each pin of the target memory adapter according to the test data of the target memory adapter further includes: based on the test data, using a preset resistance calculation formula to calculate the target resistance, where the preset resistance calculation formula is: ; (3) Where, is the target resistance, is the initial resistance threshold, is the pin temperature change value, is the voltage change value, is the number of times the test fixture is used, is the fixture aging coefficient, is the temperature weight, is the voltage weight, is the number of times weight, is the aging weight.

[0049] The steps to obtain the target resistance are: Set the initial resistance threshold according to the design specifications and the historical test data of the target memory adapter; Obtain the pin temperature change, voltage change, and number of times the test fixture is used of the target memory adapter in real time, and calculate the fixture aging coefficient, where the calculation method of the fixture aging coefficient is: ; (4) Where, represents the current service life, represents the maximum service life, represents the depreciation coefficient.

[0050] Calculate the target resistance of each pin through the obtained initial resistance threshold, the temperature change, voltage change, number of times the test fixture is used, and fixture aging coefficient of each pin of the target memory adapter.

[0051] Specifically, the initial resistance threshold designed in the embodiments of the present invention is preferably 7.5 Ω, and the temperature change of the pins before and after the low-voltage voltage excitation is collected and the voltage change before and after the low-voltage voltage excitation and the number of times the test fixture is used, the aging coefficient of the fixture are used to calculate the target resistance value of each pin.

[0052] Through the above technical solutions, by designing the initial resistance threshold as the initial reference and dynamically adjusting the target resistance value in combination with the real-time collected temperature change of the pins, the power supply voltage fluctuation, and the number of times the test fixture is used and the aging coefficient, the short-circuit determination standard can be intelligently corrected according to the changes in the test environment and the device state. It can effectively avoid misjudgment or missed judgment caused by a single fixed threshold, improve the sensitivity and accuracy of short-circuit detection, adapt to the test requirements in different stages and complex conditions, and further ensure the safety and test reliability of the CPU module before power-on.

[0053] Optionally, in some embodiments, short-circuit detection is performed on the target memory adapter card according to the target resistance value and the equivalent resistance value of each pin, and the short-circuit detection result is obtained, including: if there is a first pin among all the pins of the target memory adapter card whose equivalent resistance value is less than or equal to the product of the target resistance value and the preset value, the short-circuit detection result is that the target memory adapter card is in a short-circuit state; if there is a second pin among all the pins of the target memory adapter card whose equivalent resistance value is greater than the product result and less than the target resistance value, the short-circuit detection result is that the target memory adapter card is in a short-circuit to-be-confirmed state; if the equivalent resistance values of all the pins of the target memory adapter card are greater than or equal to the target resistance value, the short-circuit detection result is that the target memory adapter card is in a normal state.

[0054] Among them, the preset value can be a threshold preset by the user, a threshold obtained through a limited number of experiments, or a threshold obtained through a limited number of computer simulations. Preferably, in the embodiments of the present invention, the preset value is 0.8.

[0055] Specifically, in the embodiments of the present invention, the target resistance value and the equivalent resistance value of each pin are compared.

[0056] If there is a first pin among all the pins of the target memory adapter card whose equivalent resistance value is less than or equal to the product of the target resistance value and 0.8, it is determined that the target memory adapter card is in a short-circuit state; If there is a second pin among all the pins of the target memory adapter card whose equivalent resistance value is greater than the product of the target resistance value and 0.8 and less than the target resistance value, it is determined that the target memory adapter card is in a short-circuit to-be-confirmed state, and it is necessary to further determine whether there is a short-circuit situation in the target memory adapter card; If the equivalent resistance values of all pins of the target memory adapter card are greater than or equal to the target resistance value, it is determined that the target memory adapter card is in a normal state.

[0057] Through the above technical solution, by comparing the target resistance value and the equivalent resistance value of each pin, it is determined whether the memory adapter card is in a short-circuit state, ensuring the safety and test reliability of the CPU module before power-on.

[0058] Step S103, perform a short-circuit detection on the target memory adapter card according to the target resistance value and the equivalent resistance value of each pin, obtain the short-circuit detection result of the target memory adapter card, and perform anti-burning control on the central processing unit according to the short-circuit detection result.

[0059] Optionally, in some embodiments, performing anti-burning control on the central processing unit according to the short-circuit detection result includes: if the short-circuit detection result is that the target memory adapter card is in a short-circuit state, prohibit the central processing unit from powering on; if the short-circuit detection result is that the target memory adapter card is in a short-circuit pending confirmation state, generate an excitation pattern set based on a preset boundary scan description file and a preset physical adjacency matrix, and use the excitation pattern set to detect whether there is a short-circuit situation in the target memory adapter card, and prohibit the central processing unit from powering on when there is a short-circuit situation in the target memory adapter card; if the short-circuit detection result is that the target memory adapter card is in a normal state and the boundary scan test result of the target memory adapter card is normal, control the central processing unit to power on.

[0060] Among them, it should be noted that the short-circuit pending confirmation state can be understood as that the target memory adapter card cannot directly determine whether it is in a short-circuit state and needs further confirmation.

[0061] It should be understood that if the short-circuit detection result is that the target memory adapter card is in a short-circuit state, prohibit the central processing unit from powering on; if the short-circuit detection result is that the target memory adapter card is in a short-circuit pending confirmation state, generate an excitation pattern set based on a preset boundary scan description file and a preset physical adjacency matrix, and further detect whether there is a short-circuit situation in the target memory adapter card through the boundary scan test BSI (Boundary Scan Inspection) based on the excitation pattern set. If there is a short-circuit situation, obtain the abnormal pin number and prohibit the central processing unit from powering on; if the short-circuit detection result is that the target memory adapter card is in a normal state and the boundary scan test result of the target memory adapter card is normal after passing the boundary scan test, it is determined that the central processing unit can power on.

[0062] Through the above technical solutions, obvious short - circuit faults can be quickly identified by short - circuit detection technology, directly prohibiting the CPU from power - on to avoid potential hardware damage. For the state of whether there is a short - circuit to be confirmed, accurate detection is carried out through boundary - scan technology, avoiding blind replacement or repair, improving efficiency and reducing the risk of misjudgment. The boundary - scan technology can automatically generate a set of excitation patterns through a preset boundary - scan description file and a physical adjacency matrix to achieve automated detection and reduce manual intervention. As long as a short - circuit risk is detected, the CPU power - on is prohibited to avoid CPU burnout caused by short - circuit.

[0063] Optionally, in some embodiments, generating a set of excitation patterns based on a preset boundary - scan description file and a preset physical adjacency matrix includes: extracting information of each pin of the target memory adapter card based on the preset boundary - scan description file; constructing a preset physical adjacency matrix based on the topological data of each pin; and generating a set of excitation patterns according to the information of each pin and the preset physical adjacency matrix.

[0064] Specifically, in the embodiment of the present invention, by parsing the BSDL file (Boundary Scan Description Language, preset boundary - scan description file) corresponding to the target memory adapter card, the status information of each pin in the target memory adapter card is extracted. According to the predefined topological data of each pin of the target memory adapter card, a preset physical adjacency matrix between pins is constructed, and a set of excitation patterns is generated according to the status information of each pin and the preset physical adjacency matrix.

[0065] Specifically, the BSDL file corresponding to the target memory adapter card is parsed to extract information such as pin number, pin boundary - scan type, control register mapping relationship, and supported drive states.

[0066] Further, according to the predefined topological data, all physically adjacent or potentially short - circuited pin pairs are identified, and an N×N adjacency matrix is established. If pin i and pin j are physically adjacent, M(i,j)=1; otherwise, M(i,j)=0. According to the pin status information, the excitable states are defined (for example, the output pin can be excited to H / L; the input and Z - state pins are not used as excitation ports but only for response observation). For each physical adjacency pair (i, j), it can be set that pin i is excited to a high level and pin j is observed, and pin i is excited to a low level and pin j is observed. These two combinations form a test pattern. All pin pairs are processed cyclically to generate a complete set of excitation patterns.

[0067] Through the above technical solution, by parsing the BSDL file corresponding to the target memory adapter card to extract pin status information and constructing an adjacency matrix between pins in combination with the pre-defined topology data, the physical connection relationship of the pins can be clearly understood. On this basis, a systematic set of excitation patterns is generated to ensure that the test excitation covers all high-risk adjacent paths. This method avoids human omission and can specifically perform in-depth detection on potential short-circuit positions, improving the test coverage rate and the accuracy of fault location, thereby effectively enhancing the comprehensiveness and accuracy of short-circuit detection and ensuring the electrical safety before the CPU module is powered on.

[0068] Optionally, in some embodiments, detecting whether there is a short-circuit situation in the target memory adapter card based on the set of excitation patterns includes: determining at least one excitation pin and at least one non-excitation pin of the target memory adapter card, and based on the set of excitation patterns, applying a second voltage excitation signal to at least one excitation pin and synchronously collecting the excitation response of at least one non-excitation pin; determining whether there is a first abnormal pin in the excitation response of at least one non-excitation pin that is inconsistent with the preset excitation response; if there is a first abnormal pin, it is determined that there is a short-circuit situation in the target memory adapter card.

[0069] Specifically, first determine at least one excitation pin and at least one excitation pin of the target memory adapter card, and call the generated set of excitation patterns through the BSI control board to apply the second voltage excitation signal to at least one excitation pin group by group, and collect the excitation responses of at least one non-excitation pin and at least one excitation pin in real time; Based on the excitation response of at least one non-excitation pin, detect whether there is a first abnormal pin in at least one non-excitation pin that is inconsistent with the preset excitation response. If there is a first abnormal pin that is inconsistent with the preset excitation response, it is determined that there is a short-circuit situation in the target memory adapter card.

[0070] Specifically, in the embodiment of the present invention, the generated set of excitation patterns is uploaded to the BSI control system. The BSI control board reads the test vectors (i.e., the constituent elements of the set of excitation patterns) one by one. The control board gradually loads the excitation data into the boundary scan registers of the corresponding pins through the boundary scan chain, executes the "SHIFT-DR" and "UPDATE-DR" instructions, applies a second voltage excitation signal to the excitation pins, synchronously starts the sampling device, and collects the TDO response data of the non-excitation pins in each test cycle. The sampling period needs to be synchronized with the BSI excitation period (usually 100 kHz to 5000 kHz). After the data collection is completed, the excitation responses of at least one non-excitation pin and at least one excitation pin are cached.

[0071] Compare the excitation response data of at least one non-excitation pin collected with a preset excitation response. Specifically, check whether there is a high-level or low-level jump in the non-excitation pin or whether there is a non-zero level response in the high-impedance state pin. If at least one first abnormal pin with abnormal response is detected among the non-excitation pins, it indicates that there is a short circuit in the target memory adapter card.

[0072] Through the above technical solution, by calling the generated excitation mode set through the BSI control board, applying excitation signals group by group and collecting the excitation responses of non-excitation pins and excitation pins in real time, the electrical response states of each pin under specific excitation can be accurately obtained. Combining with the detection of abnormal level changes of non-excitation pins, potential short circuit relationships can be quickly identified.

[0073] Optionally, in some embodiments, after the central processing unit is powered off, it includes: obtaining a second abnormal pin among at least one excitation pin; based on a preset physical adjacency matrix, determining whether there is a physical adjacency relationship between the first abnormal pin and the second abnormal pin; if there is a physical adjacency relationship between the first abnormal pin and the second abnormal pin, then mark the first abnormal pin and the second abnormal pin as a short circuit pin pair.

[0074] Specifically, combining the number of the first abnormal pin and the current excitation signal, the second abnormal pin is deduced backwards to obtain a short circuit pin pair, and finally the numbers of the abnormal pins are obtained.

[0075] Specifically, record the excitation pin numbers under the second voltage excitation signal and their excitation responses. If there is a second abnormal pin among the excitation pins whose excitation response is inconsistent with the preset excitation response, then according to the number of the first abnormal pin, combined with the preset physical adjacency matrix, determine whether there is a physical adjacency relationship between the first abnormal pin and the second abnormal pin. If there is a physical adjacency relationship, then determine that the first abnormal pin and the second abnormal pin are a short circuit pin pair, and mark the abnormal pin numbers for the first abnormal pin and the second abnormal pin. 。

[0076] Through the above technical solution, the short circuit pin pair is logically deduced by using the abnormal response pin number and the signal state, the short circuit pin pair is automatically located and the abnormal pin numbers are marked, realizing efficient and automatic short circuit location.

[0077] To enable those skilled in the art to further understand the anti-burning control method of the central processing unit in the embodiments of the present invention, the following will be elaborated in detail with specific embodiments, as Figure 3 shown.

[0078] In step S301, the memory adapter card is detected for pin defects through a pre-trained detection model. If there are no pin defects, a memory adapter card with no appearance defects is obtained.

[0079] In step S302, the insertion and extraction state of the memory adapter card is jointly monitored by a Hall sensor, a micro-displacement sensor, and a contact impedance detector. The insertion and extraction confidence level is calculated based on the joint monitoring result. If the insertion and extraction confidence level of the memory adapter card is less than or equal to a preset threshold, the power-on of the CPU module is prohibited. In step S303, after confirming that the insertion and extraction state is normal, a low-voltage voltage excitation signal is applied to the pins of the memory adapter card, and current acquisition is performed. The equivalent resistance value is calculated based on the measurement data, and the target resistance value is calculated by combining multiple parameters for short-circuit determination.

[0080] In step S303, after confirming that the insertion and extraction state is normal, a low-voltage voltage excitation signal is applied to the pins of the memory adapter card, and current acquisition is performed. The equivalent resistance value is calculated based on the measurement data, and the target resistance value is calculated by combining multiple parameters for short-circuit determination. In step S303, after confirming that the insertion and extraction state is normal, a low-voltage voltage excitation signal is applied to the pins of the memory adapter card, and current acquisition is performed. The equivalent resistance value is calculated based on the measurement data, and the target resistance value is calculated by combining multiple parameters for short-circuit determination.

[0081] In step S304, if the short-circuit detection result is a short-circuit state, the power-on of the CPU module is prohibited.

[0082] In step S305, if the short-circuit detection result is a short-circuit to be confirmed state, an excitation mode set is generated based on the boundary scan description file and the physical adjacency matrix. Whether there is a potential electrical short circuit in the memory adapter card is detected by the boundary scan method based on the excitation mode set. If so, the abnormal pin number is obtained.

[0083] In step S306, if the short-circuit detection result is a normal state and the boundary scan test result is normal, the central processor is allowed to power on.

[0084] In summary, the technical effects brought by the embodiments of the present invention are as follows: (1) The insertion and extraction confidence level is calculated based on the joint monitoring results of the Hall sensor, the micro-displacement sensor, and the contact impedance detector, which can comprehensively quantify the physical position, magnetic field change, and contact quality information, avoiding misjudgment or missed judgment caused by a single sensor. It can comprehensively reflect the authenticity and reliability of the insertion and extraction state. When the insertion and extraction confidence level is lower than the threshold, the power-on is prohibited in time, effectively preventing electrical risks caused by improper insertion or poor contact, improving the safety and intelligence of the test system, and ensuring the operation safety of the CPU module.

[0085] (2) It can dynamically calculate the target resistance value according to the real-time collected environmental temperature, power supply voltage, aging degree of the test fixture, and historical data, thereby dynamically adjusting the short-circuit determination standard, avoiding misjudgment and missed judgment problems caused by a fixed threshold. The short-circuit detection process is more flexible and accurate, can adapt to test fluctuations under different working conditions, effectively improves the detection accuracy and robustness, ensures that potential short-circuit hazards are detected in time, and thus avoids the risk of CPU module burnout.

[0086] (3) If the short - circuit detection result is in a critical state, an excitation pattern set is generated based on the boundary - scan description file and the physical adjacency matrix, and the potential electrical short - circuit of the memory adapter card is further detected through the boundary - scan method. It can accurately locate and re - confirm the suspected short - circuit area under non - destructive test conditions. This not only improves the test coverage and detection accuracy but also effectively avoids resource waste and unnecessary downtime caused by misjudgment, ensuring a thorough troubleshooting of faults before the CPU module is powered on.

[0087] According to the anti - burn - out control method of the central processing unit proposed in the embodiment of the present invention, it is detected whether there are pin defects in the target memory adapter card; if there are no pin defects in the target memory adapter card, at least one monitoring data of the target memory adapter card is obtained, and the insertion and extraction confidence of the target memory adapter card is calculated based on the at least one monitoring data. When the insertion and extraction confidence of the target memory adapter card is greater than a preset threshold, the target resistance and equivalent resistance of each pin of the target memory adapter card are calculated according to the test data of the target memory adapter card; the target memory adapter card is subjected to short - circuit detection according to the target resistance and equivalent resistance of each pin, and the short - circuit detection result of the target memory adapter card is obtained, and the central processing unit is subjected to anti - burn - out control according to the short - circuit detection result. Thereby, the problem that the detection accuracy of the current short - circuit detection technology of the memory adapter card is low, resulting in a large safety hazard when the central processing unit is powered on, is solved, and the detection accuracy is improved, ensuring the safety and reliability of the central processing unit when it is powered on.

[0088] Secondly, the anti - burn - out control method of the central processing unit proposed in the embodiment of the present invention is described with reference to the accompanying drawings.

[0089] Figure 4 It is a schematic diagram of the anti - burn - out control device of the central processing unit according to the embodiment of the present invention.

[0090] As Figure 4 shown, the anti - burn - out control device 10 of the central processing unit includes: a defect detection module 100, a calculation module 200, and a control module 300.

[0091] Among them, the defect detection module 100 is used to detect whether there are pin defects in the target memory adapter card; the calculation module 200 is used to, if there are no pin defects in the target memory adapter card, obtain at least one monitoring data of the target memory adapter card, calculate the insertion and extraction confidence of the target memory adapter card based on the at least one monitoring data, and when the insertion and extraction confidence of the target memory adapter card is greater than a preset threshold, calculate the target resistance and equivalent resistance of each pin of the target memory adapter card according to the test data of the target memory adapter card; the control module 300 is used to perform short - circuit detection on the target memory adapter card according to the target resistance and equivalent resistance of each pin, obtain the short - circuit detection result of the target memory adapter card, and perform anti - burn - out control on the central processing unit according to the short - circuit detection result.

[0092] Optionally, in some embodiments, before detecting whether there are pin defects in the target memory adapter card, the defect detection module 100 is further configured to: collect sample images of pin defects, and obtain training data to be trained after preprocessing the sample images of pin defects; divide the training data to be trained based on a preset ratio to obtain a training set and a test set, and use the training set to train an initial detection model, and use the test set to test the trained detection model to obtain the accuracy of the trained detection model; stop training when the number of training times of the trained detection model reaches a preset number of times and the accuracy is greater than or equal to a preset accuracy, so as to obtain a pre-trained detection model, and use the pre-trained detection model to detect whether there are pin defects in the target memory adapter card.

[0093] Optionally, in some embodiments, after calculating the plugging and unplugging confidence of the target memory adapter card based on at least one monitoring data, the calculation module 200 is further configured to: if the plugging and unplugging confidence of the target memory adapter card is less than or equal to a preset threshold, prohibit the central processing unit from powering on.

[0094] Optionally, in some embodiments, the calculation module 200 is further configured to: apply a first voltage excitation signal to each pin one by one according to the number sequence of each pin, and collect the current of each pin based on the first voltage excitation signal; calculate the equivalent resistance value of each pin by using the first voltage excitation signal and the current of each pin.

[0095] Optionally, in some embodiments, the control module 300 is further configured to: if there is a first pin among all the pins of the target memory adapter card whose equivalent resistance value is less than or equal to the product of the target resistance value and a preset value, the short-circuit detection result is that the target memory adapter card is in a short-circuit state; if there is a second pin among all the pins of the target memory adapter card whose equivalent resistance value is greater than the product and less than the target resistance value, the short-circuit detection result is that the target memory adapter card is in a short-circuit to-be-confirmed state; if the equivalent resistance values of all the pins of the target memory adapter card are greater than or equal to the target resistance value, the short-circuit detection result is that the target memory adapter card is in a normal state.

[0096] Optionally, in some embodiments, the control module 300 is further configured to: if the short-circuit detection result is that the target memory adapter card is in a short-circuit state, prohibit the central processing unit from powering on; if the short-circuit detection result is that the target memory adapter card is in a short-circuit to-be-confirmed state, generate an excitation pattern set based on a preset boundary scan description file and a preset physical adjacency matrix, and use the excitation pattern set to detect whether there is a short-circuit situation in the target memory adapter card, and prohibit the central processing unit from powering on when there is a short-circuit situation in the target memory adapter card; if the short-circuit detection result is that the target memory adapter card is in a normal state and the boundary scan test result of the target memory adapter card is normal, control the central processing unit to power on.

[0097] Optionally, in some embodiments, the control module 300 is further configured to: extract information of each pin of the target memory adapter based on a preset boundary scan description file; construct a preset physical adjacency matrix based on the topological data of each pin; and generate a set of excitation patterns according to the information of each pin and the preset physical adjacency matrix.

[0098] Optionally, in some embodiments, the control module 300 is further configured to: determine at least one excitation pin and at least one non-excitation pin of the target memory adapter, and based on the set of excitation patterns, apply a second voltage excitation signal to the at least one excitation pin and synchronously collect the excitation responses of the at least one non-excitation pin; determine whether there is a first abnormal pin in the excitation responses of the at least one non-excitation pin that is inconsistent with a preset excitation response; and if there is a first abnormal pin, determine that there is a short circuit in the target memory adapter.

[0099] Optionally, in some embodiments, after powering off the central processing unit, the control module 300 is further configured to: obtain a second abnormal pin among the at least one excitation pin; based on the preset physical adjacency matrix, determine whether there is a physical adjacency relationship between the first abnormal pin and the second abnormal pin; and if there is a physical adjacency relationship between the first abnormal pin and the second abnormal pin, mark the first abnormal pin and the second abnormal pin as a short circuit pin pair.

[0100] Optionally, in some embodiments, the plugging confidence is:

[0101] where is the plugging confidence, is the standard displacement, is the displacement sensor reading in the monitoring data, is the Hall reference value, is the Hall sensor reading in the monitoring data, is the impedance qualification threshold, is the measured contact impedance value in the monitoring data, is the plugging weight, is the displacement weight, is the impedance weight.

[0102] Optionally, in some embodiments, the calculation module 200 is further configured to: calculate a target resistance value based on test data by using a preset resistance value calculation formula, where the preset resistance value calculation formula is:

[0103] where is the target resistance value, is the initial resistance threshold, is the pin temperature change value, is the voltage change value, is the number of times the test fixture is used, is the fixture aging coefficient, is the temperature weight, is the voltage weight, is the number of times weight, is the aging weight.

[0104] It should be noted that for the description of the features in the corresponding embodiments of the anti-burning control device of the central processing unit, reference can be made to the relevant descriptions of the corresponding embodiments of the anti-burning control method of the central processing unit above, which will not be elaborated here one by one.

[0105] Figure 5 This is a schematic structural diagram of the electronic device provided by the embodiment of the present invention. The electronic device may include: A memory 501, a processor 502, and a computer program stored on the memory 501 and executable on the processor 502.

[0106] When the processor 502 executes the program, it implements the anti-burning control method of the central processing unit provided in the above embodiment.

[0107] Furthermore, the electronic device further includes: A communication interface 503 for communication between the memory 501 and the processor 502.

[0108] The memory 501 is used to store a computer program executable on the processor 502.

[0109] The memory 501 may include a high-speed RAM memory and may also include non-volatile memory, such as at least one disk memory.

[0110] If the memory 501, the processor 502, and the communication interface 503 are implemented independently, the communication interface 503, the memory 501, and the processor 502 can be interconnected through a bus and communicate with each other. The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. For the sake of representation, Figure 5 only a thick line is shown in [FIGURE], but it does not mean that there is only one bus or one type of bus.

[0111] Optionally, in a specific implementation, if the memory 501, the processor 502, and the communication interface 503 are integrated on a single chip, the memory 501, the processor 502, and the communication interface 503 can communicate with each other through an internal interface.

[0112] The processor 502 may be a central processing unit (CPU for short), or an application specific integrated circuit (ASIC for short), or one or more integrated circuits configured to implement the embodiments of the present invention.

[0113] The embodiments of the present invention also provide a computer-readable storage medium, in which a computer program is stored, and the computer program is configured to execute the steps in any of the above embodiments of the anti-burning control method for the central processing unit when running.

[0114] In an exemplary embodiment, the above computer-readable storage medium may include, but is not limited to: USB flash drives, read-only memories (ROM for short), random access memories (RAM for short), mobile hard disks, magnetic disks, or optical discs and other media that can store computer programs.

[0115] The embodiments of the present invention also provide a computer program product, including a computer program, and the computer program implements the above anti-burning control method for the central processing unit when executed by a processor.

[0116] Those skilled in the art can further realize that the units and algorithm steps of each example described in combination with the embodiments disclosed in this article can be implemented by electronic hardware, computer software, or a combination of the two. To clearly illustrate the interchangeability of hardware and software, the components and steps of each example have been generally described according to their functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods for each specific application to implement the described functions, but such implementation should not be considered to exceed the scope of the present invention.

[0117] The above has introduced in detail a method, device, equipment, medium and product for preventing burnout of a central processing unit provided by the present invention. Specific examples are used in this article to elaborate on the principle and implementation manner of the present invention. The description of the above embodiments is only used to help understand the method and its core idea of the present invention. It should be noted that for those of ordinary skill in the art of this technology, without departing from the principle of the present invention, several improvements and modifications can still be made to the present invention, and these improvements and modifications also fall within the protection scope of the claims of the present invention.

Claims

1. A method for preventing a central processing unit from burning out, characterized in that: The following steps are involved: Check whether the target memory riser card has pin defects; If the target memory adapter card does not have the pin defect, obtaining at least one monitoring data of the target memory adapter card, and calculating the plug-in confidence of the target memory adapter card based on the at least one monitoring data, and when the plug-in confidence of the target memory adapter card is greater than a preset threshold, calculating the target resistance value and equivalent resistance value of each pin of the target memory adapter card according to the test data of the target memory adapter card; The target memory adapter card is short-circuited according to the target resistance and equivalent resistance of each pin to obtain a short-circuit detection result of the target memory adapter card, and a central processing unit is protected from burnout according to the short-circuit detection result.

2. The CPU burn-out prevention control method according to claim 1, characterized in that: Before detecting whether the target memory riser card has a pin defect, the method includes: Collecting pin defect sample images, and preprocessing the pin defect sample images to obtain data to be trained; Dividing the data to be trained based on a preset ratio to obtain a training set and a test set, and using the training set to train the initial detection model, and using the test set to test the trained detection model to obtain the accuracy of the trained detection model; When the training times of the trained detection model reaches a preset number of times and the accuracy is greater than or equal to the preset accuracy, the training is stopped to obtain a pre-trained detection model, so as to use the pre-trained detection model to detect whether there is a pin defect in the target memory adapter card.

3. The CPU burn-out prevention control method according to claim 1, characterized in that: After calculating the plugging confidence of the target memory adapter card based on the at least one monitoring data, the method further comprises: If the plugging confidence of the target memory adapter card is less than or equal to the preset threshold, the central processing unit is prohibited from powering on.

4. The CPU burn-out prevention control method according to claim 1, characterized in that: The step of calculating the target resistance value and the equivalent resistance value of each pin of the target memory adapter card according to the test data of the target memory adapter card comprises: According to the numbering sequence of each pin, a first voltage excitation signal is applied to each pin one by one, and the current of each pin is collected based on the first voltage excitation signal; The equivalent resistance of each pin is calculated using the first voltage excitation signal and the current of each pin.

5. The CPU burn-out prevention control method according to claim 1, characterized in that: The short circuit detection is performed on the target memory adapter card according to the target resistance value and the equivalent resistance value of each pin to obtain the short circuit detection result, including: If there is a first pin among all the pins of the target memory adapter card whose equivalent resistance is less than or equal to the product of the target resistance and the preset value, the short-circuit detection result is that the target memory adapter card is in a short-circuit state; If there is a second pin among all the pins of the target memory adapter card whose equivalent resistance is greater than the multiplication result and less than the target resistance, the short circuit detection result is that the target memory adapter card is in a short circuit pending confirmation state; If the equivalent resistance values ​​of all pins of the target memory adapter card are greater than or equal to the target resistance value, the short circuit detection result indicates that the target memory adapter card is in a normal state.

6. The CPU burn-out prevention control method according to claim 5, characterized in that: The method of controlling the central processing unit against burnout according to the short circuit detection result includes: If the short-circuit detection result is that the target memory adapter card is in a short-circuit state, prohibiting the central processing unit from being powered on; If the short-circuit detection result is that the target memory adapter card is in a short-circuit pending confirmation state, an excitation pattern set is generated based on a preset boundary scan description file and a preset physical adjacency matrix, and the excitation pattern set is used to detect whether the target memory adapter card has a short-circuit condition, and the central processing unit is prohibited from powering on when the target memory adapter card has a short-circuit condition; If the short circuit detection result shows that the target memory adapter card is in a normal state, and the boundary scan test result of the target memory adapter card is normal, the central processing unit is controlled to be powered on.

7. The CPU burn-out prevention control method according to claim 6, characterized in that: The generating of the excitation pattern set based on the preset boundary scan description file and the preset physical adjacency matrix includes: Extracting information of each pin of the target memory adapter card based on the preset boundary scan description file; Based on the topological data of each pin, construct the preset physical adjacency matrix; The excitation pattern set is generated according to the information of each pin and the preset physical adjacency matrix.

8. The CPU burn-out prevention control method according to claim 6, characterized in that: The detecting whether the target memory adapter card has a short circuit based on the set of excitation modes includes: Determine at least one excitation pin and at least one non-excitation pin of the target memory adapter card, and based on the excitation mode set, apply a second voltage excitation signal to the at least one excitation pin, and synchronously collect an excitation response of the at least one non-excitation pin; Determine whether there is a first abnormal pin in the excitation response of the at least one non-excitation pin that is inconsistent with a preset excitation response; If the first abnormal pin exists, it is determined that the target memory adapter card has the short circuit condition.

9. The CPU burn-out prevention control method according to claim 8, characterized in that: After the central processor is prohibited from being powered on, the method further comprises: Acquire a second abnormal pin among the at least one excitation pin; Based on the preset physical adjacency matrix, determining whether there is a physical adjacency relationship between the first abnormal pin and the second abnormal pin; If the first abnormal pin and the second abnormal pin are physically adjacent to each other, the first abnormal pin and the second abnormal pin are marked as a short-circuited pin pair.

10. The CPU burn-out prevention control method according to claim 1, characterized in that: The plug-in confidence is: in, is the plug-in confidence, is the standard displacement, To monitor the displacement sensor readings in the data, is the Hall reference value, To monitor the Hall sensor readings in the data, is the impedance qualification threshold, is the measured value of contact impedance in the monitoring data, is the plug-in weight, is the displacement weight, is the impedance weight.

11. The CPU burn-out prevention control method according to claim 1, characterized in that: The step of calculating the target resistance value and the equivalent resistance value of each pin of the target memory adapter card according to the test data of the target memory adapter card further includes: Based on the test data, the target resistance is calculated using the preset resistance calculation formula, wherein the preset resistance calculation formula is: in, is the target resistance, is the initial resistance threshold, is the pin temperature change value, is the voltage change value, is the number of times the test fixture is used. is the fixture aging coefficient, is the temperature weight, is the voltage weight, is the frequency weight, is the aging weight.

12. A central processing unit anti-burning control device, characterized in that: include: A defect detection module, used to detect whether a target memory adapter card has a pin defect; a calculation module, configured to obtain at least one monitoring data of the target memory adapter card if the target memory adapter card does not have the pin defect, calculate the plugging confidence of the target memory adapter card based on the at least one monitoring data, and calculate the target resistance and equivalent resistance of each pin of the target memory adapter card according to the test data of the target memory adapter card when the plugging confidence of the target memory adapter card is greater than a preset threshold; The control module is used to perform short-circuit detection on the target memory adapter card according to the target resistance value and equivalent resistance value of each pin, obtain the short-circuit detection result of the target memory adapter card, and perform anti-burning control on the central processing unit according to the short-circuit detection result.

13. An electronic device, characterized in that: It comprises a memory, a processor and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the central processing unit anti-burning control method as claimed in any one of claims 1 to 11.

14. A computer-readable storage medium having a computer program stored thereon, characterized in that: The program is executed by a processor to implement the central processing unit anti-burning control method as described in any one of claims 1-11.

15. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the method for preventing burnout of a central processing unit as claimed in any one of claims 1 to 11 is implemented.

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