Central processing unit burn-out prevention control method, device, equipment, medium and product

Abstract

The present invention discloses a method, device, equipment, medium and product for preventing burnout of a central processing unit (CPU), which relates to the field of short-circuit detection technology. The method comprises: if a target memory adapter card does not have a pin defect, obtaining at least one monitoring data of the target memory adapter card, and calculating the plug-in confidence of the target memory adapter card; when the plug-in confidence of the target memory adapter card is greater than a preset threshold, calculating the target resistance and equivalent resistance of each pin of the target memory adapter card based on the test data of the target memory adapter card; performing short-circuit detection on the target memory adapter card based on the target resistance and equivalent resistance of each pin, obtaining a short-circuit detection result of the target memory adapter card, and performing burnout prevention control on the CPU based on the short-circuit detection result. The method solves the problem that the current short-circuit detection technology of the memory adapter card has low detection accuracy, resulting in a large safety hazard when the CPU is powered on, improves detection accuracy, and ensures the safety of the CPU being powered on.

Description

Technical Field

[0001] The present invention relates to the technical field of short circuit detection, and in particular to a method, device, equipment, medium and product for preventing burnout of a central processing unit. Background Art

[0002] As the core storage component of a computer system, memory sticks are usually directly connected to the motherboard via memory slots. However, in specific testing, verification, and special adaptation scenarios, the physical connection between the memory stick and the motherboard interface needs to be completed with the help of a memory adapter card. The memory adapter card introduces a multi-level plug-in connection method in its structural design, and its pin layout is extremely complex and dense. Once an electrical short circuit or poor contact occurs, when the central processing unit (CPU) module is powered on, it is very likely to cause serious hardware failures such as CPU burnout, resulting in huge economic losses. Therefore, it is of great significance to conduct reliable electrical short circuit detection on the memory adapter card before it is put into use.

[0003] However, the short-circuit detection technology currently used has many shortcomings. Some detection processes still rely on manual visual inspection, and the accuracy of this detection method is easily affected by the experience level and fatigue of the inspectors. Not only is the detection efficiency low, but it is also very easy to miss detections. In addition, some designs use dedicated short-circuit test cards, but when conditions such as the test environment, test fixtures, or the degree of wear caused by frequent plugging and unplugging change significantly, these test cards are often difficult to adapt to different situations and lack sufficient universality. They have difficulty dynamically adjusting the detection threshold according to actual conditions, and cannot automatically identify subtle electrical anomalies. This leads to incomplete detection coverage and poses a major safety hazard.

[0004] In view of the above problems, there is an urgent need for an efficient, intelligent and adaptable memory adapter card short circuit detection technology to ensure the safety and reliability of the CPU module power-on process. Summary of the Invention

[0005] The present invention provides a method, device, equipment, medium and product for preventing burnout of a central processing unit, so as to at least solve the problem that the current short-circuit detection technology of a memory adapter card has low detection accuracy, resulting in a large safety hazard when the central processing unit is powered on.

[0006] The present invention provides a method for preventing burnout of a central processing unit, comprising the following steps: detecting whether a target memory adapter card has a pin defect; if the target memory adapter card does not have the pin defect, obtaining at least one monitoring data of the target memory adapter card, and calculating the plugging and unplugging confidence of the target memory adapter card based on the at least one monitoring data; and when the plugging and unplugging confidence of the target memory adapter card is greater than a preset threshold, calculating the target resistance and equivalent resistance of each pin of the target memory adapter card according to the test data of the target memory adapter card; performing short-circuit detection on the target memory adapter card according to the target resistance and equivalent resistance of each pin, obtaining a short-circuit detection result of the target memory adapter card, and performing burnout prevention control on the central processing unit according to the short-circuit detection result.

[0007] The present invention also provides a central processing unit (CPU) anti-burn control device, comprising: a defect detection module for detecting whether a target memory adapter card has a pin defect; a calculation module for obtaining at least one monitoring data of the target memory adapter card if the target memory adapter card does not have the pin defect, and calculating the plugging and unplugging confidence of the target memory adapter card based on the at least one monitoring data, and when the plugging and unplugging confidence of the target memory adapter card is greater than a preset threshold, calculating the target resistance and equivalent resistance of each pin of the target memory adapter card according to the test data of the target memory adapter card; a control module for performing short-circuit detection on the target memory adapter card according to the target resistance and equivalent resistance of each pin, obtaining a short-circuit detection result of the target memory adapter card, and performing anti-burn control on the CPU according to the short-circuit detection result.

[0008] The present invention also provides an electronic device, comprising: a memory for storing a computer program; and a processor for implementing the steps of the above-mentioned central processing unit anti-burning control method when executing the computer program.

[0009] The present invention also provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the steps of the above-mentioned central processing unit anti-burning control method are implemented.

[0010] The present invention also provides a computer program product, comprising a computer program, wherein when the computer program is executed by a processor, the computer program implements the aforementioned central processing unit anti-burning control method.

[0011] Through the present invention, it is detected whether the target memory adapter card has a pin defect; if the target memory adapter card does not have a pin defect, at least one monitoring data of the target memory adapter card is obtained, and the plug-in confidence of the target memory adapter card is calculated based on the at least one monitoring data, and when the plug-in confidence of the target memory adapter card is greater than a preset threshold, the target resistance value and equivalent resistance value of each pin of the target memory adapter card are calculated according to the test data of the target memory adapter card; the target memory adapter card is short-circuited according to the target resistance value and equivalent resistance value of each pin, and the short-circuit detection result of the target memory adapter card is obtained, and the central processing unit is controlled to prevent burnout according to the short-circuit detection result. In this way, the problem that the current short-circuit detection technology of the memory adapter card has low detection accuracy, resulting in a large safety hazard when the central processing unit is powered on, is solved, the detection accuracy is improved, and the safety and reliability of the central processing unit powering on is guaranteed. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order to more clearly illustrate the embodiments of the present invention, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0013] Figure 1 This is a flow chart of a method for preventing burnout of a central processing unit according to an embodiment of the present invention;

[0014] Figure 2 A schematic structural diagram of a detection device for preventing CPU burnout according to an embodiment of the present invention;

[0015] Figure 3 A flowchart of a method for preventing burnout of a central processing unit according to an embodiment of the present invention;

[0016] Figure 4 Schematic diagram of a CPU anti-burning control device according to an embodiment of the present invention;

[0017] Figure 5 FIG. 1 is a schematic diagram of the structure of an electronic device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0018] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts shall fall within the scope of protection of the present invention.

[0019] It should be noted that, in the description of the present invention, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. The terms "first," "second," etc., in the present invention are used to distinguish similar objects, and are not used to describe a particular order or precedence.

[0020] Before specifically introducing the embodiments of the present invention, the present invention briefly introduces the following technical problems existing in the current short-circuit detection technology for memory riser cards:

[0021] Problems with relying on manual visual inspection:

[0022] (1) Detection accuracy is affected by human factors: Manual visual inspection is highly dependent on the experience of the inspectors. People with different experience levels have different judgment criteria for short circuit problems, which may lead to misjudgment or omission of some subtle short circuit hazards.

[0023] (2) Susceptible to fatigue factors: Long-term visual inspection will make the inspectors tired, making it difficult to maintain a high level of concentration, thus reducing the accuracy of the inspection.

[0024] (3) Low detection efficiency: Manual inspection requires observing and judging the electrical connection points of the memory adapter card one by one. The process is cumbersome and time-consuming, and cannot meet the needs of large-scale production or rapid detection, resulting in low overall detection efficiency and increased production cycle and cost.

[0025] Problems with the dedicated short circuit test card:

[0026] (1) Lack of universality: Dedicated short circuit test cards are usually designed for specific test environments, test fixtures, and plug-in wear conditions. When these conditions change, the test card may not work properly or accurately detect short circuit problems.

[0027] Difficulty in dynamically adjusting the threshold: During the test process, electrical parameters may change due to a variety of factors. Dedicated short-circuit test cards are often unable to dynamically adjust the detection threshold according to the actual test situation to adapt to these changes.

[0028] Inability to automatically identify subtle electrical anomalies: Short circuits on memory adapter cards can manifest as subtle electrical anomalies, such as slight current leakage or voltage fluctuations. Dedicated short-circuit test cards may lack sufficient sensitivity and intelligent recognition capabilities to automatically identify these subtle anomalies. This results in insufficient detection coverage and a failure to fully identify potential short-circuit hazards, increasing the risk of CPU module failure after power-on.

[0029] In order to solve the above problems, the embodiment of the present invention provides a method for preventing burnout of a central processing unit. Figure 1 shown.

[0030] Before specifically introducing the CPU anti-burning control method, it is necessary to introduce the modules involved in the embodiment of the present invention, including a defect detection module, a plug-in detection module and a short circuit detection module. Figure 2 shown.

[0031] The defect detection module integrates an industrial visual inspection model. It uses a pre-trained industrial visual inspection model to detect pin defects on memory riser cards and select memory riser cards with no defects.

[0032] The plug-in detection module integrates a Hall sensor, a micro-displacement sensor, and a contact impedance detector. It is used to jointly monitor the plug-in status of the memory adapter card through the Hall sensor, micro-displacement sensor, and contact impedance detector. The plug-in confidence level of the memory adapter card is calculated based on the joint monitoring results. If the confidence level of the memory adapter card is lower than the confidence threshold, the CPU module is prohibited from powering on.

[0033] The short-circuit detection module is used to perform low-voltage voltage excitation and current acquisition on the pins of the memory adapter card after confirming that the plug-in and unplugging status is normal, calculate the equivalent resistance value based on the measurement data, and perform short-circuit judgment based on the adaptive resistance value obtained by combining multi-parameter calculation.

[0034] Specifically, the CPU burn-out prevention control method includes the following steps:

[0035] Step S101: detecting whether a target memory adapter card has a pin defect.

[0036] Specifically, an embodiment of the present invention performs pin defect detection on a target memory adapter card through a pre-trained detection model to determine whether the target memory adapter card has a memory adapter card with appearance defects, wherein the pre-trained detection model is the pre-trained industrial vision inspection model mentioned above.

[0037] Optionally, in some embodiments, before detecting whether a target memory adapter card has a pin defect, the method includes: collecting pin defect sample images, and pre-processing the pin defect sample images to obtain data to be trained; dividing the data to be trained to obtain a training set and a test set based on a preset ratio, and using the training set to train an initial detection model, and using the test set to test the trained detection model to obtain the accuracy of the trained detection model; stopping the training when the number of training times of the trained detection model reaches a preset number and the accuracy is greater than or equal to the preset accuracy, and obtaining a pre-trained detection model, so as to use the pre-trained detection model to detect whether a pin defect exists in the target memory adapter card.

[0038] Among them, the preset ratio, preset number of times, and preset accuracy can be thresholds set in advance by the user, can be thresholds obtained through a limited number of experiments, or can be thresholds obtained through a limited number of computer simulations, and are not specifically limited here.

[0039] It is important to understand that the model training steps for the pre-trained detection model are as follows:

[0040] Collect and label pin defect sample images and preprocess the pin defect sample images to obtain a defect data set, i.e., data to be trained;

[0041] The data to be trained is divided into a training set and a test set according to a preset ratio, and the training set is used to train the initial detection model, and the test set is used to test the trained detection model;

[0042] When the number of training times of the trained detection model reaches the preset number and the accuracy reaches the preset accuracy, the training is stopped to obtain the pre-trained detection model.

[0043] Specifically, an embodiment of the present invention uses a high-resolution industrial camera to collect a large number of memory adapter card samples to obtain pin defect sample images, and manually annotates pin defect features such as missing pins, crooked pins, wear and tear, and abnormal incoming materials. After expanding the data set through an image enhancement algorithm (such as rotation, cropping, and brightness change), it is input into the initial detection model (the initial detection model in the embodiment of the present invention uses the YOLOv8 model), and the preset number of times is set to 500 times, and the preset accuracy rate is 98%. When the training number of the trained detection model reaches 500 times and the accuracy rate is ≥98%, the training is stopped and the model is solidified to obtain a pre-trained detection model.

[0044] Through the above technical solution, a pre-trained detection model is used to perform defect detection on the target memory adapter card pins. Memory adapter cards with appearance defects such as bending, defects, and contamination can be quickly and accurately screened out before power-on testing, avoiding the risks of omissions caused by human visual inspection, thereby improving the degree of automation of the test process, reducing the risk of short circuits caused by physical defects, and effectively ensuring the safety of the CPU module in subsequent testing links.

[0045] In step S102, if the target memory adapter card does not have a pin defect, at least one monitoring data of the target memory adapter card is obtained, and the plugging confidence of the target memory adapter card is calculated based on the at least one monitoring data. When the plugging confidence of the target memory adapter card is greater than a preset threshold, the target resistance value and equivalent resistance value of each pin of the target memory adapter card are calculated according to the test data of the target memory adapter card.

[0046] In some embodiments, the plugging confidence level is:

[0047] ; (1)

[0048] in, is the plug-in confidence level, is the standard displacement, To monitor the displacement sensor readings in the data, is the Hall reference value, To monitor the Hall sensor readings in the data, is the impedance qualification threshold, is the measured value of contact impedance in the monitoring data, is the plug-in weight, is the displacement weight, is the impedance weight.

[0049] The preset threshold may be a threshold set in advance by a user, a threshold obtained through a limited number of experiments, or a threshold obtained through a limited number of computer simulations, and is not specifically limited here.

[0050] Specifically, the embodiment of the present invention jointly monitors the plugging and unplugging status of the target memory adapter card through a Hall sensor, a micro-displacement sensor, and a contact impedance detector, and obtains data of the target memory adapter card monitored by the Hall sensor, data of the target memory adapter card monitored by the micro-displacement sensor, and data of the target memory adapter card monitored by the contact impedance detector, thereby calculating the plugging and unplugging confidence of the target memory adapter card through formula (1).

[0051] Only when the plugging confidence of the target memory riser card is greater than a preset threshold value can the target resistance value and the equivalent resistance value of each pin of the target memory riser card be calculated according to the test data of the target memory riser card.

[0052] Through the above technical solution, the plug-in and unplugging status of the memory adapter card is jointly monitored by the Hall sensor, micro-displacement sensor and contact impedance detector, which can achieve a comprehensive evaluation of the plug-in reliability from three dimensions: magnetic field change, tiny displacement and electrical contact quality, effectively avoiding the risks brought by the misjudgment of a single sensor. By calculating the plug-in confidence level obtained by fusing multiple monitoring data, it can intelligently determine whether the plug-in and unplugging status of the target memory adapter card meets the standards.

[0053] Optionally, in some embodiments, after calculating the plugging confidence of the target memory riser card based on at least one monitoring data, the method further includes: if the plugging confidence of the target memory riser card is less than or equal to a preset threshold, prohibiting the central processing unit from powering on.

[0054] The memory riser card is a key component connecting the CPU and memory. Its insertion and removal status directly affects the system's hardware compatibility and stability. Low insertion and removal confidence may indicate that the riser card is improperly installed or has poor contact. These issues can prevent the CPU from accessing memory properly, leading to system crashes or hardware damage. Allowing the CPU to power on in this situation may exacerbate the problem and even cause more serious hardware damage.

[0055] Therefore, if the insertion and removal confidence of the target memory riser card is less than or equal to the preset threshold, the CPU is prohibited from powering on.

[0056] Through the above technical solution, when the insertion and removal confidence of the memory adapter card is less than or equal to the preset threshold, power-on is promptly blocked, significantly improving the accuracy and safety of detection, and avoiding short-circuit failures and CPU burnout caused by improper insertion or poor contact.

[0057] Furthermore, in some embodiments, the target resistance and equivalent resistance of each pin of the target memory adapter card are calculated based on the test data of the target memory adapter card, including: applying a first voltage excitation signal to each pin one by one according to the numbering order of each pin, and collecting the current of each pin based on the first voltage excitation signal; and calculating the equivalent resistance of each pin using the first voltage excitation signal and the current of each pin.

[0058] It can be understood that when the plug-in and unplugging confidence of the memory adapter card is greater than a preset threshold, it is determined that the plug-in and unplugging status of the target memory adapter card is normal, and a low-voltage voltage excitation signal (i.e., a first voltage excitation signal) is applied to the pin of the target memory adapter card, and the current of each pin is collected. The equivalent resistance of each pin is calculated based on the collected voltage and current measurement data, and a short circuit judgment is made in combination with the target resistance value.

[0059] Among them, the calculation process of equivalent resistance is:

[0060] Select a low-voltage constant excitation signal and apply low-voltage excitation to each pin one by one in the order of pin number. While applying low-voltage excitation, ensure that other pins remain in a high-resistance state, and obtain the current flowing through the pin through the current acquisition chip. According to Ohm's law, calculate the equivalent resistance of each pin in real time.

[0061] The specific operation process is as follows: select a low-voltage constant excitation signal with a voltage range of 0.1V~0.5V to ensure that the test process will not damage the device or trigger abnormal current. Apply low-voltage excitation to each pin one by one in the order of pin number, while ensuring that other pins remain in a high-resistance state; use a high-precision current acquisition chip to collect the current flowing through the pins, with a collection resolution preferably at the 10μA level, and calculate the equivalent resistance value in real time according to Ohm's law:

[0062] ; (2)

[0063] in, Indicates the equivalent resistance value, represents the excitation voltage, Indicates the test line loss correction value, Indicates the collected current. It should be noted that the test circuit itself has resistance, inductance and contact resistance, which leads to a certain difference between the voltage applied to the tested pin and the theoretical voltage. Therefore, it is necessary to introduce To reduce calculation errors.

[0064] This technical solution, using a low-voltage constant excitation signal to apply voltage to each pin and combining it with a high-precision current acquisition chip for real-time current detection, accurately measures the equivalent resistance of each pin without damaging the device. Meanwhile, other pins remain in a high-resistance state to avoid signal interference, ensuring the purity and accuracy of the measurement results. This real-time calculation of the equivalent resistance value can promptly detect potential short circuits or low-resistance anomalies, providing early warnings and significantly improving safety and reliability during the testing phase. It can also prevent CPU module burnout after power-on due to hidden faults.

[0065] Furthermore, in some embodiments, calculating the target resistance and equivalent resistance of each pin of the target memory riser card based on the test data of the target memory riser card further includes: calculating the target resistance using a preset resistance calculation formula based on the test data, wherein the preset resistance calculation formula is:

[0066] ; (3)

[0067] in, is the target resistance, is the initial resistance threshold, is the pin temperature change value, is the voltage change value, The number of times the test fixture is used, is the fixture aging coefficient, is the temperature weight, is the voltage weight, is the frequency weight, is the aging weight.

[0068] The steps to obtain the target resistance are:

[0069] Set the initial resistance threshold based on the design specifications and historical test data of the target memory riser card;

[0070] Obtain the pin temperature change, voltage change, and test fixture usage count of the target memory adapter in real time, and calculate the fixture aging coefficient. The fixture aging coefficient calculation method is:

[0071] ; (4)

[0072] in, Indicates the current service life. Indicates the maximum service life. Represents the loss factor.

[0073] The target resistance of each pin is calculated based on the initial resistance threshold obtained above, the temperature change of each pin of the target memory adapter card, the voltage change, the number of times the test fixture is used, and the fixture aging coefficient.

[0074] Specifically, the initial resistance threshold designed in the embodiment of the present invention is preferably 7.5Ω, and the temperature change of the pin before and after the low voltage excitation is collected , Voltage changes before and after low voltage excitation , the number of times the test fixture is used, the fixture aging coefficient Calculate the target resistance value for each pin.

[0075] The above technical solution uses an initial resistance threshold as a baseline and dynamically adjusts the target resistance based on real-time data such as pin temperature changes, power supply voltage fluctuations, and the number of test fixture uses and aging coefficients. This allows for intelligent correction of short-circuit detection criteria based on changes in the test environment and device status. This effectively avoids misjudgments or missed detections caused by a single, fixed threshold, improves the sensitivity and accuracy of short-circuit detection, and adapts to testing requirements at different stages and under complex conditions, further ensuring CPU module safety and test reliability before power-on.

[0076] Optionally, in some embodiments, a short circuit detection is performed on the target memory adapter card based on the target resistance and equivalent resistance of each pin to obtain a short circuit detection result, including: if there is a first pin among all the pins of the target memory adapter card whose equivalent resistance is less than or equal to the multiplication result of the target resistance and the preset value, then the short circuit detection result is that the target memory adapter card is in a short circuit state; if there is a second pin among all the pins of the target memory adapter card whose equivalent resistance is greater than the multiplication result and less than the target resistance, then the short circuit detection result is that the target memory adapter card is in a short circuit pending confirmation state; if the equivalent resistance of all the pins of the target memory adapter card is greater than or equal to the target resistance, then the short circuit detection result is that the target memory adapter card is in a normal state.

[0077] The preset value may be a threshold value pre-set by the user, a threshold value obtained through a limited number of experiments, or a threshold value obtained through a limited number of computer simulations. Preferably, in the embodiment of the present invention, the preset value is 0.8.

[0078] Specifically, the embodiment of the present invention compares the target resistance value and the equivalent resistance value of each pin.

[0079] If there is a first pin among all the pins of the target memory riser card whose equivalent resistance is less than or equal to the product of the target resistance and 0.8, then it is determined that the target memory riser card is in a short-circuit state;

[0080] If there is a second pin among all the pins of the target memory riser card whose equivalent resistance is greater than the product of the target resistance and 0.8 and less than the target resistance, it is determined that the target memory riser card is in a short circuit pending confirmation state, and it is necessary to further determine whether the target memory riser card is in a short circuit state;

[0081] If the equivalent resistance values of all pins of the target memory riser card are greater than or equal to the target resistance value, it is determined that the target memory riser card is in a normal state.

[0082] Through the above technical solution, by comparing the target resistance value and the equivalent resistance value of each pin, it is determined whether the memory adapter card is in a short-circuit state, thereby ensuring the safety and test reliability of the CPU module before power-on.

[0083] Step S103 , performing short circuit detection on the target memory riser card according to the target resistance value and equivalent resistance value of each pin, obtaining a short circuit detection result of the target memory riser card, and performing burnout prevention control on the central processing unit according to the short circuit detection result.

[0084] Optionally, in some embodiments, the central processing unit is controlled to prevent burnout based on the short-circuit detection result, including: if the short-circuit detection result is that the target memory adapter card is in a short-circuit state, the central processing unit is prohibited from powering on; if the short-circuit detection result is that the target memory adapter card is in a short-circuit pending confirmation state, an excitation pattern set is generated based on a preset boundary scan description file and a preset physical adjacency matrix, and the excitation pattern set is used to detect whether there is a short-circuit condition in the target memory adapter card, and the central processing unit is prohibited from powering on when there is a short-circuit condition in the target memory adapter card; if the short-circuit detection result is that the target memory adapter card is in a normal state, and the boundary scan test result of the target memory adapter card is normal, the central processing unit is controlled to power on.

[0085] It should be noted that the short circuit pending confirmation state can be understood as the target memory adapter card cannot directly determine whether it is in a short circuit state and needs further confirmation.

[0086] It should be understood that if the short-circuit detection result shows that the target memory adapter card is in a short-circuit state, the central processing unit is prohibited from powering on; if the short-circuit detection result shows that the target memory adapter card is in a short-circuit pending confirmation state, an excitation pattern set is generated based on the preset boundary scan description file and the preset physical adjacency matrix, and based on the excitation pattern set, the boundary scan test BSI (Boundary Scan Inspection) is used to further detect whether there is a short circuit in the target memory adapter card. If a short circuit exists, the abnormal pin number is obtained and the central processing unit is prohibited from powering on; if the short-circuit detection result shows that the target memory adapter card is in a normal state, and the boundary scan test result of the target memory adapter card after passing the boundary scan test is normal, it is determined that the central processing unit can be powered on.

[0087] Through the above technical solution, short-circuit detection technology is used to quickly identify obvious short-circuit faults, and the CPU is directly prohibited from powering on to avoid potential hardware damage. For short-circuit states to be confirmed, boundary scan technology is used for accurate detection to avoid blind replacement or repair, improve efficiency, and reduce the risk of misjudgment. Boundary scan technology can automatically generate a set of excitation patterns through preset boundary scan description files and physical adjacency matrices to achieve automated detection and reduce manual intervention. As long as a short-circuit risk is detected, the CPU is prohibited from powering on to avoid CPU burnout due to short circuit.

[0088] Optionally, in some embodiments, an excitation pattern set is generated based on a preset boundary scan description file and a preset physical adjacency matrix, including: extracting information of each pin of the target memory adapter card based on the preset boundary scan description file; constructing a preset physical adjacency matrix based on the topological data of each pin; and generating an excitation pattern set based on the information of each pin and the preset physical adjacency matrix.

[0089] Specifically, an embodiment of the present invention parses the BSDL file (Boundary Scan Description Language) corresponding to the target memory adapter card to extract the status information of each pin in the target memory adapter card, constructs a preset physical adjacency matrix between the pins based on the pre-defined topology data of each pin of the target memory adapter card, and generates an excitation pattern set based on the status information of each pin and the preset physical adjacency matrix.

[0090] Specifically, the BSDL file corresponding to the target memory adapter is parsed to extract information such as pin number, pin boundary scan type, control register mapping relationship, and supported drive status.

[0091] Further, based on the pre-defined topological data, all physically adjacent or possibly short-circuited pin pairs are identified, and an N×N adjacency matrix is established. If pin i and pin j are physically adjacent, M(i, j) = 1, otherwise M(i, j) = 0; based on the pin status information, the excitation states are defined (for example, output pins can be excited to H / L; input and Z state pins are not used as excitation ports, only for response observation). For each physically adjacent pair (i, j), the i pin can be set to be excited to a high level and the j pin can be observed, or the i pin can be set to be excited to a low level and the j pin can be observed. These two combinations constitute a test mode, and all pin pairs are processed cyclically to generate a complete set of excitation modes.

[0092] The above technical solution extracts pin status information by parsing the BSDL file corresponding to the target memory adapter and constructing a pin-to-pin adjacency matrix based on predefined topological data. This allows for a clear understanding of the physical connection relationships between the pins. Based on this, a systematic set of stimulus patterns is generated to ensure that test stimulus covers all high-risk adjacency paths. This method avoids human omissions and enables targeted, in-depth detection of potential short-circuit locations, improving test coverage and fault location accuracy. This effectively enhances the comprehensiveness and accuracy of short-circuit detection and ensures electrical safety before the CPU module is powered on.

[0093] Optionally, in some embodiments, detecting whether a short circuit exists in the target memory adapter card is based on an excitation pattern set, including: determining at least one excitation pin and at least one non-excitation pin of the target memory adapter card, and based on the excitation pattern set, applying a second voltage excitation signal to at least one excitation pin, and synchronously collecting the excitation response of at least one non-excitation pin; judging whether there is a first abnormal pin in the excitation response of at least one non-excitation pin that is inconsistent with a preset excitation response; if there is a first abnormal pin, determining that a short circuit exists in the target memory adapter card.

[0094] Specifically, at least one excitation pin and at least one excitation pin of the target memory riser card are first determined, and a generated excitation pattern set is called by the BSI control board, a second voltage excitation signal is applied to the at least one excitation pin in groups, and excitation responses of at least one non-excitation pin and at least one excitation pin are collected in real time;

[0095] Based on the excitation response of at least one non-excitation pin, it is detected whether there is a first abnormal pin in the at least one non-excitation pin that is inconsistent with the preset excitation response. If there is a first abnormal pin that is inconsistent with the preset excitation response, it is determined that a short circuit occurs in the target memory adapter card.

[0096] Specifically, the embodiment of the present invention uploads the generated excitation pattern set to the BSI control system, reads the test vectors (i.e., the constituent elements of the excitation pattern set) one by one through the BSI control board, and the control board gradually loads the excitation data into the boundary scan register of the corresponding pin through the boundary scan chain, executes the "SHIFT-DR" and "UPDATE-DR" instructions, applies a second voltage excitation signal to the excitation pin, and synchronously starts the sampling device to collect the TDO response data of the non-excitation pin in each test cycle. The sampling period needs to be synchronized with the BSI excitation period (usually 100kHz~5000kHz). After the data collection is completed, the excitation response of at least one non-excitation pin and the excitation response of at least one excitation pin are cached.

[0097] The collected excitation response data of at least one non-excitation pin is compared with the preset excitation response, specifically to check whether the non-excitation pin has a high level or low level transition or whether the high-impedance state pin has a non-zero level response. If a first abnormal pin with an abnormal response is detected in at least one non-excitation pin, it indicates that there is a short circuit in the target memory adapter card.

[0098] Through the above technical solution, by calling the generated excitation pattern set through the BSI control board, applying excitation signals group by group and collecting the excitation responses of non-excitation pins and excitation pins in real time, the electrical response state of each pin under specific excitation can be accurately obtained. Combined with the detection of abnormal level changes of non-excitation pins, potential short-circuit relationships can be quickly identified.

[0099] Optionally, in some embodiments, after prohibiting the central processing unit from powering on, it includes: obtaining a second abnormal pin among at least one excitation pin; judging whether there is a physical adjacency relationship between the first abnormal pin and the second abnormal pin based on a preset physical adjacency matrix; if there is a physical adjacency relationship between the first abnormal pin and the second abnormal pin, marking the first abnormal pin and the second abnormal pin as a short-circuited pin pair.

[0100] Specifically, the number of the first abnormal pin and the current excitation signal are combined to infer the second abnormal pin, obtain the short-circuited pin pair, and finally obtain the number of the abnormal pin.

[0101] Specifically, record the excitation pin number under the second voltage excitation signal and its stimulus response. If there is a second abnormal pin in the stimulus pin whose stimulus response is inconsistent with the preset stimulus response, then according to the first abnormal pin number and the preset physical adjacency matrix, it is determined whether the first abnormal pin and the second abnormal pin have a physical adjacency relationship. If there is a physical adjacency relationship, the first abnormal pin and the second abnormal pin are determined to be a short-circuited pin pair, and the abnormal pin numbers are marked for the first abnormal pin and the second abnormal pin. .

[0102] Through the above technical solution, the abnormal response pin number and signal status are used to perform logical inversion to deduce the short-circuited pin pair, automatically locate the short-circuited pin pair and mark the abnormal pin number, thereby achieving efficient and automated short-circuit positioning.

[0103] In order to enable those skilled in the art to further understand the CPU anti-burning control method according to the embodiment of the present invention, the following is a detailed description with reference to specific embodiments. Figure 3 shown.

[0104] In step S301, the memory riser card is inspected for pin defects using a pre-trained inspection model. If there are no pin defects, a memory riser card with a flawless appearance is obtained.

[0105] In step S302, the Hall sensor, micro displacement sensor and contact impedance detector are used to monitor the

[0106] The system measures the insertion and removal status of the memory riser card and calculates the insertion and removal confidence level based on the combined monitoring results. If the insertion and removal confidence level of the memory riser card is less than or equal to the preset threshold, the CPU module is prohibited from powering on.

[0107] In step S303, after confirming that the plug-in and pull-out status is normal, a low voltage is applied to the pins of the memory adapter card.

[0108] The excitation signal is generated and current is collected. The equivalent resistance is calculated based on the measured data, and the target resistance is calculated by combining multiple parameters to make a short circuit judgment.

[0109] In step S304 , if the short circuit detection result is a short circuit state, the CPU module is prohibited from being powered on.

[0110] In step S305, if the short circuit detection result is a short circuit pending confirmation state, an excitation pattern set is generated based on the boundary scan description file and the physical adjacency matrix, and a boundary scan method is used to detect whether there is a potential electrical short circuit in the memory adapter card based on the excitation pattern set. If so, the abnormal pin number is obtained.

[0111] In step S306 , if the short circuit detection result is normal and the boundary scan test result is normal, the CPU is allowed to power on.

[0112] In summary, the technical effects brought about by the embodiments of the present invention are as follows:

[0113] (1) The plug-in confidence level is calculated based on the combined monitoring results of the Hall sensor, micro-displacement sensor, and contact impedance detector. This allows for comprehensive quantification of physical position, magnetic field change, and contact quality information, avoiding misjudgments or missed judgments caused by a single sensor. It can fully reflect the authenticity and reliability of the plug-in status. When the plug-in confidence level is lower than the threshold, power-on is promptly disabled, effectively preventing electrical risks caused by improper plug-in or poor contact, improving the safety and intelligence of the test system, and ensuring the safe operation of the CPU module.

[0114] (2) The target resistance value can be dynamically calculated based on the real-time collected ambient temperature, power supply voltage, test fixture aging degree and historical data, thereby dynamically adjusting the short-circuit judgment standard to avoid the misjudgment and missed judgment problems caused by fixed thresholds. This makes the short-circuit detection process more flexible and accurate, and can adapt to test fluctuations under different working conditions, effectively improving detection accuracy and robustness, ensuring that potential short-circuit hazards are discovered in a timely manner, thereby avoiding the risk of CPU module burnout.

[0115] (3) If the short-circuit detection result is critical, a set of excitation patterns is generated based on the boundary scan description file and the physical adjacency matrix. Boundary scan is then used to further detect potential electrical shorts in the memory adapter card. This allows for precise location and secondary confirmation of suspected short-circuit areas under non-destructive testing conditions. This not only improves test coverage and detection accuracy, but also effectively avoids resource waste and unnecessary downtime caused by misjudgments, ensuring thorough troubleshooting before powering on the CPU module.

[0116] According to the anti-burn control method for the central processing unit proposed in an embodiment of the present invention, whether the target memory adapter card has a pin defect is detected; if the target memory adapter card does not have a pin defect, at least one monitoring data of the target memory adapter card is obtained, and the plug-in confidence of the target memory adapter card is calculated based on the at least one monitoring data, and when the plug-in confidence of the target memory adapter card is greater than a preset threshold, the target resistance value and equivalent resistance value of each pin of the target memory adapter card are calculated according to the test data of the target memory adapter card; the target memory adapter card is short-circuited according to the target resistance value and equivalent resistance value of each pin, and the short-circuit detection result of the target memory adapter card is obtained, and the central processing unit is subjected to anti-burn control according to the short-circuit detection result. In this way, the problem that the current short-circuit detection technology of the memory adapter card has low detection accuracy, resulting in a large safety hazard when the central processing unit is powered on, is solved, the detection accuracy is improved, and the safety and reliability of the central processing unit powering on is guaranteed.

[0117] Next, a method for preventing a CPU from burning out according to an embodiment of the present invention will be described with reference to the accompanying drawings.

[0118] Figure 4 Schematic diagram of a CPU burn-out prevention control device according to an embodiment of the present invention.

[0119] like Figure 4 As shown, the central processing unit's anti-burning control device 10 includes: a defect detection module 100 , a calculation module 200 and a control module 300 .

[0120] Among them, the defect detection module 100 is used to detect whether the target memory adapter card has a pin defect; the calculation module 200 is used to obtain at least one monitoring data of the target memory adapter card if the target memory adapter card does not have a pin defect, and calculate the plug-in confidence of the target memory adapter card based on the at least one monitoring data, and when the plug-in confidence of the target memory adapter card is greater than a preset threshold, calculate the target resistance and equivalent resistance of each pin of the target memory adapter card according to the test data of the target memory adapter card; the control module 300 is used to perform short-circuit detection on the target memory adapter card according to the target resistance and equivalent resistance of each pin, obtain the short-circuit detection result of the target memory adapter card, and perform anti-burn control on the central processing unit according to the short-circuit detection result.

[0121] Optionally, in some embodiments, before detecting whether the target memory adapter card has a pin defect, the defect detection module 100 is further used to: collect pin defect sample images, and pre-process the pin defect sample images to obtain data to be trained; divide the data to be trained based on a preset ratio to obtain a training set and a test set, and use the training set to train the initial detection model, and use the test set to test the trained detection model to obtain the accuracy of the trained detection model; stop training when the number of training times of the trained detection model reaches a preset number and the accuracy is greater than or equal to the preset accuracy, and obtain a pre-trained detection model, so as to use the pre-trained detection model to detect whether the target memory adapter card has a pin defect.

[0122] Optionally, in some embodiments, after calculating the plug-in confidence of the target memory adapter card based on at least one monitoring data, the calculation module 200 is further used to: prohibit the central processing unit from powering on if the plug-in confidence of the target memory adapter card is less than or equal to a preset threshold.

[0123] Optionally, in some embodiments, the calculation module 200 is further used to: apply a first voltage excitation signal to each pin one by one according to the numbering order of each pin, and collect the current of each pin based on the first voltage excitation signal; and calculate the equivalent resistance of each pin using the first voltage excitation signal and the current of each pin.

[0124] Optionally, in some embodiments, the control module 300 is further used to: if there is a first pin among all the pins of the target memory adapter card whose equivalent resistance is less than or equal to the product of the target resistance and the preset value, then the short circuit detection result is that the target memory adapter card is in a short circuit state; if there is a second pin among all the pins of the target memory adapter card whose equivalent resistance is greater than the product and less than the target resistance, then the short circuit detection result is that the target memory adapter card is in a short circuit pending confirmation state; if the equivalent resistance of all the pins of the target memory adapter card is greater than or equal to the target resistance, then the short circuit detection result is that the target memory adapter card is in a normal state.

[0125] Optionally, in some embodiments, the control module 300 is further used to: if the short-circuit detection result is that the target memory adapter card is in a short-circuit state, prohibit the central processing unit from powering on; if the short-circuit detection result is that the target memory adapter card is in a short-circuit pending confirmation state, generate an excitation pattern set based on a preset boundary scan description file and a preset physical adjacency matrix, and use the excitation pattern set to detect whether there is a short-circuit condition in the target memory adapter card, and prohibit the central processing unit from powering on when there is a short-circuit condition in the target memory adapter card; if the short-circuit detection result is that the target memory adapter card is in a normal state, and the boundary scan test result of the target memory adapter card is normal, control the central processing unit to power on.

[0126] Optionally, in some embodiments, the control module 300 is further used to: extract information of each pin of the target memory adapter card based on a preset boundary scan description file; construct a preset physical adjacency matrix based on the topological data of each pin; and generate an excitation pattern set based on the information of each pin and the preset physical adjacency matrix.

[0127] Optionally, in some embodiments, the control module 300 is further used to: determine at least one excitation pin and at least one non-excitation pin of the target memory adapter card, and based on the excitation mode set, apply a second voltage excitation signal to the at least one excitation pin, and synchronously collect the excitation response of at least one non-excitation pin; determine whether there is a first abnormal pin in the excitation response of at least one non-excitation pin that is inconsistent with the preset excitation response; if there is a first abnormal pin, it is determined that a short circuit exists in the target memory adapter card.

[0128] Optionally, in some embodiments, after prohibiting the central processing unit from powering on, the control module 300 is further used to: obtain a second abnormal pin from at least one excitation pin; determine whether there is a physical adjacency relationship between the first abnormal pin and the second abnormal pin based on a preset physical adjacency matrix; if there is a physical adjacency relationship between the first abnormal pin and the second abnormal pin, mark the first abnormal pin and the second abnormal pin as a short-circuited pin pair.

[0129] Optionally, in some embodiments, the plugging confidence is:

[0130]

[0131] in, is the plug-in confidence level, is the standard displacement, To monitor the displacement sensor readings in the data, is the Hall reference value, To monitor the Hall sensor readings in the data, is the impedance qualification threshold, is the measured value of contact impedance in the monitoring data, is the plug-in weight, is the displacement weight, is the impedance weight.

[0132] Optionally, in some embodiments, the calculation module 200 is further configured to calculate the target resistance value based on the test data using a preset resistance calculation formula, wherein the preset resistance calculation formula is:

[0133]

[0134] in, is the target resistance, is the initial resistance threshold, is the pin temperature change value, is the voltage change value, The number of times the test fixture is used, is the fixture aging coefficient, is the temperature weight, is the voltage weight, is the frequency weight, is the aging weight.

[0135] It should be noted that the description of the features in the embodiment corresponding to the central processing unit's anti-burning control device can refer to the relevant description of the embodiment corresponding to the above-mentioned central processing unit's anti-burning control method, and will not be repeated here.

[0136] Figure 5 This is a schematic diagram of the structure of an electronic device provided by an embodiment of the present invention. The electronic device may include:

[0137] Memory 501 , processor 502 , and computer programs stored in the memory 501 and executable on the processor 502 .

[0138] When the processor 502 executes the program, the CPU burn-out prevention control method provided in the above embodiment is implemented.

[0139] Furthermore, the electronic device further includes:

[0140] The communication interface 503 is used for communication between the memory 501 and the processor 502 .

[0141] The memory 501 is used to store computer programs that can be run on the processor 502 .

[0142] The memory 501 may include a high-speed RAM memory, and may also include a non-volatile memory (non-volatile memory), such as at least one disk memory.

[0143] If the memory 501, processor 502, and communication interface 503 are implemented independently, the communication interface 503, memory 501, and processor 502 can be interconnected via a bus and communicate with each other. The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus. Buses can be divided into address buses, data buses, control buses, etc. For ease of representation, Figure 5 Only one thick line is used in the diagram, but this does not mean that there is only one bus or one type of bus.

[0144] Optionally, in a specific implementation, if the memory 501, the processor 502 and the communication interface 503 are integrated on a chip, the memory 501, the processor 502 and the communication interface 503 can communicate with each other through an internal interface.

[0145] The processor 502 may be a central processing unit (CPU), an application specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of the present invention.

[0146] An embodiment of the present invention further provides a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps of any of the aforementioned central processing unit anti-burning control method embodiments when running.

[0147] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk.

[0148] An embodiment of the present invention further provides a computer program product, including a computer program, which implements the aforementioned central processing unit burnout prevention control method when executed by a processor.

[0149] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present invention.

[0150] The above is a detailed introduction to the CPU burn-out prevention control method, device, equipment, medium, and product provided by the present invention. This article uses specific examples to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only intended to help understand the method and core concept of the present invention. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the scope of protection of the claims of the present invention.

Claims

1. A method for preventing a CPU from burning out, characterized in that: The following steps are involved: Check whether the target memory riser card has pin defects; If the target memory riser card does not have the pin defect, obtaining at least one monitoring data of the target memory riser card, calculating the plugging confidence of the target memory riser card based on the at least one monitoring data, and when the plugging confidence of the target memory riser card is greater than a preset threshold, calculating the target resistance value and the equivalent resistance value of each pin of the target memory riser card according to the test data of the target memory riser card; Performing a short-circuit test on the target memory adapter card according to the target resistance value and the equivalent resistance value of each pin, obtaining a short-circuit test result of the target memory adapter card, and performing burn-out prevention control on the central processing unit according to the short-circuit test result; The performing short circuit detection on the target memory adapter card according to the target resistance value and the equivalent resistance value of each pin to obtain a short circuit detection result includes: If there is a first pin among all the pins of the target memory riser card whose equivalent resistance is less than or equal to the product of the target resistance and the preset value, the short-circuit detection result is that the target memory riser card is in a short-circuit state; If there is a second pin among all the pins of the target memory riser card whose equivalent resistance is greater than the multiplication result and less than the target resistance, the short circuit detection result is that the target memory riser card is in a short circuit pending confirmation state; If the equivalent resistance values of all pins of the target memory adapter card are greater than or equal to the target resistance value, the short circuit detection result indicates that the target memory adapter card is in a normal state; The step of calculating the target resistance and equivalent resistance of each pin of the target memory riser card according to the test data of the target memory riser card further includes: Based on the test data, the target resistance is calculated using the preset resistance calculation formula, wherein the preset resistance calculation formula is: in, is the target resistance, is the initial resistance threshold, is the pin temperature change value, is the voltage change value, The number of times the test fixture is used, is the fixture aging coefficient, is the temperature weight, is the voltage weight, is the frequency weight, is the aging weight.

2. The CPU burn-out prevention control method according to claim 1, wherein: Before detecting whether the target memory riser card has a pin defect, the method includes: Collecting pin defect sample images and preprocessing the pin defect sample images to obtain training data; Dividing the data to be trained into a training set and a test set based on a preset ratio, and using the training set to train the initial detection model, and using the test set to test the trained detection model to obtain the accuracy of the trained detection model; When the number of training times of the trained detection model reaches a preset number and the accuracy is greater than or equal to the preset accuracy, the training is stopped to obtain a pre-trained detection model, so as to use the pre-trained detection model to detect whether there is a pin defect in the target memory adapter card.

3. The CPU burn-out prevention control method according to claim 1, wherein: After calculating the plugging confidence of the target memory riser card based on the at least one monitoring data, the method includes: If the plugging confidence of the target memory adapter card is less than or equal to the preset threshold, the central processing unit is prohibited from powering on.

4. The CPU burn-out prevention control method according to claim 1, wherein: Calculating the target resistance and equivalent resistance of each pin of the target memory riser card according to the test data of the target memory riser card includes: Applying a first voltage excitation signal to each pin one by one according to the numbering sequence of each pin, and collecting the current of each pin based on the first voltage excitation signal; The equivalent resistance of each pin is calculated using the first voltage excitation signal and the current of each pin.

5. The CPU burn-out prevention control method according to claim 1, wherein: The method of controlling the central processing unit to prevent burnout according to the short circuit detection result includes: If the short-circuit detection result indicates that the target memory adapter card is in a short-circuit state, prohibiting the central processing unit from being powered on; If the short-circuit detection result indicates that the target memory riser card is in a short-circuit pending confirmation state, generating an excitation pattern set based on a preset boundary scan description file and a preset physical adjacency matrix, and using the excitation pattern set to detect whether the target memory riser card has a short-circuit condition, and prohibiting the central processing unit from powering on when the target memory riser card has a short-circuit condition; If the short circuit detection result indicates that the target memory adapter card is in a normal state and the boundary scan test result of the target memory adapter card is normal, the central processing unit is controlled to be powered on.

6. The CPU burn-out prevention control method according to claim 5, characterized in that: The generating of the excitation pattern set based on the preset boundary scan description file and the preset physical adjacency matrix includes: Extracting information of each pin of the target memory riser card based on the preset boundary scan description file; Constructing the preset physical adjacency matrix based on the topological data of each pin; The excitation pattern set is generated according to the information of each pin and the preset physical adjacency matrix.

7. The CPU burn-out prevention control method according to claim 5, characterized in that: The detecting whether the target memory adapter card has a short circuit condition based on the set of excitation modes includes: Determining at least one excitation pin and at least one non-excitation pin of the target memory riser card, and applying a second voltage excitation signal to the at least one excitation pin based on the excitation pattern set, and synchronously collecting an excitation response of the at least one non-excitation pin; Determining whether there is a first abnormal pin in the excitation response of the at least one non-excitation pin that is inconsistent with a preset excitation response; If the first abnormal pin exists, it is determined that the target memory riser card has the short circuit condition.

8. The CPU burn-out prevention control method according to claim 7, wherein: After the central processing unit is prohibited from being powered on, the method includes: Acquire a second abnormal pin among the at least one excitation pin; Based on the preset physical adjacency matrix, determining whether the first abnormal pin and the second abnormal pin have a physical adjacency relationship; If the first abnormal pin and the second abnormal pin are physically adjacent to each other, the first abnormal pin and the second abnormal pin are marked as a short-circuited pin pair.

9. The CPU burn-out prevention control method according to claim 1, wherein: The plugging confidence is: in, is the plug-in confidence level, is the standard displacement, To monitor the displacement sensor readings in the data, is the Hall reference value, To monitor the Hall sensor readings in the data, is the impedance qualification threshold, is the measured value of contact impedance in the monitoring data, is the plug-in weight, is the displacement weight, is the impedance weight.

10. A central processing unit anti-burning control device, characterized in that: include: A defect detection module is used to detect whether a target memory riser card has pin defects; a calculation module, configured to, if the target memory riser card does not have the pin defect, obtain at least one monitoring data of the target memory riser card, calculate an insertion and removal confidence of the target memory riser card based on the at least one monitoring data, and, when the insertion and removal confidence of the target memory riser card is greater than a preset threshold, calculate a target resistance value and an equivalent resistance value of each pin of the target memory riser card based on test data of the target memory riser card; a control module, configured to perform short-circuit detection on the target memory adapter card according to the target resistance value and the equivalent resistance value of each pin, obtain a short-circuit detection result of the target memory adapter card, and perform burn-proof control on the central processing unit according to the short-circuit detection result; The control module is further configured to: if there is a first pin among all the pins of the target memory riser card whose equivalent resistance is less than or equal to the product of the target resistance and the preset value, then the short circuit detection result is that the target memory riser card is in a short circuit state; If there is a second pin among all the pins of the target memory riser card whose equivalent resistance is greater than the multiplication result and less than the target resistance, the short circuit detection result is that the target memory riser card is in a short circuit pending confirmation state; if the equivalent resistance of all the pins of the target memory riser card is greater than or equal to the target resistance, the short circuit detection result is that the target memory riser card is in a normal state; The calculation module is further configured to calculate the target resistance based on the test data using a preset resistance calculation formula, wherein the preset resistance calculation formula is: in, is the target resistance, is the initial resistance threshold, is the pin temperature change value, is the voltage change value, The number of times the test fixture is used, is the fixture aging coefficient, is the temperature weight, is the voltage weight, is the frequency weight, is the aging weight.

11. An electronic device, characterized in that: The invention comprises a memory, a processor and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the central processing unit anti-burning control method according to any one of claims 1 to 9.

12. A computer-readable storage medium having a computer program stored thereon, characterized in that: The program is executed by a processor to implement the central processing unit anti-burning control method according to any one of claims 1 to 9.

13. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the method for preventing burnout of a central processing unit according to any one of claims 1 to 9 is implemented.

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