Display apparatus and electronic apparatus

Abstract

A display apparatus and an electronic apparatus are disclosed. The display device includes: a display unit including a pixel and an encapsulation layer covering the pixel and including a first inorganic layer, a second inorganic layer, and an organic layer disposed therebetween; and a user input sensing unit including at least one sensing insulating layer disposed on the encapsulation layer and first to third electrodes insulated from each other, in which: the first electrode includes a first main pattern and a first connection pattern disposed on a different layer from the first main pattern and connected to the first main pattern; the second electrode includes second main patterns each having an opening and insulated from the first main pattern, and a second connection pattern disposed between the second main patterns, the third electrode includes a third main pattern disposed in a corresponding one of the openings and a third connection pattern disposed on the same layer as the first connection pattern and connected to the third main pattern, at least a portion of the third connection pattern overlapping the second main pattern and one of the first main patterns in a plane.

Description

[0001] This application is a divisional application of the invention patent application "Input Sensing Unit and Display Device Including the Same" with an application date of September 10, 2019 and an application number of 201910864606.2. Technical Field

[0002] Exemplary embodiments of the invention generally relate to an input sensing unit and a display device including the input sensing unit, and more particularly, to an input sensing unit having improved electrical reliability and a display device including the input sensing unit. Background Art

[0003] Various electronic devices are being developed for use in multimedia devices such as televisions, mobile phones, tablet computers, navigation devices, and gaming consoles. Such electronic devices may include a keyboard or a mouse as an input unit. The electronic device may also include a display device. Such a display device includes a display unit as an output device and an input sensing unit as an input device.

[0004] The above information disclosed in this background section is only for understanding the background of the inventive concept, and thus the above information may include information that does not constitute the prior art. Summary of the Invention

[0005] Exemplary embodiments of the present invention provide an input sensing unit having improved external input sensitivity and a display device including the input sensing unit.

[0006] Additional features of the inventive concept will be set forth in the description below, and in part will be apparent from the description, or may be learned by practice of the inventive concept.

[0007] Exemplary embodiments of the inventive concept provide an input sensing unit including: a plurality of first electrodes arranged in a first direction, each of the first electrodes extending in a second direction crossing the first direction and including a plurality of first main patterns arranged in the second direction and a plurality of first connection patterns provided between the first main patterns to connect two adjacent first main patterns to each other; a plurality of second electrodes arranged in the second direction, each of the second electrodes extending in the first direction and including a plurality of second main patterns arranged in the first direction and a plurality of second connection patterns provided between the second main patterns to connect two adjacent second main patterns to each other; and a plurality of third electrodes arranged in the second direction, each of the third electrodes extending in the first direction and receiving an electric signal different from the electric signal received by the second electrodes. Each of the third electrodes includes: a plurality of third main patterns arranged in the first direction and separated from the second main patterns in a plan view; and a plurality of third connection patterns provided between the third main patterns to connect two adjacent third main patterns to each other and separated from the first connection patterns in a plane.

[0008] The first connection pattern and the second connection pattern may be provided on different layers from each other.

[0009] The third connection pattern and the first connection pattern may be provided on the same layer.

[0010] The second main pattern and the third main pattern may be provided on the same layer and separated from each other in a plan view.

[0011] An opening may be defined in each of the second main patterns, and the third main pattern may be respectively provided in the opening.

[0012] The third connection pattern and the first main pattern may be provided on different layers from each other.

[0013] In a plan view, each of the third connection patterns may overlap at least a part of the first electrode.

[0014] Each of the third main patterns may include: a central portion; and a branch portion connected to one side of the central portion and protruding from the central portion in the first direction, wherein each of the third connection patterns may be connected to the branch portion.

[0015] The branch portions may be provided as a plurality to be respectively provided on both sides of the central portion.

[0016] The branch portion may have a rod shape extending in the first direction.

[0017] The branch member may have a zigzag shape extending in the first direction.

[0018] The second connection pattern and the third connection pattern may have different shapes from each other.

[0019] Each of the third connection patterns may include a plurality of sub-connection patterns arranged in a second direction and connected to the same third main pattern.

[0020] Each of the first connection patterns may be connected to each of the first main patterns to be set as a single body.

[0021] Each of the first main pattern to the third main pattern may include a plurality of grid lines.

[0022] Each of the third connection patterns may extend along the grid lines.

[0023] The first connection pattern and the third main pattern may not overlap each other.

[0024] In a plan view, the third connection pattern may overlap with the first electrode and the second electrode.

[0025] Each of the third electrodes may receive a ground voltage.

[0026] Another exemplary embodiment of the inventive concept provides a display device including: a display unit including a plurality of pixels and configured to display an image; and an input sensing unit disposed to overlap with the pixels and including a first electrode, a second electrode, and a third electrode that receive different electrical signals from each other. Each of the first electrode, the second electrode, and the third electrode includes a plurality of main patterns arranged to be separated from each other and a plurality of connection patterns disposed between the main patterns to connect two adjacent main patterns to each other. In a plan view, the connection pattern of the third electrode and the connection pattern of the first electrode are separated from each other.

[0027] The connection pattern of the first electrode and the connection pattern of the third electrode may be disposed on the same layer.

[0028] The connection pattern of the first electrode and the main pattern of the first electrode may be disposed on different layers from each other, and the connection pattern of the third electrode and the main pattern of the third electrode may be disposed on different layers from each other.

[0029] In a plan view, the main pattern of the third electrode may be separated from the main pattern of the first electrode.

[0030] The connection pattern of the first electrode and the connection pattern of the second electrode may be disposed on different layers from each other.

[0031] In a plan view, the connection pattern of the first electrode and the connection pattern of the third electrode may overlap with the main pattern of the first electrode.

[0032] The main pattern of the second electrode and the main pattern of the third electrode may be arranged in the same direction.

[0033] Predetermined openings may be defined in each of the main patterns of the second electrode, and the main patterns of the third electrode may be respectively disposed in the openings.

[0034] Each of the main patterns may include a plurality of grid lines.

[0035] Each of the connection patterns of the third electrode may extend along the grid lines.

[0036] Each of the pixels may include an organic light emitting element or a quantum dot light emitting element.

[0037] The third electrode may receive a ground voltage.

[0038] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the claimed invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] The drawings illustrate exemplary embodiments of the invention and, together with the description, are used to explain the inventive concept, including the drawings to provide a further understanding of the invention, and the drawings are included in this specification and form a part of this specification.

[0040] Figure 1 is a perspective view of a display device according to an exemplary embodiment of the inventive concept.

[0041] Figure 2A 、 Figure 2B 、 Figure 2C and Figure 2D are cross-sectional views of a display device according to an exemplary embodiment of the inventive concept.

[0042] Figure 3A and Figure 3B are cross-sectional views of a display panel according to an exemplary embodiment of the inventive concept.

[0043] Figure 4 is a plan view of a display unit according to an exemplary embodiment of the inventive concept.

[0044] Figure 5A is an enlarged cross-sectional view of a display unit according to an exemplary embodiment of the inventive concept.

[0045] Figure 5B is an enlarged cross-sectional view of an upper insulating layer according to an exemplary embodiment of the inventive concept.

[0046] Figure 6A is a cross-sectional view of an input sensing unit according to an exemplary embodiment of the inventive concept.

[0047] Figure 6BIt is a plan view of an input sensing unit according to an exemplary embodiment of the inventive concept.

[0048] Figure 6C It shows Figure 6B An enlarged plan view of a partial area of

[0049] Figure 6D It is a plan view of an input sensing unit according to an exemplary embodiment of the inventive concept.

[0050] Figure 7 It is a plan view showing a part of an input sensing unit according to an exemplary embodiment of the inventive concept.

[0051] Figure 8A And Figure 8B It is a cross-sectional view showing a part of an input sensing unit according to an exemplary embodiment of the inventive concept.

[0052] Figure 9 It is a plan view showing a part of an input sensing unit according to an exemplary embodiment of the inventive concept.

[0053] Figure 10A , Figure 10B And Figure 10C It is a plan view showing a part of an input sensing unit according to an embodiment of the inventive concept.

[0054] Figure 11 It is a plan view of an input sensing unit according to an exemplary embodiment of the inventive concept.

[0055] Figure 12A , Figure 12B And Figure 12C It is a plan view of an input sensing unit according to an exemplary embodiment of the inventive concept.

[0056] Figure 13A It is a perspective view showing the combined state of a display device according to an exemplary embodiment of the inventive concept.

[0057] Figure 13B It is Figure 13A An exploded perspective view of the display device of

[0058] Figure 14A , Figure 14B And Figure 14C It shows Figure 13B A plan view of a part of the constituent components of

[0059] Figure 15A It is an exploded perspective view of a display device according to an exemplary embodiment of the inventive concept.

[0060] Figure 15B It shows Figure 15AA plan view of a part of the constituent components. Detailed implementation

[0061] In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the various exemplary embodiments of the invention. As used herein, "embodiment" is a non-limiting example of an apparatus or method that employs one or more of the inventive concepts disclosed herein. However, it is apparent that the various exemplary embodiments may be practiced without these specific details or in the case of one or more equivalent arrangements. In other cases, well-known structures and devices are shown in block diagram form in order to avoid unnecessarily obscuring the various exemplary embodiments. In addition, the various exemplary embodiments may be different, but not necessarily exclusive. For example, without departing from the inventive concept, the specific shapes, configurations, and characteristics of the exemplary embodiments may be used or implemented in another exemplary embodiment.

[0062] Unless otherwise stated, the exemplary embodiments shown are understood to provide exemplary features of variations in some ways in which the inventive concept may be implemented in practice. Thus, unless otherwise stated, the features, components, modules, layers, films, panels, regions, and / or aspects, etc. (hereinafter, individually or collectively referred to as "elements") of the various embodiments may be additionally combined, separated, interchanged, and / or rearranged without departing from the inventive concept.

[0063] The use of cross-hatching and / or shading is generally provided in the drawings to clarify the boundaries between adjacent elements. Thus, unless stated otherwise, the presence or absence of cross-hatching or shading does not express or imply any preference or requirement for a particular material, material property, size, ratio, commonality between the elements shown, and / or any other characteristic, attribute, property, etc. In addition, in the drawings, the dimensions and relative dimensions of the elements may be exaggerated for clarity and / or descriptive purposes. When the exemplary embodiments may be implemented differently, the specific process sequences may be performed in a different order than described. For example, two consecutively described processes may be performed substantially simultaneously or in an order opposite to the described order. In addition, the same reference numerals denote the same elements.

[0064] When an element or layer is referred to as being "on", "connected to", or "coupled to" another element or layer, it can be directly on, directly connected to, or directly coupled to the other element or layer, or intervening elements or layers may be present. However, when an element or layer is referred to as being "directly on", "directly connected to", or "directly coupled to" another element or layer, no intervening elements or layers are present. For this reason, the term "connected" can refer to physical connection, electrical connection, and / or fluid connection with or without intervening elements. In addition, the D1 axis, D2 axis, and D3 axis are not limited to the three axes of a rectangular coordinate system (such as the x-axis, y-axis, and z-axis), but can be interpreted in a broader sense. For example, the D1 axis, D2 axis, and D3 axis can be perpendicular to each other, or can represent different directions that are not perpendicular to each other. For the purposes of the present disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" can be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z, such as by way of example XYZ, XYY, YZ, and ZZ. As used herein, the term "and / or" includes any combination and all combinations of one or more of the associated listed items.

[0065] Although terms such as "first", "second", etc. may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another. Thus, the first element discussed below could be termed the second element without departing from the teachings of the disclosure.

[0066] For descriptive purposes, spatial relative terms such as "beneath", "below", "under", "lower", "above", "upper", "on top of", "higher", and "side" (e.g., as in "sidewall") may be used herein to describe the relationship of one element to another as shown in the figures. Spatial relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "beneath" or "below" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary term "beneath" can encompass both an orientation above and below. In addition, the device may be otherwise oriented (e.g., rotated 90 degrees or at other orientations), and accordingly, the spatial relative descriptors used herein are to be interpreted accordingly.

[0067] The terms used herein are for the purpose of describing particular embodiments and are not intended to be limiting. As used herein, unless the context clearly dictates otherwise, the singular forms "a", "an", and "the" are also intended to include the plural forms. Also, when the terms "comprises" and / or "comprising" are used in this specification, they specify the presence of the stated features, integers, steps, operations, elements, components, and / or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. It should also be noted that, as used herein, the terms "substantially", "about", and other similar terms are used as approximate terms and not as terms of degree, so that they are used to interpret the inherent deviations of measured, calculated, and / or provided values that would be recognized by a person of ordinary skill in the art.

[0068] Various exemplary embodiments are described herein with reference to cross-sectional views and / or exploded views that are schematic diagrams of idealized exemplary embodiments and / or intermediate structures. As such, variations in the shapes of the illustrations, such as those due to manufacturing techniques and / or tolerances, are to be expected. Accordingly, the exemplary embodiments disclosed herein should not necessarily be construed as limited to the shapes of the specific regions shown, but will include deviations in shape due to, for example, manufacturing. In this manner, the regions shown in the figures may be schematic in nature, and the shapes of these regions may not reflect the actual shapes of the regions of the device, and thus are not necessarily intended to be limiting.

[0069] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. Terms (such as those defined in a common dictionary) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and should not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0070] Figure 1 is a perspective view of a display device according to an embodiment of the inventive concept. Referring to Figure 1 , the display device DD may display an image IM through a front surface IS. The front surface IS is parallel to the surface defined by a first direction axis DR1 and a second direction axis DR2.

[0071] The normal direction of the front surface IS (e.g., the thickness direction of the display device DD) is indicated as the third direction axis DR3. The front surface (or top surface) and the rear surface (or bottom surface) of each member or unit (which will be described below) are distinguished by the third direction axis DR3. However, the first to third direction axes DR1, DR2, and DR3 shown in this exemplary embodiment are merely examples. Hereinafter, the first to third directions may be the directions indicated by the first to third direction axes DR1, DR2, and DR3, respectively, and represented by the same reference numerals.

[0072] Although a display device DD having a flat front surface is shown in the exemplary embodiment of the inventive concept, the inventive concept is not limited thereto. The display device DD may include a curved front surface or a three-dimensional front surface. The three-dimensional front surface may include a plurality of display regions indicating different directions. For example, the three-dimensional front surface may include a multi-sided columnar front surface.

[0073] The display device DD according to the current exemplary embodiment may be a rigid display device. However, the inventive concept is not limited thereto. For example, the display device DD according to the inventive concept may be a flexible display device DD. According to this exemplary embodiment, a display device DD that can be applied to a mobile terminal is exemplarily shown.

[0074] Although not shown in Figure 1 , an electronic module, a camera module, a power module, etc. mounted on the main board may be provided on the bracket / case together with the display device DD to constitute a mobile terminal. The display device DD according to the inventive concept may be applied to large electronic devices such as televisions and monitors, as well as small and medium-sized electronic devices such as tablet PCs, navigation units for vehicles, game consoles, and smart watches.

[0075] Referring to Figure 1 , the front surface IS of the display device DD includes an active area AA and a peripheral area NAA adjacent to the active area AA. In this exemplary embodiment, the active area AA may be an area on which an image IM is displayed and an external input TC is also sensed.

[0076] The image IM includes a still image and a moving image. Figure 1 An icon image is shown as an example of the image IM.

[0077] The external input TC includes an input TC of a user applied from the outside. The input TC of the user includes various types of external inputs, such as a part of the user's body, light, heat, or pressure, etc. In this exemplary embodiment, the input TC of the user is illustrated as the user's hand applied to the front surface IS.

[0078] However, this is only an example. For example, the display device DD can sense the input TC of the user applied to the side surface or the rear surface of the display device DD. Here, the active area AA can extend to the side surface or the rear surface of the display device DD. The display device DD according to the inventive concept can be designed to have various shapes, but is not limited to a specific embodiment.

[0079] The peripheral area NAA is an area where no image IM is displayed or no external input TC can be sensed even when an electrical signal is applied. As Figure 1 shown, the active area AA can have a rectangular shape. The peripheral area NAA can surround the active area AA. However, the inventive concept is not limited thereto. For example, the active area AA and the peripheral area NAA can be designed differently relative to each other.

[0080] Figures 2A to 2D is a cross-sectional view of a display device according to an exemplary embodiment of the inventive concept. Figures 2A to 2D A cross-section defined by the second direction axis DR2 and the third direction axis DR3 is shown. Figures 2A to 2D is simply shown to explain the lamination relationship of the functional panels and / or functional units constituting the display device DD.

[0081] The display device DD according to an exemplary embodiment of the inventive concept can include a display unit, an input sensing unit, an anti-reflection unit, and a window. At least a part of the display unit, the input sensing unit, the anti-reflection unit, and the window can be formed by a continuous process, and at least a part can be bonded to each other by an adhesive member. Figures 2A to 2D An example of the adhesive member is shown as the optically clear adhesive OCA. Hereinafter, the adhesive member can include a general adhesive or an adhesive. In the inventive concept, the anti-reflection unit and the window can be replaced with different constituent components or completely omitted.

[0082] In Figures 2A to 2D the input sensing unit, the anti-reflection unit, and the corresponding constituent components of the window formed by a continuous process relative to another constituent component can be expressed as "layers". The constituent components of the input sensing unit, the anti-reflection unit, and the window bonded to another constituent component by an adhesive member can be expressed as "panels". The "panel" can include a substrate layer such as a synthetic film, a composite film, and a glass substrate that provides a substrate surface, but the substrate layer can be omitted in the "layer". That is, the unit expressed as a "layer" can be provided on the substrate surface provided by other units.

[0083] The display unit, the input sensing unit, the anti-reflection unit, and the window can be referred to as a display panel DP, an input sensing panel ISP, an anti-reflection panel RPP, and a window panel WP, or a display panel DP, an input sensing layer ISL, an anti-reflection layer RPL, and a window layer WL.

[0084] As shown Figure 2A in Figure 2A , the display device DD may include a display panel DP, an input sensing layer ISL, an anti-reflection panel RPP, and a window panel WP. The input sensing layer ISL is directly disposed on the display panel DP. In this disclosure, "component B is directly disposed on component A" may mean that no separate adhesive layer / adhesive member is disposed between components A and B. Component B may be formed on the substrate surface provided by component A through a continuous process after component A is formed.

[0085] The display panel DP and the input sensing layer ISL directly disposed on the display panel DP may be defined as a display module DM. An optically clear adhesive OCA is disposed between the display module DM and the anti-reflection panel RPP, and between the anti-reflection panel RPP and the window panel WP.

[0086] The display panel DP generates an image, and the input sensing layer ISL obtains coordinate information of an external input (e.g., a touch event). Although not shown separately, the display module DM according to the inventive concept may further include a protection member disposed on the bottom surface of the display panel DP. The protection member and the display panel DP may be bonded to each other through an adhesive member. The display device DD described below Figures 2B to 2D may further include a protection member.

[0087] The display panel DP according to an exemplary embodiment of the inventive concept may be an emissive display panel, but is not limited thereto. For example, the display panel DP may be an organic light emitting display panel or a quantum dot light emitting display panel. The organic light emitting display panel may include an organic light emitting material. The light emitting layer of the quantum dot light emitting display panel may include quantum dot light emitting elements such as quantum dots and quantum rods. Hereinafter, the display panel DP may be described as an organic light emitting display panel.

[0088] The anti-reflection panel RPP reduces reflection of external light incident from the upper side of the window panel WP. The anti-reflection panel RPP according to an exemplary embodiment of the inventive concept may include a retarder and a polarizer. The retarder may be a film type or a liquid crystal coated type retarder, and may include a λ / 2 retarder and / or a λ / 4 retarder. The polarizer may also be a film type or a liquid crystal coated type polarizer. The film type may include an elongated synthetic resin, and the liquid crystal coated type may include liquid crystals arranged in a predetermined arrangement. Each of the retarder and the polarizer may further include a protective film. The retarder and the polarizer themselves or the protective film may be defined as a base layer of the anti-reflection panel RPP.

[0089] An antireflection panel RPP according to an exemplary embodiment of the inventive concept may include a color filter. The color filter may have a predetermined arrangement. The arrangement of the color filter may be determined in consideration of the color of light emitted from pixels provided in the display panel DP. The antireflection panel RPP may further include a black matrix adjacent to the color filter.

[0090] An antireflection panel RPP according to an exemplary embodiment of the inventive concept may include a destructive interference structure. For example, the destructive interference structure includes a first reflective layer and a second reflective layer provided on different layers from each other. First reflected light reflected from the first reflective layer and second reflected light reflected from the second reflective layer may destructively interfere with each other, and thus reflection of external light may be reduced.

[0091] A window panel WP according to an exemplary embodiment of the inventive concept includes a substrate layer WP-BS and a light-blocking pattern WP-BZ. The substrate layer WP-BS may include a glass substrate and / or a synthetic film. The substrate layer WP-BS is not limited to a single layer. The substrate layer WP-BS may include two or more films bonded to each other by an adhesive member.

[0092] The light-blocking pattern WP-BZ is partially overlapped with the substrate layer WP-BS. The light-blocking pattern WP-BZ is provided on the rear surface of the substrate layer WP-BS, specifically, corresponding to the peripheral area NAA of the display device DD. An area where the light-blocking pattern WP-BZ is not provided may correspond to the active area AA of the display device DD.

[0093] The light-blocking pattern WP-BZ may be, for example, a colored organic film formed by a coating method. Although not shown, the window panel WP may further include a functional coating layer provided on the entire surface of the substrate layer WP-BS. The functional coating layer may include an anti-fingerprint layer, an antireflection layer, a hard coat layer, and the like. Hereinafter, with reference to Figures 2B to 2D , the window panel WP and the window layer WL will be simply shown without distinguishing the substrate layer WP-BS and the light-blocking pattern WP-BZ from each other.

[0094] As Figure 2B and Figure 2C shown, the display device DD may include a display panel DP, an input sensing panel ISP, an antireflection panel RPP, and a window panel WP. The lamination order of the input sensing panel ISP and the antireflection panel RPP may be changed.

[0095] As Figure 2DAs shown, the display device DD may include a display panel DP, an input sensing layer ISL, an anti-reflection layer RPL, and a window layer WL. The bonding member may be omitted from the display device DD, and the input sensing layer ISL, the anti-reflection layer RPL, and the window layer WL may be formed on the surface of a substrate disposed on the display panel DP through a continuous process. The lamination order of the input sensing layer ISL and the anti-reflection layer RPL may be changed.

[0096] Figure 3A and Figure 3B is a cross-sectional view showing a part of the display device DD according to an exemplary embodiment of the inventive concept. The display panel DP may correspond to a display unit to be described later. In this exemplary embodiment, "a certain region corresponds to a certain region" may mean that the two regions overlap each other and have the same surface area, but the description is not limited thereto. This will be described in detail later.

[0097] As Figure 3A shown, the display panel DP may include a substrate layer BL, a circuit element layer DP-CL disposed on the substrate layer BL, a display element layer DP-OLED, and an upper insulating layer TFL.

[0098] A display area AA1 and a non-display area NAA1 may be defined on the display panel DP. The display area AA1 may be an area on which an image IM is displayed, and the non-display area NAA1 may be an area on which the image IM is not displayed. The display area AA1 and the non-display area NAA1 may be set to correspond to Figure 1 the active area AA and the peripheral area NAA of

[0099] The substrate layer BL may include at least one plastic film. The substrate layer BL may include at least one of a plastic substrate, a glass substrate, a metal substrate, and an organic / inorganic composite substrate.

[0100] The circuit element layer DP-CL includes at least one intermediate insulating layer and circuit elements. The intermediate insulating layer includes at least one intermediate inorganic film and at least one intermediate organic film. The circuit elements include signal lines and driving circuits of pixels, etc. This will be described in detail later.

[0101] The display element layer DP-OLED may include organic light-emitting diodes. The display element layer DP-OLED may further include organic films such as a pixel defining layer.

[0102] The upper insulating layer TFL may include a plurality of thin films. A part of the thin films may be provided to improve optical efficiency, and another part of the thin films may be provided to protect the organic light-emitting diodes. The upper insulating layer TFL will be described in detail later.

[0103] As Figure 3B shown in , the display panel DP may include a substrate layer BL, a circuit element layer DP-CL disposed on the substrate layer BL, a display element layer DP-OLED, a package layer ES, and a sealant SM that bonds the substrate layer BL to the package layer ES. The package layer ES may be spaced apart from the display element layer DP-OLED by a predetermined gap GP. Each of the substrate layer BL and the package layer ES may include at least one of a plastic substrate, a glass substrate, a metal substrate, and an organic / inorganic composite substrate. The sealant SM may include an organic bonding member or a frit.

[0104] Figure 4 is a plan view of a display unit according to an embodiment of the inventive concept. Figure 5A is an enlarged cross-sectional view of a display unit according to an embodiment of the inventive concept. Figure 5B is an enlarged cross-sectional view of an upper insulating layer according to an embodiment of the inventive concept. The display panel DP based on Figure 3A will be described Figure 4 and Figure 5A the display unit DPU.

[0105] As Figure 4 shown in , the display unit DPU may include a driving circuit GDC, a plurality of signal lines SGL (hereinafter, the plurality of signal lines will be referred to as signal lines), a plurality of signal pads (or pads) DPD (hereinafter, the plurality of signal pads will be referred to as signal pads), and a plurality of pixels PX (hereinafter, the plurality of pixels will be referred to as pixels).

[0106] A display area AA1 may be defined as an area in which pixels PX are disposed. Each of the pixels PX includes an organic light-emitting diode and a pixel driving circuit connected to the organic light-emitting diode. Figure 3A and Figure 3B the circuit element layer DP-CL of may include a driving circuit GDC, signal lines SGL, signal pads DPD, and pixel driving circuits.

[0107] The driving circuit GDC may include a scan driving circuit. The scan driving circuit generates a plurality of scan signals (hereinafter, the plurality of scan signals will be referred to as scan signals) to sequentially output the scan signals to a plurality of scan lines GL (hereinafter, the plurality of scan lines will be referred to as scan lines) described later. The scan driving circuit may also output other control signals to the driving circuits of each pixel PX.

[0108] The scan driving circuit may include a plurality of thin film transistors manufactured by the same process as the driving circuits of the pixels PX (e.g., a low temperature polysilicon (LTPS) process or a low temperature polycrystalline oxide (LTPO) process).

[0109] The signal line SGL includes a scan line GL, a data line DL, a power line PL, and a control signal line CSL. The scan line GL is respectively connected to corresponding pixels PX in the pixel PX, and the data line DL is respectively connected to corresponding pixels PX in the pixel PX. The power line PL is connected to the pixel PX. The control signal line CSL can provide a control signal to the scan driving circuit.

[0110] The signal line SGL overlaps with the display area AA1 and the non-display area NAA1. The signal line SGL can include a pad portion and a line portion. The line portion overlaps with the display area AA1 and the non-display area NAA1. The pad portion is connected to an end of the line portion. The pad portion is disposed in the non-display area NAA1 to overlap with a corresponding signal pad in the signal pad DPD. An area of the non-display area NAA1 in which the signal pad DPD is provided can be defined as a pad area DP-PA. The pad area DP-PA can be connected to a circuit board (not shown).

[0111] Substantially, the line portion connected to the pixel PX can constitute most of the signal line SGL. The line portion is connected to transistors TR1 and TR2 of the pixel PX (see Figure 5A ). The line portion can have a single-layer / multi-layer structure. The line portion can be a single body or can include two or more parts. The two or more parts can be disposed on different layers from each other and can be connected to each other through contact holes passing through an insulating layer provided between the two or more parts.

[0112] Figure 5A A partial cross-section corresponding to the transistors TR1 and TR2 and the light-emitting element ELD of the display unit DPU is shown. The circuit element layer DP-CL provided on the substrate layer BL includes at least one insulating layer and circuit elements. The circuit elements include signal lines and a driving circuit of the pixel. The circuit element layer DP-CL can be formed via a process of forming an insulating layer, a semiconductor layer, and a conductive layer by coating or deposition and a process of patterning the insulating layer, the semiconductor layer, and the conductive layer by a photolithography process.

[0113] In this exemplary embodiment, the circuit element layer DP-CL can include a buffer layer BFL, a first intermediate inorganic layer 10, a second intermediate inorganic layer 20, and an intermediate organic layer 30. The buffer layer BFL, the first intermediate inorganic layer 10, and the second intermediate inorganic layer 20 are inorganic layers, and the intermediate organic layer 30 is an organic layer. The buffer layer BFL can include a plurality of inorganic layers. Figure 5AAn example of the arrangement relationship among a first semiconductor pattern OSP1, a second semiconductor pattern OSP2, a first control electrode GE1, a second control electrode GE2, a first input electrode DE1, a first output electrode SE1, a second input electrode DE2, and a second output electrode SE2 that constitute a switching transistor TR1 and a driving transistor TR2 is shown. First vias CH1 to fourth vias CH4 are exemplarily shown.

[0114] The display element layer DP-OLED may include a light-emitting element ELD. In this exemplary embodiment, the light-emitting element ELD is provided as an example of an organic light-emitting element. However, this is only an example. For example, the light-emitting element ELD may include various examples such as an electrophoretic device, an electrowetting device, a liquid crystal capacitor, a quantum dot diode, a nano LED, and a micro LED, etc.

[0115] The display element layer DP-OLED includes a pixel defining layer PDL. The pixel defining layer PDL includes an insulating material. For example, the pixel defining layer PDL may be an organic layer.

[0116] The first electrode AE of the light-emitting element ELD is disposed on the intermediate organic layer 30. The first electrode AE of the light-emitting element ELD is connected to the second output electrode SE2 through a fifth via CH5 passing through the intermediate organic layer 30. An opening OP is defined in the pixel defining layer PDL. The opening OP of the pixel defining layer PDL exposes at least a part of the first electrode AE of the light-emitting element ELD. The opening OP of the pixel defining layer PDL is referred to as a light-emitting opening to be distinguished from other openings.

[0117] As Figure 5A shown, the display area AA1 may include an emission area PXA and a non-emission area NPXA adjacent to the emission area PXA. The non-emission area NPXA may surround the emission area PXA. In the current exemplary embodiment, the emission area PXA may be defined to correspond to a part of the first electrode AE of the light-emitting element ELD exposed by the light-emitting opening OP.

[0118] The hole control layer HCL may be commonly disposed on the emission area PXA and the non-emission area NPXA. The hole control layer HCL may include a hole transport layer and may also include a hole injection layer. The emission layer EML is disposed on the hole control layer HCL. The emission layer EML may be disposed in a region corresponding to the light-emitting opening OP. That is, the emission layer EML may be formed separately for each pixel PX. In addition, the emission layer EML may include an organic material and / or an inorganic material. The emission layer EML may generate light having a predetermined color.

[0119] The electronic control layer ECL is disposed on the emission layer EML. The electronic control layer ECL may include an electron transport layer and may further include an electron injection layer. The hole control layer HCL and the electronic control layer ECL may be formed together on a plurality of pixels PX by using an aperture mask. The second electrode CE of the light-emitting element ELD is disposed on the electronic control layer ECL. The second electrode CE of the light-emitting element ELD is provided as a single body and is commonly disposed on a plurality of pixels PX.

[0120] As Figure 5A and Figure 5B shown, the upper insulating layer TFL is disposed on the second electrode CE of the light-emitting element ELD. The upper insulating layer TFL may include a plurality of thin films. According to this exemplary embodiment, the upper insulating layer TFL may include a capping layer CPL and a thin film encapsulation layer TFE. The thin film encapsulation layer TFE may include a first inorganic layer IOL1, an organic layer OL, and a second inorganic layer IOL2.

[0121] The capping layer CPL is disposed on the second electrode CE of the light-emitting element ELD to contact the second electrode CE of the light-emitting element ELD. The capping layer CPL may include an organic material. The first inorganic layer IOL1 is disposed on the capping layer CPL to contact the capping layer CPL. The organic layer OL is disposed on the first inorganic layer IOL1 to contact the first inorganic layer IOL1. The second inorganic layer IOL2 may be disposed on the organic layer OL to contact the organic layer OL.

[0122] The capping layer CPL may protect the second electrode CE of the light-emitting element ELD from subsequent processes such as a sputtering process and may improve the emission efficiency of the light-emitting element ELD. The capping layer CPL may have a refractive index greater than that of the first inorganic layer IOL1.

[0123] The first inorganic layer IOL1 and the second inorganic layer IOL2 may protect the display element layer DP-OLED from oxygen / moisture, and the organic layer OL may protect the display element layer DP-OLED from foreign substances such as dust particles. Each of the first inorganic layer IOL1 and the second inorganic layer IOL2 may be one of a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer. According to an exemplary embodiment, each of the first inorganic layer IOL1 and the second inorganic layer IOL2 may include at least one of a titanium oxide layer and an aluminum oxide layer, etc. The organic layer OL may include an acrylic organic layer, but is not limited thereto.

[0124] According to an exemplary embodiment of the inventive concept, an inorganic layer such as a lithium fluoride (LiF) layer may be further disposed between the capping layer CPL and the first inorganic layer IOL1. The LiF layer may improve the emission efficiency of the light-emitting element ELD.

[0125] Figure 6AA cross-sectional view of an input sensing unit according to an exemplary embodiment of the inventive concept. Figure 6B A plan view of an input sensing unit according to an exemplary embodiment of the inventive concept. Figure 6C Shows Figure 6B An enlarged plan view of a partial region of Figure 6D A plan view of an input sensing unit according to an exemplary embodiment of the inventive concept. Hereinafter, the present disclosure will be described with reference to Figures 6A to 6D to describe the present disclosure.

[0126] As Figure 6A shown, the input sensing unit ISU may include a first insulating layer IS-IL1, a first conductive layer IS-CL1, a second insulating layer IS-IL2, a second conductive layer IS-CL2, and a third insulating layer IS-IL3. The first insulating layer IS-IL1 may be directly disposed on the upper insulating layer TFL. In the inventive concept, the first insulating layer IS-IL1 may be omitted.

[0127] Each of the first conductive layer IS-CL1 and the second conductive layer IS-CL2 may have a single-layer structure or a multi-layer structure in which a plurality of layers are stacked along the third direction axis DR3. The conductive layer having the multi-layer structure may include at least two of a transparent conductive layer and a metal layer. The conductive layer having the multi-layer structure may include metal layers containing different metals from each other. The transparent conductive layer may include at least one of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ITZO), PEDOT, metal nanowires, and graphene. The metal layer may be formed of at least one of molybdenum, silver, titanium, copper, aluminum, and their alloys. For example, each of the first conductive layer IS-CL1 and the second conductive layer IS-CL2 may have a three-layer metal structure, for example, a three-layer structure of titanium / aluminum / titanium.

[0128] Each of the first conductive layer IS-CL1 and the second conductive layer IS-CL2 may include a plurality of conductive patterns. Hereinafter, an example in which the first conductive layer IS-CL1 includes a plurality of first conductive patterns and the second conductive layer IS-CL2 includes a plurality of second conductive patterns will be described. Each of the first conductive pattern and the second conductive pattern may include a sensing electrode and a signal line connected to the sensing electrode.

[0129] Each of the first insulating layer IS-IL1 and the second insulating layer IS-IL2 may include an inorganic material or an organic material. In this exemplary embodiment, each of the first insulating layer IS-IL1 and the second insulating layer IS-IL2 may be an inorganic layer including an inorganic material. The inorganic layer may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon oxynitride, zirconium oxide, and hafnium oxide. The third insulating layer IS-IL3 may include an organic material. The organic material may include at least one of acrylic resin, methacrylic resin, polyisoprene resin, vinyl resin, epoxy resin, urethane resin, cellulose resin, silicone resin, polyimide resin, polyamide resin, and perylene resin.

[0130] Referring Figure 6B and Figure 6C , an input sensing unit ISU is disposed on a substrate base BS. The input sensing unit ISU may be disposed on the display unit DPU or the display panel DP, may be disposed between the display unit DPU and the substrate base BS, or may be disposed separately from the display unit DPU with the substrate base BS being between the input sensing unit ISU and the display unit DPU.

[0131] The input sensing unit ISU provides a front surface IS2 including a sensing area AA2 and a second peripheral area NAA2. The sensing area AA2 may correspond to an active area AA (see Figure 1 ) of a display device DD (see Figure 1 ). The second peripheral area NAA2 may correspond to a peripheral area NAA (see Figure 1 ) of the display device DD. In this exemplary embodiment, a display area AA1 (see Figure 3A ) and the sensing area AA2 may correspond to each other.

[0132] However, this is only an example. For example, the display area AA1 and the sensing area AA2 may partially overlap each other. The active area AA may be an area substantially defined by projecting the display area AA1 and the sensing area AA2. Thus, the active area AA may include all of the display area AA1 and the sensing area AA2.

[0133] The input sensing unit ISU includes a plurality of first electrodes TE1, a plurality of second electrodes TE2, a plurality of third electrodes TE3, a plurality of sensing lines TL11, TL12, TL2, and TL3, and a plurality of sensing pads T11, T12, T2, and T3. For ease of description, portions of the electrodes are illustrated as shaded so that the first electrodes TE1, the second electrodes TE2, and the third electrodes TE3 are distinguishable from each other.

[0134] The first electrode TE1, the second electrode TE2, and the third electrode TE3 are disposed in the sensing region AA2. As described above, the sensing region AA2 may overlap with the display region AA1 of the display unit DPU and may correspond to the active region AA of the display device DD.

[0135] The sensing lines TL11, TL12, TL2, and TL3 and the sensing pads T11, T12, T2, and T3 are disposed in the second peripheral region NAA2. As described above, the second peripheral region NAA2 may overlap with the first peripheral region NAA1 of the display unit DPU and may correspond to the peripheral region NAA of the display device DD.

[0136] The sensing lines TL11, TL12, TL2, and TL3 may include a plurality of first sensing lines TL11 and TL12, a plurality of second sensing lines TL2, and one third sensing line TL3. The sensing pads T11, T12, T2, and T3 include a plurality of first sensing pads T11 and T12, a plurality of second sensing pads T2, and one third sensing pad T3. The sensing lines TL11, TL12, TL2, and TL3 are respectively connected to the corresponding pads among the sensing pads T11, T12, T2, and T3.

[0137] The first electrode TE1 is arranged in the first direction DR1. Each of the first electrodes TE1 extends in the second direction DR2. Each of the first electrodes TE1 may include a plurality of first main patterns SP1 and a plurality of first connection patterns BP1.

[0138] Each of the first main pattern SP1 and the first connection pattern BP1 may be arranged in the second direction DR2. Each of the first main patterns SP1 has a rhombus shape. However, this is only an example. For example, each of the first main patterns SP1 is not limited to a specific shape.

[0139] Each of the first connection patterns BP1 is disposed between the first main patterns SP1. Each of the first connection patterns BP1 connects two adjacent first main patterns SP1 to each other. The first main patterns SP1 are electrically connected through the first connection patterns BP1.

[0140] In this exemplary embodiment, the first connection pattern BP1 is disposed on a layer different from the layer of the first main pattern SP1. Each of the first connection patterns BP1 may partially overlap with the first main pattern SP1. Each of the first main patterns SP1 may be electrically connected to the first connection pattern BP1 by passing through a predetermined insulating layer.

[0141] The first sensing lines TL1 are respectively connected to the first electrodes TE1. The first sensing lines TL1 respectively connect the first electrodes TE1 to the pads corresponding to the first electrodes TE1 of the first sensing pads T11 and T12.

[0142] In this exemplary embodiment, the first sensing line TL1 may include a first sub-line TL11 and a second sub-line TL12. The first sub-line TL11 connects a part of the first electrode TE1 to a part T11 of the first sensing pads T11 and T12. The second sub-line TL12 connects the remaining part of the first electrode TE1 to the remaining parts T12 of the first sensing pads T11 and T12.

[0143] For ease of description, Figure 6C Three first sensing lines L11, L12, and L13 of the first sensing line TL1 are shown. The three sensing lines L11, L12, and L13 are respectively connected to the corresponding first electrodes TE1.

[0144] The first sensing line TL1 may transmit the electrical signals provided through the first sensing pads T11 and T12 to the first electrode TE1 respectively, or may transmit the electrical signals provided from the first electrode TE1 to the outside through the first sensing pads T11 and T12. However, this is only an example. For example, the first sensing pads T11 and T12 may be continuously arranged on one side of the signal pad DPD, but the inventive concept is not limited to this specific arrangement.

[0145] Referring again to Figure 6B and Figure 6C , the second electrode TE2 is arranged in the second direction DR2. Each of the second electrodes TE2 extends in the first direction DR1. Each of the second electrodes TE2 may include a plurality of second main patterns SP2 and a plurality of second connection patterns BP2.

[0146] Each of the second main pattern SP2 and the second connection pattern BP2 may be arranged in the first direction DR1. Each of the first main pattern SP1 and the second main pattern SP2 has a rhombus shape. However, this is only an example. For example, in the inventive concept, the shape of each of the first main pattern SP1 and the second main pattern SP2 is not limited thereto.

[0147] Each of the second connection patterns BP2 is disposed between the second main patterns SP2. Each of the second connection patterns BP2 connects two adjacent second main patterns SP2 to each other. The second main patterns SP2 are electrically connected through the second connection patterns BP2.

[0148] In this exemplary embodiment, the second connection pattern BP2 and the second main pattern SP2 are disposed on the same layer and thus are provided as a single body. Therefore, the second electrode TE2 may be provided as a single body extending in the first direction DR1. However, this is only an example. For example, the second connection pattern BP2 may be disposed on a layer different from that of the second main pattern SP2, but the inventive concept is not limited thereto.

[0149] The second sensing line TL2 is connected to the second electrode TE2 respectively. The second sensing line TL2 connects the second electrode TE2 to the second sensing pad T2.

[0150] For ease of description, Figure 6C N second sensing lines L21, L22, L23, L24, ……, and L2N of the second sensing line TL2 are shown. The second sensing lines L21, L22, L23, L24, ……, and L2N are connected to the corresponding second electrodes TE2 respectively. The number N may correspond to the number of the second electrodes TE2 provided in the input sensing unit ISU.

[0151] The second sensing line TL2 may transmit the electrical signal provided through the second sensing pad T2 to the second electrode TE2, or may transmit the electrical signal provided from the second electrode TE2 to the outside through the second sensing pad T2.

[0152] The second electrode TE2 may receive an electrical signal different from the electrical signal applied to the first electrode TE1. Here, the second electrode TE2 may generate an electric field together with the first electrode TE1. For example, the first electrode TE1 may receive a driving signal, and the second electrode TE2 may receive a sensing signal. The input sensing unit ISU may operate in a mutual capacitance mode, in which the external input TC is sensed by the change of the capacitance formed between the second electrode TE2 and the first electrode TE1 (see Figure 1 ).

[0153] Optionally, the second electrode TE2 may receive the same type of electrical signal as the first electrode TE1. For example, the first electrode TE1 and the second electrode TE2 may receive sensing signals. The input sensing unit ISU may operate in a self-capacitance mode, in which the information of the external input TC is sensed by the change of the sensing signal according to the external input TC.

[0154] Referring again to Figure 6B and Figure 6C , the third electrode TE3 is arranged in the second direction DR2. Each of the third electrodes TE3 extends in the first direction DR1. In this exemplary embodiment, the third electrode TE3 may extend and be arranged parallel to the second electrode TE2.

[0155] Each of the third electrodes TE3 may include a plurality of third main patterns SP3 and a plurality of third connection patterns BP3. Each of the third main patterns SP3 and the third connection patterns BP3 may be arranged in the first direction DR1.

[0156] The third main pattern SP3 may be disposed inside the second main pattern SP2. In this exemplary embodiment, the third main patterns SP3 may be respectively disposed in the predetermined openings SP-OP defined in the second main pattern SP2.

[0157] The third main pattern SP3 can be accommodated in the opening SO-OP and can be separated from the second main pattern SP2 in the plan view. In this exemplary embodiment, in the plan view, the third main pattern SP3 and the second main pattern SP2 may not overlap each other. In this exemplary embodiment, each of the third main patterns SP3 can be surrounded by each of the second main patterns SP2.

[0158] Each of the third main patterns SP3 can include a first part (or a central part) MP and a second part (or a branch part) PP. The first part MP can have a shape similar to that of each of the second main patterns SP2. In this exemplary embodiment, the first part MP can be in a rhombus shape having a size smaller than that of each of the second main patterns SP2.

[0159] The second part PP is connected to one side of the first part MP. As an example, the second part PP can have a rod shape extending in the first direction DR1. In this exemplary embodiment, the second part PP can be provided in a plurality and can be connected to both sides opposite to each other along the first direction DR1.

[0160] Each of the third connection patterns BP3 is disposed between the third main patterns SP3. Each of the third connection patterns BP3 connects two adjacent third main patterns SP3 to each other. The third main patterns SP3 are electrically connected through the third connection patterns BP3. However, this is only an example. For example, the third electrode TE3 can be arranged in the first direction DR1, but the inventive concept is not limited thereto.

[0161] In the plan view, the third connection pattern BP3 can be separated from the first connection pattern BP1. The third connection pattern BP3 can be arranged such that the third connection pattern BP3 does not overlap the first connection pattern BP1 in the plan view. Each of the third connection patterns BP3 according to this exemplary embodiment can have a shape that is bent (folded) at least once along the first direction DR1. In this exemplary embodiment, each of the third connection patterns BP3 has a shape that is bent once.

[0162] In the plan view, each of the third connection patterns BP3 can be separated from the first connection pattern BP1 by its bent shape, so as to overlap the first main pattern SP1. Because each of the third connection patterns BP3 according to the inventive concept has a bent shape, the third connection pattern BP3 can be stably connected to the third main pattern SP3 without disturbing the first connection pattern BP1.

[0163] The third sensing line TL3 is connected to the third electrode TE3, respectively. The third sensing line TL3 connects the third sensing pad T3 to the third electrode TE3. In this exemplary embodiment, each of the third sensing pad T3 and the third sensing line TL3 is provided as a single body. The third electrode TE3 may receive a ground voltage through the third sensing pad T3.

[0164] According to an exemplary embodiment of the inventive concept, the input sensing unit ISU may further include a third electrode TE3 that receives a ground voltage. Accordingly, it is possible to prevent signal failures such as noise from occurring in the input sensing unit ISU due to the electrical signals provided to the display unit DPU. Accordingly, it is possible to easily prevent deterioration of the sensitivity of the input sensing unit ISU.

[0165] In addition, according to the inventive concept, the third connection pattern BP3 constituting the third electrode TE3 may be designed such that the third connection pattern BP3 does not overlap with the first connection pattern BP1 provided on the same layer, to prevent the third electrode TE3 and the first electrode TE1 from interfering with each other. Accordingly, the electrical reliability of the input sensing unit ISU may be improved.

[0166] As Figure 6D shown, in the input sensing unit ISU, each of the third sensing line TL3 and the third sensing pad T3 may be provided as a plurality. A plurality of third sensing units TL3P and a plurality of third sensing pads T3 may be connected to corresponding third electrodes TE3, respectively. Here, the third electrode TE3 may receive an electrical signal for sensing noise in the active area AA. According to the inventive concept, the input sensing unit ISU may be designed in various structures, but the inventive concept is not limited thereto.

[0167] Figure 7 is a plan view showing a part of an input sensing unit according to an exemplary embodiment of the inventive concept. Figure 8A and Figure 8B is a cross-sectional view showing a part of an input sensing unit according to an exemplary embodiment of the inventive concept. Figure 7 shows Figure 6C the area AA'. Figure 8A shows a cross-section taken along the line I-I' of Figure 7 , Figure 8B shows a cross-section taken along the line II-II' of Figure 7 . Hereinafter, the present disclosure will be described with reference to Figures 7 to 8B . The same components as those of Figures 1 to 6D may be given the same reference numerals, and their detailed descriptions will be omitted.

[0168] For ease of description, Figure 7A region is shown in which a first connection pattern BP1, a second connection pattern BP2, and a third connection pattern BP3 are provided.

[0169] The first main pattern SP1 and the second main pattern SP2 may be provided on the same layer and may be separated from each other. A predetermined space GS1 may be defined between the first main pattern SP1 and the second main pattern SP2. Although not shown, a floating pattern separated from the first main pattern SP1 and the second main pattern SP2 may be further provided in the separated space GS1 between the first main pattern SP1 and the second main pattern SP2.

[0170] The second main pattern SP2 and the third main pattern SP3 may be provided on the same layer and may be separated from each other. In this exemplary embodiment, the third main pattern SP3 may be respectively provided in predetermined openings SP-OP defined in the second main pattern SP2. Accordingly, a predetermined space GS2 may be defined between the second main pattern SP2 and the third main pattern SP3. In a plan view, the second main pattern SP2 and the third main pattern SP3 may not overlap each other.

[0171] In this exemplary embodiment, the first connection pattern BP1 may be provided on a layer different from the layer of the first main pattern SP1, the second main pattern SP2, the second connection pattern BP2, and the third main pattern SP3, and a predetermined insulating layer SIL may be interposed therebetween.

[0172] The first connection pattern BP1 is provided on a layer different from the layer of the second connection pattern BP2. In this exemplary embodiment, the first connection pattern BP1 may cross the second connection pattern BP2 in a plan view. The first connection pattern BP1 may be connected to the first main pattern SP1 through a contact portion CNT1 passing through the insulating layer SIL.

[0173] The third connection pattern BP3 and the first connection pattern BP1 may be provided on the same layer. The third connection pattern BP3 may be connected to the third main pattern SP3 through a contact portion CNT3 passing through the insulating layer SIL.

[0174] In a plan view, the third connection pattern BP3 may be separated from the first connection pattern BP1. The third connection pattern BP3 may not overlap the first connection pattern BP1. As described above, the third connection pattern BP3 may be bent in a first direction DR1 in a plan view to be separated from the first connection pattern BP1, so as to overlap the first main pattern SP1.

[0175] According to the inventive concept, even if the third connection pattern BP3 and the first connection pattern BP1 are disposed on the same layer, the third connection pattern BP3 can be connected to the third main pattern SP3 and the first main pattern SP1 without any possibility of electrical short - circuit with respect to each other. Accordingly, the electrical reliability of the input sensing unit ISU can be improved.

[0176] Figure 9 is a plan view showing a part of an input sensing unit according to an exemplary embodiment of the inventive concept. Figures 10A to 10C is a plan view showing a part of an input sensing unit according to an exemplary embodiment of the inventive concept. For ease of description, Figure 9 shows the region corresponding to Figure 7 the region of, Figures 10A to 10C shows Figure 9 the inter - layer plan view of this region of. Hereinafter, the inventive concept will be described with reference to Figures 9 to 10C . Components identical to those of Figures 1 to 8B will be given the same reference numerals and their detailed description will be omitted.

[0177] As shown in Figure 9 , the input sensing unit ISU_M may include a plurality of grid lines MSL. The grid lines MSL include a first grid line MS1 and a second grid line MS2, which extend in a direction crossing the first direction DR1 and the second direction DR2 and cross each other. Predetermined openings MS_OP (hereinafter referred to as grid openings) are defined in the grid lines MSL. Each of the grid openings MS_OP may correspond to the emission region PXA described above (see Figure 5A ). Accordingly, even if the grid lines MSL are made of an optically opaque material, the influence of the input sensing unit ISU_M on the emission region PXA can be minimized to prevent deterioration of the display characteristics of the display device.

[0178] The grid lines MSL may be constituent components of each of the first electrode TE1_M, the second electrode TE2_M, and the third electrode TE3_M. Specifically, each of the first main pattern SP1_M, the second main pattern SP2_M, the third main pattern SP3_M, and the second connection pattern BP2_M may include the grid lines MSL. The cut - out spaces of the grid lines MSL may define the boundaries between the first main pattern SP1_M, the second main pattern SP2_M, the third main pattern SP3_M, and the second connection pattern BP2_M.

[0179] The first connection pattern BP1_M may be provided in plural in the first direction DR1. The first connection pattern BP1_M may include a portion bent along the second direction DR2. Accordingly, the first connection pattern BP1_M may not overlap the second connection pattern BP2_M in a plan view and may overlap the second main pattern SP2_M in the plan view.

[0180] The third connection pattern BP3_M is provided to be separated from the first connection pattern BP1_M. The third connection pattern BP3_M may be provided in plural in the second direction DR2. The third connection pattern BP3_M may include a portion bent along the first direction DR1. Accordingly, the third connection pattern BP3_M may not overlap the second connection pattern BP2_M and the first connection pattern BP1_M in a plan view and may overlap the first main pattern SP1_M in the plan view.

[0181] According to the inventive concept, the first connection pattern BP1_M and the third connection pattern BP3_M are provided on a layer different from the layer of the grid line MSL. Referring to Figures 10A to 10C , the first connection pattern BP1_M and the third connection pattern BP3_M may constitute the first layer LY1, the grid line MSL may constitute the third layer LY3, and the contact portions CNT1_M and CNT3_M may constitute the second layer LY2.

[0182] Specifically, the first connection pattern BP1_M and the third connection pattern BP3_M are provided on the first layer LY1. The first layer LY1 may be a layer provided under an insulating layer SIL (see Figure 8A ). The first connection pattern BP1_M and the third connection pattern BP3_M may be separated from the first main pattern SP1_M, the second main pattern SP2_M, the third main pattern SP3_M, and the second connection pattern BP2_M and then provided as different layers.

[0183] The first connection pattern BP1_M and the third connection pattern BP3_M may extend along the grid line MSL. Each of the first connection pattern BP1_M and the third connection pattern BP3_M may have a shape corresponding to the grid line MSL. Accordingly, each of the first connection pattern BP1_M and the third connection pattern BP3_M may have a shape formed by removing a portion of the grid line MSL. Accordingly, the influence of the first connection pattern BP1_M and the third connection pattern BP3_M on the emission region PXA may be reduced.

[0184] The second layer LY2 may correspond to the insulating layer SIL. The insulating layer SIL, which defines the contact portions CNT1_M and CNT3_M, may be disposed on the first connection pattern BP1_M and the third connection pattern BP3_M. The contact portions CNT1_M and CNT3_M may be defined to pass through the regions in the region where the insulating layer SIL and the grid line MSL are required to be connected, which overlaps with the first connection pattern BP1_M and the third connection pattern BP3_M.

[0185] The third layer LY3 may be a layer disposed on the insulating layer SIL. The grid line MSL is disposed on the insulating layer SIL. That is, each of the first main pattern SP1_M, the second main pattern SP2_M, the third main pattern SP3_M, and the second connection pattern BP2_M may be disposed on the uppermost layer of the input sensing unit ISU_M. The portions of the first main pattern SP1_M, the second main pattern SP2_M, the third main pattern SP3_M, and the second connection pattern BP2_M that overlap with the contact portions CNT1_M and CNT3_M may pass through the insulating layer SIL and may be connected to the first connection pattern BP1_M and the third connection pattern BP3_M.

[0186] The input sensing unit ISU_M according to an exemplary embodiment of the inventive concept may further include a floating pattern FL disposed inside the first main pattern SP1_M. The floating pattern FL may be disposed in a predetermined opening defined in the first main pattern SP1_M. The floating pattern FL is disposed to be separated from the first main pattern SP1_M. According to the inventive concept, since the floating pattern FL is further provided, it may be difficult to distinguish the second electrode TE2_M1 and the first electrode TE1_M disposed on the third main pattern SP3_M from each other. Therefore, the visibility of the input sensing unit ISU_M may be improved.

[0187] In addition, according to the inventive concept, since the floating pattern FL is further provided, deterioration of the sensitivity of the input sensing unit ISU_M due to an electric signal applied to the display unit DPU may be prevented. Therefore, the electrical reliability of the input sensing unit ISU_M may be improved.

[0188] Figure 11 is a plan view of an input sensing unit according to an exemplary embodiment of the inventive concept. Figures 12A to 12C is a plan view of an input sensing unit according to an exemplary embodiment of the inventive concept. Figure 12A Shows Figure 11 an enlarged view of the region BB' of Figure 12B Shows Figure 12A an enlarged view of a part of this region of Figure 12C Shows Figure 11 an enlarged plan view of the region CC' of Figures 11 to 12Cto describe the inventive concept. Components identical to those of Figures 1 to 10C will be given the same reference numerals and their detailed description will be omitted.

[0189] Figure 11 A part of the region of the input sensing unit ISU_M1 is shown based on the region on which a first connection pattern BP1_M1, a second connection pattern BP2_M1, and a third connection pattern BP3_M1 are provided. In addition, Figure 11 A part of two first main patterns SP1_M1 arranged to be separated from each other in a second direction DR2 with the first connection pattern BP1_M1 therebetween, a part of two second main patterns SP2_M1 arranged to be separated from each other in a first direction DR1 with the second connection pattern BP2_M1 therebetween, and a part of two third main patterns SP3_M1 arranged to be separated from each other in the first direction DR1 with the third connection pattern BP3_M1 therebetween are shown. The input sensing unit ISU_M1 according to the inventive concept includes a plurality of grid lines MSL.

[0190] As Figure 11 and Figure 12A shown, in the input sensing unit ISU_M1, each of the first connection pattern BP1_M1 and the third connection pattern BP3_M1 may have various shapes. For example, the first connection pattern BP1_M1 may be provided as a plurality separated from each other in the second direction DR2 to be respectively connected to the first main pattern SP1_M1.

[0191] Each of the first connection pattern BP1_M1 extends along a part of the grid line MSL. Accordingly, each of the first connection pattern BP1_M1 may not overlap with the grid opening MS_OP and may substantially expose the emission region PXA. Thus, deterioration of display characteristics of the display device due to lamination of the input sensing unit ISU_M can be prevented.

[0192] The third connection pattern BP3_M1 extends along a part of the grid line MSL. The third connection pattern BP3_M1 may be separated from the first connection pattern BP1_M1 in a plan view. Figure 12B An enlarged view of a part of this region of Figure 12A adjacent to the third connection pattern BP3_M1, the first connection pattern BP1_M1, and the second connection pattern BP2_M1 is shown.

[0193] Referring to Figure 12A and Figure 12B, in a plan view, the third connection pattern BP3_M1 can be separated from the first connection pattern BP1_M1. In the plan view, the third connection pattern BP3_M1 can be partially overlapped with the first main pattern SP1_M1. According to the inventive concept, an electrical short circuit between the third connection pattern BP3_M1 and the first connection pattern BP1_M1 provided on the same layer can be prevented.

[0194] In addition, the third connection pattern BP3_M1 can be bent such that the third connection pattern BP3_M1 does not overlap with the first connection pattern BP1_M1 in the plan view. The third connection pattern BP3_M1 can have a shape that is bent at least once along the first direction DR1. In this embodiment, the third connection pattern BP3_M1 can have a zigzag shape that is bent several times along the first direction DR1. According to the inventive concept, since the third connection pattern BP3_M1 is designed to have a bent shape, the non-overlapping portion between the third connection pattern BP3_M1 and the first connection pattern BP1_M1 can be increased, thereby easily preventing interference with the emission region PXA.

[0195] Referring to Figure 11 and Figure 12C , each of the third main patterns SP3_M1 can include a first portion MP1 and a second portion PP1. Each of the first portion MP1 and the second portion PP1 can be arranged to be separated from the second main pattern SP2_M1 by a predetermined distance.

[0196] The second portion PP1 can have a shape that is bent at least once along the first direction DR1. The second portion PP1 according to this exemplary embodiment can have a zigzag shape extending along the first direction DR1. According to the inventive concept, the second portion PP1 can be designed to be bent several times, thereby preventing the boundary (e.g., space GS2-1) between the third main pattern SP3_M1 and the second main pattern SP2_M1 provided inside the second main pattern SP2_M1 from being easily visible. In addition, it will be difficult to distinguish the third main pattern SP3_M1 from the second main pattern SP2_M1. Therefore, the visibility of the input sensing unit ISU_M1 can be improved.

[0197] Figure 13A is a perspective view showing a combined state of a display device according to an exemplary embodiment of the inventive concept. Figure 13B is Figure 13A an exploded perspective view of the display device; Figures 14A to 14C is a plan view showing a part of the constituent components of Figure 13B ; Figure 14A shows a plan view of the display unit DPU_H, Figure 14B shows Figure 14A a schematic enlarged view of the region XX' of Figure 14CA plan view of the input sensing unit ISU_H is shown. Hereinafter, reference will be made to Figures 13A to 14C to describe the inventive concept. Components identical to those of Figures 1 to 12C will be given the same reference numerals and their detailed description will be omitted.

[0198] Referring to Figure 13A , the display device DD_H may be a device activated according to an electrical signal. Examples of the display device DD_H may include a tablet, a notebook, a computer, a smart TV, etc. In this exemplary embodiment, the display device DD_H including a smartphone will be described as an example.

[0199] The display device DD_H may display an image IM and may sense an external input TC. The image IM includes a still image and a moving image. The external input TC includes various types of external inputs, such as a part of a user's body, light, heat, or pressure, etc. In this embodiment, the user input TC is illustrated as a user's hand applied to the front surface FS.

[0200] In this exemplary embodiment, the display device DD_H provides the front surface FS on which the image IM is displayed and the external input TC is sensed. However, this is only an example. For example, as described above, the user input TC may be provided in various forms. The display device DD_H may sense the user input TC applied to the side surface or the rear surface of the display device DD_H according to the structure of the display device DD_H, but the inventive concept is not limited thereto.

[0201] As shown in Figure 13B , the display device DD_H may include a window panel WP, an electronic panel EP_H, an electronic module EM, and a housing EDC. The window panel WP may include an insulating material. For example, the window panel WP may be made of glass, plastic, or a combination thereof.

[0202] The front surface FS of the display device DD_H may correspond to the front surface of the window panel WP. The front surface FS of the window panel WP includes a transmissive area TA and a border area BZA. The transmissive area TA may be an optically transparent area. For example, the transmissive area TA may be an area having a visible light transmittance of about 90% or more. The transmissive area TA may correspond to the effective area AA described above (see Figure 2A ).

[0203] The border area BZA may be an area having a lower light transmittance than that of the transmissive area TA. The border area BZA defines the shape of the transmissive area TA. The border area BZA may be disposed adjacent to the transmissive area TA to surround the transmissive area TA.

[0204] The border area BZA may have a predetermined color. The border area BZA may cover the peripheral area NAA of the electronic panel EP_H to prevent the peripheral area NAA from being visible from the outside. In this exemplary embodiment, the border area BZA may be defined by the light-blocking pattern WP-BZ described above (see Figure 2A ) and may correspond to the peripheral area NAA. However, this is only an example. For example, in the window panel WP, the border area BZA may be omitted.

[0205] According to this exemplary embodiment, a predetermined hole area HA may be defined in the window panel WP. The hole area HA may be provided within the transmissive area TA. In a plan view, the hole area HA overlaps with the electronic module EM. In this exemplary embodiment, the hole area HA of the window panel WP may correspond to the area that overlaps with the module hole MH of the electronic panel EP_H to be described later.

[0206] The electronic module EM is disposed below the window panel WP. In a plan view, the electronic module EM may overlap with the module hole MH and may also overlap with the hole area HA. The electronic module EM may receive an external input transmitted through the hole area HA, or may provide an output through the hole area HA. At least a part of the electronic module EM may be accommodated in the module hole MH. According to the inventive concept, the electronic module EM may be disposed to overlap with the active area AA, thereby preventing the border area BZA from increasing.

[0207] The electronic module EM includes various functional modules for driving the display device DD_H. The electronic module EM may be electrically connected to the electronic panel EP_H through a connection member (not shown). For example, the electronic module EM may be a camera, a speaker, or a sensor that senses light or heat.

[0208] The electronic panel EP_H may display an image IM and may sense an external input TC. In this exemplary embodiment, a predetermined module hole MH may be defined in the electronic panel EP_H. The module hole MH may be defined by passing through the electronic panel EP_H in the third direction DR3.

[0209] In this exemplary embodiment, the module hole MH may be defined within the active area AA. The module hole MH overlaps with the electronic module EM to be described later. The electronic module EM may receive external subject information provided to the outside of the window panel WP through the module hole MH.

[0210] Specifically, reference will be made to Figures 14A to 14C to describe the electronic panel EP_H. Figure 14A A plan view showing a part of the display unit DPU_H of the electronic panel EP_H is shown, Figure 14B A plan view showing the input sensing unit ISU_H of the electronic panel EP_H is shown. Figure 14BSchematically shows a region corresponding to the region XX' of the display unit DPU_H.

[0211] As Figure 14A and Figure 14B shown, the display unit DPU_H includes a plurality of pixels PX. In a plan view, the pixels PX can be arranged around the module hole MH to surround the module hole MH. The pixels PX can be respectively connected to a power line PL, a data line DL, and a scan line GL, and the power line PL, the data line DL, and the scan line GL are connected to a first power terminal VDD. The display pad DPD can include a pad D1 connected to the data line DL and a pad D2 connected to the first power terminal VDD. Figure 14A Shows a second power terminal VSS connected to the light-emitting element ELD. Hereinafter, repeated detailed descriptions of the pixels PX will be omitted.

[0212] The display unit DPU_H is penetrated by the module hole MH. In Figure 14B shown, two of the signal lines respectively connected to the pixels PX are shown - a first signal line SL1 and a second signal line SL2.

[0213] The first signal line SL1 extends in a first direction DR1. The first signal line SL1 is connected to the pixels PX arranged in the same row along the first direction DR1 among the pixels PX. The first signal line SL1 can correspond to the scan line GL. The first signal line SL1 can provide a gate signal for turning on the pixels PX to the corresponding pixels PX.

[0214] A part of the pixels PX connected to the first signal line SL1 can be arranged on the left side of the module hole MH, and another part of the pixels PX can be arranged on the right side of the module hole MH. Therefore, even if a part of the pixels PX relative to the module hole MH is omitted, the pixels PX in the same row connected to the first signal line SL1 can be basically turned on / off by the same gate signal.

[0215] The second signal line SL2 extends in a second direction DR2. The second signal line SL2 is connected to the pixels PX arranged in the same column along the second direction DR2 among the pixels PX. For example, the second signal line SL2 can correspond to the data line DL. The second signal line SL2 provides a data signal to the corresponding pixels PX.

[0216] A part of the pixels PX connected to the second signal line SL2 can be arranged above the module hole MH, and another part of the pixels PX can be arranged below the module hole MH. Therefore, even if a part of the pixels PX relative to the module hole MH is omitted, the pixels PX in the same column connected to the second signal line SL2 can receive data signals through the same data line.

[0217] In a display unit DPU_H according to an exemplary embodiment of the inventive concept, a first signal line SL1 may correspond to a scan line GL, and a second signal line SL2 may correspond to a data line DL. Alternatively, the first signal line SL1 and the second signal line SL2 may be one of a power line, an initial voltage line, and an emission control line. In addition, although not shown, each of the pixels PX may also be connected to another signal line (not shown).

[0218] Referring to Figure 14C , the input sensing unit ISU_H is penetrated by the module hole MH. At least a part of a first electrode TE1_H, a second electrode TE2_H, and a third electrode TE3_H disposed in the sensing area AA2 may be disposed adjacent to an edge of the module hole MH to surround the module hole MH. The first electrode TE1_H, the second electrode TE2_H, and the third electrode TE3_H adjacent to the module hole MH may include a first main pattern SP1, a second main pattern SP2, and a third main pattern SP3, and each main pattern has a shape in which a part thereof is removed when compared with the shape of each of the patterns separated from the module hole MH.

[0219] Referring again to Figure 13B , a housing EDC is disposed under the window panel WP. The housing EDC may be coupled to the window panel WP to define an appearance of the display device DD_H. The housing EDC may include a material having relatively high stiffness. For example, the housing EDC may include a plurality of frames and / or plates made of at least one of glass, plastic, and metal. The housing EDC provides a predetermined accommodation space. The electronic panel EP_H and the electronic module EM may be accommodated in the accommodation space and thus be protected from external impacts.

[0220] According to the inventive concept, the electronic module EM may be disposed such that a part of the electronic module EM overlaps with an effective area AA of the electronic panel EP_H and a transmissive area TA of the window panel WP. Accordingly, a surface area of the bezel area BZA may be reduced, thereby improving an aesthetic sense of the display device DD_H.

[0221] Figure 15A is an exploded perspective view of a display device according to an exemplary embodiment of the inventive concept, Figure 15B is a plan view showing a part of the constituent components of Figure 15A . Hereinafter, the inventive concept will be described with reference to Figure 15A and Figure 15B . The same reference numerals may be given to components identical to those of Figures 1 to 7 , and their detailed descriptions will be omitted.

[0222] The display device DD_N may include a window panel WP_N, an electronic panel EP_N, an electronic module EM1, and a housing EDC. When compared withFigure 13B When compared with the window panel WP, the window panel WP_N may further include a notch portion NTA defined on one side thereof.

[0223] The notch portion NTA may be formed by recessing a part of the extending side of the window panel WP_N toward the center of the window panel WP_N. Accordingly, the front surface FS of the window panel WP_N may include a transmissive area TA_N and a border area BZA_N, and each of the transmissive area TA_N and the border area BZA_N has a shape deformed due to the notch portion NTA. Each of the transmissive area TA_N and the border area BZA_N may be in the shape of a side having a recess corresponding to the notch portion NTA.

[0224] The notch portion NTA may be defined in an area of the window panel WP_N that overlaps with the electronic module EM1. The electronic module EM1 may be a camera, a speaker, or a sensor that senses light or heat. According to the inventive concept, the electronic module EM1 may be exposed to the outside through the notch portion NTA of the window panel WP_N.

[0225] The electronic panel EP_N is disposed between the window panel WP_N and the housing EDC. The notch portion NT may be provided in the electronic panel EP_N to correspond to the window panel WP_N. The notch portion NT of the electronic panel EP_N may be defined at a position that overlaps with the electronic module EM1. According to the inventive concept, the electronic module EM1 may be exposed from the electronic panel EP_N and the window panel WP_N, so that an output signal can be easily provided to the outside or external information can be easily received without disturbing the window panel WP_N or the electronic panel EP_N.

[0226] Referring to Figure 15B , the input sensing unit ISU_N may include a predetermined notch portion NT. In this exemplary embodiment, the notch portion NT may be defined by recessing a part of the upper side of the display unit DPU_N extending in the first direction DR1 in the opposite direction of the second direction DR2.

[0227] Since the notch portion NT is defined, when compared with Figure 6B 's input sensing unit ISU (see Figure 6B ), at least a part of the first electrode TE1_N, the second electrode TE2_N, and the third electrode TE3_N disposed in the sensing area AA2 may have a shape in which a part thereof is removed locally. For example, a part of the first electrode TE1_N may have a smaller surface area or length than the surface area or length of the area separated from the notch portion NT. The first electrode of the first electrode TE1_N separated from the notch portion NT in the second direction DR2 may have a smaller length and surface area than the length and surface area of the first electrode separated from the notch portion NT in the first direction DR1.

[0228] In addition, for example, a part of the second electrode TE2_N may be divided into a left part and a right part with respect to the notch portion NT. A second connection pattern BP2 that connects the two second main patterns SP2 of the second electrode TE2_N that are separated from each other with respect to the notch portion NT may extend along the edge of the notch portion NT. Accordingly, even if the second electrode TE2_N is separated by the notch portion NT, a part of the second electrode TE2_N may be electrically connected through the second connection pattern BP2.

[0229] In addition, for example, like the second electrode TE2_N, a part of the third electrode TE3_N may be divided into a left part and a right part with respect to the notch portion NT. Accordingly, a third connection pattern BP3 adjacent to the notch portion NT may extend along the edge of the notch portion NT to connect the two third main patterns SP3 that are separated from each other in the first direction DR1 and have the notch portion NT therebetween. Accordingly, even if the third electrode TE3_N is separated by the notch portion NT, a part of the third electrode TE3_N may be electrically connected through the third connection pattern BP3.

[0230] According to the inventive concept, an input sensing unit ISU_N having various shapes and a display device DD_N including the input sensing unit ISU_N may be provided. In addition, among the various shapes of the input sensing unit ISU_N, the third connection pattern BP3 may be designed such that the third connection pattern BP3 does not overlap with the first connection pattern BP1. Accordingly, an electronic device may be provided in which the third connection pattern BP3 and the first connection pattern BP1 are prevented from overlapping in a plan view, thereby improving electrical reliability.

[0231] According to the inventive concept, the overlap between signal lines transmitting different electrical signals may be reduced. Accordingly, the occurrence of noise caused by electrical interference between signal lines may be reduced, thereby improving the input sensing unit with improved external input sensitivity. In addition, a display device with improved electrical reliability may be provided.

[0232] Although specific exemplary embodiments have been described herein, other embodiments and modifications will be apparent from this description. Accordingly, the inventive concept is not limited to such embodiments, but rather to the claims and the broader scope of various obvious modifications and equivalent arrangements that will be apparent to those of ordinary skill in the art.

Claims

1. A display device, the display device comprising: A display unit, including pixels and a packaging layer, wherein the packaging layer covers the pixels and includes a first inorganic layer, a second inorganic layer, and an organic layer disposed between the first inorganic layer and the second inorganic layer; And A user input sensing unit, including at least one sensing insulating layer disposed on the packaging layer, and a first electrode, a second electrode, and a third electrode insulated from each other, Wherein: The first electrode includes a first main pattern and a first connection pattern, the first connection pattern is disposed on a different layer from the first main pattern and is connected to the first main pattern, The second electrode includes a second main pattern and a second connection pattern, the second main patterns each have an opening and are insulated from the first main pattern, and the second connection pattern is disposed between the second main patterns, and The third electrode includes a third main pattern and a third connection pattern, the third main pattern is disposed in a corresponding one of the openings, and the third connection pattern is disposed on the same layer as the first connection pattern and is connected to the third main pattern, and Wherein, at least a part of the third connection pattern overlaps with one of the first main patterns in the first main patterns and the second main pattern in a plane.

2. The display device according to claim 1, wherein, The at least one sensing insulating layer includes a first sensing insulating layer disposed on the second inorganic layer, a second sensing insulating layer disposed on the first sensing insulating layer, and a third sensing insulating layer disposed on the second sensing insulating layer.

3. The display device according to claim 2, wherein, The first connection pattern and the third connection pattern are disposed on the first sensing insulating layer and are covered by the second sensing insulating layer.

4. The display device according to claim 3, wherein: The first connection pattern is connected to the first main pattern through a first contact hole defined in the first sensing insulating layer; And The third connection pattern is connected to the third main pattern through a second contact hole defined in the first sensing insulating layer.

5. The display device according to claim 3, wherein, The first main pattern, the second main pattern, the second connection pattern, and the third main pattern are disposed on the second sensing insulating layer and are covered by the third sensing insulating layer.

6. The display device according to claim 2, wherein, The first sensing insulating layer is directly disposed on the second inorganic layer.

7. The display device according to claim 1, wherein: Each of the second main pattern and the third main pattern is arranged to be spaced apart from each other in a first direction; And The first main patterns are arranged to be spaced apart from each other in a second direction intersecting the first direction.

8. The display device according to claim 7, wherein: The second connection pattern extends in the first direction; and The first connection pattern intersects with the second connection pattern in a plane and extends in the second direction.

9. The display device according to claim 8, wherein: The third connection pattern includes a first part extending in a first inclined direction intersecting the first direction and the second direction, and a second part extending in a second inclined direction intersecting the first inclined direction; The first part overlaps with a part of one of the first main patterns in the first main patterns and one of the second main patterns in the second main pattern; And The second part overlaps with another part of one of the first main patterns in the first main patterns and another second main pattern in the second main pattern.

10. The display device according to claim 8, wherein, The third connection pattern does not overlap with the first connection pattern and the second connection pattern.

11. The display device according to claim 1, wherein, Each of the third main patterns includes a first part and a second part, the first part having a diamond shape, and the second parts being spaced apart from each other in one direction and the first part being disposed between the second parts.

12. The display device according to claim 11, wherein, The second part has a zigzag shape.

13. The display device according to claim 1, wherein, Each of the first main pattern, the second main pattern, the second connection pattern, and the third main pattern includes grid lines extending in directions crossing each other.

14. The display device according to claim 1, wherein, The second electrode and the third electrode include the same material.

15. The display device according to claim 1, wherein, The second main pattern and the second connection pattern have an integral shape.

16. The display device according to claim 15, wherein, The third electrode is provided with a ground voltage.

17. An electronic device, the electronic device comprising: Window panel; A display unit including pixels and a packaging layer that covers the pixels and includes a first inorganic layer, a second inorganic layer, and an organic layer disposed between the first inorganic layer and the second inorganic layer; A user input sensing unit including at least one sensing insulating layer disposed on the packaging layer, and a first electrode, a second electrode, and a third electrode insulated from each other; And A housing that houses the display unit and the user input sensing unit and is coupled to the window panel, wherein the first electrode includes a first main pattern and a first connection pattern, the first connection pattern being disposed on a different layer from the first main pattern and connected to the first main pattern, the second electrode includes a second main pattern and a second connection pattern, the second main patterns each having an opening and being insulated from the first main pattern, and the second connection pattern being disposed between the second main patterns, and the third electrode includes a third main pattern and a third connection pattern, the third main pattern being disposed in a corresponding one of the openings, the third connection pattern being disposed on the same layer as the first connection pattern and connected to the third main pattern, and wherein at least a part of the third connection pattern overlaps with one of the first main patterns and the second main pattern in a plane.

18. The electronic device according to claim 17, wherein, The at least one sensing insulating layer includes a first sensing insulating layer disposed on the second inorganic layer, a second sensing insulating layer disposed on the first sensing insulating layer, and a third sensing insulating layer disposed on the second sensing insulating layer, and wherein the first connection pattern and the third connection pattern are disposed on the first sensing insulating layer and covered by the second sensing insulating layer.

19. The electronic device according to claim 18, wherein: The first connection pattern is connected to the first main pattern through a first contact hole defined in the first sensing insulating layer; And The third connection pattern is connected to the third main pattern through a second contact hole defined in the first sensing insulating layer.

20. The electronic device according to claim 18, wherein, The first main pattern, the second main pattern, the second connection pattern, and the third main pattern are disposed on the second sensing insulating layer and covered by the third sensing insulating layer.

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