Segmented adaptive frequency hopping digital pre-distortion system
By using independent clock computing processing units on the FPGA platform to process frequency hopping signals in segments, the problems of large computing resource consumption and insufficient parameter update speed in the prior art are solved, and efficient adaptive frequency hopping digital predistortion processing is realized, which improves system performance.
Patent Information
- Application Number
- CN202510356825.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-25
- Publication Date
- 2025-06-27
AI Technical Summary
The existing frequency hopping digital predistortion technology is difficult to effectively adapt to the dynamic spectrum changes of frequency hopping signals, and the adaptive DPD technology consumes a lot of computing resources and insufficient parameter update speed, which affects the predistortion effect.
Using the FPGA platform, model parameters are solved through the calculation processing unit under the independent clock and updated to the FPGA. The system processes each frequency hopping point in segments to reduce the system complexity and updates parameters in the idle state to avoid parameter solution delays.
It realizes that the predistortion parameters are adaptively updated in segments while ensuring efficient calculations, adapting to the situation of different frequency jumps, and improving signal quality and system performance.
Smart Images
Figure CN120223109A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of wireless communication, and particularly relates to a segmented adaptive frequency-hopping digital predistortion system. Background Art
[0002] With the rapid development of wireless communication technology, the effective utilization of spectrum resources has become increasingly important. In an environment of high data rate and high frequency bandwidth, in order to meet the growing communication needs, the effective use of spectrum has become a key technical issue in the field of wireless communication. The frequency hopping technology is widely used in wireless communication systems. Through fast and random frequency hopping, this technology can not only significantly improve the anti-interference ability of the system, but also achieve the goal of data confidentiality.
[0003] However, with the continuous progress of signal processing technology in communication systems, the frequency hopping technology faces a series of challenges in practical applications. Especially the nonlinear distortion of signals and the interference introduced during the transmission process seriously affect the signal quality and the overall performance of the system. To solve these problems, the digital predistortion technology (Digital Predistortion, DPD) emerged as the times require. This technology can compensate the signal at the transmitter end, thereby eliminating or reducing the distortion caused by system nonlinearity, and effectively improving the linearity and spectrum efficiency of the system.
[0004] There are some problems in the current frequency-hopping digital predistortion technology solutions: one is that the traditional open-loop DPD cannot effectively adapt to the dynamic spectrum changes of frequency-hopping signals, so it cannot provide continuous signal quality assurance; the other is that the existing adaptive DPD technologies often require a large amount of computing resources to solve the model parameters. Especially during frequency hopping and high-speed signal processing, the speed of parameter update will have a serious impact on the predistortion effect.
[0005] Therefore, how to achieve segmented adaptive digital predistortion processing on the existing platform on the premise of ensuring efficient calculation to adapt to different frequency hopping situations has become an important research direction in the current field of wireless communication. Summary of the Invention
[0006] The purpose of the present invention is to propose a segmented adaptive frequency-hopping digital predistortion system in view of the problems and improvement requirements existing in the above-mentioned prior art. This system uses an FPGA (Field Programmable Gate Array) platform. By using a computing processing unit under an independent clock to solve the model parameters and then update them into the FPGA. By analyzing the offline data of all frequency points, the general model with the lowest complexity is selected. At the same time, the frequency band is segmented for processing, and the predistortion parameters of each segment are solved and used as the initial value of the predistortion parameter table.
[0007] To achieve the above object, the present invention adopts the following technical solutions:
[0008] A segmented adaptive frequency hopping digital predistortion system, including a digital predistortion unit, a local oscillator generator, a digital mixer, an analog front end, a data buffer, a parameter solver, and an analog front end;
[0009] The digital predistortion unit includes a parameter table and a predistortion processing unit; the parameter table stores predistortion parameters using a storage method divided by frequency bands; the predistortion processing unit is used to receive the externally input baseband signal, read the corresponding parameters from the parameter table according to the frequency band to which the current carrier frequency belongs, and finally perform predistortion processing on the baseband signal according to the read parameters;
[0010] The local oscillator generator is internally provided with a random sequence generator, generates a local oscillator signal according to the pseudo-random sequence generated by the random sequence generator, and transmits the local oscillator signal to the up-conversion unit and the down-conversion unit respectively;
[0011] The digital mixer includes an up-conversion unit and a down-conversion unit. The up-conversion unit is used to perform up-conversion processing on the received first signal and the local oscillator signal to obtain a digital radio frequency signal, convert the digital radio frequency signal into an analog radio frequency signal and then transmit it to the analog front end; the down-conversion unit is used to convert the amplified analog signal into a digital radio frequency signal, and perform down-conversion processing on the digital radio frequency signal and the local oscillator signal to obtain a second signal;
[0012] The analog front end amplifies the received analog signal and then transmits it to the system peripheral components and the down-conversion unit respectively;
[0013] The data buffer receives and stores the second signal and the corresponding carrier frequency, the first signal and the corresponding carrier frequency of the first signal; at the request of the parameter solver, it captures the first signal, the carrier frequency corresponding to the first signal, the second signal, and the carrier frequency corresponding to the second signal at the current frequency point, and sends them to the parameter solver;
[0014] The parameter solver is internally provided with a calculation processing unit, which is used to send a capture data request to the data buffer in the idle state; after obtaining the data, the calculation processing unit first performs an alignment operation on the data according to the frequency band to which the current frequency belongs, then calculates the predistortion parameters of the frequency band, and stores them in the corresponding frequency band position in the parameter table to complete parameter update.
[0015] Further, the storage method of the parameter table divided by frequency bands includes: first dividing the frequency range into multiple different frequency bands, and then storing the corresponding predistortion parameters for each frequency band respectively.
[0016] Further, the frequency band division adopted by the parameters includes, but is not limited to, segmentation methods such as uniform segmentation. Further, the design calculation processing unit of the parameter solver is any processor with a solution ability, such as an ARM core, a CPU, or a DSP, etc.
[0017] Further, the above-mentioned segmented adaptive frequency hopping digital predistortion system uses an FPGA as a platform.
[0018] Further, the predistortion processing unit adopts an offline predistortion model; the offline predistortion model reduces the computational complexity by analyzing the offline analysis frequency points and using a sparse parameter identification algorithm.
[0019] The present invention reduces the system complexity by segmenting and processing each frequency hopping point, and realizes the changes of different frequency hops. By separating the parameter solver from the digital predistorter and operating it in an independent clock domain, the problem that the parameter solving delay affects the communication quality is avoided. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Figure 1 It is a block diagram of the digital predistortion system of the present invention.
[0021] Figure 2 It is a flowchart of adaptively updating the predistortion parameters in the embodiment.
[0022] Figure 3 It is a schematic diagram of the state change of adaptively updating the parameters in this embodiment. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0023] The present invention will be further described in detail below in conjunction with the embodiments and drawings of the present invention.
[0024] A segmented adaptive frequency hopping digital predistortion system provided in this embodiment uses an FPGA as a platform and is externally connected to other analog devices. Its system block diagram is as Figure 1 shown, including:
[0025] It includes a digital predistorter, a local oscillator generator, a digital mixer, an analog front end, a data buffer, a parameter solver, and a peripheral analog front end. Among them, the digital predistorter is located in the Programmable Logic (PL), and the parameter solver is located in the Processing System.
[0026] The digital predistorter includes a parameter table for storing parameters and a predistortion processing unit; the parameter table adopts a storage method divided by frequency bands: first, the frequency range is divided into multiple different frequency bands, and then the corresponding predistortion parameters are stored for each frequency band respectively; the predistortion processing unit is used to receive the externally input baseband signal, read the corresponding parameters from the parameter table according to the frequency band to which the current carrier frequency belongs, and finally perform predistortion processing on the baseband signal according to the read parameters. In this embodiment, the operating frequency range of the predistortion system is divided into multiple frequency bands (sub-bands), and the predistortion parameters are calculated for each frequency band respectively, and then these parameters are used as the initial values of the predistortion parameter table.
[0027] The local oscillator generator is internally provided with a random sequence generator. According to the pseudo-random sequence generated by the random sequence generator, local oscillator signals with different frequencies are generated. Whenever the system needs to adjust the operating frequency band, the local oscillator generator generates a local oscillator signal with the corresponding frequency according to the received pseudo-random code; and transmits the local oscillator signal to the up-conversion unit and the down-conversion unit respectively.
[0028] The digital mixer includes an up-conversion unit and a down-conversion unit. The up-conversion unit is used to perform up-conversion processing on the received first signal and the local oscillator signal. Through the up-conversion processing, the first signal is converted to the required frequency range to obtain a digital radio frequency signal suitable for the frequency band requirements of different communication systems, and then the digital radio frequency signal is converted into an analog radio frequency signal through digital / analog conversion. The signal can enter the radio frequency transmission path of the wireless communication system and be transmitted to the analog front end, such as an antenna, a receiver, etc. This conversion process ensures that the signal can be effectively transmitted at the physical layer and meets the requirements of the radio frequency system.
[0029] The down-conversion unit is used to convert the amplified analog signal into a digital radio frequency signal, and perform down-conversion processing on the digital radio frequency signal and the local oscillator signal to obtain a second signal. This process occurs at the receiving end. After converting the analog radio frequency signal into a digital radio frequency signal, the frequency conversion processing can be performed to convert it into a second signal convenient for subsequent predistortion processing.
[0030] The data buffer is responsible for receiving and storing the second signal and its corresponding carrier frequency, as well as the first signal and its corresponding carrier frequency. In the signal processing chain, the main function of the data buffer is to provide data buffering and caching to ensure the smooth and accurate signal transmission process between modules. In this embodiment, when the data buffer provides data to the parameter solver, it will capture the first signal, the carrier frequency corresponding to the first signal, the second signal, and the carrier frequency corresponding to the second signal at the current frequency point according to the request of the parameter solver, and send these data to the parameter solver. In addition, when the data buffer stores the calculation results of the parameter solver, it also operates according to the request of the parameter solver.
[0031] A computing and processing unit is designed in the parameter solver to send a data capture request to the data buffer in the idle state; when the required data is obtained, the computing and processing unit first aligns the data, then calculates the predistortion parameters using this data, and stores the calculation result in the parameter table to complete the update. Specifically, the parameter solver calculates based on the signal data sent by the data buffer, and sends the calculation result to the parameter table for dynamically adjusting the parameters of the predistortion model. This process aims to ensure that the signal can be accurately restored at the receiving end after digital predistortion processing, thereby improving the overall performance of the system. The signal data sent by the data buffer includes the input of the upconverter, the output of the downconverter, and the frequencies of the local oscillator signals generated by the corresponding local oscillator generators.
[0032] In a frequency hopping communication system, the process of adaptively updating the predistortion parameters using the above segmented adaptive frequency hopping digital predistortion system is as Figure 2 shown:
[0033] When the frequency hopping communication starts, if the frequency changes, the system needs to update the current frequency information in a timely manner. Subsequently, the digital predistorter reads the corresponding predistortion parameters from the parameter table according to the current carrier frequency at the transmitter; at the same time, the local oscillator signal generator generates a carrier signal corresponding to the current frequency. When the baseband signal arrives, this segmented adaptive frequency hopping digital predistortion system sequentially performs operations such as signal predistortion and upconversion. At this time, the data buffer starts to store the input and output signals at the current carrier frequency, and the parameter solver operates independently of the digital predistorter in an independent clock domain. When the parameter solver issues a request signal, the data buffer transfers the stored data to the parameter solver for parameter calculation; if the request signal does not arrive, the relevant data at the next frequency is continuously stored. When the parameter solver is idle, it starts to send a request to the data buffer to obtain the signal data at the current frequency point, then solves the predistortion parameters, and stores the solved predistortion parameters in the parameter table, overwriting the parameters at the corresponding frequency point to complete the update.
[0034] The parameter table of this embodiment pre-stores initial parameters to ensure that the performance of the system will not deteriorate excessively. In this embodiment, the initial parameters are determined by first dividing the frequency range into a plurality of different frequency bands, then solving the distortion parameters of each frequency band, and using these distortion parameters as initial values. When in use, since the frequency band corresponding to the parameters solved by the current parameter solver is randomly selected, this leads to inconsistent update status of the parameter table. In addition, the parameter solver uses an independent clock domain, and one or more frequency hopping cycles are required to complete a parameter solution. Therefore, the system needs to run for a period of time to update the entire parameter table. Specifically, the number of updates of the parameters corresponding to this frequency point will be more than other frequency bands, and the update can be completed faster; on the contrary, a frequency band with a low probability of occurrence will take a longer time to complete an update. Figure 3 FIG. 1 is a schematic diagram of the state change of the adaptive update parameters of the predistortion system of this embodiment. Figure 3 As shown, the system clock of the computing processing unit to implement parameter solution is slow, and the solution process is complicated, resulting in a long time consumption; while the frequency hopping speed required by the frequency hopping system (such as 10000 hop / s used in this example) is much faster than the parameter solution time consumption, which indicates that there may be multiple frequency hoppings during one parameter solution. It can be seen that in this embodiment, by making the parameter solver independent of the digital predistorter, the system can respond to rapid changes in frequency in a timely manner without waiting for the slow update of the parameters.
[0035] The baseband data is a modulated signal, and its modulation method includes but is not limited to FSK, QAM, QPSK, QASK, DPSK, QPR, digital chirp modulation and other modulation methods.
[0036] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.
Claims
1. A segmented adaptive frequency hopping digital predistortion system, characterized in that: It includes a digital predistorter, a local oscillator generator, a digital mixer, an analog front end, a data buffer, a parameter solver and an analog front end; The digital predistorter includes a parameter table and a predistortion processing unit; the parameter table stores predistortion parameters by using a storage method divided by frequency bands; The predistortion processing unit is used to receive an externally input baseband signal, and read corresponding parameters from a parameter table according to the frequency band to which the current carrier frequency belongs, and finally perform predistortion processing on the baseband signal according to the read parameters; The local oscillator generator is provided with a random sequence generator, generates a local oscillator signal according to a pseudo-random sequence generated by the random sequence generator, and transmits the local oscillator signal to the up-conversion unit and the down-conversion unit respectively; The digital mixer includes an up-conversion unit and a down-conversion unit, wherein the up-conversion unit is used to perform up-conversion processing on the received first signal and the local oscillator signal to obtain a digital radio frequency signal, and then convert the digital radio frequency signal into an analog radio frequency signal and transmit it to the analog front end; the down-conversion unit is used to convert the amplified analog signal into a digital radio frequency signal, and perform down-conversion processing on the digital radio frequency signal and the local oscillator signal to obtain a second signal; The analog front end amplifies the received analog signal and transmits it to the system peripheral components and the down-conversion unit respectively; The data buffer receives and stores the second signal and the carrier frequency corresponding to the second signal, the first signal and the carrier frequency corresponding to the first signal; captures the first signal, the carrier frequency corresponding to the first signal, the second signal and the carrier frequency corresponding to the second signal at the current frequency point at the request of the parameter solver, and sends them to the parameter solver; The parameter solver is internally designed with a calculation processing unit, which is used to send a capture data request to the data buffer in an idle state; after obtaining the data, the calculation processing unit first aligns the data according to the frequency band to which the current frequency belongs, then calculates the pre-distortion parameters of the frequency band, and stores them in the corresponding frequency band position in the parameter table to complete the parameter update.
2. A segmented adaptive frequency hopping digital predistortion system according to claim 1, characterized in that: The parameter table adopts a storage method divided by frequency band, including: First, the frequency range is divided into a plurality of different frequency bands, and then corresponding predistortion parameters are stored for each frequency band.
3. A segmented adaptive frequency hopping digital predistortion system according to claim 2, characterized in that: The frequency bands adopted by the parameters are divided into uniform segments and equal segmentation methods.
4. The segmented adaptive frequency hopping digital predistortion system according to claim 1, characterized in that: The design calculation processing unit of the parameter solver is an ARM core, CPU or DSP.
5. The segmented adaptive frequency hopping digital predistortion system according to claim 1, characterized in that: The segmented adaptive frequency hopping digital pre-distortion system uses FPGA as a platform.