Carrier generation layer, preparation method and series organic light-emitting device

Abstract

The invention discloses a carrier generation layer, a preparation method and a series organic light-emitting device, the carrier generation layer comprises a plurality of conductive channels and insulation barriers which are insulated and isolated from one another, and self-assembly molecules are arranged in the direction perpendicular to the surface of the carrier generation layer. A conductive channel which is perpendicular to the direction of the surface of the carrier generation layer and can allow carriers to migrate is formed, the insulation barrier is located between any two adjacent self-assembly molecules in any direction of the surface of the carrier generation layer, a potential barrier is formed between the self-assembly molecules, the carriers are prevented from being migrated in the transverse direction, the transverse conductivity is reduced, and the performance of the device is improved. Therefore, electrical crosstalk between adjacent sub-pixels is avoided, and the display quality is improved. In addition, due to the fact that driving circuit compensation or a sub-pixel isolation structure is not needed, the aperture opening ratio of the display panel is increased, the driving algorithm is simplified, and the cost is reduced.

Description

Technical Field

[0001] The present invention relates to organic light-emitting display technology, and particularly to a carrier generation layer, a preparation method and a tandem organic light-emitting device. Background Art

[0002] A tandem organic light-emitting device (Tandem OLED) is a display technology formed by stacking two OLED devices together. Its working principle is based on the basic structure of an OLED, and two OLED light-emitting layers are connected in series through a carrier generation layer (Carrier Generation Layer, CGL). After holes and electrons in the first light-emitting layer recombine to emit light, the remaining holes and electrons pass through the carrier generation layer and recombine again in the second light-emitting layer to emit light.

[0003] In traditional tandem organic light-emitting devices, a carrier generation layer usually adopts a highly conductive material (such as a metal oxide or a doped organic material) to improve the longitudinal carrier injection efficiency. However, the lateral conductivity of such materials is relatively high, resulting in the lateral migration of carriers between sub-pixels, which causes the non-driven state sub-pixels to emit light (electrical crosstalk).

[0004] The prior art improves it through drive circuit compensation or sub-pixel isolation structures (for example, increasing the insulating dam Bank between sub-pixels). However, drive circuit compensation will make the drive algorithm more complex, and the pixel isolation structure will increase the sacrificed aperture ratio and the process complexity, all of which will lead to an increase in cost. Summary of the Invention

[0005] The present invention provides a carrier generation layer, a preparation method and a tandem organic light-emitting device, which can avoid electrical crosstalk between adjacent sub-pixels, improve the display quality of the display panel, increase the aperture ratio of the display panel, simplify the drive algorithm, and reduce the cost.

[0006] In a first aspect, the present invention provides a carrier generation layer, including:

[0007] A plurality of mutually insulated and isolated conductive channels, which are formed by self-assembled molecules arranged along a direction perpendicular to the surface of the carrier generation layer;

[0008] An insulating barrier, which is located between adjacent conductive channels.

[0009] Optionally, the material of the self-assembled molecules includes at least one of hexaazatriphenylene compounds, phthalocyanine compounds, pentacene derivatives and polycyclic aromatic hydrocarbon compounds.

[0010] Optionally, the insulating barrier is insulating nanoparticles, and the particle size range of the insulating nanoparticles is 1nm - 10nm;

[0011] The interfacial roughness of the insulating nanoparticles is less than or equal to 1.5 nm;

[0012] The mass fraction of the insulating nanoparticles in the carrier generation layer is 1% - 8%.

[0013] Optionally, the material of the insulating barrier includes at least one of SiO2, TiO2, ZnSe, MoOx, CuOx, AgOx, and WOx.

[0014] Optionally, the ratio of the longitudinal conductivity of the carrier generation layer in the direction perpendicular to the surface of the carrier generation layer to the transverse conductivity in any direction along the surface of the carrier generation layer is greater than or equal to 50.

[0015] Optionally, the longitudinal conductivity is greater than or equal to 5×10 -4 S / cm, and the transverse conductivity is less than or equal to 3×10 -5 S / cm.

[0016] In a second aspect, the present invention also provides a method for preparing a carrier generation layer, including:

[0017] Depositing a precursor film of the carrier generation layer on a substrate by vacuum evaporation;

[0018] Annealing the precursor film in a vacuum environment to obtain the carrier generation layer, which includes a plurality of mutually insulated and isolated conductive channels and an insulating barrier located between adjacent conductive channels, and the conductive channels are formed by self-assembled molecules arranged in a direction perpendicular to the surface of the carrier generation layer.

[0019] Optionally, during the vacuum evaporation process, the temperature of the substrate is controlled to rise linearly from 80°C to 150°C, and the evaporation rate range is The vacuum degree is less than or equal to 5×10 -6 Torr.

[0020] Optionally, during the annealing process, the annealing temperature is 200°C - 250°C, and the annealing duration is 5 mins - 10 mins.

[0021] In a third aspect, the present invention also provides a tandem organic light-emitting device, including the carrier generation layer provided in the first aspect of the present invention.

[0022] The carrier generation layer provided by the present invention includes a plurality of mutually insulated and isolated conductive channels and insulating barriers. The self-assembled molecules are arranged in a direction perpendicular to the surface of the carrier generation layer to form conductive channels for carrier migration in the direction perpendicular to the surface of the carrier generation layer. The insulating barriers are located between any two adjacent self-assembled molecules in any direction along the surface of the carrier generation layer, forming a potential barrier between the self-assembled molecules to prevent carriers from migrating laterally, reducing the lateral conductivity, thereby avoiding electrical crosstalk between adjacent sub-pixels and improving the display quality of the display panel. In addition, since there is no need for a driving circuit compensation or a sub-pixel isolation structure, the aperture ratio of the display panel is increased, the driving algorithm is simplified, and the cost is reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The present invention will be further described in detail below with reference to the drawings and embodiments.

[0024] Figure 1 It is a schematic structural diagram of a tandem organic light-emitting device;

[0025] Figure 2 It is a cross-sectional view of a carrier generation layer provided by the present invention;

[0026] Figure 3 It is a flowchart of a method for preparing a carrier generation layer provided by the present invention;

[0027] Figure 4 It is a schematic diagram for testing the lateral conductivity;

[0028] Figure 5 It is a schematic diagram for testing the longitudinal conductivity. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0029] To make the technical problems solved by the present invention, the technical solutions adopted, and the achieved technical effects clearer, the technical solutions of the embodiments of the present invention will be further described in detail below with reference to the drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative efforts belong to the scope of protection of the present invention.

[0030] In the description of the present invention, unless otherwise clearly defined and limited, the terms "connected", "connected", and "fixed" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or integrated; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the internal communication of two components or the interaction relationship between two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.

[0031] In the present invention, unless otherwise clearly specified and defined, the first feature being "on" or "under" the second feature may include direct contact between the first and second features, or may include the first and second features not being in direct contact but in contact through additional features therebetween. Moreover, the first feature being "above", "over" and "on top of" the second feature includes the first feature being directly above and obliquely above the second feature, or merely indicating that the first feature has a higher horizontal height than the second feature. The first feature being "under", "beneath" and "underneath" the second feature includes the first feature being directly below and obliquely below the second feature, or merely indicating that the first feature has a lower horizontal height than the second feature. In addition, the terms "first" and "second" are only used for descriptive distinction and have no special meaning.

[0032] Figure 1 is a schematic structural diagram of a tandem organic light-emitting device, as Figure 1 shown, a first hole transport layer 102, a light-emitting layer 103 (including a red light-emitting layer R, a green light-emitting layer G, and a blue light-emitting layer B), a first electron transport layer 104, an electron injection layer 105, and a cathode 106 are sequentially disposed on a first side of the carrier generation layer 101; a second electron transport layer 107, a light-emitting layer 108 (including a red light-emitting layer R, a green light-emitting layer G, and a blue light-emitting layer B), a second hole transport layer 109, a hole injection layer 110, and an anode 111 are sequentially disposed on a second side of the carrier generation layer 101. The carrier generation layer 101 generally uses a highly conductive material, and such materials have a relatively high lateral conductivity, resulting in the lateral migration of carriers between sub-pixels, that is, the lateral migration of carriers occurs at the interface between the carrier generation layer 101 and the light-emitting layer. For example, carriers that were originally only vertically migrating to the red light-emitting layer laterally migrate to the green light-emitting layer and the blue light-emitting layer, causing the green light-emitting layer and the blue light-emitting layer that do not need to emit light to emit light, that is, electrical crosstalk.

[0033] To solve the above problems, the present invention provides a carrier generation layer, Figure 2 is a cross-sectional view of a carrier generation layer provided by the present invention, as Figure 2 shown, the carrier generation layer includes:

[0034] a plurality of mutually insulated and isolated conductive channels 210, and the conductive channels 210 are formed by self-assembled molecules 211 arranged in a direction perpendicular to the surface of the carrier generation layer. Exemplarily, Figure 1The cross-sectional structure of the carrier generation layer is shown. It can be understood that the conductive channels 210 are uniformly and spaced apart. The self-assembled molecules 211 are stacked in an orderly manner in the direction perpendicular to the surface of the carrier generation layer, forming conductive channels 210 for carrier migration in the direction perpendicular to the surface of the carrier generation layer (referred to as the longitudinal direction in this application). Self-assembly refers to a technique in which basic structural units (molecules, nanomaterials, substances at the micron or larger scale) spontaneously form an ordered structure. During the self-assembly process, the basic structural units spontaneously organize or aggregate into a stable structure with a certain regular geometric appearance based on non-covalent interactions. The self-assembly process is not a simple superposition of weak forces between a large number of atoms, ions, and molecules, but rather a complex cooperative effect in which several individuals spontaneously associate and gather together simultaneously to form a tight and ordered whole.

[0035] The insulating barrier 220 is located between adjacent conductive channels 210. Exemplarily, as Figure 2 shown, the insulating barrier 220 is located between any two adjacent self-assembled molecules 211 in any direction along the surface of the carrier generation layer (referred to as the lateral direction in this application), forming a potential barrier between the self-assembled molecules 211 to prevent carriers from migrating laterally, reducing the lateral conductivity, thereby avoiding electrical crosstalk between adjacent sub-pixels and improving the display quality. In addition, since there is no need for a driving circuit compensation or a sub-pixel isolation structure, the aperture ratio of the display panel is increased, the driving algorithm is simplified, and the cost is reduced.

[0036] The carrier generation layer provided by the present invention includes a plurality of mutually insulated and isolated conductive channels and insulating barriers. The self-assembled molecules are arranged in the direction perpendicular to the surface of the carrier generation layer, forming conductive channels for carrier migration in the direction perpendicular to the surface of the carrier generation layer. The insulating barrier is located between any two adjacent self-assembled molecules in any direction along the surface of the carrier generation layer, forming a potential barrier between the self-assembled molecules to prevent carriers from migrating laterally, reducing the lateral conductivity, thereby avoiding electrical crosstalk between adjacent sub-pixels and improving the display quality of the display panel. In addition, since there is no need for a driving circuit compensation or a sub-pixel isolation structure, the aperture ratio of the display panel is increased, the driving algorithm is simplified, and the cost is reduced.

[0037] In some embodiments of the present invention, the thickness of the carrier generation layer is about 100 nanometers, and the size of the self-assembled molecules is about ten nanometers.

[0038] In some embodiments of the present invention, the material of the self-assembled molecules 211 includes at least one of hexaazatriphenylene compounds, phthalocyanine compounds, pentacene derivatives, and polycyclic aromatic hydrocarbon compounds.

[0039] Exemplarily, the hexaazatriphenylene compounds may include: HAT-CN (2,3,6,7,10,11-hexacyano-1,4,5,8,9,12-hexaazatriphenylene), HAT-CN-F4 (2,3,6,7,10,11-hexacyano-1,4,5,8,9,12-hexaazatriphenylene-tetrafluoro); the phthalocyanine compounds include: CuPc (copper phthalocyanine), ZnPc (zinc phthalocyanine), AlPcCl (aluminum phthalocyanine chloride), CoPc (cobalt phthalocyanine); the pentacene derivatives include: TIPS-pentacene (6,13-bis(triisopropylsilylethynyl)pentacene), DNTT (dinaphthothiophenothiophene); the polycyclic aromatic hydrocarbon compounds include: Anthracene (anthracene), Tetracene (tetracene). It should be noted that the materials of the above self-assembled molecules are exemplary descriptions of the present invention. In other embodiments of the present invention, other materials may also be used as long as they can form a conductive channel, and the present invention does not limit this here.

[0040] In some embodiments of the present invention, the insulating barrier 220 is insulating nanoparticles, and the particle size range of the insulating nanoparticles is 1 nm - 10 nm. Exemplarily, in specific embodiments of the present invention, the particle size of the insulating nanoparticles can be 1 nm, 2 nm, 5 nm, 8 nm, or 10 nm.

[0041] In some embodiments of the present invention, the interface roughness of the insulating nanoparticles is less than or equal to 1.5 nm, avoiding excessive surface roughness of the insulating nanoparticles, and mechanical meshing between particles causes agglomeration of the insulating nanoparticles, preventing the formation of the conductive channel 210 and affecting the longitudinal conductivity. Exemplarily, in specific embodiments of the present invention, the interface roughness of the insulating nanoparticles can be 0.5 nm, 0.8 nm, 1 nm, 1.2 nm, or 1.5 nm.

[0042] In some embodiments of the present invention, the mass fraction of the insulating nanoparticles in the carrier generation layer is 1% - 8%, avoiding a decrease in longitudinal conductivity due to an excessive mass fraction of the insulating nanoparticles. Exemplarily, in specific embodiments of the present invention, the mass fraction of the insulating nanoparticles in the carrier generation layer can be 1%, 2%, 3%, 4%, 5%, 6%, 7%, or 8%.

[0043] In some embodiments of the present invention, the material of the insulating barrier 220 (or insulating nanoparticles) includes at least one of SiO2, TiO2, ZnSe, MoOx, CuOx, AgOx, and WOx. It should be noted that the insulating barrier 220 can also use other materials as long as it can form an insulating barrier between adjacent conductive channels, and the present invention does not limit this here.

[0044] In some embodiments of the present invention, the ratio of the longitudinal conductivity to the transverse conductivity in the direction perpendicular to the surface of the carrier generation layer is greater than or equal to 50, so as to eliminate the lateral carrier migration as much as possible. Exemplarily, in specific embodiments of the present invention, the ratio of the longitudinal conductivity to the transverse conductivity can be 50, 100, 200, 300, 400 or 500.

[0045] In some embodiments of the present invention, the longitudinal conductivity is greater than or equal to 5×10 -4 S / cm, and the transverse conductivity is less than or equal to 3×10 -5 S / cm.

[0046] In some embodiments of the present invention, in order to avoid the carrier generation layer affecting the optical signal transmission of the light-emitting layer, the visible light transmittance of the carrier generation layer is greater than or equal to 70%, which is applicable to the preparation of transparent OLED display panels.

[0047] The present invention also provides a method for preparing a carrier generation layer, Figure 3 which is a flowchart of a method for preparing a carrier generation layer provided by the present invention. As Figure 3 shown, the method for preparing the carrier generation layer includes the following steps:

[0048] S11. Deposit a precursor film of the carrier generation layer on a substrate by vacuum evaporation.

[0049] In an embodiment of the present invention, a precursor film of the carrier generation layer is deposited on a substrate by vacuum evaporation. Exemplarily, in one embodiment of the present invention, an insulating barrier material is doped into a self-assembled molecular material, and then placed into a vacuum evaporation device. The treated substrate is placed on an evaporation target, and evaporation is started to deposit a precursor film of the carrier generation layer on the substrate. In another embodiment of the present invention, the self-assembled molecular material and the insulating barrier material can also be separately placed into the vacuum evaporation device for co-evaporation to deposit a precursor film of the carrier generation layer on the substrate.

[0050] In some embodiments of the present invention, during the vacuum evaporation process, the temperature of the substrate is controlled to rise from 80°C to 150°C in a gradient manner, which can remove moisture, gas and organic pollutants on the surface of the substrate, ensure the purity of the coating, activate the surface of the substrate, enhance the adhesion between the coating and the substrate, and improve the adhesion performance of the film. In addition, slow heating can reduce the thermal stress between the substrate and the film, preventing the film from cracking or peeling off.

[0051] In some embodiments of the present invention, during the vacuum evaporation process, the evaporation rate range is Exemplarily, in specific embodiments of the present invention, the evaporation rate can be or

[0052] In some embodiments of the present invention, during the vacuum evaporation process, the vacuum degree is less than or equal to 5×10 -6 Torr. Exemplarily, in a specific embodiment of the present invention, the vacuum degree can be 1×10 -6 Torr, 2×10 -6 Torr, 3×10 -6 Torr, 4×10 -6 Torr or 5×10 -6 Torr.

[0053] S12. Anneal the precursor film in a vacuum environment to obtain a charge generation layer.

[0054] In an embodiment of the present invention, the above-mentioned precursor film is placed in a vacuum environment for annealing to obtain a charge generation layer. The charge generation layer includes a plurality of mutually insulated and isolated conductive channels and insulating barriers located between adjacent conductive channels. The conductive channels are formed by self-assembled molecules arranged in a direction perpendicular to the surface of the charge generation layer. Specifically, the structure and parameters of the charge generation layer have been described in detail in the foregoing embodiments, and will not be elaborated herein in the embodiments of the present invention.

[0055] In some embodiments of the present invention, during the annealing process, the annealing temperature is 200°C - 250°C, and the annealing duration is 5 mins - 10 mins. In a specific embodiment of the present invention, the annealing temperature can be 200°C, 220°C or 250°C, and the annealing time can be 5 mins, 8 mins or 10 mins. In some other embodiments of the present invention, a step annealing method can also be adopted. For example, maintain at 200°C for 2 mins, at 220°C for 4 mins, and finally maintain at 250°C for 2 mins.

[0056] In an embodiment of the present invention, in order to verify the conductivity of the charge generation layer, multiple groups of charge generation layers are prepared as test samples and tested.

[0057] Figure 4 Schematic diagram for testing the lateral conductivity. Specifically, for testing the lateral conductivity, the preparation and testing process of the test samples are as follows:

[0058] 1. Prepare four equally spaced and spaced ITO wires as electrodes on a glass substrate as shown in Figure 4 . The specific pattern size (spacing 25μm, line width 200um).

[0059] 2. On the above substrate, a precursor film of the carrier generation layer is formed in the evaporation area by vacuum evaporation. The thickness of the precursor film is 100 nm, the substrate temperature is controlled at 100°C ± 5°C, and the evaporation rate is controlled at

[0060] 3. The precursor film is further annealed in a vacuum environment. The annealing temperature is 220°C ± 5°C, and the annealing duration is 5 - 15 minutes to form the carrier generation layer on the substrate.

[0061] 4. Transfer the substrate with the formed carrier generation layer to a glove box under N2 environmental protection. In the glove box, use a grooved glass and UV curable glue to encapsulate the carrier generation layer to isolate it from external water and oxygen erosion.

[0062] 5. Transfer the obtained sample to a four-probe tester Keysight B1500A (current accuracy ±2%)

[0063] for testing, record the obtained current and voltage, and calculate the lateral conductivity as follows:

[0064]

[0065] where I is the measured current (A); L is the probe spacing (i.e., the spacing between the electrodes, 25 μm); V is the voltage drop (V), W is the test channel width (100 μm), and t is the thickness of the carrier generation layer (100 nm).

[0066] 6. Compare the lateral conductivity data of all samples at a voltage of 10 V.

[0067] Figure 5 Figure for testing the longitudinal conductivity. Specifically, for testing the longitudinal conductivity, the preparation and testing process of the test sample are as follows:

[0068] 1. Prepare ITO patterning on a glass substrate to form an anode and a cathode as shown in Figure 5 shown.

[0069] 2. On the above substrate, a precursor film of the carrier generation layer is formed in the evaporation area by vacuum evaporation. The thickness of the precursor film is 100 nm, the substrate temperature is controlled at 100°C ± 5°C, and the evaporation rate is controlled at

[0070] 3. The precursor film is further annealed in a vacuum environment. The annealing temperature is 220°C ± 5°C, and the annealing duration is 5 - 15 minutes to form the carrier generation layer on the substrate.

[0071] 4. Replace the mask and deposit an Al electrode on the carrier generation layer with a thickness of 100 nm, which is electrically connected to the cathode, as Figure 5 shown.

[0072] 5. Transfer the substrate with the formed carrier generation layer to a glove box under N2 environmental protection. In the glove box, use a grooved glass and UV curable glue to encapsulate the carrier generation layer to isolate it from external water and oxygen erosion.

[0073] 6. Measure the obtained samples with a Keithley 4200 source meter, and gradually apply a step voltage of 0 → 15 V (step size 0.5 V) to the voltage; record the steady-state current density (J) and exclude the capacitance effect. Calculate the longitudinal conductivity using the following formula:

[0074]

[0075] where J is the steady-state current density, d is the step voltage, and V is the applied voltage.

[0076] 7. Compare the longitudinal conductivity data of all devices at a voltage of 10 V.

[0077] The test results are as follows:

[0078] Table 1 shows the effect of the material of the carrier generation layer on the conductivity. As shown in Table 1, doping SiO2 can significantly reduce the lateral conductivity, while the change in the longitudinal conductivity is relatively small. Taking the HAT-CN / SiO2 system as an example, when the doping ratio increases from 0% to 3%, the lateral conductivity decreases from 3.1×10 -4 S / cm to 4.2×10 -5 S / cm (a decrease of 86%), while the longitudinal conductivity only decreases from 4.5×10 -3 S / cm to 3.8×10 -3 S / cm (a decrease of 15.6%). When the TIPS-pentacene / MoOx system is doped with 5%, the lateral conductivity also decreases from 8.1×10 -6 S / cm to 4.4×10 -6 S / cm (a decrease of 45.6%), but the longitudinal conductivity remains at a similar level (2.6×10 -4 →3.2×10 -4 S / cm). The data shows that the inhibitory effect of inorganic doping on the lateral conduction path is more significant, while the influence on the longitudinal conductivity is smaller, which is beneficial to reducing lateral crosstalk and ensuring that the longitudinal performance of the device remains unchanged. That is, the doped carrier generation layer can significantly inhibit lateral leakage while maintaining the longitudinal transmission efficiency.

[0079] Table 1

[0080]

[0081] Table 2 shows the effect of the annealing process on the conductivity. Taking the HAT-CN / SiO2 system as an example, the doping ratio is 1%. As shown in Table 2, the lateral conductivity of the carrier generation layer is always significantly lower than the longitudinal conductivity, and the maximum difference reaches 3 orders of magnitude (for example, at 250 °C, the longitudinal conductivity is 3.2×10 -3 S / cm vs the lateral 8.5×10 -6 S / cm), indicating that the conductivity of the carrier generation layer has strong anisotropy. At the same time, the longitudinal conductivity in the unannealed state is 3.9×10 -3 S / cm, and it increases to 4.4×10 -3 S / cm after annealing at 200 °C. The lateral conductivity is 1.3×10 -5 S / cm before annealing and drops to 7.1×10 -6 S / cm after annealing at 200 °C. Further explanation shows that the annealing process has a more obvious improvement effect on the longitudinal conductivity (it increases by 20.5% at 220 °C), increasing the longitudinal conductivity and significantly reducing the lateral conductivity, which is beneficial to reducing the lateral carrier diffusion and reducing the optical crosstalk between adjacent sub-pixels.

[0082] Table 2

[0083] Annealing Temperature (°C) Annealing Time (min) Longitudinal Conductivity (S / cm) Transverse Conductivity (S / cm) As-received - <![CDATA[3.9×10 -3 > <![CDATA[1.3×10 -5 > 200 10 <![CDATA[4.4×10 -3 > <![CDATA[7.1×10 -6 > 220 10 <![CDATA[4.7×10 -3 > <![CDATA[8.2×10 -6 > 250 10 <![CDATA[3.2×10 -3 > <![CDATA[8.5×10 -6 >

[0084] Table 3 shows the effect of the annealing process on the conductivity. Taking the TIPS-pentacene / MoOx system as an example, the doping ratio is 1%. As shown in Table 3, the lateral conductivity of the carrier generation layer is always significantly lower than the longitudinal conductivity, and the maximum difference reaches 3 orders of magnitude (for example, at 220 °C, the longitudinal conductivity is 4.7×10 -4 vs the lateral 4.6×10 -7 ), indicating that the conductivity of the carrier generation layer has strong anisotropy. After annealing treatment, the lateral conductivity decreases significantly, while the longitudinal conductivity remains relatively stable. For example, the lateral conductivity of the unannealed sample is 8.3×10 -6 S / cm, and it generally drops to about 5.5×10 -7 S / cm after annealing treatment (the decrease rate exceeds 90%). Further explanation shows that the annealing process has a very obvious improvement effect on the lateral conductivity in this system.

[0085] Table 3

[0086] Annealing Temperature (°C) Annealing Time (min) Longitudinal Conductivity (S / cm) Transverse Conductivity (S / cm) As-received - <![CDATA[3.5×10 -4 > <![CDATA[8.3×10 -6 <!-- 7 -->]]> 200 10 <![CDATA[4.4×10 -4 > <![CDATA[5.6×10 -7 > 220 10 <![CDATA[4.7×10 -4 > <![CDATA[4.6×10 -7 > 250 10 <![CDATA[3.2×10 -4 > <![CDATA[5.5×10 -7 >

[0087] The present invention also provides a tandem organic light-emitting device, including the carrier generation layer provided in any of the foregoing embodiments of the present invention, and this tandem organic light-emitting device has the same functions and effects as the foregoing embodiments.

[0088] The present invention also provides a display panel, including the tandem organic light-emitting device provided in the foregoing embodiment. This display panel serves as the display panel of a smart phone, a television, a tablet computer, a desktop monitor, etc.

[0089] In the description herein, it should be understood that the orientation or positional relationships such as "upper", "lower", "left", "right", etc. are based on the orientation or positional relationships shown in the drawings, and are only for the convenience of description and simplifying the operations, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation of the present invention.

[0090] In the description of this specification, the description with reference to terms such as "one embodiment", "example", etc. means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example.

[0091] In addition, it should be understood that although this specification is described according to the embodiments, not every embodiment only contains an independent technical solution. This narrative way of the specification is only for clarity. Those skilled in the art should regard the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

[0092] The technical principle of the present invention has been described above in conjunction with specific embodiments. These descriptions are only for explaining the principle of the present invention and cannot be construed as a limitation of the protection scope of the present invention in any way. Based on the explanations herein, those skilled in the art can think of other specific embodiments of the present invention without creative labor, and these embodiments will fall within the protection scope of the present invention.

Claims

1. A carrier generation layer, characterized in that: include: A plurality of mutually insulated and isolated conductive channels, wherein the conductive channels are formed by self-assembled molecules arranged in a direction perpendicular to the surface of the carrier generation layer; An insulating barrier is located between adjacent conductive paths.

2. The carrier generation layer according to claim 1, characterized in that: The material of the self-assembling molecule includes at least one of hexaazatriphenylene compounds, phthalocyanine compounds, pentacene derivatives and condensed ring aromatic hydrocarbon compounds.

3. The carrier generation layer according to claim 1, characterized in that: The insulating barrier is insulating nanoparticles, and the particle size of the insulating nanoparticles ranges from 1nm to 10nm; The interface roughness of the insulating nanoparticles is less than or equal to 1.5 nm; The mass fraction of the insulating nanoparticles in the carrier generation layer is 1%-8%.

4. The carrier generation layer according to claim 1, characterized in that: The insulating barrier material includes at least one of SiO2, TiO2, ZnSe, MoOx, CuOx, AgOx and WOx.

5. The carrier generation layer according to any one of claims 1 to 4, characterized in that: A ratio of a longitudinal conductivity of the carrier generation layer along a direction perpendicular to a surface of the carrier generation layer to a lateral conductivity along any direction of the surface of the carrier generation layer is greater than or equal to 50.

6. The carrier generation layer according to claim 5, characterized in that: The longitudinal conductivity is greater than or equal to 5×10 -4 S / cm, the transverse conductivity is less than or equal to 3×10 -5 S / cm.

7. A method for preparing a carrier generation layer, characterized in that: include: Depositing a precursor film of a carrier generation layer on a substrate by vacuum evaporation; The precursor film is annealed in a vacuum environment to obtain the carrier generation layer, which includes a plurality of mutually insulated and isolated conductive channels and insulating barriers between adjacent conductive channels, and the conductive channels are formed by self-assembled molecules arranged in a direction perpendicular to the surface of the carrier generation layer.

8. The method for preparing a carrier generation layer according to claim 7, characterized in that: During the vacuum evaporation process, the temperature of the substrate is controlled to increase gradually from 80°C to 150°C, and the evaporation rate range is Vacuum degree is less than or equal to 5×10 -6 Torr.

9. The method for preparing a carrier generation layer according to claim 7, characterized in that: In the annealing process, the annealing temperature is 200° C.-250° C., and the annealing time is 5 minutes-10 minutes.

10. A tandem organic light-emitting device, characterized in that: The method comprises the carrier generating layer as claimed in any one of claims 1 to 6.

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