Display device
By forming the first structure and the second structure on the substrate of the transparent organic light emitting display device, and maintaining the unit gap with a plurality of stacked patterns, the compressive dark spot problem during the bonding process is solved, the spacer area is reduced, and the aperture ratio is prevented from being reduced, thereby achieving higher display performance and reliability.
Patent Information
- Application Number
- CN202411070773.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-12-27
- Filing Date
- 2024-08-06
- Publication Date
- 2025-06-27
AI Technical Summary
The conventional transparent organic light emitting display device is prone to cause compressive dark spots due to internal foreign matter during the bonding process, and a large spacer is required to maintain the unit gap, resulting in a decrease in the aperture ratio.
By forming the first structure and the second structure on the substrate of the display device, the cell gap is maintained using a plurality of stacked patterns, preventing the aperture ratio from decreasing, and uniformly maintaining the cell gap during the bonding process, thereby improving the compressive dark spots.
The compressive dark spots caused by internal foreign matter are effectively improved, the spacer area for maintaining the unit gap is reduced, the aperture ratio is prevented, and the reliability and performance of the display device are improved.
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Figure CN120224937A_ABST
Abstract
Description
[0001] Cross - reference to related applications
[0002] This application claims priority to Korean Patent Application No. 10 - 2023 - 0192799, filed with the Korean Intellectual Property Office on December 27, 2023, the disclosure of which is incorporated herein by reference. Technical field
[0003] The present disclosure relates to a display device, and more particularly, to a top - emission type display device. Background art
[0004] An organic light - emitting display device is a self - emissive display device, and different from a liquid crystal display, it does not require a separate light source and can be manufactured in a light and thin form. In addition, the organic light - emitting display device is not only advantageous in terms of power consumption due to low - voltage driving, but also has excellent response speed, viewing angle, and contrast.
[0005] An attempt has been made to manufacture such an organic light - emitting display device into a transparent organic light - emitting display device, which is a transparent display device. The pixel region of the transparent organic light - emitting display device is divided into a light - emitting unit and a transmissive unit. The light - emitting unit is a region where an organic light - emitting diode emits light to display an image, and the transmissive unit is a region that transmits external light. The transmittance in the transparent organic light - emitting display device is ensured by the transmissive region. Summary of the invention
[0006] An object to be achieved by the present disclosure is to provide a display device capable of improving compressive dark spots caused by internal foreign matters by maintaining a cell gap during a bonding process.
[0007] Another object to be achieved by the present disclosure is to provide a display device capable of reducing the area of a spacer for maintaining a cell gap.
[0008] Still another object to be achieved by the present disclosure is to provide a display device capable of preventing a reduction in aperture ratio.
[0009] The objects of the present disclosure are not limited to the above - mentioned objects, and other objects not mentioned above can be clearly understood by those skilled in the art from the following description.
[0010] According to an aspect of the present disclosure, a display device may include: a substrate on which a plurality of sub - pixels are defined; a first structure disposed above the substrate; a packaging substrate disposed above the substrate; and a second structure disposed below the packaging substrate and facing the first structure, wherein the second structure may include a plurality of stacked patterns, and one pattern among the plurality of stacked patterns may surround a side surface of another pattern disposed above the one pattern among the plurality of stacked patterns.
[0011] Other details of the exemplary embodiments are included in the detailed description and the drawings.
[0012] According to a preferred embodiment of the present disclosure, a first structure formed of an organic layer is formed, and a second structure of a stacked structure of a black matrix and a color filter is formed above the first structure, and the cell gap is uniformly maintained during the bonding process, thereby improving the compressive dark spots caused by internal foreign matters.
[0013] According to a preferred embodiment of the present disclosure, an undercut structure is formed below the first structure, so that the propagation of cracks in the protective layer generated during the bonding process can be prevented, thereby improving the reliability.
[0014] According to a preferred embodiment of the present disclosure, an effect of preventing a reduction in aperture ratio can be provided by reducing the areas of the first structure and the second structure.
[0015] The effects according to the present disclosure are not limited to those exemplified above, and more various effects are included in this specification. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] The above and other aspects, features, and other advantages of the present disclosure will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:
[0017] Figure 1 is a block diagram for describing a display device according to an exemplary embodiment of the present disclosure;
[0018] Figure 2 is a diagram schematically showing the configuration of a circuit of a sub-pixel according to an exemplary embodiment of the present disclosure;
[0019] Figure 3 is a diagram showing in detail the circuit configuration of a sub-pixel according to an exemplary embodiment of the present disclosure;
[0020] Figure 4A is a schematic plan view of a substrate of a pixel region of a display device according to an exemplary embodiment of the present disclosure;
[0021] Figure 4B is a schematic plan view of a package substrate of a pixel region of a display device according to an exemplary embodiment of the present disclosure;
[0022] Figure 5 is along Figure 4A a cross-sectional view taken along line a-a';
[0023] Figure 6 is a cross-sectional view of a display device according to another exemplary embodiment of the present disclosure;
[0024] Figure 7 is a cross-sectional view of a display device according to yet another exemplary embodiment of the present disclosure;
[0025] Figure 8A and Figures 8B to 10A and Figure 10B is a diagram for describing the effects of a display device according to an exemplary embodiment of the present disclosure;
[0026] Figure 11 is a cross-sectional view of a display device according to yet another exemplary embodiment of the present disclosure;
[0027] Figure 12A is a schematic plan view of a substrate of a pixel region of a display device according to yet another exemplary embodiment of the present disclosure;
[0028] Figure 12B is a schematic plan view of a package substrate of a pixel region of a display device according to yet another exemplary embodiment of the present disclosure; and
[0029] Figure 13 is Figure 12A a cross-sectional view taken along line b-b' of. Detailed Description of the Embodiments
[0030] Advantages and features of the present disclosure and methods of achieving these advantages and features will be apparent by referring to the exemplary embodiments described in detail below in conjunction with the accompanying drawings. However, the present disclosure is not limited to the exemplary embodiments disclosed herein, but will be implemented in various forms. The exemplary embodiments are provided only by way of example so that those skilled in the art can fully understand the disclosure of the present disclosure and the scope of the present disclosure.
[0031] The shapes, sizes, ratios, angles, numbers, etc. shown in the drawings for describing the exemplary embodiments of the present disclosure are merely examples, and the present disclosure is not limited thereto. Throughout the specification, the same reference numerals generally denote the same elements. In addition, in the following description of the present disclosure, detailed descriptions of known related technologies may be omitted to avoid unnecessarily obscuring the subject matter of the present disclosure. Terms such as "including", "having", and "consisting of" used herein are generally intended to allow the addition of other components, unless these terms are used together with the term "only". Any reference to the singular may include the plural unless otherwise explicitly stated.
[0032] Even if not explicitly stated, components are interpreted to include a normal error range.
[0033] When terms such as "on", "above", "below", and "adjacent to" are used to describe the positional relationship between two components, one or more components may be positioned between the two components, unless these terms are used together with the terms "immediately" or "directly".
[0034] When an element or layer is disposed "on" another element or layer, another layer or another element may be directly disposed on or between the other elements.
[0035] Although terms such as "first", "second", etc. are used to describe various components, these components are not limited by these terms. These terms are only used to distinguish one component from other components. Therefore, the first component to be mentioned below may be the second component in the technical concept of the present disclosure.
[0036] Throughout the specification, the same reference numerals generally denote the same elements.
[0037] For ease of description, the dimensions and thicknesses of each component shown in the drawings are shown, and the present disclosure is not limited to the dimensions and thicknesses of the components shown.
[0038] The features of the various embodiments of the present disclosure may be partially or completely dependent on or combined with each other, and may be interlocked and operated in various ways technically, and these embodiments may be executed independently or in association with each other.
[0039] Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the drawings.
[0040] Figure 1 is a block diagram for describing a display device according to an exemplary embodiment of the present disclosure.
[0041] Refer to Figure 1 , a display device according to an exemplary embodiment of the present disclosure may include an image processor 151, a timing controller 152, a data driver 153, a scan driver 154, and a display panel 150.
[0042] The image processor 151 may output a data enable signal DE etc. together with a data signal DATA supplied from the outside.
[0043] In addition, for example, in addition to the data enable signal DE, the image processor 151 may output one or more of a vertical synchronization signal, a horizontal synchronization signal, and a clock signal.
[0044] The timing controller 152 may receive a data signal DATA from the image processor 151 and driving signals including a data enable signal DE or a vertical synchronization signal, a horizontal synchronization signal, a clock signal, etc. Additionally, the timing controller 152 may output a gate timing control signal GDC for controlling the operation timing of the scan driver 154 and a data timing control signal DDC for controlling the operation timing of the data driver 153 based on the driving signals.
[0045] The data driver 153 may sample and latch the data signal DATA supplied from the timing controller 152 in response to the data timing control signal DDC supplied from the timing controller 152, convert the sampled and latched data signal DATA into a gamma reference voltage, and output a gamma reference value. The data driver 153 may output the data signal DATA through data lines DL1 to DLn. The data driver 153 may be formed in the form of an integrated circuit (IC).
[0046] Additionally, the scan driver 154 may output a scan signal in response to the gate timing control signal GDC supplied from the timing controller 152. The scan driver 154 may output the scan signal through gate lines GL1 to GLm. The scan driver 154 may be formed in the form of an integrated circuit (IC), or may be formed in the display panel 150 in a gate-in-panel (GIP) type.
[0047] The display panel 150 may display an image in response to the data signal DATA and the scan signal supplied from the data driver 153 and the scan driver 154.
[0048] The display panel 150 may include sub-pixels SP for displaying an image.
[0049] For example, the sub-pixels SP may include red sub-pixels, green sub-pixels, and blue sub-pixels, or may include white sub-pixels, red sub-pixels, green sub-pixels, and blue sub-pixels. According to the light-emitting characteristics, the sub-pixels SP may have one or more different emission regions.
[0050] Figure 2 is a diagram schematically showing the configuration of a circuit of a sub-pixel according to an exemplary embodiment of the present disclosure.
[0051] Referring to Figure 2 , one sub-pixel may include a switching transistor SW, a driving transistor DR, a capacitor Cst, a compensation circuit CC, and an organic light-emitting diode OLED.
[0052] For example, the switching transistor SW can perform a switching operation such that a data signal supplied through the first data line DL1 is stored as a data voltage in the capacitor Cst in response to a scan signal supplied through the first gate line GL1. Additionally, for example, the driving transistor DR can operate such that a driving current flows between the first power line EVDD (high potential voltage) and the second power line EVSS (low potential voltage) according to the data voltage stored in the capacitor Cst. Additionally, the organic light-emitting diode OLED can operate to emit light according to the driving current formed by the driving transistor DR.
[0053] The compensation circuit CC is a circuit added to the sub-pixel to compensate for the threshold voltage of the driving transistor DR and the like. The compensation circuit CC can be configured by one or more transistors. The configuration of the compensation circuit CC varies greatly depending on the external compensation method, and thus, examples thereof are as follows.
[0054] Figure 3 is a diagram showing in detail the circuit configuration of a sub-pixel according to an exemplary embodiment of the present disclosure.
[0055] Referring to Figure 3 , for example, the compensation circuit CC can include a sensing transistor ST and a sensing line VREF (or reference line).
[0056] Here, the sensing transistor ST can be connected between the drain electrode of the driving transistor DR and the first electrode (hereinafter referred to as the sensing node) of the organic light-emitting diode OLED. The sensing transistor ST can operate to supply an initialization voltage (or sensing voltage) sent through the sensing line VREF to the sensing node of the driving transistor DR, or to sense the voltage or current of the sensing node or the sensing line VREF of the driving transistor DR.
[0057] The switching transistor SW can connect the source electrode or the drain electrode to the first data line DL1, and the remaining one of the source electrode or the drain electrode can be connected to the gate electrode of the driving transistor DR.
[0058] The driving transistor DR can connect the source electrode or the drain electrode to the first power line EVDD, and the remaining one of the source electrode or the drain electrode can be connected to the first electrode that is the anode of the organic light-emitting diode OLED.
[0059] Additionally, the capacitor Cst can connect the lower electrode to the gate electrode of the driving transistor DR and the upper electrode to the first electrode that is the anode electrode of the organic light-emitting diode OLED. The organic light-emitting diode OLED can connect the first electrode to the remaining one of the source electrode or the drain electrode of the driving transistor DR and connect the second electrode that is the cathode electrode to the second power line EVSS.
[0060] In addition, the sensing transistor ST may connect the source electrode or the drain electrode to the sensing line VREF, and may connect the remaining one of the source electrode or the drain electrode to the first electrode of the organic light-emitting diode OLED serving as a sensing node and the remaining one of the source electrode or the drain electrode of the driving transistor DR.
[0061] According to an external compensation algorithm (or the configuration of the compensation circuit), the operation time of the sensing transistor ST may be similar / same or different from that of the switching transistor SW. For example, the switching transistor SW may connect the gate electrode to the first gate line GL1, and the sensing transistor ST may connect the gate electrode to the second gate line GL2. In this case, the scan signal Scan may be sent to the first gate line GL1, and the sense signal Sense may be sent to the second gate line GL2. As another example, the first gate line GL1 connected to the gate electrode of the switching transistor SW and the second gate line GL2 connected to the gate electrode of the sensing transistor ST may be connected to share.
[0062] The sensing line VREF may be connected to the data driver. In this case, the data driver may sense the sensing node of the sub-pixel in real time during the non-display period of the image or during N frames (N is an integer greater than or equal to 1), and generate a sensing result.
[0063] Meanwhile, the switching transistor SW and the sensing transistor ST may be turned on simultaneously. In this case, according to the time-division method of the data driver, the sensing operation through the sensing line VREF and the data output operation for outputting the data signal may be separated from each other.
[0064] In addition, the compensation target according to the sensing result may be a digital data signal, an analog data signal, gamma, etc. The compensation circuit for generating a compensation signal (or a compensation voltage) based on the sensing result may be implemented inside the data driver, inside the timing controller, or as a separate circuit.
[0065] As described above, for example, in Figure 3 a sub-pixel having a 3T (transistor) 1C (capacitor) structure including a switching transistor SW, a driving transistor DR, a capacitor Cst, an organic light-emitting diode OLED, and a sensing transistor ST is described as an example, but when a compensation circuit CC is added, the sub-pixel may be configured as 3T2C, 4T2C, 5T1C, 6T2C, etc.
[0066] Figure 4A is a schematic plan view of a substrate of a pixel region of a display device according to an exemplary embodiment of the present disclosure.
[0067] Figure 4BIt is a schematic plan view of a packaging substrate of a pixel region of a display device 100 according to an exemplary embodiment of the present disclosure.
[0068] Referring to Figure 4A and Figure 4B , the pixel region PX may include an emission region EA and a transmission region TA.
[0069] The emission region EA may include a first sub-pixel SP1, a second sub-pixel SP2, a third sub-pixel SP3, and a fourth sub-pixel SP4.
[0070] The first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, and the fourth sub-pixel SP4 may each be sub-pixels that emit different colors. For example, the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, and the fourth sub-pixel SP4 are a red sub-pixel that emits red light, a green sub-pixel that emits green light, a blue sub-pixel that emits blue light, and a white sub-pixel that emits white light, but is not limited thereto.
[0071] A common organic layer may be formed in the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, and the fourth sub-pixel SP4 to emit white light, and a color filter 170 may be provided to distinguish colors.
[0072] In this case, an organic light-emitting diode OLED is provided in the emission region EA on the substrate 110, and each of the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, and the fourth sub-pixel SP4 may be divided by a bank layer 180.
[0073] A cathode connection line 139 may be provided in the transmission region TA on the substrate 110. The cathode connection line 139 may extend from the emission region EA and be provided in the transmission region TA, and may be electrically connected to the second electrode of the organic light-emitting diode OLED in the transmission region TA.
[0074] For example, the second electrode of the organic light-emitting diode OLED may extend from the emission region EA to the transmission region TA, and may be electrically connected to the top surface of the cathode connection line 139 exposed under the second structure GS2. The electrical connection between the second electrode and the cathode connection line 139 will be described in detail later with reference to Figure 5 The electrical connection between the second electrode and the cathode connection line 139 will be described in detail later.
[0075] In Figure 4AIn [the figure], the cathode connection line 139 is shown as extending to the transmissive region TA in the second sub-pixel SP2 among the first to fourth sub-pixels SP1 to SP4, but is not limited thereto, and the cathode connection line 139 may extend to the transmissive region TA in one of the first to fourth sub-pixels SP1 to SP4, and the cathode connection line 139 may also extend to the transmissive region TA in each of the first to fourth sub-pixels SP1 to SP4.
[0076] A detailed description of the cathode connection line 139 will be referred to later. Figure 5
[0077] Next, a color filter 170 may be disposed in the emission region EA on the encapsulation substrate 140, and the color filter 170 may be disposed to be surrounded by the black matrix 145. For example, a first color filter layer 171, a second color filter layer 172, and a third color filter layer 173 may be disposed in the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3, respectively. Meanwhile, when the organic light-emitting diode OLED emits white light and the fourth sub-pixel SP4 is a white sub-pixel, a separate color filter 170 may not be disposed in the fourth sub-pixel SP4, but is not limited thereto.
[0078] Meanwhile, the transmissive region TA is a region where no reflective material is provided, but due to design, the display device 100 may need to be provided with a reflective material. In this case, the reflective material may be provided in a minimum amount. In addition, some of various insulating layers may be removed from the transmissive region TA to ensure transmittance. For example, a coating layer and a bank layer 180 may not be disposed in the transmissive region TA, but the present disclosure is not limited thereto.
[0079] In addition, a second structure GS2 may be disposed in the transmissive region TA. The second electrode and the second power line EVSS of the organic light-emitting diode OLED may be electrically connected below the second structure GS2.
[0080] A detailed description of the second structure GS2 will be referred to later. Figure 5
[0081] Meanwhile, Figure 4A and Figure 4B An example of a transparent display device is shown, which includes an emission region EA having first to fourth sub-pixels SP1 to SP4 and a transmissive region TA, but the present disclosure is not limited thereto.
[0082] In addition, in the display device 100 according to an exemplary embodiment of the present disclosure, the first to fourth sub-pixels SP1 to SP4 may be defined by intersecting one gate line with four data lines, but the present disclosure is not limited thereto.
[0083] Figure 5 is along Figure 4A A cross-sectional view taken along line aa′.
[0084] Reference Figure 5 , a light shielding layer LS may be disposed above the substrate 110 .
[0085] The substrate 110 may be a glass or plastic substrate. In the case of a plastic substrate, a polyimide-based or polycarbonate-based material may be used to provide flexibility. In particular, polyimide is widely used as a plastic substrate because it can be applied to high temperature processing and is a coatable material.
[0086] The light shielding layer LS serves to prevent photocurrent from occurring in the thin film transistor by blocking incidence of external light.
[0087] The light shielding layer LS may be formed of an opaque conductive material, for example, any one selected from the group consisting of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. For example, the light shielding layer LS may be configured by a multilayer formed of any one selected from the group consisting of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), etc., or an alloy thereof. For example, the light shielding layer LS may be a double layer of molybdenum / aluminum-neodymium or molybdenum / aluminum.
[0088] A capacitor Cst may be disposed over the substrate 110. For example, the capacitor Cst may include a first capacitor electrode C1, a second capacitor electrode C2, and a third capacitor electrode C3.
[0089] The first capacitor electrode C1 of the capacitor Cst may be disposed on the same layer as the light shielding layer LS.
[0090] For example, the first capacitor electrode C1 may be formed of any one selected from the group consisting of: molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or alloys thereof. For example, the first capacitor electrode C1 may be configured by a multilayer formed of any one selected from the group consisting of: molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), etc., or alloys thereof. For example, the first capacitor electrode C1 may be a double layer of molybdenum / aluminum-neodymium or molybdenum / aluminum.
[0091] Data line DL, first power line ( Figure 3 EVDD in), sensing line ( Figure 3 The VREF in the figure and the second power line EVSS can be set on the same layer as the light shielding layer LS.
[0092] For example, the data line DL, the first power line EVDD, the sense line VREF, and the second power line EVSS may be formed of any one selected from the group consisting of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu) or alloys thereof. For example, the data line DL, the first power line EVDD, the sense line VREF, and the second power line EVSS may be configured by a multilayer formed of any one selected from the group consisting of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu) or alloys thereof. For example, the data line DL, the first power line EVDD, the sense line VREF, and the second power line EVSS may be a bilayer of molybdenum / aluminum-neodymium or molybdenum / aluminum.
[0093] A buffer layer 115a may be provided on the substrate 110 on which a light-shielding layer LS, a data line DL, a first power line EVDD, a sense line VREF, a first capacitor electrode C1, and a second power line EVSS are provided. For example, the buffer layer 115a is used to protect the thin film transistor formed in subsequent processes from impurities such as alkali ions leaking from the light-shielding layer LS.
[0094] For example, the buffer layer 115a may be configured by a multilayer formed of silicon oxide (SiOx), silicon nitride (SiNx), or a combination of silicon oxide (SiOx) and silicon nitride (SiNx).
[0095] Meanwhile, in Figure 5 the buffer layer 115a is shown as a single layer, but is not limited thereto, and may be provided as a multilayer.
[0096] A driving transistor DR may be provided above the buffer layer 115a.
[0097] The driving transistor DR may include a semiconductor layer DA, a gate electrode DG, a source electrode DS, and a drain electrode DD.
[0098] The driving transistor DR may overlap with the organic light-emitting diode OLED, but is not limited thereto.
[0099] The semiconductor layer DA of the driving transistor DR may be provided on the buffer layer 115a.
[0100] The semiconductor layer DA may be formed of a silicon semiconductor or an oxide semiconductor. Additionally, the silicon semiconductor may include amorphous silicon or crystalline polysilicon.
[0101] In addition, the semiconductor layer DA may include a drain region and a source region containing p-type or n-type impurities, and may include a channel therebetween. The lower electrode of the capacitor, for example, the second capacitor electrode C2, may also be doped with impurities to become a conductor, but is not limited thereto.
[0102] For example, the second capacitor electrode C2 of the capacitor Cst may be disposed on the same layer as the semiconductor layer DA of the driving transistor DR.
[0103] The second capacitor electrode C2 may be formed of a silicon semiconductor or an oxide semiconductor. Additionally, the silicon semiconductor may include, but is not limited to, amorphous silicon or crystalline polysilicon.
[0104] The semiconductor layers of the sensing transistor ST and the switching transistor SW may be disposed on the same layer as the semiconductor layer DA of the driving transistor DR.
[0105] For example, the semiconductor layers of the sensing transistor ST and the switching transistor SW may be formed of a silicon semiconductor or an oxide semiconductor. Additionally, the silicon semiconductor may include, but is not limited to, amorphous silicon or crystalline polysilicon.
[0106] A gate insulating film GI may be disposed on the semiconductor layer DA.
[0107] For example, the gate insulating film GI may be configured by a silicon oxide (SiOx), a silicon nitride (SiNx), or a multi-layer of a silicon oxide (SiOx) and a silicon nitride (SiNx).
[0108] In Figure 5 , the gate insulating film GI is shown as being patterned and disposed in a partial region, but is not limited thereto, and may be disposed on the entire surface of the substrate 110.
[0109] In addition, the gate electrode DG of the driving transistor DR may be disposed at a position corresponding to the channel region of the semiconductor layer DA on the gate insulating film GI.
[0110] Although not shown in Figure 5 , the gate electrodes of the sensing transistor and the switching transistor may be disposed on the same layer as the gate electrode DG of the driving transistor DR. Additionally, the source electrode DS and the drain electrode DD of the driving transistor DR may be disposed on the same layer as the gate electrode DG of the driving transistor DR. Additionally, the source electrodes and the drain electrodes of the switching transistor and the sensing transistor may be disposed on the same layer as the gate electrode DG of the driving transistor DR, but are not limited thereto.
[0111] The gate electrode DG, source electrode DS, and drain electrode DD of the driving transistor DR, the gate electrode, source electrode, and drain electrode of the sensing transistor, and the gate electrode, source electrode, and drain electrode of the switching transistor can be formed of any one selected from the group consisting of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu) or their alloys. For example, the gate electrode DG, source electrode DS, and drain electrode DD can be configured by a multilayer formed of any one selected from the group consisting of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), or copper (Cu) or their alloys. For example, the gate electrode DG, source electrode DS, and drain electrode DD can be a bilayer of molybdenum / aluminum-neodymium or molybdenum / aluminum.
[0112] The third capacitor electrode C3 of the capacitor Cst can be provided on the same layer as the gate electrode DG of the driving transistor DR. In this case, the third capacitor electrode C3 can be formed of any one selected from the group consisting of (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu) or their alloys. For example, the third capacitor electrode C3 can be configured by a multilayer formed of any one selected from the group consisting of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), or copper (Cu) or their alloys. For example, the third capacitor electrode C3 can be a bilayer of molybdenum / aluminum-neodymium or molybdenum / aluminum.
[0113] The first cathode connection line 139a can be provided on the same layer as the gate electrode DG, source electrode DS, and drain electrode DD of the driving transistor DR and the third capacitor electrode C3 of the capacitor Cst.
[0114] The first cathode connection line 139a can form the cathode connection line 139 together with the second cathode connection line 139b, but is not limited thereto.
[0115] For example, the first cathode connection line 139a can be provided on the same layer as the gate electrode DG of the driving transistor DR. The first cathode connection line 139a can be electrically connected to the second power line EVSS through the first contact hole CH_1 in the emission region EA.
[0116] In addition, for example, the first cathode connection line 139a can be connected to the second electrode CAT through the second cathode connection line 139b in the transmission region TA. Therefore, the cathode connection line 139 including the first cathode connection line 139a can reduce the resistance when applying a low-potential voltage to the second electrode CAT of the organic light-emitting diode OLED.
[0117] For example, the first cathode connection line 139a may be formed of any one selected from the group consisting of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. For example, the first cathode connection line 139a may be configured by a multilayer formed of any one selected from the group consisting of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.
[0118] For example, the first cathode connection line 139a may be a bilayer of molybdenum / aluminum-neodymium or molybdenum / aluminum.
[0119] An interlayer insulating film 115b may be provided above a substrate 110 including a driving transistor DR and a capacitor Cst.
[0120] For example, the interlayer insulating film 115b may be configured by silicon oxide (SiOx), silicon nitride (SiNx), or a multilayer of silicon oxide (SiOx) and silicon nitride (SiNx).
[0121] An anode connection line 130 may be provided on the interlayer insulating film 115b.
[0122] The anode connection line 130 may be connected to the drain electrode DD of the driving transistor DR. The anode connection line 130 may be electrically connected to the first electrode ANO in the emission region EA.
[0123] The anode connection line 130 may be configured by a single layer or a multilayer formed of a conductive material such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof, but is not limited thereto.
[0124] A second cathode connection line 139b may be provided on the same layer as the anode connection line 130. The second cathode connection line 139b may be electrically connected to the first cathode connection line 139a in the emission region EA.
[0125] In addition, the second cathode connection line 139b may be electrically connected to the second electrode CAT. For example, the second cathode connection line 139b may be electrically connected to the second electrode CAT in the transmission region TA.
[0126] In addition, for example, the second electrode CAT may extend from the emission region EA to the transmission region TA and may be electrically connected to the upper surface of the second cathode connection line 139b exposed below the first structure GS1 and the second structure GS2.
[0127] The second cathode connection line 139b may be formed of a conductive material such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof, but is not limited thereto.
[0128] A passivation film 115c may be provided above the substrate 110 including the anode connection line 130 and the second cathode connection line 139b. In this case, for example, the passivation film 115c is an insulating film that protects the underlying device and may be configured by a silicon oxide film (SiOx), a silicon nitride film (SiNx), or a multilayer of a silicon oxide film (SiOx) and a silicon nitride film (SiNx).
[0129] A coating layer 165 may be provided on the passivation film 115c.
[0130] The coating layer 165 may be a planarization film to reduce the step difference in the underlying structure and may be formed of an organic material such as polyimide, benzocyclobutene resin, or acrylate.
[0131] For example, the coating layer 165 may be formed by a method such as spin-on glass (SOG), in which the above organic material is coated in a liquid form and then cured.
[0132] An organic light-emitting diode OLED may be provided above the coating layer 165.
[0133] The organic light-emitting diode OLED may include a first electrode ANO, an organic layer EML, and a second electrode CAT.
[0134] More specifically, the first electrode ANO may be provided on the coating layer 165. In this case, the first electrode ANO serves as a pixel electrode and may be connected to the drain electrode DD of the driving transistor DR through the anode connection line 130 connected to the first electrode ANO.
[0135] The first electrode ANO may be formed of a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), or zinc oxide (ZnO). For example, when the display device 100 of the present disclosure has a top emission structure, the first electrode ANO may be formed of a reflective electrode. Therefore, the first electrode ANO may further include a reflective layer. In this case, for example, the reflective layer may be formed of aluminum (Al), copper (Cu), silver (Ag), nickel (Ni), or an alloy thereof, and may preferably be formed of a silver / palladium / copper alloy (APC).
[0136] In addition, a bank layer 180 that divides the first sub-pixels SP1 to the fourth sub-pixels SP4 may be disposed above the substrate 110 including the first electrode ANO. For example, the bank layer 180 may be formed of an organic material such as polyimide, benzocyclobutene-based resin, or acrylate.
[0137] Although not shown in Figure 5 , a spacer may be disposed above the bank layer 180. The spacer may prevent damage to the organic light-emitting diode OLED that may be caused by direct contact between the fine metal mask (FMM) used when forming the organic layer EML of the organic light-emitting diode OLED and the bank layer 180 or the second electrode CAT. The spacer may be formed of the same material as the bank layer 180, or may be formed of an insulating material different from the bank layer 180, but is not limited thereto. In addition, the spacer and the bank layer 180 may be integrally formed. Since the spacer is disposed on the bank layer 180, the second electrode CAT and the organic layer EML may be disposed to cover the spacer and the bank layer 180.
[0138] For example, a first structure GS1 including a first organic pattern may be formed above an end portion of the second cathode connection line 139b.
[0139] The first structure GS1 may be disposed in the transmission region TA and may be disposed to overlap a part of the second cathode connection line 139b.
[0140] The first structure GS1 may be formed of the same material as the coating layer 165.
[0141] The first structure GS1 may be disposed in an island shape. In addition, for example, during the process of forming the second contact hole CH_2 in the bank layer 180, the coating layer 165, and the passivation film 115c, the first structure GS1 may be formed in an island shape. The second contact hole CH_2 may be referred to as a cathode contact hole.
[0142] Meanwhile, a part of the top surface of the second cathode connection line 139b may be exposed through the cathode contact hole CH_2.
[0143] The cathode contact hole CH_2 may expose a part of the top surface of the second cathode connection line 139b below the first structure GS1 and may expose a part of the top surface of the second cathode connection line 139b in a region adjacent to the first structure GS1.
[0144] An undercut UC may be formed below the first structure GS1 patterned in an island shape. For example, the side surface of the passivation film 115c below the first structure GS1 may be etched inward more than the first structure GS1 to form the undercut UC.
[0145] Meanwhile, the coating layer 165 and the bank layer 180 can also be disposed above the gate line GL. This is because if necessary, the coating layer 165 and the bank layer 180 above the gate line GL can also be used as additional lower structures. In this case, the retention of the cell gap by the first structure GS1 and the second structure GS2, which will be described later, can be more effectively supplemented. Additionally, the coating layer 165 and the bank layer 180 above the gate line GL, which are positioned adjacent to the first structure GS1, can also be used to prevent the movement of the second structure GS2.
[0146] An organic layer EML in contact with the first electrode ANO can be disposed above the substrate 110. In this case, the organic layer EML can include a light-emitting layer that emits light by combining electrons and holes, and can include a hole injection layer or a hole transport layer between the light-emitting layer and the first electrode ANO and an electron transport layer or an electron injection layer above the light-emitting layer.
[0147] The organic layer EML can be disposed in the first sub-pixel SP1 to the fourth sub-pixel SP4 and can be a common organic layer that emits white light. However, the present disclosure is not limited thereto, and a red organic layer, a green organic layer, a blue organic layer, and a white organic layer can be respectively disposed in the first sub-pixel SP1 to the fourth sub-pixel SP4.
[0148] For convenience, in Figure 5 , the organic layer EML is shown as being disposed only on the first electrode ANO exposed to the bank layer 180. However, some layers of the organic layer EML can extend to adjacent sub-pixels SP1 to SP4 and the transmissive region TA.
[0149] A second electrode CAT can be disposed on the organic layer EML. The second electrode CAT is a cathode electrode and is positioned on the entire surface of the display region, and can be formed of, for example, magnesium (Mg), calcium (Ca), aluminum (Al), silver (Ag), or an alloy thereof having a low work function. The second electrode CAT can be a transmissive electrode and can be configured to be thin enough to allow light transmission.
[0150] Meanwhile, some layers in the organic layer EML and the second electrode CAT extend to the transmissive region TA and can be separated from some layers in the organic layer EML and the second electrode CAT on the first structure GS1 by an undercut UC. For example, the second electrode CAT can extend to the transmissive region TA and can be electrically connected to the top surface of the second cathode connection line 139b exposed through the cathode contact hole CH_2. For example, some layers in the organic layer EML and the second electrode CAT separated by the undercut UC can be stacked in an island shape above the first structure GS1.
[0151] A protective layer 115d can be disposed on the second electrode CAT.
[0152] The protective layer 115d may be an inorganic layer, and in this case, it may be configured by a silicon oxide (SiOx), a silicon nitride (SiNx), or a multi-layer of a silicon oxide (SiOx) and a silicon nitride (SiNx).
[0153] The protective layer 115d may extend to the transmissive region TA. For example, the protective layer 115d may extend to the transmissive region TA, and may even be disposed on the second electrode CAT above the first structure GS1.
[0154] Meanwhile, although not shown, a cover layer may also be disposed on the organic light-emitting diode OLED. The cover layer may be formed of a material having a high refractive index and a high light absorption rate in order to reduce the diffuse reflection of external light.
[0155] An adhesive film 175 and a package substrate 140 may be disposed above the protective layer 115d.
[0156] For example, in the case of the top emission mode, the adhesive film 175 may be joined to the package substrate 140 when disposed above the substrate 110 on which the organic light-emitting diode OLED is disposed.
[0157] In addition, a black matrix 145 may be disposed on one surface of the package substrate 140 facing the substrate 110. Here, for ease of description, one surface of the package substrate 140 facing the substrate 110 will be referred to as the top surface.
[0158] For example, the black matrix 145 may be disposed to be spaced apart from the black matrices 145 of other adjacent sub-pixels SP1 to SP4, and may have an opening.
[0159] A color filter 170 may be disposed on the opening. The color filter 170 is a light conversion member, and may convert the light emitted from the organic light-emitting diode OLED into light of various colors. For example, the color filter 170 may be disposed in the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 in the emission region EA, and may be disposed to overlap a part of the top surface of the black matrix 145. For example, the color filter 170 may include a first color filter layer ( Figure 4B 171 in), a second color filter layer 172, and a third color filter layer ( Figure 4B 173 in).
[0160] The first color filter layer 171 may be disposed in the first sub-pixel SP1. For example, the first color filter layer 171 may be a red color filter layer. Therefore, the light emitted from the organic light-emitting diode OLED may be red light because it passes through the first color filter layer 171 disposed in the first sub-pixel SP1.
[0161] The second color filter layer 172 may be disposed in the second sub-pixel SP2. For example, the second color filter layer 172 may be a green color filter layer. Thus, the light emitted from the organic light emitting diode OLED may be green light because it transmits through the second color filter layer 172 disposed in the second sub-pixel SP2.
[0162] The third color filter layer 173 may be disposed in the third sub-pixel SP3. For example, the third color filter layer 173 may be a blue color filter layer. Thus, the light emitted from the organic light emitting diode OLED may be blue light because it transmits through the third color filter layer 173 disposed in the third sub-pixel SP3.
[0163] An insulating layer 190 may be disposed under the encapsulation substrate 140 including the color filter 170. Here, the insulating layer 190 may be a coating layer or a planarization film, so that the encapsulation substrate 140 may be planarized.
[0164] The thickness of the insulating layer 190 in the transmission region TA and the thickness of the insulating layer 190 in the emission region EA may be different. For example, the insulating layer 190 may be formed using a halftone mask. Thus, the insulating layer 190 may be formed to have a thickness difference according to the region. However, the present disclosure is not limited thereto.
[0165] In this case, in the emission region EA, the insulating layer 190 may have a first thickness T1, and in the transmission region TA, the insulating layer 190 may have a second thickness T2 thicker than the first thickness T1, but is not limited thereto.
[0166] Meanwhile, the insulating layer 190 may be disposed between the first structure GS1 and the second structure GS2 in the transmission region TA. In this case, the second thickness T2 of the insulating layer 190 in the transmission region TA may correspond to the gap between the top surface of the protective layer 115d on the first structure GS1 and the bottom surface of the second structure GS2.
[0167] Meanwhile, a second structure GS2 including a plurality of stacked patterns may be disposed under the encapsulation substrate 140 and facing the first structure GS1.
[0168] The second structure GS2 may be disposed in the transmission region TA and may be disposed to overlap with the first structure GS1.
[0169] The planar shape of the second structure GS2 may have a circular or square shape, but is not limited thereto.
[0170] For example, the second structure GS2 may include a first pattern 121, a second pattern 122, a third pattern 123, and a fourth pattern 124 disposed on the bottom surface of the encapsulation substrate 140. However, the present disclosure is not limited thereto, and the number of patterns included in the second structure GS2 may vary.
[0171] For example, the first pattern 121 may be disposed below the encapsulation substrate 140.
[0172] For example, the first pattern 121 may be formed by the same process as the first color filter layer 171, may be formed of the same material as the first color filter layer 171, and may be formed to have a thickness substantially the same as that of the first color filter layer 171, but is not limited thereto.
[0173] The first pattern 121 may have a square shape, for example, in a plane. At the same time, Figure 5 a side surface of the first pattern 121 is shown to be perpendicular to a top surface and a bottom surface, and thus, the shape of the first pattern 121 is rectangular. However, the present disclosure is not limited thereto, and a cross section of the first pattern 121 may have a positive conical shape or an inverted conical shape.
[0174] A second pattern 122 may be disposed below the first pattern 121.
[0175] For example, the second pattern 122 may be formed by the same process as the second color filter layer 172, may be formed of the same material as the second color filter layer 172, and may be formed to have a thickness substantially the same as that of the second color filter layer 172, but is not limited thereto.
[0176] An area of the second pattern 122 may be larger than an area of the first pattern 121 and an area of the third pattern 123, and a width of the second pattern 122 may be larger than a width of the first pattern 121 and a width of the third pattern 123. In this case, the areas of the first pattern 121, the second pattern 122, and the third pattern 123 may respectively refer to areas where each of the first pattern 121, the second pattern 122, and the third pattern 123 overlaps with the encapsulation substrate 140.
[0177] The second pattern 122 may have a square shape, for example, in a plane. At the same time, in Figure 5 a side surface of the second pattern 122 is shown to be perpendicular to a top surface and a bottom surface, but is not limited thereto, and a cross section of the second pattern 122 may have a positive conical shape or an inverted conical shape.
[0178] At the same time, one pattern among the plurality of patterns constituting the second structure GS2 may be disposed on another pattern and surround a side surface of the other pattern. For example, the second pattern 122 may be disposed on the first pattern 121 and surround the side surface of the first pattern 121. At the same time, a difference between a width of the second pattern 122 and a width of the first pattern 121 may correspond to a processing margin.
[0179] A third pattern 123 may be disposed below the second pattern 122.
[0180] For example, the third pattern 123 may be formed by the same process as the third color filter layer 173, may be formed of the same material as the third color filter layer 173, and may be formed to have substantially the same thickness as the third color filter layer 173, but is not limited thereto.
[0181] The area of the third pattern 123 and the area of the first pattern 121 may be smaller than the area of the second pattern 122. The width of the third pattern 123 and the width of the first pattern 121 may be smaller than the width of the second pattern 122.
[0182] The third pattern 123 may have a square shape in a plane. Meanwhile, in Figure 5 it, the side surface of the third pattern 123 is shown perpendicular to the top surface and the bottom surface, but is not limited thereto, and the cross section of the third pattern 123 may have a positive conical shape or an inverted conical shape.
[0183] Meanwhile, the difference between the width of the third pattern 123 and the width of the second pattern 122 may correspond to a processing margin. Additionally, the width of the third pattern 123 and the width of the first pattern 121 may be the same, but is not limited thereto.
[0184] Meanwhile, a fourth pattern 124 may also be provided between the encapsulation substrate 140 and the first pattern 121. For example, the fourth pattern 124 may be formed during the same process as the black matrix 145 and may be made of the same material as the black matrix 145, but is not limited thereto.
[0185] The area of the fourth pattern 124 may be larger than the area of the first pattern 121 and the area of the third pattern 123, and the width of the fourth pattern 124 may be larger than the width of the first pattern 121 and the width of the third pattern 123.
[0186] The fourth pattern 124 may have a square shape in a plane. Meanwhile, in Figure 5 it, the side surface of the fourth pattern 124 is shown perpendicular to the top surface and the bottom surface, but is not limited thereto, and the cross section of the fourth pattern 124 may have a positive conical shape or an inverted conical shape.
[0187] Meanwhile, the difference between the width of the fourth pattern 124 and the width of the first pattern 121 may correspond to a processing margin. Additionally, the width of the fourth pattern 124 and the width of the second pattern 122 may be the same, but is not limited thereto.
[0188] Above, as an example, the case where the first pattern 121, the second pattern 122, and the third pattern 123 are sequentially stacked below the fourth pattern 124 to form the second structure GS2 has been described, but the present disclosure is not limited to the stacking order of the plurality of patterns.
[0189] Meanwhile, the encapsulation substrate 140 can be manufactured separately from the substrate 110 and bonded to the substrate 110 on which the adhesive film 175 is disposed. In this case, when the second structure GS2, the color filter 170, the black matrix 145, and the insulating layer 190 are provided, the encapsulation substrate 140 can be bonded to the substrate 110. For example, in a state before being bonded, the second structure GS2, the color filter 170, the black matrix 145, and the insulating layer 190 are provided on the encapsulation substrate 140, and the second structure GS2 can be in a state where the fourth pattern 124, the first pattern 121, the second pattern 122, and the third pattern 123 are stacked in sequence. Thereafter, the encapsulation substrate 140 can be bonded to the substrate 110 in a flipped state. Accordingly, the color filter 170, the black matrix 145, the second structure GS2, and the insulating layer 190 can be disposed below the encapsulation substrate 140, and the second pattern 122, the first pattern 121, and the fourth pattern 124 among the plurality of patterns constituting the second structure GS2 can be sequentially disposed above the third pattern 123, as Figure 5 shown, but not limited thereto.
[0190] Accordingly, in the display device 100 according to an exemplary embodiment of the present disclosure, the first structure GS1 can be formed above an end portion of the cathode connection line 139, and the second structure GS2 can be formed above the first structure GS1, thereby uniformly maintaining the cell gap during the bonding process of the substrate 110 and the encapsulation substrate 140. Accordingly, the compressive dark spots caused by internal foreign matters can be improved.
[0191] In addition, an undercut UC structure is formed below the first structure GS1. Accordingly, even if cracks occur in the protective layer 115d above the first structure GS1 due to the pressure during the bonding process, the undercut UC can prevent the cracks from spreading to the peripheral sub-pixels SP1 to SP4. Accordingly, the reliability can be improved.
[0192] In particular, since the first structure GS1 of the present disclosure is disposed above an end portion of the cathode connection line 139 in the transmissive area TA where there is almost no circuit configuration, the influence of the cracks on the protective layer 115d can be minimized, which is beneficial to the reliability. The cathode connection line 139 can be disposed to extend into the transmissive area TA.
[0193] Meanwhile, the display device 100 can be implemented in a top emission or bottom emission manner. For example, in the case of the top emission manner, the adhesive film 175 can be bonded to the encapsulation substrate 140 when disposed above the substrate 110 on which the organic light emitting diode OLED is disposed.
[0194] Importantly, the cell gap is uniformly maintained during the bonding process of the substrate 110 and the encapsulation substrate 140. As the distance between the dam and the adhesive film 175 increases, a large number of compressive dark spots are generated due to the sagging of the substrate 110 and the warping of the protective layer 115d. For example, when there is no structure for maintaining the cell gap, compressive dark spots may occur due to the low cell gap. In addition, compressive dark spots may occur due to foreign substances generated inside the display panel during the bonding process.
[0195] Therefore, in the display device 100 according to an exemplary embodiment of the present disclosure, the first structure GS1 may be formed above the end of the cathode connection line 139, and the second structure GS2 may be formed below the encapsulation substrate 140 and facing the first structure GS1. Thus, when the substrate 110 and the encapsulation substrate 140 are bonded, the second structure GS2 may be disposed above the first structure GS1. In other words, the cell gap can be uniformly maintained by the first structure GS1 and the second structure GS2, and the compressive dark spots caused by internal foreign substances can be improved.
[0196] In addition, in the display device 100 according to an exemplary embodiment of the present disclosure, the insulating layer 190 has different thicknesses in the transmissive region TA and the emission region EA. For example, the insulating layer 190 may be disposed between the first structure GS1 and the second structure GS2 in the transmissive region TA, and the second thickness T2 of the insulating layer 190 in the transmissive region TA may be thicker than the first thickness T1 in the emission region EA. Therefore, even if the gap between the first structure GS1 and the second structure GS2 is large, the thickness of the insulating layer 190 in the transmissive region TA can be increased to fill the gap between the first structure GS1 and the second structure GS2. Thus, the insulating layer 190 can uniformly maintain the cell gap and improve the compressive dark spots caused by internal foreign substances.
[0197] Meanwhile, the second structure GS2 disposed above the cathode contact region is configured by a plurality of patterns. In this case, the plurality of patterns are set considering the processing margin. Therefore, considering the processing margin, the area of the pattern disposed above the plurality of patterns may be larger than the area of the pattern disposed below the plurality of patterns. Thus, the cross-sectional shape of the second structure GS2 has an area increasing upward like an inverted pyramid shape. However, as the number of stacked patterns constituting the second structure GS2 increases, the area of the top layer of the second structure GS2 gradually increases, so there may be a problem that the area of the second structure GS2 increases and the aperture ratio of the transmissive region TA decreases.
[0198] Thus, in the display device 100 according to an exemplary embodiment of the present disclosure, one of the plurality of patterns constituting the second structure GS2 may be set to have a larger area than another pattern disposed above the plurality of patterns, and thus may be set to surround a side surface of the other pattern. For example, in the second structure GS2 in which the fourth pattern 124, the first pattern 121, the second pattern 122, and the third pattern 123 are stacked in this order, the area of the second pattern 122 may be set to be larger than the area of the first pattern 121. In this case, the difference between the area of the second pattern 122 and the area of the first pattern 121 may correspond to a processing margin. Thereafter, the third pattern 123 having an area smaller than that of the second pattern 122 may be disposed below the second pattern 122. Therefore, by repeating the increase and decrease of the area when stacking a plurality of patterns in the second structure GS2, the total area of the second structure GS2 can be determined by only considering the area of the first pattern 121 having the smallest area in the second structure GS2 and the processing margin for forming the plurality of patterns. For example, the overlapping area of the second structure GS2 and the encapsulation substrate 140 may be the same as the overlapping area of the second pattern 122 and the encapsulation substrate 140, and the second pattern 122 may correspond to the area of the first pattern 121 having the smallest area in the second structure GS2 and the area considering the processing margin. Therefore, even when the number of patterns constituting the second structure GS2 increases, the area of the second structure GS2 can be maintained the same as the area of the second pattern 122, and the problem of reducing the aperture ratio of the transmissive region TA can be improved.
[0199] Figure 6 is a cross-sectional view of a display device according to another exemplary embodiment of the present disclosure.
[0200] Figure 6 The display device 600 is different from the above-described Figures 1 to 5 display device 100 only in the first structure GS1 and the insulating layer 690, and other components are substantially the same, and thus redundant descriptions thereof will be omitted. The same reference numerals will be used for the same components. Hereinafter, the description of the same reference numerals may be made with reference to Figures 1 to 5 for the description of the same reference numerals.
[0201] Referring to Figure 6 , the first structure GS1 may be disposed in the transmissive region TA.
[0202] The first structure GS1 may include a first organic pattern OP1 and a second organic pattern OP2.
[0203] The first organic pattern OP1 may be formed of the same material as the coating layer 165.
[0204] An undercut UC may be formed below the first organic pattern OP1 in the first structure GS1.
[0205] A second organic pattern OP2 may be provided above the first organic pattern OP1. The second organic pattern OP2 may be formed of the same material as the bank layer 180.
[0206] For example, the area of the bottom surface of the second organic pattern OP2 may be smaller than the area of the top surface of the first organic pattern OP1. Accordingly, the second organic pattern OP2 may be provided to overlap a part of the first organic pattern OP1.
[0207] Some layers of the organic layer EML separated by the undercut UC and the second electrode CAT may be stacked above the first structure GS1. For example, some layers of the organic layer EML may cover the top surface and the side surfaces of the second organic pattern OP2 in the first structure GS1, and cover the top surface of the first organic pattern OP1 and the side surfaces of the first organic pattern OP1 exposed by the second organic pattern OP2.
[0208] An insulating layer 690 may be provided below the encapsulation substrate 140 including the color filter 170.
[0209] The insulating layer 690 may be provided between the first structure GS1 and the second structure GS2 in the transmissive area TA. In this case, the insulating layer 690 in the transmissive area TA may have a groove. The insulating layer 690 may have a groove in the direction of the encapsulation substrate 140 in the area overlapping the second structure GS2. For example, the bottom surface of the insulating layer 690 is provided to correspond to the top surface of the first structure GS1, and may have a groove to surround the top surface and the side surfaces of the second organic pattern OP2 in the first structure GS1.
[0210] The thickness of the insulating layer 690 in the transmissive area TA may not be exactly the same. For example, the thickness of the insulating layer 690 in the area overlapping the second organic pattern OP2 may be different from the thickness of the insulating layer 690 in the area not overlapping the second organic pattern OP2. For example, in the area in the transmissive area TA not overlapping the second organic pattern OP2, the insulating layer 690 may have a second thickness T2, and in the area overlapping the second organic pattern OP2, the insulating layer 690 may have a third thickness T3 thinner than the second thickness T2. In this case, the third thickness T3 may correspond to the gap between the top surface of the second organic pattern OP2 and the bottom surface of the second structure GS2.
[0211] Meanwhile, in the emission area EA, the insulating layer 690 may have a first thickness T1 thinner than the second thickness T2. In this case, the first thickness T1 may be the same as the third thickness T3, but is not limited thereto.
[0212] In a display device 600 according to another exemplary embodiment of the present disclosure, a first structure GS1 may be formed above an end portion of a cathode connection line 139, and a second structure GS2 may be formed below a packaging substrate 140 and face the first structure GS1, so as to uniformly maintain a cell gap. Accordingly, compressive dark spots caused by internal foreign substances may be improved.
[0213] In a display device 600 according to another exemplary embodiment of the present disclosure, an insulating layer 690 may have different thicknesses in a transmissive region TA and an emission region EA. Accordingly, by increasing the thickness of the insulating layer 690 in the transmissive region TA, a cell gap may be uniformly maintained and compressive dark spots caused by internal foreign substances may be improved.
[0214] In a display device 600 according to another exemplary embodiment of the present disclosure, areas of a plurality of patterns constituting a second structure GS2 may be stacked such that the areas repeatedly increase and decrease. Accordingly, even when the number of patterns constituting the second structure GS2 increases, the total area of the second structure GS2 may be maintained constant and a problem of reducing an aperture ratio of the transmissive region TA may be improved.
[0215] In a display device 600 according to another exemplary embodiment of the present disclosure, the insulating layer 690 may have a groove corresponding to a top surface of a second organic pattern OP2 in a region overlapping with the second structure GS2, and may be disposed to surround the top surface and a side surface of the second organic pattern OP2. In this manner, the groove of the insulating layer 690 is disposed to surround a part of the second structure GS2, thereby preventing the first structure GS1 from flowing. For example, when bonding the substrate 110 and the packaging substrate 140, a dam and an adhesive film 175 are applied in a vacuum state, the dam is cured, and then the adhesive film 175 is thermally cured at atmospheric pressure. In this case, a filling material of the adhesive film 175 moves from a viscous state to an uncured state, and thus, due to a change in pressure, a change in a bonding state such as micro-deformation may occur between the substrate 110 and the packaging substrate 140. In this case, the groove of the insulating layer 690 is disposed to surround a part of the second structure GS2, thereby preventing the first structure GS1 from flowing.
[0216] Meanwhile, as described above, a coating layer 165 and a bank layer 180 may also be disposed above a gate line GL. This is because, if necessary, the coating layer 165 and the bank layer 180 above the gate line GL may also be used as additional lower structures. In this case, the maintenance of the cell gap by the first structure GS1 and the second structure GS2, which will be described later, may be more effectively supplemented. In addition, the coating layer 165 and the bank layer 180 above the gate line GL, which are positioned adjacent to the first structure GS1, may be used to prevent the movement of the second structure GS2.
[0217] Figure 7 It is a cross-sectional view of a display device according to another exemplary embodiment of the present disclosure.
[0218] Figure 7 The display device 700 is different from the above-mentioned Figures 1 to 5 display device 100 only in the second structure GS2 and the insulating layer 790, and other components are substantially the same, and thus redundant descriptions thereof will be omitted. The same reference numerals will be used for the same components. Hereinafter, the description of the same reference numerals can be referred to Figures 1 to 5 for description.
[0219] Referring to Figure 7 , the second structure GS2 can be disposed in the transmissive region TA.
[0220] The second structure GS2 may include a first pattern 721, a second pattern 722, a third pattern 723, and a fourth pattern 124.
[0221] The fourth pattern 124 can be disposed below the encapsulation substrate 140, and the first pattern 721 can be disposed below the fourth pattern 124.
[0222] The overlapping area of the first pattern 721 and the encapsulation substrate 140 may be smaller than the overlapping area of the fourth pattern 124 and the encapsulation substrate 140. At the same time, the difference between the width of the fourth pattern 124 and the width of the first pattern 721 may correspond to a processing margin.
[0223] The second pattern 722 can be disposed below the first pattern 721.
[0224] The overlapping area of the second pattern 722 and the encapsulation substrate 140 may be smaller than the overlapping area of the first pattern 721 and the encapsulation substrate 140. At the same time, the difference between the width of the first pattern 721 and the width of the second pattern 722 may correspond to a processing margin.
[0225] The third pattern 723 can be disposed below the second pattern 722.
[0226] The overlapping area of the third pattern 723 and the encapsulation substrate 140 may be larger than the overlapping area of the second pattern 722 and the encapsulation substrate 140. Therefore, the third pattern 723 can be disposed to surround the side surface of the second pattern 722. For example, the width of the first pattern 721 and the width of the third pattern 723 may be greater than the width of the second pattern 722. Therefore, the third pattern 723 and the first pattern 721 can be disposed to contact each other on the outside of the second pattern 722, and the first pattern 721 and the third pattern 723 can be disposed to surround or enclose the second pattern 722.
[0227] Meanwhile, the difference between the width of the second pattern 722 and the width of the third pattern 723 may correspond to a processing margin, and the third pattern 723 may have the same width as the first pattern 721, and is not limited thereto.
[0228] An insulating layer 790 may be disposed under the encapsulation substrate 140 including the color filter 170. The insulating layer 790 may be disposed between the first structure GS1 and the second structure GS2 in the transmissive region TA.
[0229] In the display device 700 according to another exemplary embodiment of the present disclosure, the first structure GS1 may be formed above an end portion of the cathode connection line 139, and the second structure GS2 may be formed under the encapsulation substrate 140 and facing the first structure GS1, so as to uniformly maintain the cell gap. Accordingly, compressive dark spots caused by internal foreign substances may be improved.
[0230] In addition, in the display device 700 according to another exemplary embodiment of the present disclosure, the insulating layer 790 may have different thicknesses in the transmissive region TA and the emission region EA. For example, by increasing the thickness of the insulating layer 790 in the transmissive region TA, the cell gap may be uniformly maintained and compressive dark spots caused by internal foreign substances may be improved.
[0231] In the display device 700 according to another exemplary embodiment of the present disclosure, the fourth pattern 124 and the first pattern 721 may be disposed under the encapsulation substrate 140, and a second pattern 722 having an area smaller than that of the first pattern 721 may be disposed under the first pattern 721. In addition, a third pattern 723 having an area larger than that of the second pattern 722 may be disposed under the second pattern 722 to surround a side surface of the second pattern 722. Accordingly, even if the number of patterns constituting the second structure GS2 increases, the total area of the second structure GS2 may be maintained constant and the problem of reducing the aperture ratio of the transmissive region TA may be improved.
[0232] Meanwhile, as described above, the coating layer 165 and the bank layer 180 may also be disposed above the gate line GL. This is because, if necessary, the coating layer 165 and the bank layer 180 above the gate line GL may also be used as additional lower structures. In this case, the maintenance of the cell gap by the first structure GS1 and the second structure GS2, which will be described later, may be more effectively supplemented. In addition, the coating layer 165 and the bank layer 180 above the gate line GL, which are positioned adjacent to the first structure GS1, may be used to prevent the movement of the second structure GS2.
[0233] Figure 8A and Figures 8B to 10A and Figure 10B are diagrams for describing the effects of the display device according to the exemplary embodiments of the present disclosure.
[0234] Figure 8A is a cross-sectional view of a second structure according to a comparative embodiment, and Figure 8B is a plan view of a second structure according to a comparative embodiment.
[0235] Figure 9A is a cross-sectional view of a second structure GS2 according to exemplary embodiment 1, and Figure 9B is a plan view of a second structure GS2 according to exemplary embodiment 1. Exemplary embodiment 1 is a case of providing a second structure GS2 of a display device 500 according to Figure 5 and a display device 600 according to Figure 6 .
[0236] Figure 10A is a cross-sectional view of a second structure GS2 according to exemplary embodiment 2, and Figure 10B is a plan view of a second structure GS2 according to exemplary embodiment 2. Exemplary embodiment 2 is a case of providing a second structure GS2 of a display device 700 according to Figure 7 .
[0237] Figure 8A , Figure 9A and Figure 10A The comparative embodiment, exemplary embodiment 1, and exemplary embodiment 2 shown each show a state before the encapsulation substrate 140 and the substrate 110 are joined, and show the second structure GS2 in a state before the encapsulation substrate 140 is flipped.
[0238] Referring to Figure 8A , Figure 9A and Figure 10A , each of the comparative embodiment, exemplary embodiment 1, and exemplary embodiment 2 includes a first pattern P1, a second pattern P2, a third pattern P3, and a fourth pattern P4.
[0239] The fourth pattern P4 is disposed on the bottom layer, and the first pattern P1, the second pattern P2, and the third pattern P3 are sequentially disposed above the fourth pattern P4. In the comparative embodiment, exemplary embodiment 1, and exemplary embodiment 2, respectively, it is assumed that the cross-sectional shapes of the fourth pattern P4, the first pattern P1, the second pattern P2, and the third pattern P3 are squares having the same side length and width. Additionally, in the comparative embodiment, exemplary embodiment 1, and exemplary embodiment 2, respectively, it is assumed that the processing margins for forming the fourth pattern P4, the first pattern P1, the second pattern P2, and the third pattern P3 are about 14 μm.
[0240] Table 1 summarizes the width of each pattern according to the comparative embodiment, exemplary embodiment 1, and exemplary embodiment 2, as well as the total area of the comparative embodiment, exemplary embodiment 1, and exemplary embodiment 2. In Table 1, the total area refers to the cross-sectional area of each of the comparative embodiment, exemplary embodiment 1, and exemplary embodiment 2. Therefore, in the comparative embodiment, exemplary embodiment 1, and exemplary embodiment 2 respectively, the total area is equal to the area of the pattern with the largest width among the multiple patterns that make up the comparative embodiment, exemplary embodiment 1, and exemplary embodiment 2.
[0241] [Table 1]
[0242] Comparative embodiments Exemplary embodiment 1 Exemplary embodiment 2 Third pattern 14 μm 14 μm 28 μm Second pattern 28 μm 28 μm 14 μm First pattern 42 μm 14 μm 28 μm Fourth pattern 56 μm 28 μm 42 μm Total area <![CDATA[3136μm 2 > <![CDATA[784μm 2 > <![CDATA[1764μm 2 >
[0243] Referring to Figure 8A , in the comparative embodiment, the widths of the fourth pattern P4, the first pattern P1, the second pattern P2, and the third pattern P3 decrease in the order of approximately 56 μm, 42 μm, 28 μm, and 14 μm, respectively.
[0244] Referring to Figure 8B and Table 1, it can be seen that in the comparative embodiment, the total area is the same as the area of the fourth pattern P4 and is approximately 3136 μm 2 .
[0245] Referring to Figure 9A , in exemplary embodiment 1, the widths of the fourth pattern P4 and the second pattern P2 are the same, approximately 28 μm, and the widths of the first pattern P1 and the third pattern P3 are the same, approximately 14 μm.
[0246] Referring to Figure 9B and Table 1, it can be seen that in exemplary embodiment 1, the total area is the same as the areas of the fourth pattern P4 and the second pattern P2 and is approximately 784 μm2.
[0247] Referring to Figure 10A , in exemplary embodiment 2, the widths of the fourth pattern P4, the first pattern P1, and the second pattern P2 decrease in the order of approximately 42 μm, 28 μm, and 14 μm, respectively. The width of the third pattern P3 is the same as the width of the first pattern P1, approximately 28 μm.
[0248] Referring to Figure 10B and Table 1, it can be seen that in exemplary embodiment 2, the total area is the same as the area of the fourth pattern P4 and is approximately 1764 μm 2 .
[0249] Accordingly, it can be seen that the total area in each of Exemplary Embodiment 1 and Exemplary Embodiment 2 corresponds to approximately 25% and approximately 56% of the total area of the Comparative Embodiment, and the total area in each of Exemplary Embodiment 1 and Exemplary Embodiment 2 is reduced by approximately 75% and approximately 44% of the total area of the Comparative Embodiment.
[0250] Figure 11 is a cross-sectional view of a display device according to still another exemplary embodiment of the present disclosure.
[0251] Figure 11 The display device 1100 of Figures 1 to 5 differs from the display device 100 of Figures 1 to 5 only in the second structure GS2 and the insulating layer 1190, and the other components are substantially the same, and thus redundant descriptions thereof will be omitted. The same reference numerals will be used for the same components. Hereinafter, reference may be made to
[0252] For the description of the same reference numerals. Figure 11 Referring to
[0253] For example, the second structure GS2 may include a first pattern 1121, a second pattern 1122, a third pattern 1123, and a fourth pattern 1124 disposed under the encapsulation substrate 140.
[0254] The fourth pattern 1124 may be disposed under the encapsulation substrate 140, and the first pattern 1121 may be disposed under the fourth pattern 1124.
[0255] The overlapping area of the first pattern 1121 and the encapsulation substrate 140 may be greater than the overlapping area of the fourth pattern 1124 and the encapsulation substrate 140. Accordingly, the first pattern 1121 may be disposed to surround the side surface of the fourth pattern 1124. Meanwhile, the difference between the width of the first pattern 1121 and the width of the fourth pattern 1124 may correspond to a processing margin, but is not limited thereto.
[0256] The second pattern 1122 may be disposed under the first pattern 1121.
[0257] The overlapping area of the second pattern 1122 and the encapsulation substrate 140 may be less than the overlapping area of the first pattern 1121 and the encapsulation substrate 140.
[0258] Meanwhile, the difference between the width of the first pattern 1121 and the width of the second pattern 1122 may correspond to a processing margin, and the second pattern 1122 may have the same width as the fourth pattern 1124, and is not limited thereto.
[0259] The third pattern 1123 may be disposed below the second pattern 1122.
[0260] The overlapping area of the third pattern 1123 and the encapsulation substrate 140 may be larger than the overlapping area of the second pattern 1122 and the encapsulation substrate 140. Accordingly, the third pattern 1123 may be disposed to surround the side surface of the second pattern 1122. In this case, the width of the first pattern 1121 and the width of the third pattern 1123 may be larger than the width of the second pattern 1122. Accordingly, the third pattern 1123 and the first pattern 1121 may be disposed to contact each other on the outside of the second pattern 1122, and the first pattern 1121 and the third pattern 1123 may be disposed to surround the second pattern 1122. Meanwhile, the difference between the width of the second pattern 1122 and the width of the third pattern 1123 may correspond to a processing margin, and the third pattern 1123 may have the same width as the first pattern 1121, and is not limited thereto.
[0261] The insulating layer 1190 may be disposed below the encapsulation substrate 140 including the color filter 170. The insulating layer 1190 may be disposed between the first structure GS1 and the second structure GS2 in the transmissive region TA.
[0262] In the display device 1100 according to another exemplary embodiment of the present disclosure, the first structure GS1 may be formed above an end portion of the cathode connection line 139, and the second structure GS2 may be formed below the encapsulation substrate 140 and face the first structure GS1, thereby uniformly maintaining the cell gap. Accordingly, the compressive dark spots caused by internal foreign matters may be improved.
[0263] In addition, in the display device 1100 according to another exemplary embodiment of the present disclosure, the insulating layer 1190 may have different thicknesses in the transmissive region TA and the emission region EA. For example, by increasing the thickness of the insulating layer 1190 in the transmissive region TA, the cell gap may be uniformly maintained and the compressive dark spots caused by internal foreign matters may be improved.
[0264] In the display device 1100 according to another exemplary embodiment of the present disclosure, for example, the first pattern 1121 having an area larger than that of the fourth pattern 1124 is disposed below the fourth pattern 1124 such that the first pattern 1121 is disposed to surround the fourth pattern 1124. In addition, the second pattern 1122 having an area smaller than that of the first pattern 1121 is disposed below the first pattern 1121. Accordingly, even if the number of patterns constituting the second structure GS2 increases, the total area of the second structure GS2 may be maintained constant and the problem of reducing the aperture ratio of the transmissive region TA may be improved.
[0265] Figure 12AIt is a schematic plan view of a substrate of a pixel region of a display device according to another exemplary embodiment of the present disclosure.
[0266] Figure 12B It is a schematic plan view of a package substrate of a pixel region of a display device according to another exemplary embodiment of the present disclosure.
[0267] Referring to Figure 12A and Figure 12B , the emission region EA of the display device 1200 may include a first sub-pixel SP1, a second sub-pixel SP2, a third sub-pixel SP3, and a fourth sub-pixel SP4.
[0268] In this case, an organic light-emitting diode OLED is disposed in the emission region EA on the substrate 110, and each of the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, and the fourth sub-pixel SP4 may be divided by a bank layer 1280.
[0269] In addition, a cathode connection line 1239 may be disposed in the emission region EA on the substrate 1210. For example, the cathode connection line 1239 may be disposed adjacent to the fourth sub-pixel SP4, and may be electrically connected to a second electrode of the organic light-emitting diode OLED extending from the fourth sub-pixel SP4.
[0270] The electrical connection between the second electrode and the cathode connection line 1239 will be described in detail later with reference to Figure 13 .
[0271] In Figure 12A , it is shown that the cathode connection line 1239 is disposed in a region adjacent to the fourth sub-pixel SP4 among the first sub-pixel SP1 to the fourth sub-pixel SP4. However, the present disclosure is not limited thereto, and the cathode connection line 1239 may be disposed in a region adjacent to one of the first sub-pixel SP1 to the fourth sub-pixel SP4.
[0272] In addition, a color filter 1270 may be disposed in the emission region EA on the package substrate 1240, and the color filter 1270 may be disposed to be surrounded by a black matrix 1245. For example, a first color filter layer 1271, a second color filter layer 1272, and a third color filter layer 1273 may be disposed in the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3, respectively. Meanwhile, when the organic light-emitting diode OLED emits white light and the fourth sub-pixel SP4 is a white sub-pixel, a separate color filter 1270 may not be disposed in the fourth sub-pixel SP4, but is not limited thereto.
[0273] In addition, a second structure GS2 may be provided in the emission region EA. For example, the second structure GS2 may be provided adjacent to the fourth sub-pixel SP4, and the second electrode of the organic light-emitting diode OLED and the second power line EVSS may be electrically connected below the second structure GS2. The second structure GS2 may be positioned to correspond to the first structure GS1.
[0274] Figure 13 is a cross-sectional view taken along line b-b' Figure 12A of the display device 1200.
[0275] Figure 13 The display device 1200 differs from the display device 100 Figures 1 to 5 only in the first structure GS1, the second structure GS2, the cathode connection line 1239, the bank layer 1280, the insulating layer 1290, and the black matrix 1245, and other components are substantially the same, and thus redundant descriptions thereof will be omitted. The same reference numerals will be used for the same components. Hereinafter, the description of the same reference numerals may be made with reference to Figures 1 to 5 for the description of the same reference numerals.
[0276] The cathode connection line 1239 may be provided above the substrate 110. For example, the cathode connection line 1239 may include a first cathode connection line 1239a and a second cathode connection line 1239b.
[0277] The second cathode connection line 1239b may be provided above the first cathode connection line 1239a.
[0278] For example, the second cathode connection line 1239b may be electrically connected to the second electrode CAT in the emission region EA.
[0279] The first structure GS1 may be provided above an end portion of the cathode connection line 1239b in the emission region EA.
[0280] An undercut UC may be formed below the first structure GS1. For example, a part of the top surface of the second cathode connection line 1239b may be exposed in a region overlapping with the first structure GS1.
[0281] The organic light-emitting diode OLED and the bank layer 1280 may be provided above the substrate 110.
[0282] Some layers of the organic layer EML of the organic light-emitting diode OLED and the second electrode CAT may be electrically connected to the top surface of the second cathode connection line 1239b exposed by the cathode contact hole CH_2 in the emission region EA.
[0283] In addition, a protective layer 115d, an adhesive film 175, and a package substrate 140 may be provided above the organic light-emitting diode OLED.
[0284] The second structure GS2 may be disposed below the encapsulation substrate 140 to overlap with the first structure GS1.
[0285] The second structure GS2 may be disposed in the emission region EA.
[0286] The second structure GS2 may include a first pattern 1221, a second pattern 1222, a third pattern 1223, and a fourth pattern 1224 disposed below the encapsulation substrate 140.
[0287] The fourth pattern 1224 may be disposed below the encapsulation substrate 140, and the first pattern 1221 may be disposed below the fourth pattern 1224. The fourth pattern 1224 may be connected to the black matrix 1245, but is not limited thereto.
[0288] The overlapping area of the first pattern 1221 and the encapsulation substrate 140 may be smaller than the overlapping area of the fourth pattern 1224 and the encapsulation substrate 140.
[0289] The second pattern 1222 may be disposed below the first pattern 1221. The overlapping area of the second pattern 1222 and the encapsulation substrate 140 may be larger than the overlapping area of the first pattern 1221 and the encapsulation substrate 140. Accordingly, the second pattern 1222 may be disposed to surround the side surface of the first pattern 1221.
[0290] The third pattern 1223 may be disposed below the second pattern 1222.
[0291] The overlapping area of the third pattern 1223 and the encapsulation substrate 140 may be smaller than the overlapping area of the second pattern 1222 and the encapsulation substrate 140.
[0292] The insulating layer 1290 may be disposed below the encapsulation substrate 140 including the color filter 1270. The insulating layer 1290 may be disposed between the first structure GS1 and the second structure GS2 in the emission region EA.
[0293] Meanwhile, the insulating layer 1290 may be entirely disposed to have the same thickness, but is not limited thereto.
[0294] In the display device 1200 according to another exemplary embodiment of the present disclosure, the first structure GS1 may be formed above an end portion of the cathode connection line 1239, and the second structure GS2 may be formed below the encapsulation substrate 140 and facing the first structure GS1, thereby uniformly maintaining the cell gap. Accordingly, the compressive dark spots caused by internal foreign matters may be improved.
[0295] In a display device 1200 according to yet another exemplary embodiment of the present disclosure, a fourth pattern 1224, a first pattern 1221, a second pattern 1222, and a third pattern 1223 may be disposed below a packaging substrate 140, and the second pattern 1222 may be disposed to surround a side surface of the first pattern 1221. Additionally, a third pattern 1223 having an area smaller than that of the second pattern 1222 may be disposed below the second pattern 1222. Accordingly, even if the number of patterns constituting the second structure GS2 increases, the total area of the second structure GS2 may remain constant, and the problem of reducing the aperture ratio of the emission area EA may be improved.
[0296] An exemplary embodiment of the present disclosure may also be described as follows:
[0297] According to an aspect of the present disclosure, a display device is provided. The display device includes: a substrate on which a plurality of sub-pixels may be defined; a first structure disposed above the substrate; a packaging substrate disposed above the substrate; and a second structure disposed below the packaging substrate and facing the first structure, the second structure may include a plurality of stacked patterns, and one of the plurality of stacked patterns may surround a side surface of another pattern disposed above the one pattern among the plurality of stacked patterns.
[0298] The plurality of stacked patterns may include a first pattern, a second pattern disposed below the first pattern, and a third pattern disposed below the second pattern.
[0299] The width of the first pattern and the width of the third pattern may be the same.
[0300] The display device may further include: a first color filter layer, a second color filter layer, and a third color filter layer disposed in each of the plurality of sub-pixels, the first pattern may be formed of the same material as the first color filter layer, the second pattern may be formed of the same material as the second color filter layer, and the third pattern may be formed of the same material as the third color filter layer.
[0301] The width of the first pattern and the width of the third pattern may be smaller than the width of the second pattern.
[0302] The second pattern may be disposed to surround a side surface of the first pattern.
[0303] The width of the first pattern and the width of the third pattern may be greater than the width of the second pattern.
[0304] The third pattern and the first pattern may be in contact with each other outside the second pattern.
[0305] The first pattern and the third pattern may be disposed to surround the second pattern.
[0306] The display device may further include: a black matrix disposed on one side surface of the encapsulation substrate, and the plurality of stacked patterns may further include a fourth pattern, which may be formed of the same material as the black matrix and is disposed between the encapsulation substrate and the first pattern.
[0307] The first pattern may surround the side surface of the fourth pattern. Alternatively, the width of the fourth pattern may be equal to or greater than the maximum width among the widths of the first pattern, the second pattern, and the third pattern. For example, the width of the fourth pattern may be equal to the width of the second pattern and greater than the widths of the first pattern and the third pattern.
[0308] The display device may further include: an organic light-emitting diode disposed in each of the plurality of sub-pixels, the first structure may include a first organic pattern, an undercut may be formed below the first structure, and an electrode of the organic light-emitting diode and a power line may be electrically connected below the undercut.
[0309] The first structure may further include a second organic pattern disposed on the first organic pattern.
[0310] The substrate on which a plurality of sub-pixels are defined may be divided into an emission region and a transmission region, and the first structure and the second structure may be disposed in the transmission region.
[0311] The display device may further include a first cathode connection line that is electrically connected to the power line through a first contact hole in the emission region.
[0312] The first cathode connection line may be electrically connected to the electrode through a second cathode connection line in the transmission region.
[0313] The first structure and the second structure may be disposed in the plurality of sub-pixels.
[0314] The first structure and the second structure may be disposed adjacent to a white sub-pixel among the plurality of sub-pixels.
[0315] The first structure may be disposed in an island shape.
[0316] Although the exemplary embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, the present disclosure is not limited thereto and may be implemented in many different forms without departing from the technical concept of the present disclosure. Therefore, the exemplary embodiments of the present disclosure are provided for illustrative purposes only and are not intended to limit the technical concept of the present disclosure. The scope of the technical concept of the present disclosure is not limited thereto. Therefore, it should be understood that the above exemplary embodiments are illustrative in all aspects and do not limit the present disclosure. All technical concepts within the equivalent scope of the present disclosure should be construed as falling within the scope of the present disclosure.
Claims
1. A display device, comprising: a substrate having a plurality of sub-pixels defined thereon; a first structure disposed above the substrate; a packaging substrate disposed above the substrate; as well as A second structure disposed below the packaging substrate and facing the first structure, Wherein, the second structure includes a plurality of stacked patterns, and One of the plurality of stacked patterns surrounds a side surface of another pattern of the plurality of stacked patterns that is disposed above the one pattern.
2. The display device according to claim 1, wherein: The plurality of stack patterns include a first pattern, a second pattern disposed under the first pattern, and a third pattern disposed under the second pattern.
3. The display device according to claim 2, wherein: The width of the first pattern is the same as the width of the third pattern.
4. The display device according to claim 2, further comprising: a first color filter layer, a second color filter layer, and a third color filter layer disposed in each of the plurality of sub-pixels, The first pattern is formed of the same material as the first color filter layer, the second pattern is formed of the same material as the second color filter layer, and the third pattern is formed of the same material as the third color filter layer.
5. The display device according to claim 2, wherein: A width of the first pattern and a width of the third pattern are smaller than a width of the second pattern.
6. The display device according to claim 5, wherein: The second pattern is disposed to surround a side surface of the first pattern.
7. The display device according to claim 2, wherein: A width of the first pattern and a width of the third pattern are greater than a width of the second pattern.
8. The display device according to claim 7, wherein: The third pattern and the first pattern contact each other outside the second pattern.
9. The display device according to claim 7, wherein: The first pattern and the third pattern are arranged to surround the second pattern.
10. The display device according to claim 2, further comprising: A black matrix is provided on one side surface of the packaging substrate, The plurality of stacked patterns further include a fourth pattern, which is formed of the same material as the black matrix and is disposed between the packaging substrate and the first pattern.
11. The display device according to claim 10, wherein: The first pattern surrounds a side surface of the fourth pattern.
12. The display device according to claim 10, wherein: The width of the fourth pattern is equal to or greater than the maximum width among the widths of the first pattern, the second pattern, and the third pattern.
13. The display device according to claim 10, wherein: A width of the fourth pattern is equal to a width of the second pattern, and is greater than a width of the first pattern and a width of the third pattern.
14. The display device according to claim 1, further comprising: An organic light emitting diode is provided in each of the plurality of sub-pixels, Wherein, the first structure comprises a first organic pattern, wherein an undercut is provided below the first structure, and Wherein, an electrode of the organic light emitting diode and the electric field line are electrically connected below the undercut.
15. The display device according to claim 14, wherein: The first structure further includes a second organic pattern disposed on the first organic pattern.
16. The display device according to claim 14, wherein: The substrate on which the plurality of sub-pixels are defined is divided into an emission area and a transmission area, and Wherein, the first structure and the second structure are arranged in the transmission area.
17. The display device according to claim 16, further comprising: A first cathode connection line is electrically connected to the power line through a first contact hole in the emission region.
18. The display device according to claim 17, wherein: The first cathode connection line is electrically connected to the electrode through a second cathode connection line in the transmission area.
19. The display device according to claim 14, wherein: The first structure and the second structure are disposed in the plurality of sub-pixels.
20. The display device according to claim 19, wherein: The first structure and the second structure are disposed adjacent to a white sub-pixel among the plurality of sub-pixels.
21. The display device according to claim 1, wherein: The first structure is configured in an island shape.