Display device

Abstract

An embodiment discloses a display device including: a substrate including a display area, a non-display area, and a bending area; an adhesive layer disposed on the substrate; a pixel driving circuit disposed on the adhesive layer in the display area; a buffer layer disposed on the adhesive layer and configured to cover the pixel driving circuit; a second protection pattern disposed in the non-display area and surrounding the display area; a first inorganic film disposed on the pixel driving circuit; and a second inorganic film disposed on the second protection pattern in the display area and the non-display area, in which the first inorganic film and the second inorganic film overlap in an area overlapping with the second protection pattern.

Description

[0001] Cross - reference to related applications

[0002] This application claims the priority and benefit of Korean Patent Application No. 10 - 2023 - 0192374, filed on December 27, 2023, the entire disclosure of which is incorporated herein by reference. Technical field

[0003] Embodiments relate to a display device using an inorganic light - emitting diode as a light source. Background art

[0004] Electroluminescent display devices include an organic light - emitting display device in which an organic light - emitting diode (OLED) is provided and an inorganic light - emitting display device (hereinafter referred to as an "LED display device") in which an inorganic light - emitting diode (hereinafter referred to as an "LED") is provided.

[0005] Electroluminescent display devices use self - emitting elements to display images, so they do not require a separate light source (such as a backlight unit) and can be implemented in a thin and various forms.

[0006] In an organic light - emitting display device, an oxidation phenomenon may occur between the organic light - emitting layer and the electrode due to the penetration of moisture and oxygen, so a design to prevent the penetration of oxygen and moisture is required.

[0007] Recently, as an example of an inorganic light - emitting display device, a micro - LED display device in which micro - LEDs are provided in pixels has received much attention as a next - generation display device. A micro - LED can be an inorganic LED having a size of 100 μm or less. Micro - LEDs are manufactured through a separate semiconductor process and transferred to pixel positions on a display panel substrate of a display device, and can be separately provided in sub - pixels of each color. Summary of the invention

[0008] Since the insulating layer and the optical layer are made of organic materials, it is difficult to prevent foreign substances (such as moisture, hydrogen, etc.) existing outside the display panel from penetrating into the display panel, which may cause driving defects in the pixel driving circuit, metal wires, etc. In addition, when an insulating layer or an optical layer is provided on the display panel, a defect may occur in which the insulating layer and the optical layer provided in the non - display area flow out of the display panel.

[0009] In the present disclosure, by providing the first protection pattern, the second protection pattern, the first inorganic film, and the second inorganic film to prevent or delay the entry of foreign substances such as moisture and hydrogen permeating from the outside, defects such as corrosion and damage of metal wires in the display panel can be prevented. In addition, since the outer optical layer and the outer bank pattern are provided, the thickness of the second optical layer and the second inorganic film provided in the non-display area can have a value the same as or similar to the thickness of the second optical layer and the second inorganic film provided in the display area, and defects such as the outflow of the organic layer such as the second optical layer from the non-display area of the display panel due to process problems can be prevented.

[0010] The technical problems to be solved by this specification are not limited to the above technical problems, and those of ordinary skill in the art will clearly understand other technical problems not mentioned from the following description.

[0011] This technical problem can be solved by a display device including: a substrate including a display area, a non-display area, and a bending area; an adhesive layer provided on the substrate; a pixel driving circuit provided on the adhesive layer in the display area; a buffer layer provided on the adhesive layer and configured to cover the pixel driving circuit; a second protection pattern provided in the non-display area and surrounding the display area; a first inorganic film provided on the pixel driving circuit; and a second inorganic film provided on the second protection pattern in the display area and the non-display area, wherein the first inorganic film and the second inorganic film overlap in the area overlapping with the second protection pattern. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Through the detailed description of the exemplary embodiments of the present invention with reference to the accompanying drawings, the above and other objects, features, and advantages of the present invention will become more apparent to those of ordinary skill in the art. In the drawings:

[0013] Figure 1 is a diagram showing a display device according to an embodiment of this specification;

[0014] Figure 2 is a diagram showing Figure 1 an enlarged view of area A in

[0015] Figure 3 is a diagram showing a partial area of a pixel.

[0016] Figure 4 is a cross-sectional view taken along line I-I' in Figure 3 ;

[0017] Figure 5 is a cross-sectional view taken along line II-II' in Figure 3 ;

[0018] Figure 6 is a cross-sectional view taken along line Figure 3A cross-sectional view taken along line III-III' in;

[0019] Figure 7 is a cross-sectional view showing an example in which a main light-emitting element and a sub-light-emitting element are electrically connected to a pixel driving circuit;

[0020] Figure 8 is a view showing a display device according to another embodiment of the present specification;

[0021] Figure 9 is along Figure 8 A cross-sectional view taken along line IV-IV' in;

[0022] Figure 10 A is a view showing a display device according to another embodiment of the present specification;

[0023] Figure 10 B is Figure 10 An enlarged view of region B in A;

[0024] Figure 11A is along Figure 10 A cross-sectional view taken along line Y-Y' in B;

[0025] Figure 11B is a cross-sectional view taken along line Y-Y' of a display device according to another embodiment of the present specification in Figure 10 B;

[0026] Figure 11C is a cross-sectional view taken along line Y-Y' of a display device according to still another embodiment of the present specification in Figure 10 B;

[0027] Figure 12A is along Figure 10 A cross-sectional view taken along line Z-Z' in A;

[0028] Figure 12B is a cross-sectional view taken along line Z-Z' of a display device according to another embodiment of the present specification in Figure 10 A; and

[0029] Figure 12C is a cross-sectional view taken along line Z-Z' of a display device according to still another embodiment of the present specification in Figure 10 A. Detailed Description

[0030] Advantages and features of the present disclosure and methods for implementing the same will become apparent with reference to the embodiments described in detail below in conjunction with the accompanying drawings. The present disclosure is not limited to the embodiments described below and may be implemented in various different forms. The embodiments are provided only for fully disclosing the content of the present disclosure and fully conveying the scope of the present disclosure to those of ordinary skill in the art, and the present disclosure is defined only by the scope of the claims.

[0031] Since shapes, sizes, ratios, angles, quantities, etc. disclosed in the accompanying drawings for describing the embodiments of the present disclosure are merely exemplary, the present disclosure is not limited to the items shown in the drawings. Throughout the specification, the same reference numerals refer to substantially the same components. In addition, when determining that a detailed description of related known technologies may unnecessarily obscure the gist of the present disclosure, the detailed description thereof will be omitted.

[0032] When using words such as "provide", "include", "have", "consist of", etc. mentioned in this specification, unless "only" is used, other parts may be added. Unless otherwise clearly stated, components expressed in the singular form may also be interpreted in the plural form.

[0033] When interpreting components, even without a separate explicit description, it should be understood to include an error range.

[0034] When describing the positional relationship and interconnection relationship between two components, such as "on", "above", "below", "next to", "connected or combined", "crossed or intersected", etc., unless "immediately" or "directly" is mentioned, one or more other components may be inserted between the components.

[0035] When the time relationship is described as "after", "subsequently", "then", "before", etc., unless "immediately" or "directly" is used, the time relationship may not be continuous on the time axis.

[0036] First, second, etc. may be used before the component names to distinguish the components, but the functions or structures are not limited by these serial numbers or component names. For ease of description, the serial numbers before the same component names may be different in different embodiments.

[0037] The following embodiments may be partially or fully combined with each other, and there may be various types of interconnections and driving methods technically. The embodiments may be implemented independently of each other or may be implemented together in an associated relationship.

[0038] Hereinafter, various embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0039] A display device according to an embodiment of the present specification includes a display area for displaying an image or a display panel provided with a screen thereon, and a pixel driving circuit for driving pixels of the display panel. The display area includes a pixel area provided with pixels. The pixel area includes a plurality of light emitting areas. A light emitting element is provided in each light emitting area. The pixel driving circuit may be built in the display panel.

[0040] Figure 1 FIG. is a diagram showing a display device according to an embodiment of the present specification. Figure 2 FIG. shows Figure 1 an enlarged view of region A in Figure 3 FIG. is a diagram showing a partial area of a pixel.

[0041] Referring to Figure 1 and Figure 2 According to an embodiment of the present specification, a display device 100 includes a display panel that visually reproduces an input image. The display panel may include a display area AA for displaying an image and a non-display area NA for not displaying an image. In the non-display area NA, various lines and driving circuits may be installed, and a pad portion PAD connected to an integrated circuit, a printed circuit, etc. may be provided. Here, the display panel may be a panel having a rectangular structure with a width in the X-axis direction, a length in the Y-axis direction, and a thickness in the Z-axis direction. In this case, the width and length of the display panel may be set to various design values according to the application field of the display device. The X-axis direction may represent the width direction, the row direction, or the horizontal direction, the Y-axis direction may represent the length direction, the column direction, or the vertical direction, and the Z-axis direction may represent the vertical direction or the thickness direction. In addition, the X-axis direction, the Y-axis direction, and the Z-axis direction may be perpendicular to each other, but may also represent different directions that are not perpendicular to each other. Therefore, each of the X-axis direction, the Y-axis direction, and the Z-axis direction may be described as one of the first direction, the second direction, and the third direction. In addition, a surface extending in the X-axis direction and the Y-axis direction may represent a horizontal plane.

[0042] The plurality of light emitting elements 10 provided in the display area AA and forming pixels PXL may be micro-sized inorganic light emitting elements. The inorganic light emitting elements may be grown on a silicon wafer and then attached to the display panel through a transfer process.

[0043] The transfer process of the light emitting elements 10 may be performed for each pre-divided area. In Figure 1 FIG., an example of dividing the display area AA into 12 transfer areas ST is described, but the size or number of the divided transfer areas is not limited thereto. The transfer process may be performed sequentially or simultaneously on the first transfer area ST to the twelfth transfer area ST. The blue light emitting elements 10, the green light emitting elements 10, and the red light emitting elements 10 may be transferred to each transfer area ST in sequence.

[0044] In the non-display area NA, a data driving circuit or a gate driving circuit can be provided, and lines for supplying control signals for controlling these driving circuits can be provided. Here, the control signals can include various timing signals (which include a clock signal, an input data enable signal, and a synchronization signal), and the control signals can be received through the pad portion PAD.

[0045] Pixels PXL can be driven by a pixel driving circuit. The pixel driving circuit can receive a driving voltage, an image signal (digital signal), a synchronization signal synchronized with the image signal, etc., and output an anode voltage and a cathode voltage of the light-emitting element 10 to drive a plurality of pixels. The driving voltage can be a high-potential voltage EVDD. The cathode voltage can be a low-potential voltage EVSS commonly applied to the pixels. The anode voltage can be a voltage corresponding to the pixel data value of the image signal. The pixel driving circuit can be provided in the non-display area NA or below the display area AA.

[0046] Each pixel PXL can include a plurality of sub-pixels having different colors. For example, each of the plurality of pixels can include a red sub-pixel provided with a light-emitting element 10 that emits light having a red wavelength, a green sub-pixel provided with a light-emitting element 10 that emits light having a green wavelength, and a blue sub-pixel provided with a light-emitting element 10 that emits light having a blue wavelength. The plurality of pixels can also include white pixels.

[0047] Referring to Figure 2 and Figure 3 , a plurality of pixels PXL can be continuously provided in a first direction (X-axis direction) and a second direction (Y-axis direction). A plurality of sub-pixels having the same color can be provided in the pixels of the display area AA. For example, each of the plurality of pixels can include: a first red sub-pixel provided with a 1-1 light-emitting element 11a that emits light having a red wavelength; a second red sub-pixel provided with a 1-2 light-emitting element 11b that emits light having a red wavelength; a first green sub-pixel provided with a 2-1 light-emitting element 12a that emits light having a green wavelength; a second green sub-pixel provided with a 2-2 light-emitting element 12b that emits light having a green wavelength; a first blue sub-pixel provided with a 3-1 light-emitting element 13a that emits light having a blue wavelength; and a second blue sub-pixel provided with a 3-2 light-emitting element 13b that emits light having a blue wavelength. The 1-1 light-emitting element 11a, the 2-1 light-emitting element 12a, and the 3-1 light-emitting element 13a can be interpreted as main light-emitting elements. The 1-2 light-emitting element 11b, the 2-2 light-emitting element 12b, and the 3-2 light-emitting element 13b can be interpreted as sub-light-emitting elements.

[0048] A sub-pixel may include one or more light-emitting elements. Thus, when a light-emitting element is defective, the brightness of the sub-pixel can be adjusted by increasing the brightness of other light-emitting elements. However, the present disclosure is not necessarily limited thereto, and a sub-pixel may include only one light-emitting element.

[0049] A plurality of first electrodes 161 may be respectively disposed under the light-emitting elements 10 and may be selectively connected to a plurality of signal lines TL1 to TL6 through connection portions 161a. A high-potential voltage may be applied to the pixel driving circuit through the signal lines TL1 to TL6. The signal lines TL1 to TL6 and the first electrodes 161 may be formed as an integrated electrode pattern during an electrode patterning process.

[0050] For example, the first signal line TL1 may be connected to the anode of the first red sub-pixel, and the second signal line TL2 may be connected to the anode of the second red sub-pixel. The third signal line TL3 may be connected to the anode of the first green sub-pixel, and the fourth signal line TL4 may be connected to the anode of the second green sub-pixel. The fifth signal line TL5 may be connected to the anode of the first blue sub-pixel, and the sixth signal line TL6 may be connected to the anode of the second blue sub-pixel. When a sub-pixel includes only one light-emitting element, the number of the signal lines TL may be halved.

[0051] The second electrode 170 may be a cathode disposed in each row and may apply a cathode voltage to the light-emitting elements 10 continuously arranged in the first direction (X-axis direction). A plurality of second electrodes 170 may be disposed to be spaced apart from each other in the second direction (Y-axis direction). The plurality of second electrodes 170 may be connected to the cathode voltage through contact electrodes 163. Each of the plurality of second electrodes 170 may be electrically connected to the contact electrode 163. However, the present disclosure is not necessarily limited thereto, and the second electrode 170 may not be divided into a plurality of second electrodes 170 but may be configured as one electrode layer and used as a common electrode.

[0052] Figure 4 is a cross-sectional view taken along Figure 3 the line I-I' in Figure 5 is a cross-sectional view taken along Figure 3 the line II-II' in Figure 6 is a cross-sectional view taken along Figure 3 the line III-III' in Figure 7 is a cross-sectional view showing an example in which two light-emitting elements are connected to the pixel driving circuit.

[0053] Refer to Figures 3 to 5, a display device according to an embodiment includes a plurality of first electrodes 161 and contact electrodes 163 disposed on a substrate 110, a plurality of light-emitting elements 10 disposed on the plurality of first electrodes 161, a first optical layer 141 disposed between the plurality of light-emitting elements 10, and a second electrode 170 disposed on the plurality of light-emitting elements 10.

[0054] The substrate 110 may be made of flexible plastic. For example, the substrate 110 may be manufactured as a single-layer substrate or a multi-layer substrate made of a material selected from polyimide, polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyethersulfone, polyarylate, polysulfone, and cycloolefin copolymer, but is not limited thereto. For example, the substrate 110 may be a ceramic substrate or a glass substrate.

[0055] The pixel driving circuit 20 may be disposed in the display area AA on the substrate 110. The pixel driving circuit 20 may include a plurality of thin film transistors using amorphous silicon semiconductors, polysilicon semiconductors, or oxide semiconductors.

[0056] The pixel driving circuit 20 may include at least one driving thin film transistor, at least one switching thin film transistor, and at least one storage capacitor. When the pixel driving circuit 20 includes a plurality of thin film transistors, the pixel driving circuit 20 may be formed on the substrate 110 through a thin film transistor (TFT) manufacturing process. In an embodiment, the pixel driving circuit 20 may be a general concept of a plurality of thin film transistors electrically connected to the light-emitting elements 10.

[0057] The pixel driving circuit 20 may be a driving driver manufactured on a single crystal semiconductor substrate 110 using a metal oxide silicon field effect transistor (MOSFET) manufacturing process. The driving driver may include a plurality of pixel driving circuits to drive a plurality of sub-pixels. When the pixel driving circuit 20 is implemented as a driving driver, after a bonding layer is disposed on the substrate 110, the driving driver may be mounted on the bonding layer through a transfer process.

[0058] A buffer layer 121 covering the pixel driving circuit 20 may be disposed on the substrate 110. The buffer layer 121 may be made of an organic insulating material (such as photosensitive acrylic resin or photosensitive polyimide), but is not limited thereto.

[0059] The buffer layer 121 may be manufactured by laminating inorganic insulating materials (such as silicon nitride (SiN x )), silicon oxide (SiO2), etc.) in a multi-layer form or laminating organic insulating materials and inorganic insulating materials in a multi-layer form.

[0060] The insulating layer 122 may be disposed on the buffer layer 121. The insulating layer 122 may be made of an organic insulating material (such as photosensitive acrylic resin or photosensitive polyimide), but is not limited thereto. Connection lines may be disposed on the buffer layer 121. The connection lines may include a plurality of connection lines, such as a first connection line RT1, a second connection line RT2, etc. The connection lines may be connected to corresponding signal lines TL. The signal lines may include a first signal line TL1 to a sixth signal line TL6, but are not limited thereto. The connection lines may include a plurality of line patterns disposed on different layers, with one or more insulating layers interposed therebetween. The line patterns disposed on different layers may be electrically connected through contact holes passing through the insulating layers.

[0061] A plurality of bank patterns 130 may be disposed on the insulating layer 122. At least one light-emitting element 10 may be disposed on each bank pattern 130. For example, a first light-emitting element 11 may be disposed on the first bank pattern 130a, a second light-emitting element 12 may be disposed on the second bank pattern 130b, and a third light-emitting element 13 may be disposed on the third bank pattern 130c.

[0062] The bank pattern 130 may be made of an organic insulating material (such as photosensitive acrylic resin or photosensitive polyimide), but is not limited thereto. During the transfer process of the light-emitting element 10, the bank pattern 130 may guide the position where the light-emitting element 10 is to be attached. The bank pattern 130 may also be omitted.

[0063] A solder pattern 162 may be disposed on the first electrode 161. The solder pattern 162 may be made of indium (In), tin (Sn), or an alloy thereof, but is not limited thereto.

[0064] Each of the plurality of light-emitting elements 10 may be mounted on the solder pattern 162. One pixel may include light-emitting elements 10 of three colors. The first light-emitting element 11 may be a red light-emitting element, the second light-emitting element 12 may be a green light-emitting element, and the third light-emitting element 13 may be a blue light-emitting element. Two light-emitting elements may be mounted in each sub-pixel.

[0065] The first optical layer 141 may cover the plurality of light-emitting elements 10 and the bank patterns 130. Accordingly, the first optical layer 141 may cover the spaces between the plurality of light-emitting elements 10 and the spaces between the plurality of bank patterns 130. The first optical layer 141 may be disposed to extend in a first direction (X) and spaced apart in a second direction (Y) to separate pixels in the second direction. Accordingly, the first optical layer 141 may be separated between pixel rows. Here, a row may represent the first direction. In addition, one pixel row formed of a plurality of pixels disposed in the first direction may be referred to as a pixel group. Accordingly, the display panel may include a plurality of pixel groups spaced apart from each other in the second direction. For example, since the first optical layer 141 disposed in the first direction is disposed around the pixels and the plurality of first optical layers 141 corresponding to the plurality of pixel groups are spaced apart from each other in the second direction, one first optical layer 141 disposed around the pixels forming one row may be separated from another first optical layer 141 disposed around the pixels forming another row.

[0066] The first optical layer 141 may include an organic insulating material in which fine metal particles such as titanium dioxide particles are dispersed. The light emitted from the plurality of light-emitting elements 10 may be scattered by the fine metal particles dispersed in the first optical layer 141 and emitted to the outside.

[0067] The second electrode 170 may be disposed on the plurality of light-emitting elements 10. The second electrode 170 may be commonly connected to the plurality of pixels PXL. The second electrode 170 may be a light-transmissive thin electrode. The second electrode 170 may be a transparent electrode material such as indium tin oxide (ITO), but is not necessarily limited thereto.

[0068] The second electrode 170 may extend in a first direction (X-axis direction) and may be spaced apart in a second direction (Y-axis direction). For example, one second electrode 170 may be formed to extend in the first direction, and the plurality of second electrodes 170 extending in the first direction may be spaced apart from each other in the second direction. In this case, the second electrode 170 may be respectively disposed corresponding to the pixels spaced apart from each other in the second direction. The second electrode 170 may include a first region 171 disposed on the upper surface of the light-emitting element 10 and the upper surface of the first optical layer 141, a second region 172 in contact with and electrically connected to the contact electrode 163, and a third region 173 disposed on the side surface of the first optical layer 141 and connecting the first region 171 and the second region 172.

[0069] Each of the plurality of second electrodes 170 may overlap the first optical layer 141 in a plane, and the third region 173 may cover the outer plane of the first optical layer 141.

[0070] The second optical layer 142 may be an organic insulating material surrounding the first optical layer 141. The second optical layer 142 may be disposed on the insulating layer 122 together with the first optical layer 141. The first optical layer 141 and the second optical layer 142 may comprise the same material (e.g., silicone). For example, the first optical layer 141 may be a silicone containing titanium dioxide (TiO x ), and the second optical layer 142 may be a silicone not containing titanium dioxide (TiO x ). However, the present disclosure is not necessarily limited thereto, and the first optical layer 141 and the second optical layer 142 may be formed of the same material or may be formed of different materials.

[0071] According to an embodiment, since the second region 172 of the second electrode 170 is connected to the contact electrode 163 in an overall flat state, excessive stress does not concentrate on the point connected to the contact electrode 163. Therefore, cracks in the second electrode 170 can be effectively prevented.

[0072] The second optical layer 142 may cover the second region 172 and the third region 173 of the second electrode 170. The upper surface of the second optical layer 142 and the upper surface of the first region 171 of the second electrode 170 may form the same plane. That is, the first region 171 and the second optical layer 142 may be used as a planarization layer. Therefore, since there are no steps on the surface where the black matrix 190 is formed, the pattern of the black matrix 190 can be easily formed on the first optical layer 141 and the second optical layer 142. However, the present disclosure is not necessarily limited thereto, and the upper surfaces of the second optical layer 142 and the second electrode 170 may have different heights.

[0073] The black matrix 190 may be an organic insulating material added with a black pigment. The second electrode 170 may be in contact with the contact electrode 163 under the black matrix 190. Transmission holes 191 may be formed between the patterns of the black matrix 190, and the light emitted by the light-emitting element 10 is emitted to the outside through the transmission holes 191. The transmission holes 191 may overlap with the light-emitting element 10 in the Z-axis direction, and a part of the black matrix 190 may overlap with the first optical layer 141 in the Z-axis direction. Here, the Z-axis direction may be referred to as the third direction. The black matrix 190 may improve the problem that the light from adjacent light-emitting elements 10 is mixed by the first optical layer 141 and then emitted.

[0074] The cover layer 180 may be an organic insulating material covering the black matrix 190 and the second electrode 170. Figure 2 and Figure 3 The configurations of the black matrix 190 and the cover layer 180 are omitted in

[0075] The contact electrode 163 is electrically connected to the first connection line RT1 disposed at the lower part, and the first connection line RT1 can be connected to the pixel driving circuit 20. Accordingly, the cathode voltage can be applied to the second electrode 170 through the contact electrode 163. The first electrode 161 can be electrically connected to the second connection line RT2. This will be described below.

[0076] Referring to Figure 5 , the contact electrode 163 and the signal lines TL1 to TL6 can be disposed on the same plane, and the pixel driving circuit 20 can be disposed below the contact electrode 163 and the signal lines TL1 to TL6. When the pixel driving circuit 20 is a driving driver, a plurality of driving drivers can be provided in the display panel.

[0077] The passivation layer 133 can expose the contact electrode 163 so that the contact electrode 163 is electrically connected to the second electrode 170. In addition, the passivation layer 133 can insulate the signal lines TL2 to TL5 from the second electrode 170. Here, the passivation layer 133 can be formed of an inorganic material.

[0078] Referring to Figure 6 , the connecting portion 161a of the first electrode 161 can extend along one side surface 131 of the bank pattern 130 and can be electrically connected to the second connection line RT2 disposed on the insulating layer 122.

[0079] The first electrode 161, the connecting portion 161a, the signal line TL, and / or the connection lines RT1 and RT2 can include a single-layer metal layer or a multi-layer metal layer selected from titanium (Ti), molybdenum (Mo), and aluminum (Al).

[0080] The first electrode 161 or the signal line TL can be formed as a metal laminate structure in which a plurality of metal layers are formed using metal materials having different materials, thicknesses, etc. In this case, the first electrode 161, the connecting portion 161a, and the signal line TL can be formed simultaneously by the same manufacturing process. Here, the thickness can represent the width between one side and the other side of the metal layer disposed in the Z direction.

[0081] The first electrode 161 can include a first metal layer ML1 disposed below the welding pattern 162, a second metal layer ML2 disposed below the first metal layer ML1, a third metal layer ML3 disposed below the second metal layer ML2, and a fourth metal layer ML4 disposed below the third metal layer ML3. When the first electrode 161 is formed of the first metal layer ML1, the second metal layer ML2, the third metal layer ML3, and the fourth metal layer ML4, the first electrode 161 can be deposited in the order of the fourth metal layer ML4 -> the third metal layer ML3 -> the second metal layer ML2 -> the first metal layer ML1, and then patterned by performing a photolithography process and an etching process.

[0082] The first metal layer ML1 can be arranged to contact the lower part of the welding pattern 162 and be electrically connected to the welding pattern 162.

[0083] In addition, the first metal layer ML1 can include a transparent conductive oxide layer having excellent adhesion and being corrosion - resistant and acid - resistant, such as indium tin oxide (ITO) or indium zinc oxide (IZO). Here, the first metal layer ML1 can be referred to as an adhesion layer.

[0084] The second metal layer ML2 can be formed of a material having a resistance value different from that of the first metal layer ML1 and the third metal layer ML3. In this case, the second metal layer ML2 can be formed of a material having a lower light reflectance than the third metal layer ML3 but having a higher resistance value. For example, the second metal layer ML2 can contain titanium (Ti) or molybdenum (Mo).

[0085] The third metal layer ML3 can be formed of a material having a higher light reflectance than the first metal layer ML1. In this case, the third metal layer ML3 can be formed of a material having a higher light reflectance than the second metal layer ML2. For example, the third metal layer ML3 can contain aluminum (Al) or silver (Ag).

[0086] The light reflectance of the third metal layer ML3 can be higher than the light reflectances of the first metal layer ML1 and the second metal layer ML2 respectively.

[0087] The fourth metal layer ML4 can be formed of the same material as the second metal layer ML2. For example, the fourth metal layer ML4 can contain titanium (Ti) or molybdenum (Mo).

[0088] After the first metal layer ML1 is formed, a reflection opening OP can be formed in the first electrode 161. The reflection opening OP can be an area that exposes a part of the third metal layer ML3 by removing the first metal layer ML1 and the second metal layer ML2. The reflection opening OP can have a form that surrounds the welding pattern 162 on a plane and has a circular shape or a quadrilateral shape, but is not limited thereto.

[0089] The light emitted from the light - emitting element 10 is reflected from the surface of the third metal layer ML3 exposed by the reflection opening OP, which can have the effect of increasing the light efficiency of the display device.

[0090] The passivation layer 133 can be arranged on the first electrode 161 and the signal line TL, and can include an opening 133a that exposes the welding pattern 162. Here, the opening 133a that exposes the welding pattern 162 can be referred to as the first opening. In this case, the reflection opening OP can be formed in a form that surrounds the first opening.

[0091] The light-emitting element 10 may include a first-conductive-type semiconductor layer 10-1, an active layer 10-2 disposed on the first-conductive-type semiconductor layer 10-1, and a second-conductive-type semiconductor layer 10-3 disposed on the active layer 10-2. A first driving electrode 15 may be disposed below the first-conductive-type semiconductor layer 10-1, and a second driving electrode 14 may be disposed on the second-conductive-type semiconductor layer 10-3.

[0092] The light-emitting element 10 may be formed on a silicon wafer using methods such as metalorganic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE), sputtering, etc.

[0093] The first-conductive-type semiconductor layer 10-1 may be implemented using compound semiconductors such as III-V groups, II-VI groups, etc., and may be doped with a first dopant. The first-conductive-type semiconductor layer 10-1 may be composed of any one selected from semiconductor materials having a composition formula of Al x1 In y1 Ga (1-x1-y1) N (0 <= x1 <= 1, 0 <= y1 <= 1, and 0 <= x1 + y1 <= 1), InAlGaN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP, but is not limited thereto. When the first dopant is an n-type dopant (such as Si, Ge, Sn, Se, Te, etc.), the first-conductive-type semiconductor layer 10-1 may be an n-type nitride semiconductor layer. However, when the first dopant is a p-type dopant, the first-conductive-type semiconductor layer 10-1 may be a p-type nitride semiconductor layer.

[0094] The active layer 10-2 is a layer where electrons (or holes) injected through the first-conductive-type semiconductor layer 10-1 meet holes (or electrons) injected through the second-conductive-type semiconductor layer 10-3. As electrons and holes recombine, the active layer 10-2 transitions to a lower energy level and may generate light having a corresponding wavelength.

[0095] The active layer 10-2 may have a structure such as a single-well structure, a multi-well structure, a single quantum well structure, a multi-quantum well (MQW) structure, a quantum dot structure, and a quantum wire structure, but the structure of the active layer 10-2 is not limited thereto. The active layer 10-2 may generate light in the visible light band. For example, the active layer 10-2 may output light of any one of the blue band, the green band, and the red band.

[0096] The second-conductivity-type semiconductor layer 10-3 may be disposed on the active layer 10-2. The second-conductivity-type semiconductor layer 10-3 may be implemented using a compound semiconductor such as a III-V group or II-VI group compound semiconductor, and may be doped with a second dopant. The second-conductivity-type semiconductor layer 10-3 may be formed of any one selected from semiconductor materials having a composition formula Inx2Al y2 Ga 1-x2-y2 N (0 <= x2 <= 1, 0 <= y2 <= 1, and 0 <= x2 + y2 <= 1), AlInN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP, but is not limited thereto. When the second dopant is a p-type dopant such as Mg, Zn, Ca, Sr, Ba, etc., the second-conductivity-type semiconductor layer 10-3 doped with the second dopant may be a p-type semiconductor layer. However, when the second dopant is an n-type dopant, the second-conductivity-type semiconductor layer 10-3 may be an n-type nitride semiconductor layer.

[0097] In this embodiment, although a vertical structure in which the driving electrodes 14 and 15 are disposed on the top and bottom of the light-emitting structure is described, in addition to the vertical structure, the light-emitting element may also have a lateral structure or a flip-chip structure.

[0098] Referring to Figure 7 , the main light-emitting element 12a and the sub-light-emitting element 12b of the sub-pixel may be disposed on the bank pattern 130. The second light-emitting element 12 will be described as an example. The 1-1 electrode 161-1 connected to the main light-emitting element 12a may extend along one side surface of the bank pattern 130, and may be electrically connected to the 2-1 connection line RT21 disposed below. The 1-2 electrode 161-2 connected to the sub-light-emitting element 12b may extend along the other side surface of the bank pattern 130, and may be electrically connected to the 2-2 connection line RT22 disposed below.

[0099] The pixel driving circuit 20 may apply an anode voltage to the main light-emitting element 12a through the 2-1 connection line RT21, and apply an anode voltage to the sub-light-emitting element 12b through the 2-2 connection line RT22. The pixel driving circuit 20 may apply a cathode voltage to the main light-emitting element 12a and the sub-light-emitting element 12b through the first connection line RT1 and the second electrode 170.

[0100] The pixel driving circuit 20 may adjust the brightness by driving only the main light-emitting element 12a, or may adjust the brightness by driving both the main light-emitting element 12a and the sub-light-emitting element 12b simultaneously. When the main light-emitting element 12a becomes dim, the brightness may be adjusted by driving only the sub-light-emitting element 12b.

[0101] Figure 8 is a diagram showing a display device according to another embodiment of the present specification. Figure 9 is alongFigure 8 A cross-sectional view taken along line IV-IV' in

[0102] Referring to Figure 8 and Figure 9 , the second electrode 170 can be electrically connected to the contact electrode 163 through a contact hole TH1 formed in the second optical layer 142. The second optical layer 142 may include the contact hole TH1 exposing the contact electrode 163. The second electrode 170 inserted into the contact hole TH1 of the second optical layer 142 may contact the upper surface of the contact electrode 163. The contact hole TH1 may be formed in an outer region of the pixel.

[0103] Figure 10 A is a diagram showing a display device according to another embodiment of the present specification. Figure 10 B is Figure 10 an enlarged view of region B in Figure 11A , Figure 11B and Figure 11C are cross-sectional views taken along line Y-Y' in Figure 10 B. Figure 12A , Figure 12B and Figure 12C are cross-sectional views taken along line Z-Z' in Figure 10 A.

[0104] Hereinafter, since the content regarding the configuration of the configuration included in the embodiments described, for example, in Figures 1 to 9 is redundant and will be omitted, other features will be mainly described.

[0105] Referring to Figure 10 A and Figure 10 B, the display panel may include a display area AA for displaying an image and a non-display area NA for not displaying an image. In the non-display area NA, various lines and driving circuits may be installed, and a pad portion PC for connecting to an integrated circuit, a printed circuit, etc. may be provided. A bending area BE may be provided between the non-display area NA and the pad portion PC, and a connection line area CL may be provided between the bending area BE and the pad portion PC.

[0106] In the non-display area NA, a data driving circuit or a gate driving circuit may be provided, and lines for supplying control signals for controlling these driving circuits may be provided. Here, the control signals may include various timing signals (which include a clock signal, an input data enable signal, and a synchronization signal), and the control signals may be received from the pad portion PC through the lines provided in the connection line area CL.

[0107] A protective pattern TRE2 can be formed in the non-display area NA to surround the display area AA. An outer dike pattern 130a provided around the protective pattern TRE2 and an outer optical layer 143 covering the outer dike pattern 130a can be provided in the non-display area NA.

[0108] The pad portion PC may include a first area (film on panel, FP) to which a chip on film (COF) is attached. As described below, a part of the insulating layer in the first area FP can be removed.

[0109] Circuit components can be directly provided on the pad portion PC or attached to the pad portion PC in the form of a chip on board (COP) or COF.

[0110] The circuit components may include a printed circuit board (PCB). The chip on film (COF) can process various signals input from the printed circuit board (PCB) and output the signals to the display panel. To this end, one end of the chip on film (COF) can be attached to the display panel, and the other end opposite to this end can be attached to the printed circuit board (PCB).

[0111] Various driving circuits (such as a timing controller, etc.) can be installed on the printed circuit board (PCB), and various signals generated by the driving circuits can be output to the chip on film (COF). For example, the printed circuit board (PCB) may include a flexible printed circuit board (FPCB).

[0112] The display panel and the chip on film (COF) overlapping at least a part of the display panel can be adhered to each other through an anisotropic conductive film (ACF) provided therebetween.

[0113] Refer to Figure 11A and Figure 12A Another embodiment of the present disclosure shown, a display device according to another embodiment includes a plurality of first electrodes 161 and contact electrodes 163 provided on a substrate 110, a plurality of light-emitting elements 10 provided on the plurality of first electrodes 161, a first optical layer 141 provided between the plurality of light-emitting elements 10, and a second electrode 170 provided on the plurality of light-emitting elements 10.

[0114] An adhesive layer AD can be provided on the substrate 110. There may be an area where the adhesive layer AD is removed in the non-display area NA or the bending area BE. This is because the more organic layers there are in the bending area BE, the higher the risk of damage or breakage of the organic layers in the bending area BE. For example, the adhesive layer AD can be selected from any one of an adhesive polymer, an epoxy resin, an ultraviolet (UV) resin, a polyimide-based, an acrylate-based, a polyurethane-based, and a polydimethylsiloxane (PDMS), but is not limited thereto.

[0115] The pixel driving circuit 20 implemented to drive the driver can be disposed on the adhesive layer AD in the display area AA.

[0116] A protective layer 120 can be formed on the adhesive layer AD to protect the pixel driving circuit 20. The protective layer 120 can cover at least a part or all of the side surface of the pixel driving circuit 20 and cover a part of the upper surface of the pixel driving circuit 20. The protective layer 120 can cover the entire substrate 110 and cover a part or all of the pad portion PC. For example, the protective layer 120 can be made of an organic insulating material (photosensitive acrylic or photosensitive polyimide), but is not limited thereto.

[0117] A buffer layer 121 covering the pixel driving circuit 20 can be disposed on the protective layer 120.

[0118] A first inorganic film INO1 can be disposed on the protective layer 120. The first inorganic film INO1 can be formed as a single layer or multiple layers of an inorganic material (such as SiN x and / or SiO x ). When the protective layer 120 is made of an organic material, defects such as corrosion of metal wires may occur because moisture, hydrogen, etc. cannot be prevented from permeating, which will affect the normal operation of the pixel driving circuit 20. Since the first inorganic film INO1 is made of an inorganic material, it is resistant to external moisture penetration and can prevent defects caused by moisture, etc.

[0119] A third connection line RT3 can be disposed on the protective layer 120.

[0120] An insulating layer 122 can be disposed on the buffer layer 121. An intermediate connection line RTN connected to the 1a connection line RT1a, the 2a connection line RT2a, and the third connection line RT3 can be disposed on the buffer layer 121.

[0121] A first insulating layer 122a covering the 1a connection line RT1a, the 2a connection line RT2a, and the intermediate connection line RTN can be disposed on the buffer layer 121.

[0122] A 1b connection line RT1b and a 2b connection line RT2b can be disposed on the first insulating layer 122a.

[0123] A second insulating layer 122b covering the 1b connection line RT1b and the 2b connection line RT2b can be disposed on the first insulating layer 122a.

[0124] A 1c connection line RT1c and a 2c connection line RT2c can be disposed on the second insulating layer 122b.

[0125] A third insulating layer 122c covering the 1c connection line RT1c and the 2c connection line RT2c can be disposed on the second insulating layer 122b.

[0126] The 1d connection line RT1d and the 2d connection line RT2d can be provided on the third insulating layer 122c.

[0127] The fourth insulating layer 122d covering the 1d connection line RT1d and the 2d connection line RT2d can be provided on the third insulating layer 122c. The more insulating layers there are in the bending region BE, the greater the possibility of damage to the insulating layers during bending. Although not shown in the drawings, the fourth insulating layer 122d may not be provided in the bending region BE, the non-display region NA adjacent to the bending region BE, and the connection line region CL. N insulating layers (0 < N < 5, N being an integer) can be provided in the bending region BE.

[0128] Multiple signal lines TL, contact electrodes, and the seventh signal line can be provided on the fourth insulating layer 122d, that is, multiple signal lines TL, contact electrodes, and the seventh signal line can be provided on the same layer. Being provided on the same layer can mean being all formed on one layer and then spaced apart by a patterning process or the like. However, the present disclosure is not necessarily limited thereto, and the heights can be different, but if multiple lines or multiple electrodes are formed on the same layer, then the multiple lines or multiple electrodes can be defined as being provided on the same layer.

[0129] The 1a connection line RT1a, the 1b connection line RT1b, the 1c connection line RT1c, the 1d connection line RT1d, and multiple signal lines TL can be electrically connected through contact holes passing through the insulating layers and inorganic films in which the 1a connection line RT1a, the 1b connection line RT1b, the 1c connection line RT1c, the 1d connection line RT1d, and multiple signal lines TL are respectively provided.

[0130] The 2a connection line RT2a, the 2b connection line RT2b, the 2c connection line RT2c, the 2d connection line RT2d, and the contact electrode 163 can be electrically connected through contact holes passing through the insulating layers and inorganic films in which the 2a connection line RT2a, the 2b connection line RT2b, the 2c connection line RT2c, the 2d connection line RT2d, and the contact electrode 163 are respectively provided.

[0131] The anode voltage supplied from the pixel driving circuit 20 can be supplied to the light-emitting element 10 through the 1a connection line RT1a, the 1b connection line RT1b, the 1c connection line RT1c, the 1d connection line RT1d, multiple signal lines TL, and the first electrode 161.

[0132] The cathode voltage supplied from the pixel driving circuit 20 can be supplied to the light-emitting element 10 through the 2a connection line RT2a, the 2b connection line RT2b, the 2c connection line RT2c, the 2d connection line RT2d, multiple signal lines TL, and the first electrode 161.

[0133] The connection lines listed above are only examples. Each connection line may include a plurality of line patterns disposed on different layers, and one or more insulating layers are interposed between the plurality of line patterns. The line patterns disposed on different layers may be electrically connected through contact holes penetrating the insulating layer.

[0134] The third connection line RT3 is disposed on the protective layer 120. The third connection line RT3 may extend from the display area AA to the pad portion PC.

[0135] The fourth connection line may be disposed on the first insulating layer 122a and extend to the pad portion PC and the connection line area CL.

[0136] The fifth connection line may be disposed on the second insulating layer 122b and extend to the pad portion PC and the connection line area CL.

[0137] The sixth connection line may be disposed on the third insulating layer 122c and extend to the pad portion PC and the connection line area CL.

[0138] The seventh connection line may be disposed on the fourth insulating layer 122d and extend to the pad portion PC and the connection line area CL.

[0139] Signals output from a circuit component such as a printed circuit board (PCB) may be transmitted to the pixel driving circuit 20 disposed in the display area AA through a chip on film (COF), the seventh connection line, the sixth connection line, the fifth connection line, the fourth connection line, and the third connection line RT3.

[0140] A plurality of bank patterns 130 may be disposed on the insulating layer 122. At least one light emitting element 10 may be disposed on each bank pattern 130. For example, referring to Figure 3 , Figure 11A and Figure 12A , the first light emitting element 11 may be disposed on the first bank pattern 130a, the second light emitting element 12 may be disposed on the second bank pattern 130b, and the third light emitting element 13 may be disposed on the third bank pattern 130c.

[0141] The first electrode 161 may be disposed on the bank pattern 130. In an embodiment, the first electrode 161 may include a plurality of metal layers ML2, ML3, and ML4 in addition to the first metal layer ML1 during formation, and in a separate process, the first metal layer ML1 may be disposed only in the area overlapping with the first electrode 161 and the light emitting element 10. An opening OP may be provided in the first electrode 161. In an embodiment, the opening OP may be formed by removing the second metal layer ML2. The first metal layer ML1 may not be disposed on the pad portion PC. In addition, the first metal layer ML1 may not be disposed in an area other than the area overlapping with the light emitting element 10.

[0142] A welding pattern 162 may be provided on the first electrode 161. The welding pattern 162 may be made of indium (In), tin (Sn), or an alloy thereof, but is not limited thereto. The welding pattern 162 may include a first portion 162a and a second portion 162b. The first portion 162a may contain indium (In), and the second portion 162b may contain gold (Au). When the light-emitting element 10 is transferred, the first portion 162a and the second portion 162b may be joined under pressure and then eutectically joined by applying heat. When the second portion 162b is under pressure, a part of the second portion 162b may cover at least a part or all of the side surface of the first portion 162a. In this case, since the contact area between the first portion 162a and the second portion 162b increases, the adhesion can be increased and the electrical signal transmission can be improved.

[0143] A plurality of light-emitting elements 10 may be respectively mounted on the welding pattern 162.

[0144] The first optical layer 141a may cover the plurality of light-emitting elements 10 and the bank pattern 130. Accordingly, the first optical layer 141a may cover the space between the plurality of light-emitting elements 10 and the space between the plurality of bank patterns 130. The arrangement of the first optical layer 141a on the plane is the same as the arrangement of the first optical layer 141 on the plane.

[0145] The second electrode 170 may be provided on the plurality of light-emitting elements 10. The second electrode 170 may be commonly connected to the plurality of pixels PXL.

[0146] A second protection pattern TRE2 may be formed in the non-display area NA to surround the display area AA. The second protection pattern TRE2 may be formed by providing the first optical layer 141b and then removing the first insulating layer 122a, the second insulating layer 122b, the third insulating layer 122c, the fourth insulating layer 122d, and the second optical layer 142. An outer bank pattern 130a configured to surround the second protection pattern TRE2 and an outer optical layer 143 configured to cover the outer bank pattern 130a may be provided in the non-display area NA. The outer bank pattern 130a and the outer optical layer 143 may be formed on three sides of the four sides surrounding the display panel except for the side adjacent to the bending area BE. The outer bank pattern 130a may be formed of the same material as the bank pattern 130 in the same process. The outer optical layer 143 may be formed of the same material as the first optical layer 141a in the same process.

[0147] After forming the first protective pattern TRE1 and the second protective pattern TRE2, a second inorganic film INO2 may be provided to cover the display area AA and the non-display area NA. The second inorganic film INO2 may completely cover the interiors of the first protective pattern TRE1 and the second protective pattern TRE2, and a part of the second inorganic film INO2 may be in contact with the first inorganic film INO1 in the second protective pattern TRE2. Further, in the process sequence, the second protective pattern TRE2 may be provided between the second electrode 170 and the first-second optical layer 141b in the area adjacent to the light-emitting element 10. The second protective pattern TRE2 may completely cover the outer optical layer 143, but may also cover only a part of the outer optical layer 143 in the non-display area NA. The second inorganic film INO2 may be formed of the same material as the first inorganic film INO1, but is not limited thereto.

[0148] As described above, when the first protective pattern TRE1, the second protective pattern TRE2, the first inorganic film INO1, and the second inorganic film INO2 are provided, defects such as corrosion or damage of metal wires in the display panel can be prevented because the entry of foreign substances (e.g., moisture, hydrogen, etc.) penetrating from the outside is prevented or delayed. Further, since the outer optical layer 143 and the outer bank pattern 130a are provided, the thicknesses of the second optical layer 142 and the second inorganic film INO2 provided in the non-display area NA may have values that are the same as or similar to the thicknesses of the second optical layer 142 and the second inorganic film INO2 provided in the display area AA, and defects in which an organic layer (e.g., the second optical layer 142, etc.) flows out from the non-display area NA of the display panel due to process problems can be prevented.

[0149] The first-second optical layer 141b may be provided to overlap the first-first optical layer 141a on the second electrode 170. The first-second optical layer 141b may be provided on the second electrode 170 to increase the amount of light emitted forward.

[0150] After forming the first-first optical layer 141a, the first-first optical layer 141a in the area adjacent to the upper surface of the light-emitting element 10 is removed so that the second electrode 170 and the light-emitting element 10 are in contact with each other. Thereafter, the second electrode 170 is provided on the first-first optical layer 141a. Further, the first-first optical layer 141a or the first-second optical layer 141b is removed, and the first protective pattern TRE1 is formed to supply a cathode voltage to the second electrode 170. The second electrode 170 may be electrically connected to the signal line TL formed on the fourth insulating layer 122d through the first protective pattern TRE1 and receive the cathode voltage.

[0151] The second optical layer 142 may be an organic insulating material surrounding the first optical layer 141. The second optical layer 142 may be disposed on the insulating layer 122 together with the first optical layer 141. The 1-1 optical layer 141a and the 1-2 optical layer 141b may be disposed in the display area AA, but the second optical layer 142 may be disposed in the display area AA and the non-display area NA. The black matrix 190 may be disposed on the 1-2 optical layer 141b. The black matrix 190 may be disposed on the 1-2 optical layer 141b, the second inorganic film INO2, and the second optical layer 142. Transmission holes 191 may be formed between the patterns of the black matrix 190, and the light emitted from the light-emitting element 10 is emitted to the outside through the transmission holes 191.

[0152] The cover layer 180 may be an organic insulating material covering the black matrix 190 and the second inorganic film 141b.

[0153] Although not shown in the figure, in order to protect the plurality of connection lines RT1a, RT1b, RT1c, RT1d, RT2a, RT2b, RT2c, and RT2d disposed in the display area AA from foreign substances such as moisture, after forming the connection lines, an inorganic film may also be provided to cover each connection line. For example, after forming the 1a connection line RT1a and the 2a connection line RT2a, an inorganic film covering the 1a connection line RT1a, the 2a connection line RT2a, and the buffer layer 121 may also be provided.

[0154] According to Figure 11A an embodiment of this specification, the third connection line RT3 may transmit the electrical signal received from the pad portion to the pixel driving circuit 20 through the intermediate connection line RTN, the 1a connection line RT1a, and the 2a connection line RT2a.

[0155] The intermediate connection line RTN may be formed of the same material as the 1a connection line RT1a and the 2a connection line RT2a by the same process.

[0156] The second protection pattern TRE2 is formed such that the upper portion of the third connection line RT3 is exposed and then may be covered by the second inorganic film INO2.

[0157] The third connection line RT3 may be in direct contact with a part of the first inorganic film INO1 and at least a part of the second inorganic film INO2.

[0158] According to Figure 11A and Figure 12A an embodiment of this specification, the second protection pattern TRE2 may be formed to have the same taper at the boundary between the buffer layer 121, the plurality of insulating layers 122a, 122b, 122c, and 122d, and the second optical layer 142 without a flat portion.

[0159] According to Figure 11B and Figure 12B In another embodiment of the present specification shown in, when forming the second protection pattern TRE2, multiple insulating layers 122a, 122b, 122c, and 122d and the second optical layer 142 can be removed in separate processes according to the process environment and equipment. That is, the second protection pattern TRE2 can be formed by first removing the multiple insulating layers 122a, 122b, 122c, and 122d in the region where the second protection pattern TRE2 will be formed after the fourth insulating layer 122d is provided, and then providing and removing the second optical layer 142. Therefore, a region with a flat surface can be formed at the boundary between the uppermost surface of the multiple insulating layers 122a, 122b, 122c, and 122d and the second optical layer 142, and the inclination angle (taper) of the second inorganic film INO2 provided on the inclined surface of the multiple insulating layers 122a, 122b, 122c, and 122d can be different from the inclination angle of the second inorganic film INO2 provided on the inclined surface of the second optical layer 142.

[0160] According to Figure 11C and 12C In another embodiment of the present specification, when forming the second protection pattern TRE2, according to the process environment and equipment, each insulating layer included in the multiple insulating layers 122a, 122b, 122c, and 122d and the second optical layer 142 can be removed in separate processes for each layer. Therefore, regions with flat surfaces can be formed at the boundaries between the multiple insulating layers 122a, 122b, 122c, and 122d and at the boundary between the fourth insulating layer 122d and the second optical layer 142, and the inclination angles (tapers) of the second inorganic film INO2 provided on the inclined surfaces of the multiple insulating layers 122a, 122b, 122c, and 122d and the inclined surface of the second optical layer 142 can be different from each other.

[0161] In the above embodiment, although a vertical structure in which the driving electrodes 14 and 15 are provided on the top and bottom of the light-emitting structure is described, in addition to the vertical structure, the light-emitting element can also have a lateral structure or a flip-chip structure.

[0162] The display device according to an embodiment of the present specification can be applied to mobile devices, video phones, smart watches, watch phones, wearable devices, foldable devices, rollable devices, bendable devices, flexible devices, curved surface devices, sliding devices, variable devices, electronic notebooks, e-books, portable multimedia players (PMPs), personal digital assistants (PDAs), MP3 players, mobile medical devices, desktop personal computers (PCs), notebook PCs, netbook computers, workstations, navigation devices, in-vehicle display devices, cinema display devices, televisions, wallpaper devices, signage devices, game devices, notebooks, displays, cameras, camcorders, household appliances, etc. In addition, the display device according to one or more embodiments of the present specification can be applied to inorganic light-emitting lighting devices.

[0163] The display device according to one or more embodiments of the present specification can be described as follows.

[0164] A display device according to one or more embodiments of the present specification includes: a substrate including a display area, a non-display area, and a bending area; an adhesive layer disposed on the substrate; a pixel driving circuit disposed on the adhesive layer in the display area; a buffer layer disposed on the adhesive layer and configured to cover the pixel driving circuit; a second protection pattern disposed in the non-display area and surrounding the display area; a first inorganic film disposed on the pixel driving circuit; and a second inorganic film disposed on the second protection pattern in the display area and the non-display area, wherein the first inorganic film and the second inorganic film overlap in an area overlapping with the second protection pattern.

[0165] The first inorganic film may only extend to an area overlapping with the second protection pattern.

[0166] In addition, the display device according to one or more embodiments of the present specification may further include: a protection layer disposed above the adhesive layer and below the first inorganic film, and covering at least a part or all of the side surface of the pixel driving circuit; a plurality of insulating layers disposed on the buffer layer; a bank pattern disposed on the plurality of insulating layers; a plurality of light-emitting elements disposed on the bank pattern; a first optical layer disposed on the insulating layer and configured to cover the plurality of light-emitting elements and the bank pattern; and a second optical layer disposed on the same layer as the first optical layer and surrounding the side surface of the first optical layer.

[0167] Furthermore, the display device according to one or more embodiments of the present specification may further include: an outer bank pattern formed on the same layer as the bank pattern and disposed to surround the second protection pattern; and an outer optical layer disposed to cover the outer bank pattern, and the second inorganic film may be disposed on the outer optical layer, and the outer bank pattern may be disposed to be farther from the display area than the second protection pattern.

[0168] In addition, a display device according to one or more embodiments of the present specification may further include: a plurality of connection lines respectively disposed on a plurality of insulating layers; and a third connection line disposed on the protective layer and extending from the bending region to the display region, and the surface of the third connection line may overlap with the first inorganic film and the second inorganic film in a region overlapping with the second protection pattern.

[0169] The second protection pattern may be formed by removing the plurality of insulating layers and the second optical layer.

[0170] The second inorganic film disposed on the inclined surface of the second protection pattern may have the same angle.

[0171] The second inorganic film disposed on the inclined surface of the second protection pattern may have a flat surface on the uppermost surface of the plurality of insulating layers.

[0172] The second inorganic film disposed on the inclined surface of the second protection pattern may have a flat surface on the upper surface of each of the plurality of insulating layers.

[0173] In addition, a display device according to one or more embodiments of the present specification may further include: a first electrode disposed on the bank pattern; a first metal layer disposed on the first electrode; a welding pattern disposed on the first metal layer; and a second electrode disposed on the light-emitting element, and the light-emitting element may be disposed on the welding pattern.

[0174] In addition, a display device according to one or more embodiments of the present specification may further include: a 1-2 optical layer disposed on the second electrode and overlapping with the 1-1 optical layer; and a first protection pattern formed on the plurality of insulating layers by removing at least one of the 1-1 optical layer and the 1-2 optical layer.

[0175] A region where the adhesive layer is removed may exist in at least one of the non-display region and the bending region.

[0176] The outer bank pattern may be formed of the same material as the bank pattern, and the outer optical layer may be formed of the same material as the 1-1 optical layer.

[0177] According to the present specification, since the first protection pattern, the second protection pattern, the first inorganic film, and the second inorganic film are provided to prevent or delay the entry of foreign substances such as moisture and hydrogen permeating from the outside, defects such as metal wire corrosion and damage in the display panel can be prevented. In addition, since the outer optical layer and the outer bank pattern are provided, the thickness of the second optical layer and the second inorganic film disposed in the non-display region may have a value the same as or close to the thickness of the second optical layer and the second inorganic film disposed in the display region, and defects such as the outflow of the organic layer such as the second optical layer from the non-display region of the display panel due to process problems can be prevented.

[0178] The various beneficial advantages and effects of this specification are not limited to the above, and those of ordinary skill in the art will clearly understand other effects not mentioned from the above description.

[0179] Since the problems to be solved, the means for solving the problems, and the above effects described in the content of this specification do not define the essential features of the claims, the scope of the claims is not limited by the items described in the content of the specification.

[0180] Although the embodiments of the present disclosure have been described in more detail with reference to the accompanying drawings, the present disclosure is not necessarily limited to these embodiments, and various modifications can be made without departing from the technical concept of the present disclosure. Therefore, the embodiments disclosed in the present disclosure are not intended to limit the technical concept of the present disclosure, but to describe the technical concept of the present disclosure, and the scope of the technical concept of the present disclosure is not limited by these embodiments. Therefore, the above embodiments should be understood as illustrative rather than restrictive in all aspects.

Claims

1. A display device, comprising: A substrate, comprising a display area, a non-display area and a bending area; an adhesive layer, disposed on the substrate; A pixel driving circuit is disposed on the adhesive layer in the display area; a buffer layer disposed on the adhesive layer and configured to cover the pixel driving circuit; a second protection pattern, disposed in the non-display area and surrounding the display area; A first inorganic film is disposed on the pixel driving circuit; as well as a second inorganic film disposed on the second protective pattern in the display area and the non-display area, The first inorganic film and the second inorganic film overlap in a region overlapping with the second protection pattern.

2. The display device according to claim 1, wherein: The first inorganic film extends only to a region overlapping the second protective pattern.

3. The display device according to claim 1, further comprising: a protective layer, disposed above the adhesive layer and below the first inorganic film, and covering at least a portion or all of a side surface of the pixel driving circuit; A plurality of insulating layers are disposed on the buffer layer; a bank pattern disposed on the plurality of insulating layers; a plurality of light emitting elements disposed on the bank pattern; a 1-1 optical layer disposed on the insulating layer and configured to cover the plurality of light emitting elements and the bank pattern; as well as The second optical layer is disposed on the same layer as the 1-1 optical layer and surrounds a side surface of the 1-1 optical layer.

4. The display device according to claim 3, further comprising: an outer bank pattern formed on the same layer as the bank pattern and arranged to surround the second protection pattern; as well as an outer optical layer, arranged to cover the outer bank pattern, wherein the second inorganic film is disposed on the outer optical layer, and The outer bank pattern is disposed farther from the display area than the second protection pattern.

5. The display device according to claim 4, further comprising: A plurality of connecting wires are respectively arranged on the plurality of insulating layers; as well as a third connecting line, disposed on the protective layer and extending from the bending area to the display area, The surface of the third connection line overlaps with the first inorganic film and the second inorganic film in a region overlapping with the second protection pattern.

6. The display device according to claim 5, wherein: The second protection pattern is formed by removing the plurality of insulating layers and the second optical layer.

7. The display device according to claim 6, wherein: The second inorganic films disposed on the inclined surfaces of the second protective patterns have the same angle.

8. The display device according to claim 6, wherein: The second inorganic film disposed on the inclined surface of the second protection pattern has a flat surface on an uppermost surface of the plurality of insulating layers.

9. The display device according to claim 6, wherein: The second inorganic film disposed on the inclined surface of the second protection pattern has a flat surface on an upper surface of each of the plurality of insulating layers.

10. The display device according to claim 7, further comprising: a first electrode disposed on the bank pattern; A first metal layer, disposed on the first electrode; A welding pattern, disposed on the first metal layer; as well as A second electrode is disposed on the light emitting element, Wherein, the light emitting element is arranged on the welding pattern.

11. The display device according to claim 10, further comprising: a 1-2 optical layer, disposed on the second electrode and overlapping the 1-1 optical layer; as well as A first protection pattern is formed on the plurality of insulating layers by removing at least one of the 1-1 optical layer and the 1-2 optical layer.

12. The display device according to claim 1, wherein: An area where the adhesive layer is removed exists in at least one of the non-display area and the bending area.

13. The display device according to claim 4, wherein: The outer bank pattern is formed of the same material as the bank pattern, and the outer optical layer is formed of the same material as the 1-1 optical layer.

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