Display device

Abstract

A display device, a method for manufacturing the same, and a head-mounted device are provided. The display device includes: a substrate having a plurality of sub-pixel regions; a plurality of transistors on the substrate; a planarization layer on the plurality of transistors; a plurality of partition patterns on the planarization layer and spaced apart from each other; a plurality of low-reflection metal patterns on the partition patterns, respectively; a plurality of anode electrodes on the low reflection metal pattern and the planarization layer, respectively, the plurality of anode electrodes being arranged in a manner corresponding to the plurality of sub-pixel regions, respectively; an organic light emitting layer on the anode electrode; a cathode electrode on the organic light emitting layer; and a plurality of color filters on the cathode electrode, and the plurality of color filters respectively correspond to portions of the plurality of sub-pixel regions, in which a vertical level of an upper surface of at least one color filter of the plurality of color filters is higher than a vertical level of an upper surface of another color filter adjacent to the at least one color filter.

Description

Technical Field

[0001] The present disclosure relates to a display device for displaying images. Background Art

[0002] Display devices are applied to various electronic devices, such as televisions, mobile phones, laptop computers, and tablet computers. For this reason, research and development of thinner, lighter, and lower-power display devices are continuously ongoing.

[0003] In a display device that uses an image to display various information, an organic light-emitting display device (OLED) includes a plurality of pixel regions disposed in a display area for displaying an image and a plurality of organic light-emitting elements corresponding to the plurality of pixel regions. Since the organic light-emitting elements are self-luminous elements that emit light by themselves, the organic light-emitting display device has a faster response speed, higher luminous efficiency and brightness, a large viewing angle, and superior contrast and color gamut compared to a liquid crystal display device.

[0004] Recently, as the demand for head-mounted displays (HMDs) including organic light-emitting display devices has increased, research on HMDs is increasing. A head-mounted display is an image display device in the form of glasses or a helmet that forms a focus at a position close to the user's eyes. The head-mounted display can implement virtual reality (VR) or augmented reality (AR). In a virtual reality (VR) device, due to its excellent user immersion, a viewer can view a 60-inch screen using a 1-inch-sized display. For this reason, the head-mounted display employs a high-resolution organic light-emitting display device. However, research on solutions to problems caused by a small sub-pixel pitch for implementing a high-resolution display is just starting. Summary of the Invention

[0005] An object of an embodiment according to the present disclosure is to provide a display device that can prevent different-color light beams emitted from adjacent sub-pixels from mixing with each other.

[0006] An object of an embodiment according to the present disclosure is to provide a display device in which a plurality of anode electrodes are positioned at different vertical levels so as to prevent different-color light beams emitted from adjacent sub-pixels from being guided to adjacent sub-pixels within a viewing angle range and thus prevent them from mixing with each other.

[0007] In addition, an object of an embodiment according to the present disclosure is to provide a display device that can include sub-pixels that emit white light to improve the light efficiency of the light-emitting elements.

[0008] The objects according to the present disclosure are not limited to the above-mentioned objects. Other objects and advantages not mentioned according to the present disclosure can be understood based on the following description, and can be more clearly understood based on the embodiments according to the present disclosure. In addition, it will be easily understood that the objects and advantages according to the present disclosure can be achieved by using the means shown in the claims or combinations thereof.

[0009] A display device according to an embodiment of the present disclosure includes: a substrate having a plurality of sub-pixel regions; a plurality of transistors disposed on the substrate; a planarization layer disposed on the plurality of transistors; a plurality of partition patterns disposed on the planarization layer and arranged to be spaced apart from each other; a plurality of low-reflection metal patterns respectively disposed on the partition patterns; a plurality of anode electrodes respectively disposed on the low-reflection metal patterns and the planarization layer; an organic light-emitting layer disposed on the anode electrodes; a cathode electrode disposed on the organic light-emitting layer; and a plurality of color filters disposed on the cathode electrode and arranged to correspond to some of the plurality of sub-pixel regions respectively, wherein the vertical level of the upper surface of at least one of the plurality of color filters is higher than the vertical level of the upper surface of another color filter adjacent to the at least one color filter among the plurality of color filters.

[0010] According to an embodiment of the present disclosure, the organic light-emitting layer emits white light. The sub-pixels include sub-pixels that emit white light and sub-pixels that emit red, green, and blue light respectively. Therefore, the light extraction efficiency can be improved.

[0011] In addition, according to an embodiment of the present disclosure, the plurality of anode electrodes are positioned at different vertical levels so that different color light beams respectively emitted from adjacent sub-pixels are prevented from being guided to adjacent sub-pixels within the viewing angle range and thus prevented from being mixed with each other, and color viewing in a distorted manner can be prevented.

[0012] In addition, according to an embodiment of the present disclosure, the plurality of color filters corresponding to the plurality of sub-pixels can be formed to have a uniform thickness, thereby preventing color difference within the viewing angle range.

[0013] In addition, as the light extraction efficiency of the display device is improved, the display device can operate at low power. Therefore, the power consumption of the display device can be reduced.

[0014] The effects of the present disclosure are not limited to the above-mentioned effects, and other effects not mentioned will be clearly understood by those skilled in the art according to the following description.

[0015] In addition to the above effects, while describing the specific details for implementing the present disclosure, the specific effects of the present disclosure are also described together. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 is a schematic plan view of a display device according to an embodiment of the present disclosure.

[0017] Figure 2 is along Figure 1 a cross-sectional view taken along line 2-2 in

[0018] Figure 3 is a schematic plan view of a display device according to another embodiment of the present disclosure;

[0019] Figure 4 is along Figure 3 a cross-sectional view taken along line 4-4 in

[0020] Figures 5 to 15 is a diagram showing a method for manufacturing a display device according to another embodiment of the present disclosure.

[0021] Figures 16 to 18 is a head-mounted device including a display device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0022] The advantages and features of the present disclosure and the methods for achieving the advantages and features will become apparent with reference to the embodiments described in detail later together with the accompanying Figure 1 drawings. However, the present disclosure is not limited to the embodiments disclosed below, but can be implemented in various different forms. Therefore, these embodiments are described merely to make the present disclosure complete and to fully inform those of ordinary skill in the technical field to which the present disclosure pertains of the scope of the present disclosure.

[0023] For simplicity and clarity of illustration, the elements in the drawings are not necessarily drawn to scale. The same reference numerals in different drawings denote the same or similar elements and thus perform similar functions. In addition, for simplicity of description, the description and details of well-known steps and elements are omitted. Further, in the following detailed description of the present disclosure, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. However, it will be understood that the present disclosure may be practiced without these specific details. In other instances, well-known methods, procedures, components, and circuits have not been described in detail so as not to unnecessarily obscure aspects of the present disclosure. Examples of various embodiments are further shown and described below. It will be understood that the description herein is not intended to limit the claims to the particular embodiments described. On the contrary, the description herein is intended to cover alternatives, modifications, and equivalents as may be included in the spirit and scope of the present disclosure as defined by the appended claims.

[0024] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for illustrating the embodiments of the present disclosure are illustrative, and the embodiments of the present disclosure are not limited thereto.

[0025] The terms used herein are for the purpose of describing particular embodiments only and are not intended to limit the present disclosure. As used herein, the singular forms “a” and “an” are also intended to include the plural forms unless the context clearly indicates otherwise. It will also be understood that the terms “comprises,” “comprising,” “includes,” and “including” when used in this specification specify the presence of the stated features, integers, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, operations, elements, components, and / or portions thereof. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. Expressions such as “at least one” when preceding a list of elements may modify the entire list of elements and not individual elements in the list. When interpreting numerical values, there may be errors or tolerances therein even if not explicitly described.

[0026] In addition, it will also be understood that when a first element or layer is referred to as being "on" a second element or layer, the first element can be disposed directly on the second element or can be disposed indirectly on the second element, with a third element or layer disposed between the first element or layer and the second element or layer. It will be understood that when an element or layer is referred to as being "connected to" or "coupled with" another element or layer, it can be directly on the other element or layer, directly connected to the other element or layer or directly coupled with the other element or layer, or there can be one or more intermediate elements or layers. In addition, it will also be understood that when an element or layer is referred to as being "between" two elements or layers, it can be the only element or layer between the two elements or layers, or there can also be one or more intermediate elements or layers.

[0027] In addition, as used herein, when a layer, film, region, plate, etc. is disposed "on" or "on top of" another layer, film, region, plate, etc., the former can be in direct contact with the latter, or another layer, film, region, plate, etc. can be disposed between the former and the latter. As used herein, when a layer, film, region, plate, etc. is disposed directly "on" or "on top of" another layer, film, region, plate, etc., the former is in direct contact with the latter and no other layer, film, region, plate, etc. is disposed between the former and the latter. In addition, as used herein, when a layer, film, region, plate, etc. is disposed "under" or "beneath" another layer, film, region, plate, etc., the former can be in direct contact with the latter, or another layer, film, region, plate, etc. can be disposed between the former and the latter.

[0028] In the description of temporal relationships, for example, the temporal precedence relationship between two events such as "after", "subsequently", "before", etc., unless "directly after", "directly subsequently" or "directly before" is indicated, another event may occur between these two events.

[0029] When a particular implementation can be implemented differently, the functions or operations specified in the specific blocks can occur in an order different from the order specified in the flowchart. For example, two consecutive blocks can actually be executed substantially simultaneously, or the two blocks can be executed in the reverse order depending on the functions or operations involved.

[0030] It will be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers and / or time periods, these elements, components, regions, layers and / or time periods should not be limited by these terms. These terms are used to distinguish one element, component, region, layer or part from another element, component, region, layer or time period. Thus, without departing from the spirit and scope of the present disclosure, a first element, component, region, layer or part as described below can be referred to as a second element, component, region, layer or time period.

[0031] The features of the various embodiments of the present disclosure can be partially or wholly combined with each other and can be technically related to or operable with each other. The embodiments can be implemented independently of each other and can be implemented together in an associated relationship.

[0032] When interpreting a numerical value, unless there is a separate explicit description, the value is interpreted as including the error range.

[0033] It will be understood that when an element or layer is referred to as "connected to" or "connected with" another element or layer, it can be directly on, directly connected to, or directly connected with another element or layer, or there can be one or more intermediate elements or layers. Further, it will also be understood that when an element or layer is referred to as being "between" two elements or layers, it can be the only element or layer between the two elements or layers, or there can also be one or more intermediate elements or layers.

[0034] Unless otherwise defined, all terms, including technical and scientific terms, used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this inventive concept belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0035] As used herein, "embodiment", "example", "aspect", etc. should not be construed such that any described aspect or design is superior to or favored over other aspects or designs.

[0036] Furthermore, the term "or" means "inclusive or", rather than "exclusive or". That is, unless otherwise stated or made clear from the context, the expression "x uses a or b" means any of the natural inclusive arrangements.

[0037] The terms used in the following description have been chosen to be common and general in the relevant technical field. However, depending on the development and / or change of technology, convention, preference of those skilled in the art, etc., there may also be other terms in addition to these terms. Therefore, the terms used in the following description should not be construed as limiting the technical concept, but should be understood as examples of terms for illustrating the embodiments.

[0038] In addition, in specific cases, the terms can be arbitrarily selected by the applicant, and in such cases, their detailed meanings will be described in the corresponding description paragraphs. Therefore, the terms used in the following description should be understood not only based on the names of the terms, but also based on their meanings and the content throughout the specific embodiments.

[0039] In the description of the signal flow, for example, when a signal is delivered from node A to node B, this can include the case where the signal is transmitted from node A to node B via another node, unless the phrases "transmitted immediately" or "transmitted directly" are used.

[0040] Hereinafter, a display device according to each embodiment of the present disclosure will be described with reference to the accompanying drawings.

[0041] Figure 1 is a schematic plan view of a display device according to an embodiment of the present disclosure. Figure 2 is along Figure 1 a cross-sectional view taken along line 2-2 in Figure 1 and Figure 2 Only three sub-pixels SP-1, SP-2, and SP-3 are shown for ease of illustration.

[0042] Referring to Figure 1 and Figure 2 , a plurality of data lines DL and a plurality of gate lines GL can be provided on the display area of the substrate 101. The plurality of data lines DL can intersect the plurality of gate lines GL. The sub-pixel regions are defined by the data lines DL and the gate lines SL that intersect each other. A plurality of sub-pixels SP-1, SP-2, and SP-3 can be provided on the display area of the substrate. For example, one sub-pixel can be electrically connected to one gate line and one data line.

[0043] The plurality of sub-pixels SP-1, SP-2, and SP-3 provided on the display area of the substrate 101 can be arranged in a matrix (M*N, where M and N are natural numbers). The plurality of sub-pixels SP-1, SP-2, and SP-3 can be arranged in a matrix along the first direction of the substrate 101 and the second direction intersecting the first direction. In this regard, the first direction can be the X-axis direction or the row direction, and the second direction can be the Y-axis direction or the column direction. However, the embodiments of the present disclosure are not limited thereto, and the arrangement order and direction of the sub-pixels SP-1, SP-2, and SP-3 can vary in various ways.

[0044] Multiple light-emitting regions EA1, EA2, and EA3 may be arranged in a manner corresponding to sub-pixels SP-1, SP-2, and SP-3, respectively. The first light-emitting region EA1 may be located in the first sub-pixel SP-1, the second light-emitting region EA2 may be located in the second sub-pixel SP-2, and the third light-emitting region EA3 may be located in the third sub-pixel SP-3.

[0045] Multiple color filters 150a, 150b, and 150c may be arranged in a manner corresponding to multiple sub-pixels SP-1, SP-2, and SP-3, respectively. The multiple color filters 150a, 150b, and 150c may include a first color filter 150a, a second color filter 150b, and a third color filter 150c. The multiple color filters 150a, 150b, and 150c may have different colors. For example, the first color filter 150a may have red, the second color filter 150b may have green, and the third color filter 150c may have blue.

[0046] The multiple sub-pixels SP-1, SP-2, and SP-3 may emit different color light beams to the light-emitting regions EA1, EA2, and EA3 through corresponding color filters 150a, 150b, and 150c, respectively. For example, the first sub-pixel SP-1 may emit red light, the second sub-pixel SP-2 may emit green light, and the third sub-pixel SP3 may emit blue light.

[0047] The multiple light-emitting regions EA1, EA2, and EA3 are defined by a bank 135 in which a bank hole 135a is defined. The bank hole 135a may be an opening exposing each of the light-emitting regions EA1, EA2, and EA3. In other words, the regions not covered by the bank 135 and thus exposed may be the multiple light-emitting regions EA1, EA2, and EA3, respectively.

[0048] Multiple anode electrodes 130 may be arranged in a manner corresponding to multiple sub-pixels SP-1, SP-2, and SP-3, respectively. The multiple anode electrodes 130 may be arranged to be spaced apart from each other.

[0049] A part of the anode electrode 130 exposed through the bank hole 135a of the bank 135 may be defined as a light-emitting region. For example, the first light-emitting region EA1 may be defined by the bank hole 135a in the first sub-pixel SP-1. The second light-emitting region EA2 may be defined by the bank hole 135a in the second sub-pixel SP-2. The third light-emitting region EA3 may be defined by the bank hole 135a in the third sub-pixel SP-3.

[0050] The anode electrode 130 of each of the multiple sub-pixels SP-1, SP-2, and SP-3 may be connected to at least one transistor provided on the substrate 101 via each contact region 129 (which may correspond to a contact electrode). This will be described below with reference to Figure 2A description will be given.

[0051] The display device according to an embodiment of the present disclosure can operate in a top emission scheme or a bottom emission scheme according to the emission direction of light emitted from the light emitting layer. Hereinafter, the top emission scheme will be described by way of example.

[0052] Referring to Figure 2 , a transistor TR can be provided on the substrate 101. The substrate 101 may include a silicon wafer. In one embodiment, the substrate 101 may include glass or plastic.

[0053] On the substrate 101, a driving circuit including various signal lines, transistors, and capacitors can be provided in each of the sub-pixels SP-1, SP-2, and SP-3. The signal lines may include gate lines GL, data lines DL, power lines, and reference lines, and the transistor TR may include a switching transistor and a driving transistor. For example, the switching transistor and the driving transistor can be formed on the substrate 101 using a CMOS (complementary metal oxide semiconductor) process.

[0054] The switching transistor is switched based on the gate signal supplied to the gate line to supply the data voltage supplied from the data line to the driving transistor, and functions to select the sub-pixel SP-1, SP-2, or SP-3. The driving transistor is used to drive the light emitting element by supplying power to the anode electrode of the sub-pixel SP-1, SP-2, or SP-3 selected from the switching transistor.

[0055] The capacitor is used to hold the data voltage supplied to the driving transistor within one frame, and the electrodes of the capacitor can be electrically connected to the driving transistor.

[0056] The transistor TR may include a semiconductor layer 103, a gate insulating layer 105, a gate electrode 107, and source / drain electrodes 115. The gate insulating layer 105 may be provided between the semiconductor layer 103 and the gate electrode 107. An insulating layer for reducing or preventing the penetration of moisture or impurities may also be included between the substrate 101 and the semiconductor layer 103.

[0057] The semiconductor layer 103 may be made of an oxide semiconductor or a silicon-based semiconductor material. For example, the semiconductor layer 103 may contain a transparent oxide semiconductor material, such as indium gallium zinc oxide (IGZO) or indium zinc oxide (IZO). In addition, the semiconductor layer 103 may contain a polycrystalline semiconductor material.

[0058] The semiconductor layer 103 may include a channel region 103a, a source region 103b, and a drain region 103c. The gate insulating layer 105 may include a single layer or a stack of multiple layers formed of silicon oxide (SiOx) or silicon nitride (SiNx).

[0059] The gate electrode 107 may be disposed on the gate insulating layer 105. The region of the semiconductor layer 103 that overlaps the gate electrode 107 in the vertical direction may be the channel region 103a. The source region 103b and the drain region 103c may be respectively disposed on opposite sides of the channel region 103a.

[0060] The interlayer insulating layer 109 and the passivation layer 111 may be sequentially disposed on the gate electrode 107. The source / drain electrode 115 may be disposed to fill a contact hole extending through the interlayer insulating layer 109, the passivation layer 111, and the gate insulating layer 105. The source / drain electrode 115 may be disposed on opposite sides of the gate electrode 107 disposed therebetween, and may be respectively connected to the source region 103b and the drain region 103c of the semiconductor layer 103.

[0061] The planarization layer 125 may be disposed on the passivation layer 111 and the source / drain electrode 115. The planarization layer 125 may include a first planarization layer 120 and a second planarization layer 123. The planarization layer 125 is used to planarize the steps formed due to the underlying circuit elements including the driving transistor TR.

[0062] The planarization layer 125 may have a pixel contact hole 127 defined therein that extends through the first planarization layer 120 and the second planarization layer 123 while exposing a part of the surface of the source / drain electrode 115 of the driving transistor TR. The pixel contact electrode 129 may fill the pixel contact hole 127 while one of its surfaces is in contact with the source / drain electrode 115.

[0063] The anode electrode 130 may be disposed on the second planarization layer 123. In one embodiment, the anode electrode 130 may have a multilayer structure. For example, the anode electrode 130 may have a structure in which a lower anode electrode 130a, a middle anode electrode 130b, and an upper anode electrode 130c are stacked in this order. The middle anode electrode 130b may be disposed between the lower anode electrode 130a and the upper anode electrode 130c. The middle anode electrode 130b may have a second thickness different from the first thickness of each of the lower anode electrode 130a and the upper anode electrode 130c. For example, the first thickness may be less than the second thickness. The lower anode electrode 130a and the upper anode electrode 130c may have the same thickness. However, the embodiments of the present disclosure are not limited thereto.

[0064] The anode electrode 130 may include a transparent metal oxide, for example, indium tin oxide (ITO) or indium zinc oxide (IZO). Alternatively, the anode electrode 130 may have a single-layer or multi-layer structure including a reflective metal film made of silver (Ag), aluminum (Al), gold (Au), nickel (Ni), chromium (Cr), or a combination thereof. The anode electrode 130 may be referred to as a pixel electrode.

[0065] The bank 135 may be disposed on the second planarization layer 123. The bank 135 is used to distinguish the sub-pixels SP-1, SP-2, and SP-3 from each other. To this end, the bank 135 may be formed to cover the edge of the anode electrode 130. In addition, each of the light-emitting regions EA1, EA2, and EA3 may be exposed through the bank holes 135a of the bank 135 (see Figure 1 ). That is, the bank holes 135a of the bank 135 may define each of the light-emitting regions EA1, EA2, and EA3. In addition, the bank 135 may prevent different-color light beams respectively output from adjacent sub-pixels from mixing with each other. The bank 135 may include an organic insulating film formed of polyimide and epoxy resin. In one example, the bank 135 may include one of black resin, graphite, and black ink.

[0066] The organic light-emitting layer 140 may be disposed on the anode electrode 130. In one example, the organic light-emitting layer 140 may include an organic material that emits white light.

[0067] The organic light-emitting layer 140 may include a stacked structure in which a hole transport layer (HTL), a light-emitting layer (EML), an electron transport layer (ETL), a hole blocking layer (HBL), a hole injection layer (HIL), an electron blocking layer (EBL), and an electron injection layer (EIL) are stacked.

[0068] The cathode electrode 143 may be disposed on the organic light-emitting layer 140. The cathode electrode 143 may be implemented as a common layer that is generally formed across multiple sub-pixels SP-1, SP-2, and SP-3. The cathode electrode 143 may be referred to as a common electrode or a second electrode. The cathode electrode 143 may include a semi-transmissive metal material. For example, the cathode electrode 143 may include magnesium (Mg), silver (Ag), or an alloy of magnesium (Mg) and silver (Ag).

[0069] The light-emitting element may be configured to include the anode electrode 130, the organic light-emitting layer 140, and the cathode electrode 143.

[0070] The encapsulation layer 145 may be disposed on the cathode electrode 143. The encapsulation layer 145 may seal the transistor DR and the light-emitting element disposed thereunder. The encapsulation layer 145 may include, but is not limited to, an organic insulating material.

[0071] A color filter 150 may be provided on the encapsulation layer 145. The color filter 150 may be positioned in a manner corresponding to each of the plurality of sub-pixels SP-1, SP-2, and SP-3. The color filter 150 may include a first color filter 150a, a second color filter 150b, and a third color filter 150c. The first color filter 150a using a red pigment may be positioned in a manner corresponding to the first sub-pixel SP-1. The second color filter 150b using a green pigment may be positioned in a manner corresponding to the second sub-pixel SP-2. The third color filter 150c using a blue pigment may be positioned in a manner corresponding to the third sub-pixel SP-3.

[0072] In one example, the plurality of color filters 150a, 150b, and 150c provided on the encapsulation layer 145 may be formed in accordance with their color order. For example, first, the red first color filter 150a may be formed, then the blue third color filter 150c may be formed, and then the green second color filter 150b may be formed.

[0073] The first color filter 150a may have a first thickness H1a, the second color filter 150b may have a second thickness H1b, and the third color filter 150c may have a third thickness H1c. The first thickness H1a of the first color filter 150a may be the smallest, and the second thickness H1b of the second color filter 150b may be the largest.

[0074] In the process of forming these color filters in accordance with the color order of the plurality of color filters 150a, 150b, and 150c, it may be difficult to control the thicknesses H1a, H1b, and H1c and the line widths CD of the first color filter 150a, the second color filter 150b, and the third color filter 150c to be uniform. As the process progresses, the thickness of the color filter becomes larger. Therefore, the second thickness H1b of the second color filter 150b formed in the last order may be the largest.

[0075] In addition, in the process of forming the color filter, the line width of each of the color filters 150a, 150b, and 150c may be reduced. For example, the line width of each of the first color filter 150a, the second color filter 150b, and the third color filter 150c may be reduced to a size smaller than the area size of the bank hole 135a (see Figure 1 ).

[0076] Since the line widths of the color filters 150a, 150b, and 150c are reduced to be smaller than the bank hole 135a (see Figure 1) The size of the area, which may cause light leakage. For example, light leakage may occur, where the light beam L2a emitted within the viewing angle range among the light beams L1a and L2a emitted from the organic light-emitting layer 140 of the second sub-pixel SP-2 is guided to the adjacent first sub-pixel SP-1 and third sub-pixel SP-3. Therefore, the colors of the light beams emitted from the adjacent sub-pixels may be mixed with each other.

[0077] In addition, since the first color filter to the third color filters 150a, 150b, and 150c are formed to have different thicknesses H1a, H1b, and H1c, the colors may be viewed in a distorted manner within the viewing angle range of the viewer. The viewing angle range may be defined as, for example, the maximum angular range of the image quality at which an image displayed on the display device can be viewed without distortion when the color becomes darker or blurred on the left or right side or on the top or bottom side. As the viewing angle-related performance of the display device is better, even when viewing the screen on the left or right side or on the top or bottom side of the range, the viewer can recognize the screen with the same image quality level as when viewing the screen at the central position of the range. When the colors are viewed in a distorted manner within the viewing angle range, a screen with distorted colors may be provided, such that the image quality may deteriorate. In addition, when light leakage occurs, uniform brightness cannot be provided, such that the image quality may deteriorate.

[0078] Therefore, in another embodiment of the present disclosure, a structure that can prevent or at least reduce light leakage and color distortion within the viewing angle range is described.

[0079] Figure 3 is a schematic plan view of a display device according to another embodiment of the present disclosure; Figure 4 is along Figure 3 a cross-sectional view taken along line 4-4 in

[0080] Referring to Figure 3 and Figure 4 , the data lines DL and the gate lines GL provided on the display area of the substrate 201 may be arranged to intersect each other to define corresponding areas of a plurality of sub-pixels SP-1, SP-2, SP-3, and SP-4. The plurality of sub-pixels SP-1, SP-2, SP-3, and SP-4 may be arranged in a matrix manner along a first direction (e.g., the X-axis direction or the row direction) and a second direction (e.g., the Y-axis direction or the column direction) of the substrate 201. In this regard, the first direction may be the row direction, and the second direction may be the column direction. However, the arrangement order and direction of the sub-pixels SP-1, SP-2, SP-3, and SP-4 may vary in various ways.

[0081] The sub-pixels can be configured to include light-emitting elements and transistors for driving the light-emitting elements. A unit pixel can be configured to include at least three or more sub-pixels arranged adjacent to each other. In another embodiment of the present disclosure, a first sub-pixel SP-1, a second sub-pixel SP-2, a third sub-pixel SP-3, and a fourth sub-pixel SP-4 can be arranged adjacent to each other to form a unit pixel PXA. A unit pixel PXA can be arranged adjacent to other unit pixels PXB and PXC. The first sub-pixel SP-1, the second sub-pixel SP-2, the third sub-pixel SP-3, and the fourth sub-pixel SP-4 can emit green light beams, blue light beams, red light beams, and white light beams, respectively. In an embodiment of the present disclosure, a fourth sub-pixel SP-4 that emits white light can be included to improve light efficiency.

[0082] A plurality of light-emitting regions EA1, EA2, EA3, and EA4 can be positioned in a manner corresponding to the sub-pixels SP-1, SP-2, SP-3, and SP-4, respectively. The first light-emitting region EA1 can be located in the first sub-pixel SP-1, the second light-emitting region EA2 can be located in the second sub-pixel SP-2, the third light-emitting region EA3 can be located in the third sub-pixel SP-3, and the fourth light-emitting region EA4 can be located in the fourth sub-pixel SP-4.

[0083] The first color filter to the third color filters 270a, 270b, and 270c can be provided in a manner corresponding to the first sub-pixel to the third sub-pixels SP-1, SP-2, and SP-3, respectively. A color filter corresponding to the fourth sub-pixel SP-4 is not provided. The plurality of color filters 270a, 270b, and 270c can include a first color filter 270a, a second color filter 270b, and a third color filter 270c. The first color filter to the third color filters 270a, 270b, and 270c can have different colors. For example, the first color filter 270a can have red, the second color filter 270b can have green, and the third color filter 270c can have blue.

[0084] The first sub-pixel to the third sub-pixels SP-1, SP-2, and SP-3 can emit light beams of different colors to the light-emitting regions EA1, EA2, and EA3 through the first color filter to the third color filters 270a, 270b, and 270c, respectively. For example, the first sub-pixel SP-1 can emit red light, the second sub-pixel SP-2 can emit green light, and the third sub-pixel SP-3 can emit blue light. In addition, white light can be emitted from the fourth sub-pixel SP-4 where no color filter is provided.

[0085] Each of the plurality of light-emitting regions EA1, EA2, EA3, and EA4 can be defined therein with dam holes 245a and 245b (see Figure 3) is defined by the embankment 245. The embankment holes 245a and 245b may be openings that expose the light-emitting regions EA1, EA2, EA3, and EA4. The embankment holes 245a and 245b may include a first embankment hole 245a and a second embankment hole 245b.

[0086] A plurality of anode electrodes 237 and 235 may be respectively arranged in a manner corresponding to the plurality of sub-pixels SP-1, SP-2, SP-3, and SP-4. The plurality of anode electrodes 237 and 235 may be arranged to be spaced apart from each other.

[0087] Each of the anode electrodes 237 and 235 of the plurality of sub-pixels SP-1, SP-2, SP-3, and SP-4 may be connected to a transistor provided on the substrate 201 via each of the contact electrodes 229 and 234. This will be described below with reference to Figure 4 as follows.

[0088] With reference to Figure 4 and Figure 3 , a plurality of transistors TR may be provided on the substrate 201. The substrate 201 may include a silicon wafer. In one embodiment, the substrate 201 may include glass or plastic.

[0089] On the substrate 201, the sub-pixels SP-1, SP-2, SP-3, and SP-4 may be arranged. Each of the sub-pixels SP-1, SP-2, SP-3, and SP-4 may be configured to include a light-emitting element and a driving circuit for driving the light-emitting element. The driving circuit may include a plurality of transistors, capacitors, and signal lines. The plurality of transistors TR may include a driving transistor and a switching transistor. In one example, each of the plurality of transistors may be formed on the substrate 201 using CMOS processing. In the present disclosure, the transistor TR is described by way of example as a driving transistor. Components identical to those of the driving transistor may also be included in the switching transistor. The plurality of transistors TR may be arranged to drive the plurality of sub-pixels SP-1, SP-2, SP-3, and SP-4 arranged along a first direction (e.g., the X-axis direction or the row direction) of the substrate 201 and a second direction (e.g., the Y-axis direction or the column direction) intersecting the first direction. Therefore, the plurality of transistors TR may be arranged along the first direction (e.g., the X-axis direction or the row direction) and the second direction (e.g., the Y-axis direction or the column direction) intersecting the first direction. In other words, the plurality of transistors TR may include transistors located in even columns and transistors located in odd columns.

[0090] The transistor TR may include a semiconductor layer 203, a gate insulating layer 205, a gate electrode 207, and source / drain electrodes 215. The gate insulating layer 205 may be disposed between the semiconductor layer 203 and the gate electrode 207. The semiconductor layer 203 may include a channel region 203a, a source region 203b, and a drain region 203c. On the gate insulating layer 205, the gate electrode 207 may be disposed to overlap with the channel region 203a. The source region 203b and the drain region 203c may be respectively disposed on two opposite sides of the channel region 203a.

[0091] An interlayer insulating layer 209 may be disposed to cover the gate electrode 207. A passivation layer 211 may be disposed on the interlayer insulating layer 209. The source / drain electrodes 215 may be disposed to fill contact holes 213 extending through the interlayer insulating layer 209, the passivation layer 211, and the gate insulating layer 205. The source / drain electrodes 215 may be respectively disposed on two opposite sides of the gate electrode 207 disposed between the source / drain electrodes 215, and may be respectively electrically connected to the source region 203b and the drain region 203c.

[0092] A planarization layer 220 may be disposed on the passivation layer 211 and the source / drain electrodes 215. The planarization layer 220 planarizes steps formed due to lower circuit elements including the transistor TR.

[0093] A plurality of separation patterns 223 may be disposed on the planarization layer 220. The plurality of separation patterns 223 may be arranged to be spaced apart from each other. The separation patterns 223 may be disposed on top of the transistor TR, and may be positioned such that at least a part thereof overlaps with the transistor TR.

[0094] In one example, the separation pattern 223 may be located on top of the transistors TR in the even columns among the plurality of transistors TR. However, embodiments of the present disclosure are not limited thereto. In another example, the separation pattern 223 may be located on top of the transistors TR in the odd columns. In this regard, the plurality of separation patterns 223 may be arranged in a selected one of the even columns or odd columns. For example, when the plurality of separation patterns 223 are respectively disposed corresponding to the transistors TR in the even columns and disposed on top of the transistors TR, the transistors TR may not be located on top of the transistors in the odd columns. Therefore, the separation pattern 223 may be disposed on top of the transistors TR in each column of the even columns respectively disposed on two opposite sides of the transistors TR in the odd columns.

[0095] In another example, when multiple separation patterns 223 are respectively arranged in a manner corresponding to the transistors TR located in odd-numbered columns and are arranged on top of the transistors TR, the transistors TR may not be located on top of the transistors arranged in even-numbered columns. Accordingly, the separation patterns 223 may be arranged on top of the transistors TR in each column of the odd-numbered columns located on two opposite sides of the transistors TR respectively arranged in even-numbered columns. In the present disclosure, for ease of description, a case where multiple separation patterns 223 are respectively arranged in a manner corresponding to the transistors TR located in even-numbered columns and are arranged on top of the transistors TR is described. However, embodiments of the present disclosure are not limited thereto.

[0096] The separation pattern 223 may have an inverted conical shape. For example, the width of the upper surface TS of each separation pattern 223 may be greater than the width of its lower surface BS. The side surface IS extending between the upper surface TS and the lower surface BS of the separation pattern 223 may be an inclined surface with respect to the horizontal plane.

[0097] The first pixel contact electrode 229 may extend through the separation pattern 223 to contact the source / drain electrode 215 of the transistor TR. The first pixel contact electrode 229 may fill a first pixel contact hole 227 extending through the separation pattern 223, the planarization layer 220, and the first passivation layer 211.

[0098] A low-reflection metal pattern 230 is arranged on the upper surface TS of the separation pattern 223 such that one surface of the low-reflection metal pattern 230 may contact the first pixel contact electrode 229. The low-reflection metal pattern 230 may include a low-reflection metal material. The low-reflection metal material may include a material having a reflectivity relatively lower than that of aluminum used as a reflection material. For example, the low-reflection metal material may include tungsten oxide (WOx), chromium (Cr), molybdenum (Mo), molybdenum-tungsten alloy (MoW), or titanium (Ti), which has a relatively low reflectivity but excellent conductivity. In one embodiment, the first pixel contact electrode 229 and the low-reflection metal pattern 230 may include the same material.

[0099] A first anode electrode 235 electrically connected to the source / drain electrode 215 of the transistor TR located in an even-numbered column may be arranged on the low-reflection metal pattern 230. The first anode electrode 235 may have a multilayer structure. For example, the first anode electrode 235 may have a structure in which a lower anode electrode 233a, a middle anode electrode 233b, and an upper anode electrode 233c are sequentially stacked.

[0100] A second anode electrode 237 electrically connected to the source / drain electrodes 215 of the transistors TR located in the odd-numbered columns can be disposed on the planarization layer 220. The second anode electrode 237 can have a multi-layer structure. For example, the second anode electrode 237 can have a structure in which a lower anode electrode 233a, a middle anode electrode 233b, and an upper anode electrode 233c are stacked in this order. A part of the lower anode electrode 233a of the second anode electrode 237 can contact the second pixel contact electrode 234, and the second pixel contact electrode 234 contacts one surface of the source / drain electrode 215 exposed through the second pixel contact hole 232.

[0101] The upper surfaces of the first anode electrode 235 and the second anode electrode 237 can be positioned at different vertical levels. For example, the upper surface of the second anode electrode 237 can be positioned at a vertical level lower than the vertical level of the upper surface of the first anode electrode 235.

[0102] The bank 245 can be provided to cover the side surfaces of each of the first anode electrode 235 and the second anode electrode 237. The bank 245 can cover the side surfaces of each of the first anode electrode 235 and the second anode electrode 237 such that the side surfaces of each of the lower anode electrode 233a, the middle anode electrode 233b, and the upper anode electrode 233c are not exposed to the outside.

[0103] The bank 245 can include an inner surface and an outer surface opposite to the inner surface.

[0104] The inner surface of the bank 245 can contact the side surface of the first anode electrode 235 and the side surface IS of the partition pattern 223, while the outer surface of the bank 245 can contact the side surface of the second anode electrode 237.

[0105] As Figure 3 and Figure 4 shown, the bank 245 can include a first bank hole 245a and a second bank hole 245b that are openings exposing the light-emitting regions EA1, EA2, EA3, and EA4. The first bank hole 245a can expose the upper anode electrode 233c of the first anode electrode 235. The upper anode electrode 233c exposed through the first bank hole 245a can be the upper surface of the first anode electrode 235. The second bank hole 245b located between adjacent first bank holes 245a can have a groove shape having the upper surface of the upper anode electrode 233c, which is the uppermost part of the second anode electrode 237, as its bottom surface, and the outer surface of the bank 245 as its side wall extending from the bottom surface.

[0106] The organic light-emitting layer 250 may be disposed on the first anode electrode 235 and the second anode electrode 237. The organic light-emitting layer 250 may include a first organic light-emitting layer 250a disposed on the first anode electrode 235 and a second organic light-emitting layer 250b disposed on the second anode electrode 237. In one example, each of the first organic light-emitting layer 250a and the second organic light-emitting layer 250b may include an organic material that emits white light.

[0107] The upper surfaces of the first organic light-emitting layer 250a and the second organic light-emitting layer 250b may have different vertical levels. For example, the upper surface of the first organic light-emitting layer 250a disposed on the first anode electrode 235 may be positioned at a vertical level higher than the vertical level of the upper surface of the second organic light-emitting layer 250b disposed on the second anode electrode 237. In particular, the second organic light-emitting layer 250b may be disposed at a vertical level lower than the vertical level of the low-reflection metal pattern 230 of the first anode electrode 235. Accordingly, the first organic light-emitting layer 250a and the second organic light-emitting layer 250b may be positioned at different vertical levels and thus are separate layers spaced apart from each other.

[0108] Accordingly, light emitted from the light-emitting elements located in the odd-numbered columns and guided toward the viewing angle range may reach the low-reflection metal pattern 230 positioned at a vertical level higher than the vertical level of the second organic light-emitting layer 250b and be reflected therefrom. Accordingly, light leakage in which light emitted from the light-emitting elements located in the odd-numbered columns and guided toward the viewing angle range is transmitted to the sub-pixels of the light-emitting elements located in the even-numbered columns adjacent to the odd-numbered columns, respectively, may be prevented.

[0109] The cathode electrode 255 may be disposed on the first organic light-emitting layer 250a and the second organic light-emitting layer 250b. The cathode electrode 255 may be formed in a concavo-convex shape in a manner conformal to the combined contour of the first organic light-emitting layer 250a and the second organic light-emitting layer 250b and may extend continuously over the entire surface of the substrate 201.

[0110] The light-emitting elements may be configured to include each of the anode electrodes 235 and 237, the organic light-emitting layer 250, and the cathode electrode 255. When a voltage is applied to the electrodes, light may be emitted from the light-emitting region under the recombination of holes injected from the anode electrode 235 or 237 and electrons injected from the cathode electrode 255.

[0111] A second passivation layer 260 including an insulating material may be disposed on the cathode electrode 255.

[0112] Since the second passivation layer 260 is formed along the contour of the cathode electrode 255, the second passivation layer 260 may have a concavo-convex shape.

[0113] A color filter 270 may be disposed on the second passivation layer 260. The color filter 270 may be disposed in a manner corresponding to each of a plurality of sub-pixels SP-1, SP-2, and SP-3 except for the fourth sub-pixel SP-4.

[0114] The color filter 270 may include a first color filter 270a, a second color filter 270b, and a third color filter 270c. The first color filter 270a may emit red light, the second color filter 270b may emit green light, and the third color filter 270c may emit blue light. Since the color filter is not disposed in a manner corresponding to the fourth sub-pixel SP-4, white light emitted from the organic light-emitting layer 250 in the fourth sub-pixel may be emitted to the outside.

[0115] The first color filter 270a may have a first thickness, the second color filter 270b may have a second thickness, and the third color filter 270c may have a third thickness.

[0116] Each of the first color filter 270a and the third color filter 270c may be positioned to fill a second bank hole 245b having a trench shape. Each of the first color filter 270a and the third color filter 270c may have a thickness equal to the depth of the trench. Therefore, the first thickness of the first color filter 270a and the third thickness of the third color filter 270c may be equal to each other. That is, the first color filter 270a and the third color filter 270c may have the same thickness, may fill the corresponding second bank hole 245b having a trench shape, and thus may have the same line width. In addition, the first color filter 270a to the third color filter 270c may have the same thickness and the same line width. In addition, each of the first color filter 270a and the third color filter 270c may have a thickness such that its upper surface is coplanar with the upper surface of the second passivation layer 260.

[0117] Therefore, color distortion in which the thicknesses of the color filters are different from each other and thus colors are viewed in a distorted manner within the viewing angle range can be prevented. In addition, light leakage caused by a reduction in the line width of the color filter can be prevented.

[0118] Figures 5 to 15 is a cross-sectional view showing a method of manufacturing a display device according to another embodiment of the present disclosure. In particular, Figures 5 to 15 is a cross-sectional view of an intermediate structure corresponding to an intermediate step of a method of manufacturing a Figure 4 display device, and thus, reference numerals identical to those in Figure 4 may indicate Figures 5 to 15 the same components in

[0119] Refer to Figure 5, a plurality of transistors TR may be provided on the substrate 201. The substrate 101 may include a silicon wafer. In one embodiment, the substrate 101 may include glass or plastic.

[0120] Each transistor TR may include a semiconductor layer 203, a gate insulating layer 205, a gate electrode 207, and a source / drain electrode 215. The gate insulating layer 205 may be provided between the semiconductor layer 203 and the gate electrode 207. The semiconductor layer 203 may include a channel region 203a, a source region 203b, and a drain region 203c. On the gate insulating layer 205, the gate electrode 207 may be provided to vertically overlap the channel region 203a. The source region 203b and the drain region 203c may be respectively provided on two opposite sides of the channel region 203a.

[0121] The drain region 203c of the transistor TR may be in contact with the source / drain electrode 215, and the source / drain electrode 215 fills a contact hole extending through the interlayer insulating layer 209, the first passivation layer 211, and the gate insulating layer 209.

[0122] A planarization layer 220 may be provided on the first passivation layer 211 and the source / drain electrode 215. The planarization layer 220 is used to planarize the steps formed due to the underlying circuit elements including the transistor TR. The planarization layer 220 may include an organic insulating material such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin. However, the embodiments of the present disclosure are not limited thereto.

[0123] Referring to Figure 6 , a plurality of partition patterns 223 are formed on the planarization layer 220. The width W1 of the upper surface TS of each of the partition patterns 223 may be greater than the width W2 of its lower surface BS. Therefore, the side surface IS of the partition pattern 223 may be inclined at an angle θ less than 90 degrees with respect to the horizontal plane. The side surface IS of the partition pattern 223 may extend in an inclined manner with respect to the horizontal plane. That is, the partition pattern 223 may have an inverted conical shape.

[0124] The separation pattern 223 may be disposed on top of the transistor TR and may be positioned such that at least a part thereof overlaps with the transistor TR. According to an embodiment of the present disclosure, a plurality of separation patterns 223 may be respectively disposed and disposed on top of the transistor TR in a manner corresponding to the transistors TR located in even-numbered columns. Accordingly, the transistor TR may not be located on top of the transistors disposed in odd-numbered columns. Thus, the separation pattern 223 may be disposed on top of the transistor TR in each column of the even-numbered columns located on two opposite sides of the transistor TR disposed in the odd-numbered columns, respectively. However, the embodiment of the present disclosure is not limited thereto. In one example, the separation pattern 223 may include the same organic insulating material as the organic insulating material of the planarization layer 220.

[0125] Referring to Figure 7 , a first pixel contact electrode 229 is formed. To this end, first, a first pixel contact hole 227 extending through the separation pattern 223, the planarization layer 220, and the first passivation layer 211 may be formed. The first pixel contact hole 227 may expose the surface of the source electrode / drain electrode 215.

[0126] The first pixel contact electrode 229 may be formed to fill the first pixel contact hole 227. One surface of the first pixel contact electrode 229 may contact one surface of the source electrode / drain electrode 215 exposed through the first pixel contact hole 227. The other surface opposite to one surface of the first pixel contact electrode 229 may contact the lower surface of the low-reflection metal pattern 230. The low-reflection metal pattern 230 may be disposed on the upper surface TS of the separation pattern 223. The end of the low-reflection metal pattern 230 may be aligned with the end of the separation pattern 223. To this end, a low-reflection metal layer may be formed on the entire surface of the substrate 201, and then an etching process may be performed such that only the low-reflection metal pattern 230 on the separation pattern 223 remains and the remaining portion thereof is removed.

[0127] The low-reflection metal pattern 230 may include a low-reflection metal material. The low-reflection metal material may include a material having a reflectivity relatively lower than that of aluminum used as a reflection material. For example, the low-reflection metal material may include tungsten oxide (WOx), chromium (Cr), molybdenum (Mo), molybdenum-tungsten alloy (MoW), or titanium (Ti), which has a relatively low reflectivity but excellent electrical conductivity.

[0128] The low-reflection metal pattern 230 and the first pixel contact electrode 229 may be formed by the same process. In another example, the low-reflection metal pattern 230 and the first pixel contact electrode 229 may be formed by different processes. The low-reflection metal pattern 230 and the first pixel contact electrode 229 may be made of the same material.

[0129] Reference Figure 8 A second pixel contact hole 232 is formed. The second pixel contact holes 232 may be respectively arranged in a manner corresponding to the transistors TR located in the odd-numbered columns among the plurality of transistors TR. That is, the second pixel contact holes 232 may be located in regions where the partition patterns 223 are not formed. The second pixel contact holes 232 may extend through the planarization layer 220 and the first passivation layer 211. The second pixel contact holes 232 may expose the surfaces of the source / drain electrodes 215 of the transistors TR located in the odd-numbered columns.

[0130] Reference Figure 9 The second pixel contact electrodes 234 may fill the second pixel contact holes 232. Anode electrodes 235 and 237 electrically connected to the source / drain electrodes 215 of each of the plurality of transistors TR may be provided. The anode electrodes 235 and 237 may include a first anode electrode 235 and a second anode electrode 237. The first anode electrode 235 may be provided on the low-reflection metal pattern 230, and the second anode electrode 237 may be provided on the planarization layer 220. Accordingly, the upper surfaces of the first anode electrode 235 and the second anode electrode 237 may be positioned at different vertical levels. For example, the upper surface of the second anode electrode 237 may be positioned at a vertical level lower than the vertical level of the upper surface of the first anode electrode 235.

[0131] The end of the first anode electrode 235 may be aligned with the end of the partition pattern 223. Accordingly, the first anode electrode 235 and the second anode electrode 237 may be positioned to be spaced apart from each other.

[0132] In one embodiment, each of the first anode electrode 235 and the second anode electrode 237 may have a multilayer structure. For example, each of the first anode electrode 235 and the second anode electrode 237 may have a structure in which a lower anode electrode 233a, a middle anode electrode 233b, and an upper anode electrode 233c are stacked in this order. The middle anode electrode 233b may be provided between the lower anode electrode 233a and the upper anode electrode 233c. The middle anode electrode 233b may have a second thickness different from the first thickness of each of the lower anode electrode 233a and the upper anode electrode 233c. For example, the first thickness may be less than the second thickness. The lower anode electrode 233a and the upper anode electrode 233c may have the same thickness. However, embodiments of the present disclosure are not limited thereto.

[0133] The first anode electrode 235 may be electrically connected to the source / drain electrodes 215 of the transistors TR located in the even-numbered columns.

[0134] The second anode electrode 237 may be electrically connected to the source / drain electrode 215 of the transistor TR located in the odd-numbered columns. In one example, the lower anode electrode 233a of the second anode electrode 237 may fill the second pixel contact hole 232. Accordingly, a part of the lower anode electrode 233a may be the second pixel contact electrode 234, and the second pixel contact electrode 234 contacts one surface of the source / drain electrode 215 exposed through the second pixel contact hole 232. The second pixel contact electrode 234 may be formed by a process different from the process of forming the lower anode electrode 233a. In this case, one surface of the second pixel contact electrode 234 may be electrically connected to the source / drain electrode 215 of the transistor TR, while the other surface thereof may contact the lower surface of the lower anode electrode 233a. The second pixel contact electrode 234 and the lower anode electrode 233a may be made of the same material.

[0135] Each of the first anode electrode 235 and the second anode electrode 237 may include a transparent metal oxide, for example, indium tin oxide (ITO) or indium zinc oxide (IZO). Alternatively, each of the first anode electrode 235 and the second anode electrode 237 may have a single-layer or multi-layer structure including a reflective metal film made of silver (Ag), aluminum (Al), gold (Au), nickel (Ni), chromium (Cr), or a combination thereof. Each of the first anode electrode 235 and the second anode electrode 237 may be referred to as a pixel electrode or a first electrode.

[0136] Referring to Figure 10 , a bank material layer 240 is formed on the substrate 201. The bank material layer 240 may cover both the exposed side surface and the upper surface of the second anode electrode 237. In addition, the bank material layer 240 may be formed to have a thickness such that the vertical level of its upper surface is equal to or higher than the vertical level of the upper surface of the upper anode electrode 233c of the first anode electrode 235. Accordingly, the side surface IS of the partition pattern 223 and the side surface of the first anode electrode 235 may be covered by the bank material layer 240.

[0137] The bank material layer 240 may include an organic insulating film, for example, polyimide or epoxy resin. In one example, the bank material layer 240 may contain one of black resin, graphite, or black ink.

[0138] Referring to Figure 11 , an exposure process and a development process may be performed on the bank material layer 240 to form a bank 245 in which a first bank hole 245a and a second bank hole 245b are defined.

[0139] The first bank hole 245a and the second bank hole 245b may respectively expose the upper anode electrodes 233c of the first anode electrode 235 and the second anode electrode 237. Each of the first bank hole 245a and the second bank hole 245b may be an opening that exposes the light-emitting region. That is, the region that is not covered by the bank 245 and is exposed through each of the first bank hole 245a and the second bank hole 245b may be defined as the light-emitting region that emits light.

[0140] The side surface of the first anode electrode 235 may be covered by the bank 245. Accordingly, the side surfaces of the lower anode electrode 233a, the middle anode electrode 233b, and the upper anode electrode 233c of the first anode electrode 235 may not be exposed to the outside. In addition, the side surface of the second anode electrode 237 may be covered by the bank 245. Accordingly, the side surfaces of the lower anode electrode 233a, the middle anode electrode 233b, and the upper anode electrode 233c of the second anode electrode 237 may not be exposed to the outside.

[0141] The bank 245 may include an inner surface that contacts the side surface of the first anode electrode 235 and the side surface IS of the partition pattern 223 and an outer surface facing the inner surface. The outer surface of the bank 245 may contact the side surface of the second anode electrode 237.

[0142] In this regard, the second bank hole 245b located between adjacent first bank holes 245a may be surrounded by the outer surface of the bank 245. Accordingly, the second bank hole 245b may have a groove shape that has the upper surface of the upper anode electrode 233c as its bottom surface and the outer surface of the bank 245 as its sidewall.

[0143] Refer to Figure 12 , an organic light-emitting layer 250 may be disposed on each of the first anode electrode 235 and the second anode electrode 237. The organic light-emitting layer 250 may include a first organic light-emitting layer 250a and a second organic light-emitting layer 250b.

[0144] The first organic light-emitting layer 250a may be disposed on the first anode electrode 235, and the second organic light-emitting layer 250b may be disposed on the second anode electrode 237. In one example, each of the first organic light-emitting layer 250a and the second organic light-emitting layer 250b may include an organic material that emits white light.

[0145] Each of the first organic light-emitting layer 250a and the second organic light-emitting layer 250b may include a structure in which a hole transport layer HTL, a light-emitting layer EML, an electron transport layer ETL, a hole blocking layer HBL, a hole injection layer HIL, an electron blocking layer EBL, and an electron injection layer EIL are stacked.

[0146] Since the upper surfaces of the first anode electrode 235 and the second anode electrode 237 are positioned at different vertical levels, the upper surfaces of the first organic light-emitting layer 250a and the second organic light-emitting layer 250b can be positioned at different vertical levels. For example, the upper surface of the first organic light-emitting layer 250a disposed on the first anode electrode 235 can be positioned at a vertical level higher than the vertical level of the upper surface of the second organic light-emitting layer 250b disposed on the second anode electrode 237.

[0147] The bank 245 can include an inner surface in contact with the side surface of the first anode electrode 235 and an outer surface facing the inner surface. The end of the first organic light-emitting layer 250a can be aligned with the end of the bank 245.

[0148] Refer to Figure 13 , a cathode electrode 255 can be disposed on the first organic light-emitting layer 250a and the second organic light-emitting layer 250b. The cathode electrode 255 can continuously extend along the entire surface of the substrate 201 in a conformal manner with the contour of the combination of the first organic light-emitting layer 250a and the second organic light-emitting layer 250b. Therefore, the cathode electrode 255 can have a concavo-convex shape.

[0149] The cathode electrode 255 can include a semi-transmissive metal material. For example, the cathode electrode 255 can include magnesium (Mg), silver (Ag), or an alloy of magnesium (Mg) and silver (Ag).

[0150] The light-emitting element can be configured to include anode electrodes 235 and 237, an organic light-emitting layer 250, and a cathode electrode 255. When a voltage is applied to the anode electrodes 235 and 237 and the cathode electrode 255 based on a selected signal, the light-emitting element emits light through the light-emitting region under the recombination of holes injected from the anode electrode 235 or 237 and electrons injected from the cathode electrode 255.

[0151] Refer to Figure 14 , a second passivation layer 260 can be formed on the cathode electrode 255. Since the second passivation layer 260 is formed in a conformal manner along the contour of the cathode electrode 255, the second passivation layer 260 can have a concavo-convex shape. The second passivation layer 260 can include an insulating material.

[0152] Refer to Figure 15 , a color filter 270 can be disposed on the second passivation layer 260. The color filter 270 can be disposed in a manner corresponding to the sub-pixels SP-1, SP-2, and SP-3 other than the fourth sub-pixel SP-4 that emits white light, respectively.

[0153] The color filter 270 may include a first color filter 270a, a second color filter 270b, and a third color filter 270c. Each of the first to third color filters 270a, 270b, and 270c may filter white light emitted from the organic light emitting layer 250 for each of the first to third sub-pixels SP-1, SP-2, and SP-3. Accordingly, the white light beam that has passed through the first to third color filters 270a, 270b, and 270c corresponding to the first to third sub-pixels SP-1, SP-2, and SP-3 may be converted into light beams of different colors, and the light beams of different colors may then be emitted to the outside.

[0154] The first color filter 270a using a red pigment may be positioned in a manner corresponding to the first sub-pixel SP-1. The second color filter 270b using a green pigment may be positioned in a manner corresponding to the second sub-pixel SP-2. The third color filter 270c using a blue pigment may be positioned in a manner corresponding to the third sub-pixel SP-3.

[0155] Accordingly, the first color filter 270a may emit red light, the second color filter 270b may emit green light, and the third color filter 270c may emit blue light. In addition, since no color filter corresponding to the fourth sub-pixel SP-4 is provided, the white light emitted from the organic light emitting layer 250 may be emitted to the outside in the fourth sub-pixel SP-4.

[0156] The first color filter 270a and the third color filter 270c may be respectively filled in the second bank hole 245b having a trench shape (see Figure 11 ).

[0157] The first to third color filters 270a, 270b, and 270c may be formed in order according to their colors. For example, the red first color filter 270a may be formed first, then the green second color filter 270b may be formed, and then the blue third color filter 270c may be formed.

[0158] In this regard, when the first to third color filters are formed on a flat surface, there are problems that it is difficult to control the thickness of the color filters to be uniform and the line width of the color filters is reduced. For example, the thickness of the first color filter formed first on the flat surface may be smaller than the thickness of the third color filter formed last on the flat surface. When the color filters have different thicknesses, color mixing may occur between adjacent sub-pixels, and the colors may be viewed in a distorted manner within the viewing angle range. In addition, as the line width of each color filter is reduced, light leakage occurs.

[0159] To solve the above problems, in an embodiment of the present disclosure, even when the first color filter 270a, the second color filter 270b, and the third color filter 270c are formed sequentially, the thicknesses of the color filters can be equal to each other. Specifically, in a state where the first color filter 270a is filled in the trench-shaped bank hole 245b in a previous process, the second color filter 270b and the third color filter 270c are formed sequentially in a subsequent process. Therefore, the thicknesses of the color filters can be equal to each other. In addition, a reduction in the line width of each color filter can be prevented.

[0160] In addition, light leakage can be prevented, in which light Ls emitted from light-emitting elements located in odd-numbered columns and guided toward the viewing angle range is transmitted to sub-pixels of light-emitting elements located in even-numbered columns adjacent to the odd-numbered columns, respectively. For example, the low-reflection metal pattern 230 is provided below the lower anode electrode 233a of the first anode electrode 235 located in the even-numbered column. The upper surface of the second organic light-emitting layer 250b of the light-emitting elements located in the odd-numbered columns can be positioned at a vertical level lower than the vertical level of the upper surface of the first organic light-emitting layer 250a of the light-emitting elements located in the even-numbered columns. In particular, the upper surface of the second organic light-emitting layer 250b of the light-emitting elements located in the odd-numbered columns is provided at a vertical level lower than the vertical level of the low-reflection metal pattern 230 below the light-emitting elements located in the even-numbered columns.

[0161] When a voltage is applied to the electrodes such that light is emitted from the light-emitting elements located in the odd-numbered columns, the light Ls emitted from the light-emitting elements located in the odd-numbered columns and guided toward the viewing angle range can reach the low-reflection metal pattern 230 below each of the light-emitting elements located in the even-numbered columns adjacent to the odd-numbered columns and be reflected therefrom. Therefore, light leakage can be prevented, in which light Ls emitted from the light-emitting elements located in the odd-numbered columns and guided toward the viewing angle range is transmitted to sub-pixels of light-emitting elements located in even-numbered columns adjacent to the odd-numbered columns, respectively.

[0162] In addition, four sub-pixels including a fourth sub-pixel that emits white light can constitute a unit pixel. Therefore, the light extraction efficiency can be improved.

[0163] Figures 16 to 18 is a diagram of a head-mounted device including a display device according to an embodiment of the present disclosure.

[0164] Specifically, Figure 16 is a schematic perspective view of a head-mounted device including a display device according to an embodiment of the present disclosure, and Figure 17 is a top view showing a head-mounted device for realizing virtual reality. Figure 18 is a side view showing a head-mounted device for realizing augmented reality.

[0165] Referring to Figure 16, a head-mounted device including a display device according to an embodiment of the present disclosure may include a housing 30 and a head mounting band 40.

[0166] The housing 30 may accommodate components such as a display device, a lens array, an eyepiece, a sound device, an accelerometer, and a position sensor therein. The head mounting band 40 is fixed to the housing 30. The head mounting band 40 is shown as being formed to surround the upper surface and two opposite side surfaces of the user's head. However, embodiments of the present disclosure are not limited thereto. The head mounting band 40 is used to fix the head-mounted device to the user's head. In another example, the head mounting band 40 may be implemented as a glasses frame or a helmet-shaped structure that completely surrounds the user's head.

[0167] The head-mounted device may include a display device according to an embodiment of the present disclosure as Figure 2 or Figure 4 described, and may provide an image for realizing virtual reality (VR) or an image for realizing augmented reality (AR) to the user.

[0168] Referring to Figure 17 , a head-mounted display device for realizing virtual reality may include a display device 31 for the left eye, a display device 32 for the right eye, a lens array 33, and a left-eye eyepiece 35a and a right-eye eyepiece 35b. The display device 31 for the left eye, the display device 32 for the right eye, the lens array 33, and the left-eye eyepiece 35a and the right-eye eyepiece 35b may be accommodated in the housing 30.

[0169] The display device 31 for the left eye and the display device 32 for the right eye may display the same image. When the display device 31 for the left eye and the display device 32 for the right eye display the same image, the user may view a 2D image through the head-mounted display device. Alternatively, the display device 31 for the left eye may display an image for the left eye, and the display device 32 for the right eye may display an image for the right eye that is different from the image for the left eye. In this case, the user may view a three-dimensional image through the head-mounted display device. Each of the display device 31 for the left eye and the display device 32 for the right eye may include a display device and one of its modifications as described above according to Figure 2 or Figure 4 the present disclosure.

[0170] One of the lens arrays 33 can be spaced apart from each of the left-eye eyepiece 35a and the display device 31 for the left eye, and can be disposed between the left-eye eyepiece 35a and the display device 31 for the left eye. That is, one of the lens arrays 33 can be located in front of the left-eye eyepiece 35a and behind the display device 31 for the left eye. In addition, the other of the lens arrays 33 can be spaced apart from each of the right-eye eyepiece 35b and the display device 32 for the right eye, and can be disposed between the right-eye eyepiece 35b and the display device 32 for the right eye. That is, the other of the lens arrays 33 can be located in front of the right-eye eyepiece 35b and behind the display device 32 for the right eye.

[0171] The lens array 33 can include, but is not limited to, a microlens array. In one example, the lens array 33 can include a pinhole array. Due to the lens array 33, the images displayed by the display device 31 for the left eye or the display device 32 for the right eye can be visible to the user in a magnified manner. The user's left eye LE can be located behind the left-eye eyepiece 35a, and the user's right eye RE can be located behind the right-eye eyepiece 35b.

[0172] Referring to Figure 18 , the head-mounted display device for implementing augmented reality includes a display device 31 for the left eye, a lens array 33, a left-eye eyepiece 35a, a transmissive and reflective portion 36, and a transmissive window 37. For ease of explanation, Figure 18 only the configuration related to the left eye is shown, and the configuration related to the right eye is the same as or similar to the configuration related to the left eye.

[0173] The display device 31 for the left eye, the lens array 33, the left-eye eyepiece 35a, the transmissive and reflective portion 36, and the transmissive window 37 are accommodated in the housing 30 (see Figure 16 ). The display device 31 for the left eye can be disposed on one side of the transmissive and reflective portion 36, for example, on its upper side, such that the display device 31 for the left eye does not block the transmissive window 37. Thus, the display device 31 for the left eye 31 can provide an image to the transmissive and reflective portion 36 without blocking the external background visible through the transmissive window 37.

[0174] The display device 31 for the left eye can include a display device according to Figure 2 or Figure 4 or one of its modifications. The lens array 33 can also be disposed between the left-eye eyepiece 35a and the transmissive and reflective portion 36. The user's left eye can be located behind the left-eye eyepiece 35a.

[0175] The transmissive and reflective portion 36 is disposed between the lens array 33 and the transmissive window 37. The transmissive and reflective portion 36 may include a transmissive and reflective surface 36a that transmits a portion of light therethrough and reflects another portion of light therefrom. The transmissive and reflective surface 36a includes a semi-transmissive metal film. For example, the semi-transmissive metal film may be made of a semi-transmissive metal material such as magnesium (Mg), silver (Ag), or an alloy of magnesium (Mg) and silver (Ag). The transmissive and reflective surface 36a may be formed such that an image displayed by the display device for the left eye 31 can be guided to the lens array 33.

[0176] Accordingly, the user can view both the external background visible through the transmissive window 37 and the image displayed by the display device for the left eye 31. In other words, the user can view both the real background and the virtual image as one image in an overlapping manner. Accordingly, augmented reality can be achieved.

[0177] The display device according to aspects and embodiments of the present disclosure can be described as follows.

[0178] One aspect of the present disclosure provides a display device including: a substrate having a plurality of sub-pixel regions; a plurality of transistors disposed on the substrate; a planarization layer disposed on the plurality of transistors; a plurality of partition patterns disposed on the planarization layer and arranged to be spaced apart from each other; a low-reflection metal pattern disposed on each of the partition patterns; an anode electrode disposed on each of the low-reflection metal pattern and the planarization layer and arranged corresponding to the sub-pixel regions; an organic light-emitting layer disposed on the anode electrode; a cathode electrode disposed on the organic light-emitting layer; and a plurality of color filters disposed on the cathode electrode and respectively arranged corresponding to the plurality of sub-pixel regions, wherein a vertical level of an upper surface of at least one of the plurality of color filters is higher than a vertical level of an upper surface of an adjacent one of the plurality of color filters.

[0179] According to some embodiments of the display device, the plurality of color filters have the same thickness.

[0180] According to some embodiments of the display device, the display device further includes: a first pixel contact electrode extending through the partition pattern to electrically connect to the transistor; a second pixel contact electrode extending through the planarization layer to electrically connect to the transistor, wherein the first pixel contact electrode contacts a lower surface of the low-reflection metal pattern, and the second pixel contact electrode contacts a lower surface of the anode electrode disposed on the planarization layer.

[0181] According to some embodiments of the display device, the plurality of transistors include transistors located in even-numbered columns and transistors located in odd-numbered columns, wherein each of the plurality of partition patterns overlaps with the transistors located in the even-numbered columns in the vertical direction.

[0182] According to some embodiments of the display device, the width of the upper surface of each of the plurality of partition patterns is greater than the width of the lower surface of each of the plurality of partition patterns, wherein the side surface of each of the plurality of partition patterns extends in an inclined manner between the upper surface and the lower surface of each of the plurality of partition patterns.

[0183] According to some embodiments of the display device, the anode electrode includes: a first anode electrode disposed on the low-reflection metal pattern; and a second anode electrode disposed on the planarization layer.

[0184] According to some embodiments of the display device, each of the first anode electrode and the second anode electrode includes a lower anode electrode, an upper anode electrode, and a middle anode electrode disposed between the lower anode electrode and the upper anode electrode, wherein the middle anode electrode has a thickness different from that of each of the lower anode electrode and the upper anode electrode.

[0185] According to some embodiments of the display device, a part of the lower anode electrode of the second anode electrode extends through the planarization layer to be electrically connected to the transistor.

[0186] According to some embodiments of the display device, the upper surfaces of the first anode electrode and the second anode electrode are positioned at different vertical levels, wherein the upper surface of the second anode electrode is positioned at a vertical level lower than that of the upper surface of the first anode electrode.

[0187] According to some embodiments of the display device, the display device further includes a bank that covers two opposite side surfaces of each of the first anode electrode, the second anode electrode, and the partition pattern.

[0188] According to some embodiments of the display device, the bank includes an inner surface and an outer surface facing the inner surface, wherein the inner surface of the bank contacts the side surface of the first anode electrode and the side surface of the partition pattern, and wherein the outer surface of the bank contacts the side surface of the second anode electrode.

[0189] According to some embodiments of the display device, the bank includes: a first bank hole that exposes the upper surface of the first anode electrode; and a second bank hole having a groove shape that takes the upper surface of the second anode electrode as the bottom surface of the groove and the outer surface of the bank hole as the side wall of the groove, wherein the second bank hole is disposed between adjacent first bank holes.

[0190] According to some embodiments of the display device, the organic light-emitting layer includes an organic material for emitting white light.

[0191] According to some embodiments of the display device, the anode electrode includes: a first anode electrode disposed on a low-reflection metal pattern; and a second anode electrode disposed on a planarization layer, wherein the organic light-emitting layer includes: a first organic light-emitting layer disposed on the first anode electrode; and a second organic light-emitting layer disposed on the second anode electrode.

[0192] According to some embodiments of the display device, the first organic light-emitting layer and the second organic light-emitting layer are positioned at different vertical levels and separated from each other.

[0193] According to some embodiments of the display device, the display device further includes a passivation layer disposed between the color filter and the cathode electrode.

[0194] According to some embodiments of the display device, the second bank hole is filled with one of a plurality of color filters.

[0195] Although embodiments of the present disclosure have been described with reference to the accompanying drawings, the present disclosure is not limited to the above embodiments and can be implemented in various different forms. Those skilled in the art can understand that the present disclosure can be practiced in other specific forms without changing the technical spirit or essential features of the present disclosure. Therefore, it should be understood that the embodiments described above are illustrative in all aspects and not restrictive.

Claims

1. A display device, comprising: A substrate having a plurality of sub-pixel regions; a plurality of transistors on the substrate; a planarization layer over the plurality of transistors; a plurality of separation patterns on the planarization layer and spaced apart from each other; a plurality of low-reflective metal patterns respectively on the separation patterns; a plurality of anode electrodes, the plurality of anode electrodes being respectively on the low-reflective metal pattern and the planarization layer and arranged in a manner corresponding to the plurality of sub-pixel regions respectively; an organic light emitting layer on the anode electrode; a cathode electrode on the organic light emitting layer; as well as A plurality of color filters on the cathode electrode, the plurality of color filters respectively corresponding to some of the plurality of sub-pixel regions, The vertical level of the upper surface of at least one color filter among the plurality of color filters is higher than the vertical level of the upper surface of another color filter adjacent to the at least one color filter.

2. The display device according to claim 1, wherein: The plurality of color filters have the same thickness.

3. The display device according to claim 1, wherein: The plurality of transistors include transistors located in even-numbered columns and transistors located in odd-numbered columns, Each of the plurality of separation patterns overlaps the transistors located in the even-numbered columns in the up-down direction.

4. The display device according to claim 3, wherein: The display device further includes: a plurality of first pixel contact electrodes, the plurality of first pixel contact electrodes respectively extending through the plurality of separation patterns to be electrically connected to the transistors located in odd-numbered columns; a plurality of second pixel contact electrodes, each of which extends through the planarization layer to be electrically connected to the transistors located in the even-numbered columns, Wherein, each of the first pixel contact electrodes contacts the lower surface of each low-reflective metal pattern of the multiple low-reflective metal patterns, and each of the second pixel contact electrodes contacts the lower surface of each anode electrode of the anode electrodes arranged on the planarization layer.

5. The display device according to claim 1, wherein: The width of the upper surface of each of the plurality of separation patterns is greater than the width of the lower surface of each of the separation patterns, The side surface of each of the plurality of separation patterns extends between the upper surface and the lower surface of each of the plurality of separation patterns in an inclined manner.

6. The display device according to claim 1, wherein: The plurality of anode electrodes include: a first anode electrode on the low-reflective metal pattern; and A second anode electrode is on the planarization layer.

7. The display device according to claim 6, wherein: Each of the first anode electrode and the second anode electrode includes a lower anode electrode, an upper anode electrode, and a middle anode electrode between the lower anode electrode and the upper anode electrode, wherein the middle anode electrode has a thickness different from a thickness of each of the lower anode electrode and the upper anode electrode.

8. The display device according to claim 7, wherein: A portion of a lower anode electrode of the second anode electrode extends through the planarization layer to be electrically connected to a transistor.

9. The display device according to claim 6, wherein: an upper surface of the first anode electrode and an upper surface of the second anode electrode are located at different vertical levels, Wherein, an upper surface of the second anode electrode is located at a vertical level lower than a vertical level of an upper surface of the first anode electrode.

10. The display device according to claim 6, wherein: The display device further includes a bank covering two opposing side surfaces of each of the first anode electrode, the second anode electrode, and at least one separation pattern of the plurality of separation patterns.

11. The display device according to claim 10, wherein: The bank includes an inner surface and an outer surface facing the inner surface, wherein an inner side surface of the bank contacts a side surface of the first anode electrode and a side surface of at least one of the plurality of separation patterns, The outer surface of the bank contacts the side surface of the second anode electrode.

12. The display device according to claim 11, wherein: The embankment comprises: a first bank hole, the first bank hole exposing an upper surface of the first anode electrode; and a second bank hole, the second bank hole having a groove shape, the groove shape having the upper surface of the second anode electrode as the bottom surface of the groove shape and the outer side surface of the bank as the side wall of the groove shape, Wherein, the second dike hole is between adjacent first dike holes.

13. The display device according to claim 1, wherein: The organic light emitting layer includes an organic material for emitting white light.

14. The display device according to claim 1, wherein: The plurality of anode electrodes include: a first anode electrode on the low-reflective metal pattern; and a second anode electrode on the planarization layer, Wherein, the organic light-emitting layer comprises: a first organic light emitting layer on the first anode electrode; and A second organic light emitting layer is disposed on the second anode electrode.

15. The display device according to claim 14, wherein: The first organic light emitting layer and the second organic light emitting layer are located at different vertical levels and are spaced apart from each other.

16. The display device according to claim 1, wherein: The display device further includes a passivation layer between the plurality of color filters and the cathode electrode.

17. The display device according to claim 12, wherein: The second bank hole is filled with at least one color filter among the plurality of color filters.

18. The display device according to claim 17, wherein: The plurality of color filters include a first color filter, a second color filter, and a third color filter, and the first color filter and the third color filter fill corresponding second bank holes, respectively.

19. The display device according to claim 18, wherein: The first color filter, the second color filter, and the third color filter have the same line width.

20. The display device according to claim 15, wherein: The cathode electrode is formed in a concavo-convex shape in a conformal manner to a combined contour of the first organic light emitting layer and the second organic light emitting layer.

21. The display device according to claim 20, wherein: The separation pattern includes the same organic insulating material as that of the planarization layer.

22. A method for manufacturing a display device, comprising: Providing a substrate, wherein the substrate has a plurality of sub-pixel regions; Disposing a plurality of transistors on the substrate; providing a planarization layer over the plurality of transistors; disposing a plurality of separation patterns on the planarization layer so that the plurality of separation patterns are spaced apart from each other; providing a low-reflective metal pattern on each of the separation patterns; disposing an anode electrode on each of the low-reflective metal pattern and the planarization layer, and arranging the anode electrodes respectively in a manner corresponding to the plurality of sub-pixel regions; Disposing an organic light-emitting layer on the anode electrode; Disposing a cathode electrode on the organic light-emitting layer; as well as A plurality of color filters are disposed on the cathode electrode, and the plurality of color filters are arranged in a manner corresponding to some of the plurality of sub-pixel regions, respectively. The vertical level of the upper surface of at least one color filter among the plurality of color filters is higher than the vertical level of the upper surface of another color filter adjacent to the at least one color filter.

23. A display device, comprising: A substrate having a plurality of sub-pixel regions; a plurality of transistors, wherein the plurality of transistors are disposed on the substrate; a planarization layer, the planarization layer being disposed above the plurality of transistors; a plurality of separation patterns disposed on the planarization layer and arranged to be spaced apart from each other; a plurality of low-reflective metal patterns, wherein the low-reflective metal patterns are respectively arranged on the plurality of separation patterns; a plurality of anode electrodes, the plurality of anode electrodes being arranged in a manner corresponding to the plurality of sub-pixel regions, respectively, and being disposed on the low-reflective metal pattern and the planarization layer, respectively; an organic light-emitting layer, wherein the organic light-emitting layer is disposed on the plurality of anode electrodes; as well as a cathode electrode, the cathode electrode being disposed on the organic light-emitting layer; The upper surface of at least one anode electrode among the plurality of anode electrodes and the upper surface of another anode electrode adjacent to the at least one anode electrode are located at different vertical levels.

24. The display device according to claim 23, wherein: The plurality of anode electrodes include: a first anode electrode disposed on the low-reflective metal pattern; and A second anode electrode disposed on the planarization layer, Wherein, an upper surface of the first anode electrode and an upper surface of the second anode electrode are located at different vertical levels.

25. The display device according to claim 24, wherein: An upper surface of the second anode electrode is located at a vertical level lower than a vertical level of an upper surface of the first anode electrode.

26. The display device according to any one of claims 23 to 25, wherein: Red, green, blue and white light beams are respectively emitted from the multiple sub-pixel areas, and corresponding color filters are arranged in the sub-pixel areas from which the red, green and blue light beams are emitted, and the vertical level of the upper surface of one of the color filters is higher than the vertical level of the upper surface of the color filter adjacent to it.

27. The display device according to claim 26, wherein: The plurality of color filters have the same thickness.

28. A head mounted device comprising: A housing in which the display device, the lens array, and the left-eye and right-eye eyepieces according to any one of claims 1 to 21 and 23 to 27 are accommodated.

29. The head mounted device of claim 28, further comprising a transmissive and reflective portion and a transmissive window housed in the housing, wherein: The display device is disposed on an upper side of the transmission and reflection part, and the lens array is disposed between one of the eyepieces and the transmission and reflection part.

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