Display substrate, preparation method thereof and display device

Abstract

The invention provides a display substrate. The display substrate comprises a substrate body; the driving circuit layer is located on one side of the substrate, the driving circuit layer comprises a first via hole and a first connecting part, and at least one part of the first connecting part is located in the first via hole; the conductive reflecting layer is located on the side, away from the substrate, of the driving circuit layer, the conductive reflecting layer is electrically connected with the driving circuit layer through a first connecting part, the conductive reflecting layer comprises a first conductive part and a second conductive part, and the conductivity of the material of the first conductive part is lower than that of the material of the second conductive part; the first conductive part and the second conductive part are adjacently arranged in the first direction, the second conductive part comprises two side walls which are oppositely arranged in the first direction, and the first conductive part at least wraps the two side walls of the second conductive part; the orthographic projection of the first connecting part on the substrate is located in the orthographic projection of the conductive reflecting layer on the substrate, the first connecting part comprises an exposed surface exposed outside the first via hole, and at least one part of the exposed surface and the first conductive part are arranged at an interval.

Description

Technical Field

[0001] The present disclosure relates to the field of display technologies, and in particular, to a display substrate, a preparation method thereof, and a display device. Background Art

[0002] Silicon-based organic light-emitting diodes (OLEDs for short) are miniature displays developed in recent years. With mature silicon-based semiconductor manufacturing processes, OLED displays with high PPI (pixel density) and high refresh rates can be fabricated and applied in the fields of VR (Virtual Reality) and AR (Augmented Reality). In related technologies, the reflective layer metal is coated with a layer of protective metal, and at the same time, the protective metal covers the tungsten vias in the driving circuit layer. The impedance of the protective metal is relatively high, resulting in poor conductivity from the tungsten vias to the anode and affecting the display effect of the display substrate.

[0003] The above information disclosed in this section is only used to understand the background of the inventive concept of the present disclosure. Therefore, the above information may include information that does not constitute prior art. Summary of the Invention

[0004] To solve at least one aspect of the above problems, embodiments of the present disclosure provide a display substrate, a preparation method thereof, and a display device.

[0005] One aspect of the embodiments of the present disclosure provides a display substrate, including:

[0006] A substrate;

[0007] A driving circuit layer located on one side of the substrate, the driving circuit layer including a first via and a first connection portion, at least a part of the first connection portion being located in the first via; and

[0008] A conductive reflective layer located on the side of the driving circuit layer away from the substrate, the conductive reflective layer being electrically connected to the driving circuit layer through the first connection portion,

[0009] wherein the conductive reflective layer includes a first conductive portion and a second conductive portion, the conductivity of the material of the first conductive portion is lower than that of the material of the second conductive portion, the first conductive portion and the second conductive portion are adjacent to each other along a first direction, the second conductive portion includes two sidewalls oppositely arranged in the first direction, and the first conductive portion at least covers the two sidewalls of the second conductive portion; and

[0010] The orthographic projection of the first connection portion on the substrate substrate is located within the orthographic projection of the conductive reflective layer on the substrate substrate. The first connection portion includes an exposed surface exposed outside the first via hole, and at least a part of the exposed surface is spaced apart from the first conductive portion.

[0011] According to some exemplary embodiments, at least a part of the exposed surface is in contact with the second conductive portion.

[0012] According to some exemplary embodiments, the first conductive portion includes a first sub-conductive portion and a second sub-conductive portion. The first sub-conductive portion covers the side wall of the second conductive portion, and the second sub-conductive portion extends from the first sub-conductive portion toward the second conductive portion in a first direction.

[0013] According to some exemplary embodiments, the exposed surface includes a first sub-surface, which is the surface of the first connection portion away from the substrate substrate. The first sub-surface is parallel to the first direction, and each of the first sub-conductive portion and the second sub-conductive portion is spaced apart from the first sub-surface.

[0014] According to some exemplary embodiments, the first sub-surface is covered by the second conductive portion.

[0015] According to some exemplary embodiments, the first connection portion includes a first connection sub-portion and a second connection sub-portion. The first connection sub-portion protrudes from the first via hole, and the second connection sub-portion is located in the first via hole;

[0016] The exposed surface further includes a second sub-surface, which is the side surface of the first connection sub-portion. The second sub-surface is adjacent to the first sub-surface; and

[0017] At least a part of the second sub-surface is spaced apart from the first conductive portion.

[0018] According to some exemplary embodiments, at least a part of the first sub-surface is covered by the first conductive portion; at least a part of the second sub-surface is covered by the second conductive portion.

[0019] According to some exemplary embodiments, the cross-section of the first connection sub-portion in the light-emitting direction of the display substrate is an inverted trapezoid.

[0020] According to some exemplary embodiments, the display substrate further includes:

[0021] An interlayer insulating layer, located on the side of the driving circuit layer away from the substrate substrate. The interlayer insulating layer includes a groove, and the first conductive portion and the second conductive portion are located in the groove.

[0022] According to some exemplary embodiments, the interlayer insulating layer includes a first insulating portion and a second insulating portion, and the second insulating portion is located on a side of the first insulating portion away from the substrate;

[0023] A positive projection of the second insulating portion on the substrate does not overlap with a positive projection of the conductive reflective layer on the substrate;

[0024] The first insulating portion includes a second via hole, and the first connecting portion extends through the second via hole to be electrically connected to the conductive reflective layer.

[0025] According to some exemplary embodiments, the display substrate further includes a plurality of pixels, the plurality of pixels are arranged in an array along a first direction and a second direction, and the plurality of pixels include a first pixel, a second pixel, and a third pixel;

[0026] The conductive reflective layers of the first pixel, the second pixel, and the third pixel are alternately arranged along at least one of the first direction and the second direction, and an interlayer insulating layer is disposed between two adjacent conductive reflective layers.

[0027] According to some exemplary embodiments, the thicknesses of the second conductive portions in the first pixel, the second pixel, and the third pixel are equal to each other.

[0028] According to some exemplary embodiments, the display substrate further includes: an isolation layer, located on a side of the conductive reflective layer away from the substrate;

[0029] The isolation layer includes a first isolation portion, a second isolation portion, and a third isolation portion, the first isolation portion is located in the first pixel, the second isolation portion is located in the second pixel, and the third isolation portion is located in the third pixel;

[0030] The thickness of the first isolation portion is greater than the thickness of the second isolation portion, and the thickness of the second isolation portion is greater than the thickness of the third isolation portion.

[0031] According to some exemplary embodiments, the display substrate further includes: a first electrode layer, located on a side of the isolation layer away from the substrate;

[0032] The first electrode layer includes a first sub-electrode, a second sub-electrode, and a third sub-electrode, the first sub-electrode is located in the first pixel, the second sub-electrode is located in the second pixel, and the third sub-electrode is located in the third pixel;

[0033] The isolation layer includes a third via hole, and the first sub-electrode, the second sub-electrode, and the third sub-electrode are respectively electrically connected to the second conductive portion through the third via hole.

[0034] According to some exemplary embodiments, a protective film is disposed in the third via hole, and the protective film covers at least a part of the first sub-electrode, the second sub-electrode, and the third sub-electrode located in the third via hole.

[0035] According to some exemplary embodiments, the display substrate further includes: a light-emitting functional layer on a side of the first electrode layer away from the substrate; a color filter layer on a side of the light-emitting functional layer away from the substrate;

[0036] The color filter layer includes a first light-filtering portion, a second light-filtering portion, and a third light-filtering portion. The first light-filtering portion is located in the first pixel, the second light-filtering portion is located in the second pixel, and the third light-filtering portion is located in the third pixel;

[0037] The first light-filtering portion is configured to allow light of a first wavelength to pass through, the second light-filtering portion is configured to allow light of a second wavelength to pass through, and the third light-filtering portion is configured to allow light of a third wavelength to pass through; the first wavelength is greater than the second wavelength, and the second wavelength is greater than the third wavelength.

[0038] According to some exemplary embodiments, the material of the first conductive portion includes one of Ti and Ta, and the material of the second conductive portion includes one of Al, Ag, and Mg;

[0039] The material of the first connection portion includes W.

[0040] In another aspect of the embodiments of the present disclosure, a display device is provided, and the display device includes the display substrate according to any one of the above.

[0041] In another aspect of the embodiments of the present disclosure, a method for manufacturing a display substrate is provided, and the manufacturing method includes the following steps:

[0042] Form a driving circuit layer on the substrate, the driving circuit layer includes a first via hole and a first connection portion, and at least a part of the first connection portion is located in the first via hole;

[0043] Form a conductive reflective layer on a side of the driving circuit layer away from the substrate, and the conductive reflective layer is electrically connected to the driving circuit layer through the first connection portion;

[0044] Wherein, the conductive reflective layer includes a first conductive portion and a second conductive portion. The conductivity of the material of the first conductive portion is lower than that of the material of the second conductive portion. The first conductive portion and the second conductive portion are arranged adjacent to each other in a first direction. The second conductive portion includes two sidewalls oppositely arranged in the first direction. The first conductive portion at least covers the two sidewalls of the second conductive portion; and the orthographic projection of the first connection portion on the substrate is located within the orthographic projection of the conductive reflective layer on the substrate. The first connection portion includes an exposed surface exposed outside the first via hole, and at least a part of the exposed surface is spaced apart from the first conductive portion. Description of the Drawings

[0045] Other objects and advantages of the present disclosure will be apparent from the following description made with reference to the accompanying drawings, and can help to have a comprehensive understanding of the present disclosure.

[0046] Figure 1 Schematically shows a cross-sectional view of a display substrate in the related art;

[0047] Figure 2A Schematically shows a schematic plan view of a display substrate according to some exemplary embodiments of the present disclosure;

[0048] Figure 2B Schematically shows a cross-sectional view of a display substrate according to some exemplary embodiments of the present disclosure;

[0049] Figure 2C Schematically shows a partial cross-sectional view of a display substrate according to some exemplary embodiments of the present disclosure;

[0050] Figure 2D Schematically shows a partial cross-sectional view of a display substrate according to some exemplary embodiments of the present disclosure;

[0051] Figure 3A Schematically shows a schematic diagram of the driving circuit principle of a display substrate according to some exemplary embodiments of the present disclosure;

[0052] Figure 3B Schematically shows a partial circuit schematic diagram of a display substrate according to some exemplary embodiments of the present disclosure;

[0053] Figure 4A Schematically shows a cross-sectional view of a display substrate according to some other exemplary embodiments of the present disclosure;

[0054] Figure 4B Schematically shows a partial cross-sectional view of a display substrate according to some other exemplary embodiments of the present disclosure;

[0055] Figure 4CSchematically shown is a partial cross-sectional view of a display substrate according to some other exemplary embodiments of the present disclosure;

[0056] Figure 4D Schematically shown is a partial cross-sectional view of a display substrate according to some other exemplary embodiments of the present disclosure;

[0057] Figures 5A - 5C Schematically shown is a cross-sectional view of the relative positions of a first electrode layer and a conductive reflective layer according to some exemplary embodiments of the present disclosure;

[0058] Figure 6 Schematically shown is a structural schematic diagram of a display device according to an embodiment of the present disclosure;

[0059] Figure 7 Schematically shown is a flowchart of a method for manufacturing a display substrate according to an embodiment of the present disclosure.

[0060] It should be noted that, for clarity, in the drawings used to describe the embodiments of the present disclosure, the dimensions of layers, structures, or regions may be enlarged or reduced, that is, these drawings are not drawn to actual scale. Detailed Description of Specific Embodiments

[0061] The technical solutions of the present disclosure will be further specifically described below through embodiments in conjunction with the drawings. In the specification, the same or similar reference numerals indicate the same or similar components. The following description of the embodiments of the present disclosure with reference to the drawings is intended to explain the overall inventive concept of the present disclosure and should not be construed as a limitation of the present disclosure.

[0062] In addition, in the following detailed description, for the sake of explanation, many specific details are set forth to provide a comprehensive understanding of the embodiments of the present disclosure. However, it is obvious that one or more embodiments may be implemented without these specific details.

[0063] It should be understood that although the terms first, second, etc. may be used herein to describe different elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of the exemplary embodiments, the first element may be named the second element, and similarly, the second element may be named the first element. As used herein, the term "and / or" includes any combination and all combinations of one or more of the associated listed items.

[0064] It should be understood that when an element or layer is referred to as being "formed on" another element or layer, the element or layer can be formed directly or indirectly on the other element or layer. That is, for example, there can be intermediate elements or intermediate layers. In contrast, when an element or layer is referred to as being "directly formed on" another element or layer, there are no intermediate elements or intermediate layers. Other words used to describe the relationship between elements or layers (such as "between" and "directly between", "adjacent" and "directly adjacent", etc.) should be interpreted in a similar manner. In addition, the X-axis, Y-axis, and Z-axis are not limited to the three axes of a rectangular coordinate system and can be interpreted in a broader sense. For example, the X-axis, Y-axis, and Z-axis can be perpendicular to each other, or can represent different directions that are not perpendicular to each other. For the purposes of the present disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" can be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z such as XYZ, XY, XZ, and YZ.

[0065] The terms used herein are for the purpose of describing particular embodiments only and are not intended to limit the exemplary embodiments. As used herein, unless the context clearly dictates otherwise, the singular forms are also intended to include the plural forms. It will also be understood that when the terms "comprises" and / or "comprising" are used herein, it indicates the presence of the stated features, integers, steps, operations, elements, and / or components, but does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or combinations thereof.

[0066] As used herein, unless otherwise clearly defined and limited, the term "connected" should be understood in a broad sense. For example, "connected" can be a fixed connection, a detachable connection, or an integral one; it can be directly connected or indirectly connected through an intermediate medium.

[0067] It should be noted that in this article, "the same layer" refers to a layer structure formed by using the same film-forming process to form a film layer for forming a specific pattern, and then patterning the film layer by using the same mask through a single patterning process. Depending on the different specific patterns, the single patterning process may include multiple exposure, development, or etching processes, and the specific patterns in the formed layer structure can be continuous or discontinuous. That is, multiple elements, components, structures, and / or parts located in "the same layer" are composed of the same or different materials and are formed through the same patterning process. Generally, multiple elements, components, structures, and / or parts located in "the same layer" have substantially the same thickness.

[0068] Those skilled in the art should understand that, in this text, unless otherwise specified, the term "height" or "thickness" refers to the dimension along the surface of each film layer disposed perpendicular to the display substrate, that is, the dimension along the light-emitting direction of the display substrate, or the dimension along the normal direction of the display device.

[0069] In this text, the term "transistor" can be a triode, a thin-film transistor, a field-effect transistor, or other devices with the same characteristics. In the embodiments of the present disclosure, to distinguish the two poles of the transistor other than the control pole, one of the poles is referred to as the first pole and the other pole is referred to as the second pole. In actual operation, when the transistor is a thin-film transistor or a field-effect transistor, the first pole can be the drain and the second pole can be the source; or, the first pole can be the source and the second pole can be the drain.

[0070] Figure 1 A cross-sectional view of a display substrate in the related art is schematically shown.

[0071] Referring to Figure 1 , the display substrate 100 includes a driving circuit layer 012, a reflective metal layer 015, an insulating layer 016, an anode 017, a light-emitting layer 018, and a cathode 019. Among them, the bottom surface and side walls of the reflective metal layer 015 are covered by a protective metal portion 014 to ensure that the reflective metal layer 015 is not affected by subsequent process corrosion. At the same time, the protective metal portion 014 covers the tungsten hole 013 connecting the driving circuit layer 012 and the reflective metal layer 015. Due to the relatively high impedance of the protective metal portion 014, the conductivity from the tungsten hole 013 to the anode 017 becomes poor, affecting the display effects such as the brightness of the display substrate.

[0072] To solve at least one aspect of the above problems, embodiments of the present disclosure provide a display substrate, a manufacturing method thereof, and a display device.

[0073] Figure 2A A schematic plan view of a display substrate according to some exemplary embodiments of the present disclosure is schematically shown. Figure 2B A cross-sectional view of a display substrate according to some exemplary embodiments of the present disclosure is schematically shown. For example, Figure 2B it can be a cross-sectional view of the display substrate taken along the Figure 2A line AA' in Figure 2C A partial cross-sectional view of a display substrate according to some exemplary embodiments of the present disclosure is schematically shown. Figure 2D A partial cross-sectional view of a display substrate according to some exemplary embodiments of the present disclosure is schematically shown.

[0074] Exemplarily, in some embodiments of the present disclosure, referring to Figure 2A, the display substrate 200 includes a display area AA and a plurality of pixel units PX located within the display area AA. Each pixel unit PX includes a plurality of pixels SP, and the plurality of pixels SP are arranged in an array along a first direction X and a second direction Y. For example, the plurality of pixels include a first pixel SP1, a second pixel SP2, and a third pixel SP3 that are adjacent to each other in the first direction X. The display substrate 200 further includes a pixel defining layer 16, and the pixel defining layer 16 has a plurality of pixel openings 201, and the plurality of pixel openings 201 define the plurality of pixels SP. The pixel opening can be an opening area including a light emitting area.

[0075] Exemplarily, in some embodiments of the present disclosure, with reference to Figure 2A and Figure 2B , the display substrate 200 includes a substrate 11 and a first electrode layer 15 disposed on the substrate 11. The substrate 11 is, for example, a silicon-based substrate. The manufacturing process of the silicon-based substrate is mature, and its performance is stable, which is suitable for manufacturing highly integrated micro display devices. For example, the display device is a silicon-based micro organic light emitting diode display device. The first electrode layer 15 includes a plurality of first electrodes 151, and the plurality of first electrodes 151 are arranged in an array in the first direction X and the second direction Y. The orthographic projections of the plurality of pixel openings 201 on the substrate 11 respectively fall within the orthographic projections of the plurality of first electrodes 151 on the substrate 11. That is to say, the plurality of first electrodes 151 correspond to the positions of the plurality of pixels SP one by one, and the area of the first electrode is larger than the light emitting area of the pixel.

[0076] In some embodiments of the present disclosure, with reference to Figure 2B and Figure 2C , the display substrate 200 includes a driving circuit layer 12, and the driving circuit layer 12 is located on the substrate 11. Among them, the driving circuit layer 12 includes a driving circuit, and the driving circuit includes a voltage control circuit and a pixel circuit.

[0077] Figure 3A Schematically shows a schematic diagram of the driving circuit principle of a display substrate according to some exemplary embodiments of the present disclosure. Figure 3B Schematically shows a schematic diagram of a partial circuit of a display substrate according to some exemplary embodiments of the present disclosure.

[0078] For example, as Figure 3A shown, in the display area AA, each pixel SP includes a light emitting element L and a pixel circuit 122 coupled to the light emitting element L. As Figure 3BAs shown, each pixel circuit 122 includes a driving transistor T1. The light-emitting element L includes, for example, an OLED. Thus, the positive electrode of the OLED is electrically connected to the second terminal D of the driving transistor T1, and the negative electrode of the OLED is electrically connected to the second power supply terminal VSS. The voltage of the second power supply terminal VSS is generally a negative voltage or a ground voltage VGND (e.g., 0V). The driving transistor T1 can be an N-type transistor. When current flows from its first terminal S to the second terminal D, the first terminal S can be regarded as its source electrode, and the second terminal D as its drain electrode. When current flows from its second terminal D to the first terminal S, the second terminal D can be regarded as its source electrode, and the first terminal S as its drain electrode.

[0079] In some embodiments of the present disclosure, the peripheral area of the display device further includes a voltage control circuit. For example, as Figure 3A and Figure 3B shown, the display device may further include: a plurality of voltage control circuits 121 located in the peripheral area of the display substrate 200, and the first pole of the driving transistor T1 in the pixel circuit 122 is coupled to the shared voltage control circuit 121. The voltage control circuit is configured to output an initialization signal Vinit to the first pole of the driving transistor T1 in response to a reset control signal RE to control the corresponding light-emitting element L to be reset; and output a first power signal VDD to the first pole of the driving transistor in response to a light-emitting control signal EM to drive the light-emitting element L to emit light.

[0080] For example, as Figure 2B and Figure 2C shown, the driving transistor T1 in each pixel includes a source electrode S, a drain electrode D, and a semiconductor layer (the part between the source electrode S and the drain electrode D), and one of the source electrode S and the drain electrode D is electrically connected to the conductive reflective layer 14. The semiconductor layer is located in the substrate 11, and the semiconductor layer is, for example, a channel region formed between the source electrode S and the drain electrode D. For example, as Figure 2B shown, the driving transistor T1 includes a gate G, a source electrode S, and a drain electrode D. The three electrodes respectively correspond to three electrode connection portions. For example, the gate G is electrically connected to the gate connection portion 102g, the source electrode S is electrically connected to the source connection portion 102s, and the drain electrode D is electrically connected to the drain connection portion 102d. The drain electrode D of the driving transistor T1 is electrically connected to the conductive reflective layer 14 through the drain connection portion 102d. When the driving transistor T1 is in an on state, the electrical signal VDD provided by the power supply line can be transmitted to the first electrode layer 15 through the drain electrode D of the driving transistor T1, the drain connection portion 102d, and the conductive reflective layer 14. Since a voltage difference is formed between the second electrode layer 18 and the first electrode layer 15, an electric field is formed therebetween, and the organic light-emitting functional layer 17 emits light under the action of this electric field.

[0081] In at least some embodiments, each pixel further includes a storage capacitor located on the substrate. For example, as Figure 3BAs shown, each pixel SP further includes a storage capacitor Cst located on the substrate 11, configured to store data signals. The first end of the storage capacitor Cst is coupled to the gate G of the driving transistor T1, and the second end of the storage capacitor Cst is coupled to the ground terminal GND. In this way, the gate G of the driving transistor T1 can store data signals of high gray level or low gray level through the storage capacitor Cst.

[0082] In some embodiments of the present disclosure, referring back to Figures 2C - 2D , the display substrate 200 includes a first via VH1 and a first connection portion 13, at least a part of the first connection portion 13 is located in the first via VH1; and a conductive reflective layer 14, located on the side of the driving circuit layer 12 away from the substrate. The conductive reflective layer 14 is electrically connected to the driving circuit layer 12 through the first connection portion 13. The conductive reflective layer 14 includes a first conductive portion 141 and a second conductive portion 142, and the conductivity of the material of the first conductive portion 141 is lower than that of the material of the second conductive portion 142. The first conductive portion 141 and the second conductive portion 142 are arranged adjacent to each other along the first direction X. The second conductive portion 142 includes two sidewalls 1421 and 1422 oppositely arranged in the first direction, and the first conductive portion 141 at least covers the two sidewalls 1421 and 1422 of the second conductive portion 142. The orthographic projection of the first connection portion 13 on the substrate 11 is located within the orthographic projection of the conductive reflective layer 14 on the substrate 11. The first connection portion 13 includes exposed surfaces 1311 and 1312 exposed outside the first via VH1, and at least a part of the exposed surfaces 1311 and 1312 is spaced apart from the first conductive portion 141. It should be noted that the spaced arrangement here includes being spaced apart in the first direction X or the third direction Z.

[0083] Exemplarily, as Figure 2C shown, at least a part of the first connection portion 13 is located in the first via VH1. The first connection portion 13 is made of a metal material, such as tungsten metal. The via filled with tungsten metal is also called a tungsten via (W-via). The manufacturing process of the tungsten via is mature, and forming the tungsten via can ensure the stability of the conductive path, which is beneficial to reducing the contact resistance between the conductive reflective layer 14 and the driving circuit layer 12. It can be understood that the tungsten via is not only applicable to the electrical connection between the conductive reflective layer 14 and the driving circuit layer 12, but also applicable to the electrical connection between the conductive reflective layer 14 and the first electrode layer 15, as well as the electrical connection between other wiring layers.

[0084] Exemplarily, as Figures 2C - 2DAs shown, the conductive reflective layer 14 includes a first conductive portion 141 and a second conductive portion 142. The material of the first conductive portion 141 is usually one of Ti and Ta metals, and the material of the second conductive portion 142 is usually one of Al, Ag, and Mg metals. Since the second conductive portion 142 has a small resistance and a high reflectivity, it is beneficial to improve the light output brightness and light output efficiency of the display substrate. For example, the thickness of the first conductive portion 141 is The thickness of the second conductive portion 142 is If the thickness of the conductive reflective layer 14 is too low, the reflection effect is not obvious. If the thickness is too high, the overall thickness of the display substrate will be relatively large. The first conductive portion 141 is used to protect the second conductive portion 142 to avoid the second conductive portion 142 being affected by subsequent process corrosion. For example, the first conductive portion 141 is deposited by a damascene process. Since the impedance of the first conductive portion 141 is relatively large, if the entire bottom surface of the second conductive portion 142 is covered, the exposed surfaces 1311 and 1312 of the first connection portion 13 will be covered at the same time, resulting in a poor conductivity from the first connection portion 13 to the first electrode 151. In the embodiments of the present disclosure, the exposed surfaces 1311 and 1312 of the first connection portion 13 and a part of the material of the first conductive portion 141 nearby are removed or patterned, or only the metal materials on both sides and their protruding portions are retained, which is beneficial to reducing the impedance and improving the conductivity from the first connection portion 13 to the first electrode 151, so as to enhance the brightness of the display substrate 200, while ensuring that the side walls 1421 and 1422 of the second conductive portion are covered and protected.

[0085] After removing a part of the material of the first conductive portion 141, the second conductive portion 142 is deposited in the groove of the interlayer insulating layer GI1. The second conductive portion 142 covers the exposed surfaces 1311 and 1312 of the first connection portion 13. The first connection portion 13 only forms an electrical connection with the second conductive portion 142 and does not contact the first conductive portion 141, improving the conductivity from the tungsten via to the first electrode 151.

[0086] In some embodiments of the present disclosure, the first conductive portion 141 includes a first sub-conductive portion 1411 and a second sub-conductive portion 1412. The first sub-conductive portion 1411 covers the side walls of the second conductive portion 142, and the second sub-conductive portion 1412 extends from the first sub-conductive portion 1411 along the first direction X towards the second conductive portion 142.

[0087] The first sub-conductive portion 1411 is the part of the first conductive portion 141 perpendicular to the surface of the substrate 11 facing the driving circuit layer 12, and the second sub-conductive portion 1412 is the part of the first conductive portion 141 parallel to the surface of the substrate 11 facing the driving circuit layer 12. The first sub-conductive portion 1411 covers the side walls 1421 and 1422 of the second conductive portion 142, and the second sub-conductive portion 1412 covers a part of the surface of the second conductive portion 142 close to the substrate 11.

[0088] In some embodiments of the present disclosure, the exposed surface includes a first sub-surface 1311, which is the surface of the first connection portion 13 away from the substrate 11. The first sub-surface 1311 is parallel to the first direction X, and each of the first sub-conductive portion 1411 and the second sub-conductive portion 1412 is spaced apart from the first sub-surface 1311 in the first direction X. The first sub-surface 1311 is covered by the second conductive portion 142.

[0089] Continuing to refer to Figures 2C - 2D , the first sub-surface 1311 is located between two first conductive portions 141 in a pixel. The first sub-surface 1311 is perpendicular to the main body of the first sub-conductive portion 1411, the first sub-surface 1311 is parallel to the main body of the second sub-conductive portion 1412, and the first sub-surface 1311 and the second sub-conductive portion 1412 are arranged at intervals.

[0090] The first connection portion 13 includes a first connection sub-portion 131 and a second connection sub-portion 132. The first connection sub-portion 131 protrudes from the first via VH1, and the second connection sub-portion 132 is located in the first via VH1. The exposed surface further includes a second sub-surface 1312, which is the side surface of the first connection sub-portion 131, and the second sub-surface 1312 is adjacent to the first sub-surface 1311. The first sub-surface 1311 is electrically connected to the second conductive portion 142, and the second sub-surface 1312 is also electrically connected to the second conductive portion 142.

[0091] Figure 4A Schematically shows a cross-sectional view of a display substrate according to some other exemplary embodiments of the present disclosure. For example, Figure 4A it may be a cross-sectional view of the display substrate taken along the line AA’ in Figure 2A . Figure 4B Schematically shows a partial cross-sectional view of a display substrate according to some other exemplary embodiments of the present disclosure; Figure 4C Schematically shows a partial cross-sectional view of a display substrate according to some other exemplary embodiments of the present disclosure. Figures 4A - 4C Some structures of the shown display substrate can be referred to the description above for Figures 2A - 2D , and moreover, the same or similar components or structures are denoted by the same reference numerals.

[0092] In some embodiments of the present disclosure, at least a part of the second sub-surface 1312 is spaced apart from the first conductive portion 141. At least a part of the first sub-surface 1311 is covered by the first conductive portion 141; at least a part of the second sub-surface 1312 is covered by the second conductive portion 142.

[0093] Referring to Figures 4A - 4C , Figure 4A and Figure 2AThe main difference lies in Figure 4A in which the first conductive part 141 is in partial contact with the first connection part 13, and the second sub-surface 1312 is spaced from the first conductive part 141 in the third direction Z. The preparation process of this structure is simple, reducing the coverage of the first conductive part 141 on the first connection part 13. And Figure 2A in which the first conductive part 141 is not in contact with the first connection part 13, and the first sub-surface 1311 is spaced from the first conductive part 141 in the first direction X. This structure further reduces the coverage range of the first conductive part 141 on the first connection part 13, further reducing the contact resistance between the conductive reflective layer 14 and the driving circuit layer 12.

[0094] Specifically, referring to Figures 4A - 4C , the first conductive part 141 includes a first sub-conductive part 1411, a second sub-conductive part 1412 and a third sub-conductive part 1413. The first sub-conductive part 1411 is the part of the first conductive part 141 perpendicular to the substrate 11 facing the surface of the driving circuit layer 12. The second sub-conductive part 1412 and the third sub-conductive part 1413 are the parts of the first conductive part 141 parallel to the substrate 11 facing the surface of the driving circuit layer 12. The first conductive part 141 is formed by a deposition process. Since the cross-section of the first connection sub-part 131 in the light-emitting direction of the display substrate 11 is an inverted trapezoid, when the material of the first conductive part 141 is deposited on the first connection sub-part 131, due to the inward inclination of the side wall 1312 of the first connection sub-part 131, the material of the first conductive part 141 cannot be completely deposited on the side wall 1312 of the first connection sub-part 131, so it is disconnected at the side wall 1312 of the first connection sub-part 131, forming the second sub-conductive part 1412 covering the surface of the second conductive part 142 close to the substrate 11 and the third sub-conductive part 1413 covering the first sub-surface 1311. Therefore, the side wall 1312 of the first connection sub-part 131 is not covered by the first conductive part 141, thus reducing the contact area with the first conductive part 141, which is beneficial to improving the conductivity from the first connection part 13 to the first electrode 151 and further enhancing the brightness of the display substrate.

[0095] The first sub-surface 1311 of the first connection sub-part 131 is covered by the third sub-conductive part 1413, at least a part of the second sub-surface 1312 of the first connection sub-part 131 is not covered by the first conductive part 141, and the part of the second sub-surface 1312 not covered by the first conductive part 141 is covered by the second conductive part 142. The first connection sub-part 131 is electrically connected to both the first conductive part 141 and the second conductive part 142. This structure saves the etching step, and by means of the structure of the first connection sub-part 131, the contact area between the first connection sub-part 131 and the first conductive part 141 can be reduced, simplifying the process flow.

[0096] In some embodiments of the present disclosure, the display substrate 200 or 300 further includes: an interlayer insulating layer GI1, located on the side of the driving circuit layer 12 away from the substrate 11, the interlayer insulating layer GI1 includes a groove GI13, and the first conductive portion 141 and the second conductive portion 142 are located in the groove GI13. The interlayer insulating layer GI1 includes a first insulating portion GI11 and a second insulating portion GI12, and the second insulating portion GI12 is located on the side of the first insulating portion GI11 away from the substrate 11; the orthographic projection of the second insulating portion GI12 on the substrate 11 does not overlap with the orthographic projection of the conductive reflective layer 14 on the substrate 11; the first insulating portion GI11 includes a second via VH2, and the first connection portion 13 extends through the second via VH2 to be electrically connected to the conductive reflective layer 14.

[0097] Exemplarily, referring to Figures 2B - 2C , Figures 4A - 4B , the interlayer insulating layer GI1 is used to isolate the driving circuit layer 12 and the conductive reflective layer 14. During the process of etching to form the groove GI13, the first insulating portion GI11 serves as an etching stop layer to control the depth of the groove GI13, and at the same time, the first insulating portion GI11 is also used to provide a conductive path for electrically connecting the driving circuit layer 12 and the conductive reflective layer 14. For example, the first insulating portion GI11 may include a second via VH2 filled with metal, and the conductive reflective layer 14 is electrically connected to the driving circuit layer 12 through the second via VH2. In this way, by forming a conductive channel between the conductive reflective layer 14 and the driving circuit layer 12 in the first insulating portion GI11, it is beneficial to transmit the signal provided by the pixel circuit in the display substrate to the first electrode layer 15 through the conductive reflective layer 14. In this way, not only is it beneficial to realize the control of the light-emitting element by the pixel circuit, but also the structure of the display substrate is more compact, which is beneficial to the miniaturization of the device.

[0098] In some embodiments of the present disclosure, the conductive reflective layers 14 of the first pixel SP1, the second pixel SP2, and the third pixel SP3 are alternately arranged along at least one of the first direction X and the second direction Y, and an interlayer insulating layer GI1 is provided between two adjacent conductive reflective layers 14.

[0099] Exemplarily, referring to Figures 2A - 2C , Figures 4A - 4B , the first reflective portion R is located in the first pixel SP1, the second reflective portion G is located in the second pixel SP2, the third reflective portion B is located in the third pixel SP3, and adjacent reflective portions are separated by the interlayer insulating layer GI1. By providing a separate reflective portion in each pixel, color mixing can be effectively avoided and the display effect can be improved.

[0100] In some embodiments of the present disclosure, the thicknesses of the second conductive portions 142 in the first pixel SP1, the second pixel SP2, and the third pixel SP3 are equal to each other.

[0101] Exemplarily, referring to Figures 2B - 2C and Figures 4A - 4B , the thicknesses of the first reflective portion R, the second reflective portion G, and the third reflective portion B are equal to each other. After depositing the second conductive portion 142, an overall flat upper surface is obtained through a planarization process, which is conducive to achieving a uniform reflection effect.

[0102] In some embodiments of the present disclosure, the display substrate 200 or 300 further includes: an isolation layer GI2 located on the side of the conductive reflective layer 14 away from the substrate 11; the isolation layer GI2 includes a first isolation portion GI21, a second isolation portion GI22, and a third isolation portion GI23. The first isolation portion GI21 is located in the first pixel SP1, the second isolation portion GI22 is located in the second pixel SP2, and the third isolation portion GI23 is located in the third pixel SP3. The thickness of the first isolation portion GI21 is greater than the thickness of the second isolation portion GI22, and the thickness of the second isolation portion GI22 is greater than the thickness of the third isolation portion GI23.

[0103] Exemplarily, referring to Figure 4A and Figure 4D , the isolation layer GI2 is a light-transmitting material, so that the light emitted from the light-emitting functional layer 17 penetrates therethrough and reaches the conductive reflective layer 14 to be reflected by the conductive reflective layer 14. For example, the isolation layer GI2 can have high light transmittance, and the light reflected by the conductive reflective layer 14 is emitted outward with almost no loss, thus ensuring high light-emitting brightness and high light-emitting efficiency of the display substrate. At the same time, by using isolation layers GI2 with different thicknesses in the first pixel SP1, the second pixel SP2, and the third pixel SP3, microcavities with different cavity lengths can be realized to achieve the effect of superimposing light rays and improving the display brightness.

[0104] When forming the isolation layer GI2 on the conductive reflective layer 14, the manufacturing method includes: forming the third isolation portion GI23 on the third reflective portion B through a single patterning process, then forming the second isolation portion GI22 on the second reflective portion G through a single patterning process, and then forming the first isolation portion GI21 on the first reflective portion R through a single patterning process.

[0105] Figures 5A - 5C A cross-sectional view schematically showing the relative positions of the first electrode layer and the conductive reflective layer according to some exemplary embodiments of the present disclosure.

[0106] In some embodiments of the present disclosure, the display substrate 200 or 300 further includes: a first electrode layer 15, located on a side of the isolation layer GI2 away from the substrate 11; the first electrode layer 15 includes a first sub-electrode 1511, a second sub-electrode 1512, and a third sub-electrode 1513, the first sub-electrode 1511 is located in the first pixel SP1, the second sub-electrode 1512 is located in the second pixel SP2, and the third sub-electrode 1513 is located in the third pixel SP3; the isolation layer GI2 includes a third via VH3, and the first sub-electrode 1511, the second sub-electrode 1512, and the third sub-electrode 1513 are respectively electrically connected to the second conductive portion 142 through the third via VH3.

[0107] Exemplarily, with reference to Figures 5A - 5C , the relative positional relationship between the first electrode layer 15 and the conductive reflective layer 14 can be determined according to actual needs. For example, as Figure 5A shown, the orthographic projection of the first electrode layer 15 on the substrate 11 is located within the orthographic projection of the conductive reflective layer 14 on the substrate 11. That is, the area of the orthographic projection of the first electrode layer 15 is smaller than the area of the orthographic projection of the conductive reflective layer 14. In this way, almost all the light passing through the first electrode layer 15 is incident on the conductive reflective layer 14 and is reflected, thereby improving the light extraction efficiency and light extraction brightness of the display substrate. It can be understood that the arrangement of the first electrode layer and the first reflective electrode is not limited to Figure 5A shown, and vice versa. For example, as Figure 5B shown, the orthographic projection of the conductive reflective layer 14 on the substrate 11 is located within the orthographic projection of the first electrode layer 15 on the substrate 11. For another example, as Figure 5C shown, the orthographic projection of the conductive reflective layer 14 on the substrate 11 partially overlaps with the orthographic projection of the first electrode layer 15 on the substrate 11. In the embodiments of the present disclosure, the positional projection relationship between the first electrode layer 15 and the conductive reflective layer 14 can be compatible with various implementation manners, and the position of the conductive reflective layer 14 can be set flexibly. In this case, the conductive reflective layer 14 can be fabricated without changing the electrical connection relationship of the wiring layer and the driving transistor in the existing display substrate, making the fabrication process of the conductive reflective layer 14 simple.

[0108] In at least some embodiments, the shape of the conductive reflective layer 14 can be various regular shapes, such as rectangular, circular, oval, parallelogram, regular polygon, trapezoid, etc. Alternatively, the conductive reflective layer 14 can also have an irregular shape, such as a broken line shape, a curved shape, a honeycomb shape, etc. In a plane parallel to the plane of the substrate 11, the shape of the conductive reflective layer 14 can be the same as or different from the shape of the first electrode layer 15. For example, in a plane parallel to the plane of the substrate 11, the shape of the conductive reflective layer 14 is the same as the shape of the first electrode layer 15. In this way, the reflection by the conductive reflective layer 14 can ensure that the brightness of the emitted light is more uniform. For another example, the shape of the first electrode layer 15 is circular and the shape of the conductive reflective layer 14 is rectangular. Further, in this case, the orthographic projection of the circular first electrode layer 15 on the plane of the substrate 11 is located within the orthographic projection of the rectangular conductive reflective layer 14 on the plane of the substrate 11. In this way, almost all of the light passing through the circular first electrode layer 15 is incident on the rectangular conductive reflective layer 14 and is reflected, thereby improving the light extraction efficiency and light extraction brightness of the display substrate.

[0109] In at least some embodiments, a protective film 150 is disposed in the third via VH3, and the protective film 150 covers at least a portion of the first sub-electrode 1511, the second sub-electrode 1512, and the third sub-electrode 1513 located in the third via VH3.

[0110] Exemplarily, referring to Figure 4D before depositing the material of the first electrode layer 15, a layer of TiN material is first deposited on the sidewall of the third via VH3 to serve as the protective film 150 to prevent the diffusion of the material of the second conductive portion 142.

[0111] In some embodiments of the present disclosure, the display substrate 200 or 300 further includes: a pixel defining layer 16, the pixel defining layer 16 is located on the side of the first electrode layer 15 away from the substrate 11, wherein the pixel defining layer 16 includes a pixel defining portion PL1 located between the first pixel opening 2011 and the second pixel opening 2012, and the pixel defining portion PL1 has an undercut structure UDC on both the side facing the first pixel opening 2011 and the side facing the second pixel opening 2012. The display substrate 200 or 300 further includes a light-emitting functional layer 17 disposed on the side of the pixel defining layer 16 away from the substrate 11, wherein the light-emitting functional layer 17 includes a charge generation layer 171. The charge generation layer 171 is disconnected at the undercut structure UDC.

[0112] Exemplarily, referring to Figure 4D, in a stacked OLED device, due to the high conductivity of the charge generation layer 171, when the charge generation layers between adjacent pixels are not separated, it is easy to cause lateral crosstalk between pixels. By designing an undercut structure at both ends of the pixel defining portion, the charge generation layers between adjacent pixels can be disconnected at the undercut structure, thereby reducing the lateral crosstalk between pixels and being beneficial to improving the display effect of the display substrate.

[0113] The materials of multiple pixel defining sub-layers can be the same or different. For example, referring to Figure 5A , the undercut structure UDC includes a first part UDC1, a second part UDC2, and a third part UDC3. Among them, the third part UDC3 is located on the side of the second part UDC2 away from the substrate 2, and the second part UDC2 is indented by a first distance d1 in the direction away from the pixel opening relative to the third part UDC3. The first part UDC1 protrudes by a second distance d2 in the direction towards the pixel opening relative to the third part UDC3. The material of the first pixel defining sub-layer PDL1 may include SiO x ; and / or, the material of the second pixel defining sub-layer PDL2 may include SiN x ; and / or, the material of the third pixel defining sub-layer PDL3 includes SiO x . Multiple pixel defining sub-layers can have different etching rates under the same etching process conditions. For example, the etching rate of the second pixel defining sub-layer can be higher than that of the third pixel defining sub-layer, so that an inward concave structure in which the second part UDC2 is indented in the direction away from the pixel opening relative to the third part UDC3 can be formed in the etching process, forming a pixel defining portion with an undercut structure, which can effectively separate the charge generation layer, reduce the lateral crosstalk between pixels, reduce the leakage rate, improve the transfer rate of the display substrate, and improve the display effect of the display substrate.

[0114] In some embodiments of the present disclosure, referring back to Figure 4D , the display substrate 200 or 300 further includes: a light-emitting functional layer 17, located on the side of the first electrode layer 15 away from the substrate 11; a color filter layer 19, located on the side of the light-emitting functional layer 17 away from the substrate 11; the color filter layer 19 includes a first light-filtering portion R, a second light-filtering portion G, and a third light-filtering portion B. The first light-filtering portion R is located in the first pixel SP1, the second light-filtering portion G is located in the second pixel SP2, and the third light-filtering portion B is located in the third pixel SP3; the light emitted by the light-emitting functional layer 17 emits light of a first wavelength after passing through the first light-filtering portion R, the light emitted by the light-emitting functional layer 17 emits light of a second wavelength after passing through the second light-filtering portion G, and the light emitted by the light-emitting functional layer 17 emits light of a third wavelength after passing through the third light-filtering portion B. For example, the first wavelength is greater than the second wavelength, and the second wavelength is greater than the third wavelength.

[0115] Exemplarily, in some embodiments of the present disclosure, the display substrate may include a silicon-based OLED display substrate. Among them, the silicon-based OLED can achieve color display by using white light + three-color filtering. The white light OLED usually includes multiple stacked light-emitting layers, and different light-emitting layers can generate light of different colors. The white light is formed by mixing the light of different colors. Further, the mixed white light is combined with the filter structure to achieve the effect of color display. For example, different light-emitting layers may include a yellow light-emitting layer and a blue light-emitting layer, or a red-green mixed light-emitting layer and a blue light-emitting layer. By mixing yellow light and blue light, or mixing red-green mixed light and blue light, white light output can be achieved.

[0116] In some embodiments of the present disclosure, the display substrate 200 or 300 further includes: a second electrode layer 18 and a packaging layer TFE located on the side of the light-emitting functional layer 17 away from the substrate 11; a first planarization layer PLN1 located on the side of the color filter layer 19 close to the substrate 11 and a second planarization layer PLN2 located on the side away from the substrate 11; and a lens 21 located on the side of the second planarization layer PLN2 away from the substrate 11.

[0117] In at least some embodiments, the first electrode layer 15 is a transparent electrode layer. For example, the first electrode layer 15 can be made of a light-transmitting material or a semi-light-transmitting material. Similarly, the second electrode layer 18 can also be a transparent electrode layer, for example, made of a light-transmitting material or a semi-light-transmitting material. The light-transmitting material is, for example, a transparent conductive oxide, including but not limited to indium tin oxide (ITO), indium zinc oxide (IZO), cadmium tin oxide (CTO), stannum dioxide (SnO2), and zinc oxide (ZnO), etc. For example, the first electrode layer 15 is made of ITO. Since the ITO material has a high work function compared to ordinary molybdenum and titanium metals and is suitable for use as an OLED anode material, and because ITO has a high transmittance, the light emitted by the organic light-emitting functional layer can pass through the first electrode layer with almost no loss, further improving the light extraction efficiency and light extraction brightness of the display device. In the silicon-based micro-OLED display device, one of the first electrode layer 15 and the second electrode layer 18 serves as the anode and the other serves as the cathode. The lens 21 further includes a protective layer 211 located on the surface of the lens 21. The lens 21 can be made of a photoresist; the shape of the lens can be hemispherical, and of course, it can also be other shapes that can gather light. The lens 21 plays a role in condensing light, reducing the viewing angle while improving the light efficiency, and can collect large-angle viewing angles into the positive viewing angle range, reducing stray light at large viewing angles.

[0118] Embodiments of the present disclosure also provide a display device, which may be an electroluminescent display device. When the display device is an electroluminescent display device, the electroluminescent display device may be an organic light-emitting diode (OLED) or a quantum dot light-emitting diode (QLED).

[0119] Figure 6 FIG. 4 is a schematic structural diagram of a display device 1000 provided by an embodiment of the present disclosure. The display device 1000 includes a device main body 400 and a display substrate 200 or 300 disposed on the device main body 400. The device main body 400 includes a housing and components such as a processor, a power supply, and a camera disposed in the housing. The display device 1000 may adopt the display substrate 200 or 300 provided by the above embodiment.

[0120] The display device 1000 may include any device or product having a display function. For example, the display device 1000 may be a smart phone, a mobile phone, an e-book reader, a desktop computer (PC), a laptop PC, a netbook PC, a personal digital assistant (PDA), a portable multimedia player (PMP), a digital audio player, a mobile medical device, a camera, a wearable device (such as a head-mounted device, electronic clothing, an electronic bracelet, an electronic necklace, electronic accessories, an electronic tattoo, or a smart watch), a television, etc.

[0121] It should be understood that the display device 1000 according to some exemplary embodiments of the present disclosure has all the features and advantages of the above display substrate 200 or 300. These features and advantages may be referred to the description of the display substrate 200 or 300 above and will not be elaborated herein.

[0122] Figure 7 FIG. 5 schematically shows a flowchart of a method for manufacturing a display substrate according to an embodiment of the present disclosure.

[0123] According to some exemplary embodiments, referring to Figures 2B - 2D and Figure 7 , the method for manufacturing the display substrate 200 includes the following steps S710 to S720.

[0124] In step S710, a driving circuit layer 12 is formed on a substrate 11. The driving circuit layer 12 includes a first via VH1 and a first connection portion 13. At least a part of the first connection portion 13 is located in the first via VH1.

[0125] In step S720, a conductive reflective layer 14 is formed on a side of the driving circuit layer 12 away from the substrate 11. The conductive reflective layer 14 is electrically connected to the driving circuit layer 12 through a first connection portion 13. The conductive reflective layer 14 includes a first conductive portion 141 and a second conductive portion 142. The conductivity of the material of the first conductive portion 141 is lower than that of the material of the second conductive portion 142. The first conductive portion 141 and the second conductive portion 142 are arranged adjacent to each other in a first direction. The second conductive portion 142 includes two sidewalls 1421 and 1422 oppositely arranged in the first direction. The first conductive portion 141 at least covers the two sidewalls of the second conductive portion 142. The orthographic projection of the first connection portion 13 on the substrate 11 is located within the orthographic projection of the conductive reflective layer 14 on the substrate 11. The first connection portion 13 includes exposed surfaces 1311 and 1312 exposed outside the first via VH1, and at least a part of the exposed surfaces 1311 and 1312 is spaced apart from the first conductive portion 141. Specifically, step S710 includes: forming the driving circuit layer 12 and the first connection portion 13.

[0126] Step S720 includes:

[0127] Step S721: Prepare the conductive reflective layer 14. Chemical vapor deposition composite film coating is performed on the incoming wafer, a layer of photoresist is coated for exposure, and then a non-metal and metal full etching process is performed for patterning. The conductive reflective layer 14 is prepared by a method including but not limited to magnetron sputtering, electron beam evaporation, and thermal evaporation. The material of the conductive reflective layer 14 is Ti(Ta) / Al, where Ti(Ta) serves as the first conductive portion 141 and Al serves as the second conductive portion 142. This step includes two methods. The first method is to prepare an embedded bottom layer Ta / Ti by using the damascene process, then remove or pattern the metal around the first connection portion 13, but retain the sidewalls and the protruding part of the bottom layer metal, and then deposit an Al film. The second method is to leave a protrusion at the position of the bottom layer first connection portion 13 to form a step difference, reduce the contact surface between the upper part and the sidewalls of the first connection portion 13 and Ta / Ti, thereby reducing the impedance.

[0128] Step S722: Prepare an isolation layer GI2 with different thicknesses. The isolation layer GI2 uses SiO material. First, the third isolation portion GI23 is deposited by CVD, a layer of photoresist is coated for exposure, and the third isolation portion GI23 corresponding to the B pixel is etched (to ensure that there is no residue above the metal corresponding to the R / G pixel, the space between each pixel will be slightly reduced due to slight over-etching). The second isolation portion GI22 is deposited by CVD, a layer of photoresist is coated for exposure, and the second isolation portion GI22 corresponding to the R pixel is etched (to ensure that there is no residue above the metal corresponding to the G pixel, the space between each pixel will be slightly reduced due to slight over-etching). The first isolation portion GI21 is deposited by CVD to form step differences of different pixels.

[0129] Step S723: Prepare the second via VH2. At the position corresponding to the second via VH2, the second via VH2 (with an inclination angle of 70 - 80°) is obtained through the processes of exposure and etching.

[0130] Step S724: Prepare the protective film 150 and the first electrode layer 15. Deposit a layer of TiN on the above-mentioned film layers, and then etch to obtain a TiN protective film 150 that covers the Al / Ag surface through the second via VH2. First, magnetron sputter and coat an ITO material layer, apply a layer of photoresist for exposure, and etch to obtain the patterned first electrode layer 15 above BRG (the ITO etching needs to be over-etched to ensure that the ITO between each pixel is disconnected).

[0131] Step S725: Prepare the pixel defining layer 16. First, chemically vapor deposit and coat SiO-1 / SiN / SiO-2, and then expose and etch to obtain an undercut structure.

[0132] Step S726: Prepare the light-emitting functional layer 17, the encapsulation layer TFE, and the planarization layer PLN1: Evaporate each layer in the light-emitting functional layer 17 above the first electrode layer 15 so that each pixel has the performance of emitting white light; fabricate an inorganic encapsulation layer TFE above the light-emitting functional layer 17 to protect the materials of the light-emitting functional layer 17 from being invaded by water and oxygen to ensure the performance of the light-emitting functional layer 17; coat a planarization layer PLN1 above the encapsulation layer TFE to make the upper surface of the wafer have better flatness.

[0133] Step S727: Prepare the color filter layer 19, the planarization layer PLN2, and the lens 21. Sequentially fabricate the third filter part B / second filter part G / first filter part R on the inorganic optical antireflection film to form the three primary colors R / G / B; coat the planarization layer PLN2 above the third filter part B / second filter part G / first filter part R to make the upper surface of the wafer have better flatness; fabricate the lens 21 on the planarization layer PLN2 to converge stray light to enhance the light effect.

[0134] As used herein, the terms "substantially", "about", "approximately", and other similar terms are used as approximate terms rather than as terms of degree, and they are intended to account for the inherent deviations of measured or calculated values that would be recognized by a person of ordinary skill in the art. Considering factors such as process variations, measurement problems, and errors associated with the measurement of a particular quantity (i.e., limitations of the measurement system), "about" or "approximately" as used herein includes the stated value and represents that the particular value is within an acceptable deviation range for a person of ordinary skill in the art. For example, "about" can mean within one or more standard deviations, or within ±10% or ±5% of the stated value.

[0135] While some embodiments in accordance with the general inventive concept of the present disclosure have been illustrated and described, those of ordinary skill in the art will understand that changes may be made to these embodiments without departing from the principles and spirit of the general inventive concept of the present disclosure, and the scope of the present disclosure is defined by the claims and their equivalents.

Claims

1. A display substrate, comprising: substrate substrate; A driving circuit layer, located on one side of the base substrate, the driving circuit layer comprising a first via hole and a first connecting portion, at least a portion of the first connecting portion being located in the first via hole; as well as a conductive reflective layer, located on a side of the driving circuit layer away from the base substrate, the conductive reflective layer being electrically connected to the driving circuit layer through the first connecting portion, The conductive reflective layer includes a first conductive portion and a second conductive portion, the conductivity of the material of the first conductive portion is lower than the conductivity of the material of the second conductive portion, the first conductive portion and the second conductive portion are adjacently arranged along a first direction, the second conductive portion includes two side walls arranged opposite to each other in the first direction, and the first conductive portion at least covers two side walls of the second conductive portion; and The orthographic projection of the first connecting portion on the base substrate is located within the orthographic projection of the conductive reflective layer on the base substrate, the first connecting portion includes an exposed surface exposed outside the first via hole, and at least a portion of the exposed surface is spaced apart from the first conductive portion.

2. The display substrate according to claim 1, wherein: At least a portion of the exposed surface is in contact with the second conductive portion.

3. The display substrate according to claim 1, wherein: The first conductive portion includes a first sub-conductive portion and a second sub-conductive portion. The first sub-conductive portion covers a side wall of the second conductive portion. The second sub-conductive portion extends from the first sub-conductive portion toward the second conductive portion along a first direction.

4. The display substrate according to claim 3, wherein: The exposed surface includes a first sub-surface, which is a surface of the first connecting portion away from the base substrate, and the first sub-surface is parallel to a first direction, and each of the first sub-conductive portion and the second sub-conductive portion is spaced apart from the first sub-surface.

5. The display substrate according to claim 4, wherein: The first sub-surface is covered by the second conductive portion.

6. The display substrate according to claim 4, wherein: The first connecting portion includes a first connecting sub-portion and a second connecting sub-portion, the first connecting sub-portion protrudes from the first via hole, and the second connecting sub-portion is located in the first via hole; The exposed surface further includes a second sub-surface, the second sub-surface is a side surface of the first connecting sub-portion, and the second sub-surface is adjacent to the first sub-surface; and At least a portion of the second sub-surface is spaced apart from the first conductive portion.

7. The display substrate according to claim 6, wherein: At least a portion of the first sub-surface is covered by the first conductive portion; and at least a portion of the second sub-surface is wrapped by the second conductive portion.

8. The display substrate according to claim 6, wherein: The cross section of the first connecting sub-portion in the light emitting direction of the display substrate is an inverted trapezoid.

9. The display substrate according to claim 1, wherein: The display substrate further comprises: The interlayer insulating layer is located on a side of the driving circuit layer away from the base substrate, the interlayer insulating layer comprises a groove, and the first conductive part and the second conductive part are located in the groove.

10. The display substrate according to claim 9, wherein: The interlayer insulating layer comprises a first insulating portion and a second insulating portion, wherein the second insulating portion is located on a side of the first insulating portion away from the base substrate; The orthographic projection of the second insulating portion on the base substrate does not overlap with the orthographic projection of the conductive reflective layer on the base substrate; The first insulating portion includes a second via hole, and the first connecting portion extends through the second via hole to be electrically connected to the conductive reflective layer.

11. The display substrate according to claim 1, wherein: The display substrate further includes a plurality of pixels, the plurality of pixels are arranged in an array along a first direction and a second direction, and the plurality of pixels include a first pixel, a second pixel and a third pixel; The conductive reflective layers of the first pixel, the second pixel and the third pixel are alternately arranged along at least one of a first direction and a second direction, and an interlayer insulating layer is disposed between two adjacent conductive reflective layers.

12. The display substrate according to claim 11, wherein: Thicknesses of the second conductive portions in the first pixel, the second pixel, and the third pixel are equal to each other.

13. The display substrate according to claim 11, wherein: The display substrate further comprises: an isolation layer, located on a side of the conductive reflective layer away from the base substrate; The isolation layer includes a first isolation portion, a second isolation portion and a third isolation portion, the first isolation portion is located in the first pixel, the second isolation portion is located in the second pixel, and the third isolation portion is located in the third pixel; The thickness of the first isolation portion is greater than that of the second isolation portion, and the thickness of the second isolation portion is greater than that of the third isolation portion.

14. The display substrate according to claim 13, wherein: The display substrate further comprises: a first electrode layer, located on a side of the isolation layer away from the base substrate; The first electrode layer includes a first sub-electrode, a second sub-electrode and a third sub-electrode, the first sub-electrode is located in the first pixel, the second sub-electrode is located in the second pixel, and the third sub-electrode is located in the third pixel; The isolation layer includes a third via hole, and the first sub-electrode, the second sub-electrode, and the third sub-electrode are electrically connected to the second conductive portion through the third via hole, respectively.

15. The display substrate according to claim 14, wherein: A protective film is disposed in the third via hole, and the protective film covers at least a portion of the first sub-electrode, the second sub-electrode, and the third sub-electrode located in the third via hole.

16. The display substrate according to claim 14, wherein: The display substrate further comprises: a light-emitting functional layer located on a side of the first electrode layer away from the base substrate; and a color filter layer located on a side of the light-emitting functional layer away from the base substrate. The color filter layer comprises a first filter portion, a second filter portion and a third filter portion, wherein the first filter portion is located in the first pixel, the second filter portion is located in the second pixel, and the third filter portion is located in the third pixel; The first filter is used to allow light of a first wavelength to pass through, the second filter is used to allow light of a second wavelength to pass through, and the third filter is used to allow light of a third wavelength to pass through; the first wavelength is greater than the second wavelength, and the second wavelength is greater than the third wavelength.

17. The display substrate according to claim 1, wherein: The material of the first conductive part includes one of Ti and Ta, and the material of the second conductive part includes one of Al, Ag and Mg; The material of the first connection portion includes W.

18. A display device, characterized in that: The display device includes the display substrate according to any one of claims 1 to 17.

19. A method for preparing a display substrate, the method comprising the following steps: forming a driving circuit layer on the base substrate, wherein the driving circuit layer comprises a first via hole and a first connecting portion, wherein at least a portion of the first connecting portion is located in the first via hole; forming a conductive reflective layer on a side of the driving circuit layer away from the base substrate, wherein the conductive reflective layer is electrically connected to the driving circuit layer through the first connecting portion; in, The conductive reflective layer includes a first conductive portion and a second conductive portion, the conductivity of the material of the first conductive portion is lower than the conductivity of the material of the second conductive portion, the first conductive portion and the second conductive portion are adjacently arranged along a first direction, the second conductive portion includes two side walls arranged opposite to each other in the first direction, and the first conductive portion at least covers the two side walls of the second conductive portion; and the orthographic projection of the first connecting portion on the base substrate is located within the orthographic projection of the conductive reflective layer on the base substrate, the first connecting portion includes an exposed surface exposed outside the first via hole, and at least a portion of the exposed surface is spaced apart from the first conductive portion.

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