Circuit board and semiconductor package including same

Abstract

A circuit board according to an embodiment includes a build-up insulating layer; a connecting member which is embedded in the stacked insulating layer; and an insulating member disposed on one surface of the connecting member, in which the connecting member includes: a first insulating layer; and a second insulating layer disposed on the first insulating layer, in which the first insulating layer, the second insulating layer, and the insulating member include different insulating materials, and in which a side surface of the first insulating layer, a side surface of the second insulating layer, and a side surface of the insulating member have steps.

Description

Technical Field

[0001] The embodiments relate to a circuit board, and more particularly, to a circuit board having improved bonding strength with a connection member and a semiconductor package including the circuit board. Background Art

[0002] With the advancement of the performance of electrical / electronic products, technologies for mounting a larger number of semiconductor devices on a circuit board of a semiconductor package in a limited size are being proposed and studied. However, since general semiconductor packages are based on mounting a single semiconductor device, there are limitations in obtaining desired performance.

[0003] Therefore, recently, a semiconductor package using multiple circuit boards to mount multiple semiconductor devices has been provided. The semiconductor package has a structure in which multiple semiconductor devices are connected to each other horizontally and / or vertically on the circuit board. Therefore, the semiconductor package has the advantages of effectively using the mounting area of the semiconductor devices and transmitting high-speed signals through short signal transmission paths between the semiconductor devices.

[0004] Due to these advantages, the semiconductor package as described above is widely applied to mobile devices and the like.

[0005] In addition, as the number and / or size of each semiconductor device increase according to the trend of high integration, or as the functional parts of the semiconductor devices are divided, the concept of semiconductor packages applied to products providing the Internet of Things (IoT), autonomous vehicles, and high-performance servers has been extended to semiconductor chiplets.

[0006] Therefore, the mutual communication between semiconductor devices and / or semiconductor chiplets becomes important, and thus, there is a trend of providing an interposer between the circuit board of the semiconductor package and the semiconductor device.

[0007] The interposer can be used as a redistribution layer that gradually increases the width or depth of the circuit pattern from the semiconductor device to the circuit pattern of the semiconductor package in order to facilitate the mutual communication between the semiconductor devices and / or semiconductor chiplets, or interconnect the semiconductor devices and the semiconductor package circuit board, thereby smoothly transmitting electrical signals between the semiconductor device and the semiconductor package circuit board. Compared with the circuit pattern of the semiconductor device, the semiconductor package circuit board has a relatively large circuit pattern.

[0008] Meanwhile, a package circuit board and / or an interposer applied to a semiconductor package are provided with connection members connected to semiconductor devices and / or semiconductor chiplets. The connection members are used to horizontally connect a plurality of semiconductor devices and / or semiconductor chiplets. Therefore, the connection members can be embedded in the package circuit board and / or the interposer.

[0009] At this time, the connection member can be an inorganic bridge. For example, in the prior art, the inorganic bridge applied to a semiconductor package can be a silicon bridge. Therefore, the semiconductor package according to the prior art has limitations in reducing the size of the connection member of the silicon bridge, and thus has limitations in reducing the overall size of the semiconductor package.

[0010] In addition, the silicon bridge has a problem of being vulnerable to mechanical reliability. That is, the stacked insulating layer included in the package circuit board and / or the interposer includes an insulating material different from that of the connection member of the silicon bridge. As a result, due to the difference in thermal characteristics between the stacked insulating layer of the prior art and the connection member, stress may concentrate on the connection member. In addition, there is a problem of cracks appearing in the connection member due to the concentrated stress. Summary of the Invention

[0011] Technical Problem

[0012] An embodiment provides a circuit board having a connection member embedded therein and a semiconductor package including the circuit board.

[0013] In addition, an embodiment provides a semiconductor package capable of improving the adhesion between a connection member and a stacked insulating layer.

[0014] In addition, an embodiment provides a semiconductor package having a connection member embedded therein, the connection member including a stepped portion provided in the horizontal direction.

[0015] In addition, an embodiment provides a semiconductor package including a stepped portion provided in the stacked insulating layer in the vertical direction.

[0016] In addition, an embodiment provides a semiconductor package including a stepped portion provided in the electrode portion in the vertical direction.

[0017] In addition, an embodiment provides a semiconductor package capable of identifying the mounting positions of a plurality of semiconductor devices.

[0018] The technical problems to be solved by the proposed embodiments are not limited to the above technical problems, and other technical problems not mentioned can be clearly understood by those skilled in the art to which the embodiments described below belong.

[0019] Technical Solution

[0020] A circuit board according to an embodiment includes a stacked insulating layer; a connection member embedded in the stacked insulating layer; and an insulating member disposed on one surface of the connection member, wherein the connection member includes: a first insulating layer; and a second insulating layer disposed on the first insulating layer, wherein the first insulating layer, the second insulating layer, and the insulating member include different insulating materials, and wherein side surfaces of the first insulating layer, the second insulating layer, and the insulating member have steps.

[0021] In addition, the connection member further includes a third insulating layer disposed on the second insulating layer, and the third insulating layer includes an insulating material different from that of at least one of the first insulating layer and the second insulating layer, and a side surface of the third insulating layer has a step starting from side surfaces of the first insulating layer, the second insulating layer, and the insulating member.

[0022] In addition, a width of the first insulating layer of the connection member in a horizontal direction is greater than a width of the second insulating layer in the horizontal direction.

[0023] In addition, a width of the insulating member in the horizontal direction is greater than widths of each of the first insulating layer and the second insulating layer in the horizontal direction.

[0024] In addition, the first insulating layer of the connection member includes polyimide.

[0025] In addition, the second insulating layer of the connection member includes a resin layer containing a filler.

[0026] In addition, the stacked insulating layer includes an insulating material different from that of the second insulating layer of the connection member.

[0027] In addition, the stacked insulating layer includes the same insulating material as the second insulating layer of the connection member, and a diameter of a filler provided in the stacked insulating layer is different from a diameter of a filler provided in the second insulating layer of the connection member.

[0028] In addition, a diameter of a filler provided in the stacked insulating layer is greater than a diameter of a filler provided in the second insulating layer of the connection member.

[0029] In addition, a horizontal distance from an outermost end to an innermost end of the connection member satisfies a range of 50 μm to 70 μm.

[0030] In addition, the stacked insulating layer includes a portion having a step in a vertical direction.

[0031] In addition, the upper surface of the stacked insulating layer includes a first upper surface that vertically overlaps with the connection member and a second upper surface that does not vertically overlap with the connection member, and the height of the first upper surface is different from the height of the second upper surface.

[0032] In addition, the circuit board further includes an electrode portion that penetrates from the upper surface of the stacked insulating layer to a partial area of the stacked insulating layer, and the electrode portion includes a first electrode portion that vertically overlaps with the connection member; and a second electrode portion that does not vertically overlap with the connection member, and the upper surface of the first electrode portion has a step starting from the upper surface of the second electrode portion.

[0033] In addition, the stacked insulating layer includes a first layer; and a second layer on the first layer, and the first electrode portion and the second electrode portion include a first protruding electrode disposed on the first electrode portion and penetrating from the upper surface of the first layer to a partial area of the first layer; and a second protruding electrode disposed on the second electrode portion.

[0034] In addition, the plurality of first protruding electrodes include a first group of first protruding electrodes and a second group of first protruding electrodes, and the plurality of second protruding electrodes include a first group of second protruding electrodes and a second group of second protruding electrodes, and wherein, the circuit board further includes: a first semiconductor device disposed on the first group of first protruding electrodes and the first group of second protruding electrodes; and a second semiconductor device disposed on the second group of second protruding electrodes and the second group of second protruding electrodes.

[0035] In addition, the semiconductor package further includes at least one third semiconductor device embedded in the stacked insulating layer, and the third semiconductor device does not vertically overlap with the connection member.

[0036] In addition, each of the first protruding electrode and the second protruding electrode includes a first metal layer; and a second metal layer disposed on the first metal layer and including a metal material different from that of the first metal layer, and the first metal layer includes a convex portion facing the lower surface of the stacked insulating layer.

[0037] Beneficial effects

[0038] The semiconductor package of the embodiment may include a stacked insulating layer and a connection member embedded in the stacked insulating layer. Additionally, the side surface of the connection member may have steps. For example, the connection member may include a plurality of insulating layers containing different insulating materials. Additionally, the side surfaces of the plurality of insulating layers may have steps. Additionally, the side surface of the connection member having steps may contact the stacked insulating layer. Thereby, the contact area between the stacked insulating layer and the connection member can be improved. Thereby, the problem of the connection member peeling off from the first insulating layer can be solved.

[0039] Meanwhile, the connection member may include an organic material having a coefficient of thermal expansion similar to that of the stacked insulating layer. Thereby, the embodiment can minimize the stress applied to the connection member. Additionally, the embodiment can solve the problems of cracks occurring in the connection member or the connection member peeling off from the circuit board. Thereby, the embodiment can improve the mechanical reliability and electrical reliability of the semiconductor package.

[0040] Additionally, the embodiment can reduce the cost of the connection member by changing the first insulating layer of the connection member to polyimide, which is cheaper than silicon.

[0041] Additionally, the connection member may be provided with via electrodes having a small width. Additionally, the alignment state between a plurality of via electrodes provided in different layers may have a great influence on the operating characteristics of the connection member, the operating characteristics of the semiconductor package, and the operating characteristics of an electronic product or a server to which the semiconductor package is applied. At this time, the polyimide may have a transparent property. Therefore, the embodiment can improve the alignment state of the plurality of via electrodes provided in different layers. Thereby, the operating characteristics of the connection member, the operating characteristics of the semiconductor package, and the operating characteristics of an electronic product or a server to which the semiconductor package is applied can be further improved.

[0042] Additionally, since the first insulating layer of the connection member has a coefficient of thermal expansion similar to that of the stacked insulating layer, when the circuit board undergoes thermal deformation, the connection member can be allowed to flow together with the circuit board. Thereby, the embodiment can solve the problem of the connection member cracking that may occur due to the thermal deformation of the circuit board.

[0043] Meanwhile, the connection member may include a third insulating layer of solder resist. Additionally, during the sawing process of the connection member, the third insulating layer can be easily cracked. Therefore, by making the width of the third insulating layer smaller than the widths of other insulating layers, the embodiment can safely protect the third insulating layer from impact. Thereby, the embodiment can further improve the product reliability.

[0044] Meanwhile, the upper surface of the stacked insulating layer of the embodiment may have steps. In addition, the upper surfaces of the first protruding electrode and the second protruding electrode may also have steps. Further, since the first protruding electrode and the second protruding electrode have steps, the arrangement positions of the first semiconductor device and the second semiconductor device can be identified. Thus, the first semiconductor device and the second semiconductor device can be mounted at more accurate positions. In addition, the embodiments can adjust the volume of the conductive bonding member (e.g., solder) provided on the first protruding electrode and the second protruding electrode differently from each other. Therefore, the embodiments can position the protruding electrode provided with the conductive bonding member that requires a larger volume lower than the other protruding electrode. This can be achieved by adjusting the thickness difference between the cavity and the connecting member. Thereby, the embodiments can couple the semiconductor device to the circuit board more stably. Therefore, the embodiments can operate the semiconductor device smoothly and can also improve the operating characteristics of the electronic product and / or server to which the semiconductor package is applied.

[0045] In addition, the first protruding electrode and the second protruding electrode may each include a first metal layer and a second metal layer. The first metal layer may include nickel. Additionally, the second metal layer may include copper. The first metal layer can improve the bonding strength between the second metal layer and the electrode portion. For example, when the second metal layer is directly provided on the electrode portion, oxidation of the electrode portion may occur, which may reduce the bonding strength between the electrode portion and the protruding electrode. Therefore, the first metal layer can be used to prevent oxidation of the first electrode portion while improving the bonding strength between the second metal layer and the first electrode portion. Further, the first metal layer can solve the problem of the protruding electrode peeling off from the electrode portion due to the shrinkage and expansion of the second insulating layer caused by thermal stress.

[0046] Specifically, when the first metal layer includes nickel, the adhesion between the electrode portion and the protruding electrode can be improved. Additionally, when the protruding electrode is later electrically connected to a material such as solder, the solder may diffuse into the electrode portion to form an inter-metallic compound, which has the problem of reduced mechanical and electrical reliability. In particular, when the second metal layer is made of copper, the problem of forming an inter-metallic compound may be further aggravated. However, when nickel is provided, the diffusion of the solder can be prevented, thereby preventing the formation of an inter-metallic compound, and thus improving the electrical reliability and mechanical reliability of the semiconductor package. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Figure 1a is a cross-sectional view showing a semiconductor package according to a first embodiment.

[0048] Figure 1b is a cross-sectional view showing a semiconductor package according to a second embodiment.

[0049] Figure 1c is a cross-sectional view showing a semiconductor package according to the third embodiment.

[0050] Figure 1d is a cross-sectional view showing a semiconductor package according to the fourth embodiment.

[0051] Figure 1e is a cross-sectional view showing a semiconductor package according to the fifth embodiment.

[0052] Figure 2 is a cross-sectional view showing a circuit board according to the first embodiment.

[0053] Figure 3 is a cross-sectional view showing a circuit board according to the second embodiment.

[0054] Figure 4 is a plan view of the Figure 2 circuit board viewed from the upward direction.

[0055] Figure 5 is a cross-sectional view showing a state where a plurality of semiconductor devices are coupled to the Figure 3 circuit board.

[0056] Figure 6 is a cross-sectional view showing the Figure 2 detailed layer structure of the connection member.

[0057] Figure 7 is a plan view of the Figure 6 connection member viewed from the upward direction.

[0058] Figure 8 is an enlarged cross-sectional view of a partial area of the Figure 3 circuit board according to the first embodiment.

[0059] Figure 9 is a diagram for explaining the Figure 8 interface between the stacked insulating layer and the connection member.

[0060] Figure 10 is a cross-sectional view showing the detailed layer structure of the protruding electrode of the embodiment.

[0061] Figure 11 is an enlarged cross-sectional view of a partial area of the Figure 3 circuit board according to the second embodiment.

[0062] Figure 12 is an enlarged cross-sectional view of a partial area of the Figure 3 circuit board according to the third embodiment. DETAILED DESCRIPTION

[0063] Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings, in which like reference numerals are used to denote like or similar elements, and redundant descriptions thereof will be omitted. In the following description, the suffixes “module” and “part” of components are given or mixed only for ease of preparing the description, and there is no meaning or function to distinguish them from each other. In addition, in the following description of the embodiments of the present invention, when it is determined that the gist of the embodiments disclosed herein may be difficult to understand, detailed descriptions of related technologies will be omitted. In addition, the accompanying drawings are included to provide a further understanding of the present invention, and the drawings are incorporated into the present specification and constitute a part of the present specification. It should be understood that the present invention is intended to cover all modifications, equivalents, or alternatives falling within the spirit and scope of the present invention.

[0064] Terms including ordinal numbers such as first and second may be used to describe various components, but the elements are not limited by these terms. These terms are only used to distinguish one component from another.

[0065] When a component is referred to as being “connected” or “contacted” to another component, it may be directly connected or joined to the other component, but it should be understood that other components may exist therebetween. When a component is referred to as being “directly connected” or “directly contacted” to another component, it should be understood that no other components may exist therebetween.

[0066] The singular representation includes the plural representation unless the context clearly implies otherwise.

[0067] In the present application, terms such as “including” or “having” are used to specify the existence of features, numbers, steps, operations, components, parts, or combinations thereof described in the specification. However, it should be understood that these terms do not exclude the existence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof.

[0068] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0069] -Electronic device-

[0070] Before describing the embodiments, an electronic device to which the embodiments are applied will be briefly described. The electronic device includes a main board (not shown). The main board may be physically and / or electrically connected to various components. For example, the main board may be connected to the semiconductor package of the embodiment. Various semiconductor devices may be mounted on the semiconductor package.

[0071] A semiconductor device may include active devices and / or passive devices. The active device may be a semiconductor chip in the form of an integrated circuit (IC), in which hundreds to millions of devices are integrated into one semiconductor device. The semiconductor device may be a logic chip, a memory chip, etc. The logic chip may be a central processing unit (CPU), a graphics processing unit (GPU), etc. For example, the logic chip may be an application processor (AP) chip including at least one of a central processing unit (CPU), a graphics processing unit (GPU), a digital signal processor, a cryptographic processor, a microprocessor, and a microcontroller, or an analog-to-digital converter, an application-specific IC (ASIC), etc., or a chipset including a specific combination of those listed so far.

[0072] The memory chip may be a stacked memory such as HBM. The memory chip may also include memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), or flash memory.

[0073] On the other hand, the product group of the semiconductor package according to the application embodiment may be any one of a CSP (Chip Scale Package), an FC-CSP (Flip Chip-Chip Scale Package), an FC-BGA (Flip Chip Ball Grid Array), a POP (Package On Package), and an SIP (System In Package), but is not limited thereto.

[0074] In addition, the electronic device may be a smart phone, a personal digital assistant, a digital video camera, a digital still camera, a vehicle, a high-performance server, a network system, a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smartwatch, an Automotive, etc. However, the embodiment is not limited thereto and may be any other electronic device that processes data other than these.

[0075] Hereinafter, a semiconductor package including a circuit board according to an embodiment will be described. The semiconductor package of the embodiment may have various package structures including the circuit board to be described later.

[0076] In addition, the circuit board in one embodiment may be the first circuit board described below.

[0077] In addition, the circuit board in another embodiment may be the second circuit board described below.

[0078] Figure 1a is a cross-sectional view showing a semiconductor package according to a first embodiment, Figure 1b is a cross-sectional view showing a semiconductor package according to a second embodiment, Figure 1c is a cross-sectional view showing a semiconductor package according to a third embodiment, Figure 1d is a cross-sectional view showing a semiconductor package according to a fourth embodiment, Figure 1e is a cross-sectional view showing a semiconductor package according to a fifth embodiment.

[0079] Referring to Figure 1a , the semiconductor package according to the first embodiment may include a first circuit board 1100, a second circuit board 1200, and a semiconductor device 1300.

[0080] The first circuit board 1100 may represent a package circuit board.

[0081] For example, the first circuit board 1100 may provide a space to which at least one external circuit board is coupled. The external circuit board may refer to the second circuit board 1200 coupled to the first circuit board 1100. In addition, the external circuit board may refer to a main board in an electronic device included below the first circuit board 1100.

[0082] In addition, although not shown in the figure, the first circuit board 1100 may provide a space in which at least one semiconductor device is mounted.

[0083] The first circuit board 1100 may include at least one insulating layer and an electrode portion provided on the at least one insulating layer.

[0084] The second circuit board 1200 may be disposed on the first circuit board 1100.

[0085] The second circuit board 1200 may be an interposer. For example, the second circuit board 1200 may provide a space in which at least one semiconductor device is mounted. The second circuit board 1200 may be connected to at least one semiconductor device 1300. For example, the second circuit board 1200 may provide a space in which a first semiconductor device 1310 and a second semiconductor device 1320 are mounted. The second circuit board 1200 may electrically connect the first semiconductor device 1310 and the second semiconductor device 1320 as well as the first circuit board 1100, while electrically connecting the first semiconductor device 1310 and the second semiconductor device 1320. That is, the second circuit board 1200 may perform a horizontal connection function between multiple semiconductor devices and a vertical connection function between a semiconductor device and a package circuit board.

[0086] Figure 1a The first semiconductor device 1310 and the second semiconductor device 1320 are shown disposed on the second circuit board 1200, but are not limited thereto. For example, one semiconductor device may be disposed on the second circuit board 1200, or alternatively, three or more semiconductor devices may be disposed.

[0087] The second circuit board 1200 may be disposed between at least one semiconductor device 1300 and the first circuit board 1100.

[0088] In one embodiment, the second circuit board 1200 may be an active interposer used as a semiconductor device. When the second circuit board 1200 is used as a semiconductor device, the semiconductor package of the embodiment may have a structure vertically stacked on the first circuit board 1100 and may have the functions of multiple logic chips. Having the functions of a logic chip may mean that it may have the functions of active devices and passive devices. In the case of active devices, different from passive devices, the characteristics of current and voltage may not be linear, and in the case of an active interposer, it may have the functions of active devices. In addition, the active interposer may perform the functions of a corresponding logic chip while performing a signal transmission function between the second logic chip disposed thereon and the first circuit board 1100.

[0089] According to another embodiment, the second circuit board 1200 may be a passive interposer. For example, the second circuit board 1200 may be used as a signal relay between the semiconductor device 1300 and the first circuit board 1100, and may have passive device functions such as resistors, capacitors, or inductors. For example, due to 5G, the Internet of Things (IoT), the improvement of image quality, and the improvement of communication speed, the number of terminals of the semiconductor device 1300 has gradually increased. That is, the number of terminals provided in the semiconductor device 1300 increases, thereby reducing the width of the terminals or the interval between multiple terminals. In this case, the first circuit board 1100 may be connected to the main board of the electronic device. The problem is that in order for the electrodes provided on the first circuit board 1100 to have widths and intervals to be respectively connected to the semiconductor device 1300 and the main board, the thickness of the first circuit board 1100 increases or the layer structure of the first circuit board 1100 becomes complicated. Therefore, in the first embodiment, the second circuit board 1200 may be provided on the first circuit board 1100 and the semiconductor device 1300. In addition, the second circuit board 1200 may include electrodes having fine widths and intervals corresponding to the terminals of the semiconductor device 1300.

[0090] The semiconductor device 1300 may be an application processor (AP) chip including at least one of a central processing unit (CPU), a graphics processing unit (GPU), a digital signal processor, an encryption processor, a microprocessor, and a microcontroller, or an analog-to-digital converter, an application-specific IC (ASIC), etc., or a chipset including a specific combination of those listed so far. The memory chip may be a stacked memory such as HBM. The memory chip may also include memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), flash memory, etc.

[0091] Meanwhile, the semiconductor package of the first embodiment may include a connection part.

[0092] For example, the semiconductor package may include a first connection part 1410 provided between the first circuit board 1100 and the second circuit board 1200. The first connection part 1410 may electrically connect the second circuit board 1200 to the first circuit board 1100 while coupling them.

[0093] For example, the semiconductor package may include a second connection part 1420 provided between the second circuit board 1200 and the semiconductor device 1300. The second connection part 1420 may electrically connect the semiconductor device 1300 to the second circuit board 1200 while coupling them.

[0094] The semiconductor package may include a third connection part 1430 disposed on the lower surface of the first circuit board 1100. The third connection part 1430 may electrically connect the first circuit board 1100 to the main board while coupling them.

[0095] At this time, the first connection part 1410, the second connection part 1420, and the third connection part 1430 may be electrically connected between the plurality of components by using at least one bonding method among wire bonding, solder bonding, and metal-to-metal direct bonding. That is, since the first connection part 1410, the second connection part 1420, and the third connection part 1430 have the function of electrically connecting the plurality of components, when metal-to-metal direct bonding is used, the connection part of the semiconductor package may be understood as an electrical connection part rather than solder or a wire.

[0096] The wire bonding method may refer to electrically connecting a plurality of components by using a conductive wire such as gold (Au). In addition, the solder bonding method may use a material containing at least one of Sn, Ag, and Cu to electrically connect a plurality of components. Additionally, the metal-to-metal direct bonding method may refer to recrystallization by applying heat and pressure between a plurality of components in the absence of solder, a wire, a conductive adhesive, etc., and may also refer to directly bonding between a plurality of components. Additionally, the metal-to-metal direct bonding method may refer to the bonding method through the second connection part 1420. In this case, the second connection part 1420 may represent a metal layer formed between a plurality of components by recrystallization.

[0097] Specifically, the first connection part 1410, the second connection part 1420, and the third connection part 1430 may couple the plurality of components to each other by a thermocompression (TC) bonding method. Thermocompression bonding may refer to a method of directly coupling a plurality of components by applying heat and pressure to the first connection part 1410, the second connection part 1420, and the third connection part 1430.

[0098] At this time, at least one of the first circuit board 1100 and the second circuit board 1200 may be provided with a protrusion protruding outward from an insulating layer of the corresponding circuit board where the first connection part 1410, the second connection part 1420, and the third connection part 1430 are disposed. The protrusion may protrude outward from the first circuit board 1100 or the second circuit board 1200.

[0099] The protrusion can be referred to as a bump. The protrusion can also be referred to as a post. The protrusion can also be referred to as a pillar. Preferably, the protrusion can refer to an electrode of the second circuit board 1200 on which a second connection portion 1420 for coupling to the semiconductor device 1300 is provided. That is, as the pitch of the terminals of the semiconductor device 1300 becomes finer, a short circuit may occur between the plurality of second connection portions 1420 respectively connected to the plurality of terminals of the semiconductor device 1300 through a conductive adhesive such as solder. Therefore, in an embodiment, thermal compression bonding can be performed to reduce the volume of the second connection portion 1420. Additionally, in order to ensure diffusion prevention and alignment to prevent the intermetallic compound (IMC) formed between the conductive adhesive such as solder and the protrusion from diffusing into the interposer and / or the circuit board, the protrusion can be included in the electrode of the second circuit board 1200 on which the second connection portion 1420 is provided.

[0100] Additionally, the semiconductor package can include a connection member 1210.

[0101] The connection member can be referred to as a bridge circuit board. For example, the connection member 1210 can include a redistribution layer. The connection member 1210 can perform the function of horizontally electrically connecting a plurality of semiconductor devices to each other. For example, since the area of the semiconductor device is usually too large, the connection member 1210 can include a redistribution layer. Since there are significant differences between the semiconductor package and the semiconductor device in terms of the width or pitch of the circuit pattern, etc., a buffering effect of the circuit pattern is required for electrical connection. The buffering effect can mean having a size between the width or pitch of the circuit pattern of the semiconductor package and the width or pitch of the circuit pattern of the semiconductor device, and the redistribution layer can include a function of performing the buffering effect.

[0102] In one embodiment, the connection member 1210 can be an organic material bridge. For example, the connection member 1210 can include an organic material. For example, the connection member 1210 can include an organic circuit board containing an organic material instead of a silicon circuit board. The connection member 1210 can be embedded in the second circuit board 1200.

[0103] For this purpose, the second circuit board 1200 can include a cavity, and the connection member 1210 can be disposed in the cavity of the second circuit board 1200. The connection member 1210 can horizontally connect a plurality of semiconductor devices disposed on the second circuit board 1200.

[0104] Reference Figure 1b, the semiconductor package according to the second embodiment may include a second circuit board 1200 and a semiconductor device 1300. In this case, compared with the semiconductor package of the first embodiment, the semiconductor package of the second embodiment may have a structure in which the first circuit board 1100 is removed.

[0105] That is, the second circuit board 1200 of the second embodiment may be used as a package circuit board while performing the interposer function.

[0106] The first connection portion 1410 provided on the lower surface of the second circuit board 1200 may couple the second circuit board 1200 to the main board of the electronic device.

[0107] Reference Figure 1c , the semiconductor package according to the third embodiment may include a first circuit board 1100 and a semiconductor device 1300.

[0108] In this case, compared with the semiconductor package of the first embodiment, the semiconductor package of the third embodiment may have a structure in which the second circuit board 1200 is omitted.

[0109] That is, the first circuit board 1100 of the third embodiment may be used as a package circuit board while also performing the function of connecting the semiconductor device 1300 and the main board. To this end, the first circuit board 1100 may include a connection member 1110 for connecting a plurality of semiconductor devices. The connection member 1110 may be an organic material bridge connecting a plurality of semiconductor devices.

[0110] Reference Figure 1d , compared with the semiconductor package of the third embodiment, the semiconductor package of the fourth embodiment may further include a third semiconductor device 1330.

[0111] To this end, a fourth connection portion 1440 may be provided on the lower surface of the first circuit board 1100.

[0112] In addition, the third semiconductor device 1330 may be provided on the fourth connection portion 1400. That is, the semiconductor package of the fourth embodiment may have a structure in which semiconductor devices are respectively mounted on the upper side and the lower side.

[0113] In this case, the third semiconductor device 1330 may have a structure provided on the lower surface of the second circuit board 1200 in the semiconductor package Figure 1b

[0114] Reference Figure 1e, the semiconductor package according to the fifth embodiment may include a first circuit board 1100. A first semiconductor device 1310 and a second semiconductor device 1320 may be disposed on the first circuit board 1100. To this end, a first connection part 1410 may be disposed between the first circuit board 1100 and the first semiconductor device 1310 and the second semiconductor device 1320.

[0115] In addition, a connection member 1110 may be embedded in the first circuit board 1110. The connection member 1110 may horizontally connect the first semiconductor device 1310 and the second semiconductor device 1320.

[0116] In addition, the first circuit board 1100 may include a conductive coupling part 1450. The conductive coupling part 1450 may also protrude from the first circuit board 1100 toward the second semiconductor device 1320. The conductive coupling part 1450 may be referred to as a bump, or alternatively, may also be referred to as a pillar. The conductive coupling part 1450 may be arranged to have a protruding structure on the electrode disposed on the uppermost side of the first circuit board 1100.

[0117] A third semiconductor device 1330 may be disposed on the conductive coupling part 1450. In this case, the third semiconductor device 1330 may be connected to the first circuit board 1100 through the conductive coupling part 1450. In addition, a second connection part 1420 may be disposed between the first semiconductor device 1310 and the second semiconductor device 1320 and the third semiconductor device 1330.

[0118] Therefore, the third semiconductor device 1330 may be electrically connected to the first semiconductor device 1310 through the second connection part 1420.

[0119] That is, the third semiconductor device 1330 may be connected to the first circuit board 1100 through the conductive coupling part 1450, and may also be connected to the first semiconductor device 1310 and the second semiconductor device 1320 through the second connection part 1420.

[0120] In this case, the third semiconductor device 1330 may receive a power signal and / or electric power through the conductive coupling part 1450. In addition, the third semiconductor device 1330 may exchange communication signals with the first semiconductor device 1310 and the second semiconductor device 1320 through the second connection part 1420.

[0121] The semiconductor package according to the fifth embodiment may provide a power signal and / or electric power to the third semiconductor device 1330 through the conductive coupling part 1450, so as to provide sufficient power to drive the third semiconductor device 1330 or enable smooth control of the power operation.

[0122] Accordingly, the embodiment can improve the driving characteristics of the third semiconductor device 1330. That is, the embodiment can solve the problem of insufficient power supplied to the third semiconductor device 1330. In addition, in the embodiment, at least one of the power signal, the electric power, and the communication signal of the third semiconductor device 1330 can be provided through different paths passing through the conductive coupling part 1450 and the second connection part 1420. Thus, the embodiment can solve the problem that the communication signal is lost due to the power signal. For example, the embodiment can minimize the mutual interference between the communication signal and the power signal.

[0123] Meanwhile, the second semiconductor device 1320 in the fifth embodiment may have a POP (Package On Package) structure in which a plurality of package circuit boards are stacked, and may be disposed on the first circuit board 1100. For example, the third semiconductor device 1330 may be a memory package including a memory chip. Additionally, the memory package may be coupled to the conductive coupling part 1450. In this case, the memory package may not be connected to the first semiconductor device 1310 and the second semiconductor device 1320.

[0124] Figure 2 is a cross-sectional view of a circuit board according to the first embodiment. Figure 3 is a cross-sectional view of a circuit board according to the second embodiment. Figure 4 is viewed from the upward direction Figure 2 of the circuit board. Figure 5 is a cross-sectional view showing a state in which a plurality of semiconductor devices are coupled to Figure 3 the circuit board. Figure 6 is showing Figure 2 the detailed layer structure of the connection member. Figure 7 is viewed from the upward direction Figure 6 of the connection member. Figure 8 is according to the first embodiment Figure 3 the enlarged cross-sectional view of a partial area of the circuit board. Figure 9 is for explaining Figure 8 the interface between the stacked insulating layer and the connection member. Figure 10 is a cross-sectional view showing the detailed layer structure of the protruding electrode of the embodiment. Figure 11 is according to the second embodiment Figure 3 the enlarged cross-sectional view of a partial area of the circuit board. Figure 12 is according to the third embodiment Figure 3 the enlarged cross-sectional view of a partial area of the circuit board.

[0125] Hereinafter, a semiconductor package according to an embodiment will be specifically described with reference to Figures 2 to 12 specifically.

[0126] Before describing the embodiments, it can be distinguished according to whether the protruding electrode is provided on the uppermost side of the circuit board Figure 2 and Figure 3 . For example, Figure 3 the circuit board of can be provided with the protruding electrode 145. For example, Figure 2 the circuit board of may not be provided with the protruding electrode. In addition, by thinning the second insulating layer 112, Figure 2 the second insulating layer 112 of the circuit board of may include an opening having a width greater than that of the first electrode portion 130 and the second electrode portion 140. In addition, Figure 2 the circuit board of can be bonded to the semiconductor device at the opening, so that it can be stably bonded to the semiconductor device even without the protruding electrode.

[0127] Referring to Figure 2 and Figure 3 , the circuit board according to the first embodiment may include a stacked insulating layer 110, an electrode portion, and a connection member 200. The stacked insulating layer 110 may include a plurality of insulating layers stacked in the vertical direction. The stacked insulating layer 110 may include a first insulating layer 111, a second insulating layer 112, and a third insulating layer 113. The first insulating layer 111 may constitute the inner layer of the stacked insulating layer. The second insulating layer 112 may be provided on the first insulating layer 111. For example, the second insulating layer 112 may represent the insulating layer provided on the uppermost side of the stacked insulating layer. The third insulating layer 113 may be provided below the first insulating layer 111. For example, the third insulating layer 113 may represent the insulating layer provided on the lowermost side of the stacked insulating layer.

[0128] The first insulating layer 111 of the circuit board may have a layer structure of at least one layer. Preferably, the first insulating layer 111 of the circuit board may have a plurality of laminated structures. The laminated structure can be distinguished by the electrode portion. For example, the electrode portion may include a connection electrode 120 and a via electrode 125. The connection electrode 120 and the via electrode 125 may have different widths. In addition, the laminated structure can be distinguished by the difference in the widths of the connection electrode 120 and the via electrode 125. The connection electrode 120 may have a greater width than the via electrode 125. Thus, the connection electrode 120 and the via electrode 125 can be distinguished in the electrode portion. The connection electrode 120 may represent the pad and / or trace of the electrode portion. The via electrode 125 may represent the via electrode connected to the connection electrode. The via electrode 125 may be disposed between a plurality of connection electrodes 120 provided on different layers. Through the above laminated structure, the circuit board of the embodiment can electrically connect and effectively connect at least one semiconductor device and / or a second circuit board to the main board.

[0129] At this time, Figure 2The first insulating layer 111 of the circuit board is shown as having a 7-layer structure, but is not limited thereto. For example, the first insulating layer 111 of the circuit board may have 6 or fewer layers, or may have 8 or more layers. Additionally, when multiple first insulating layers 111 of the circuit board include the same insulating material, it may be impossible to distinguish the interfaces between the multiple insulating layers. In such a case, the laminated structure can be distinguished by the connection electrodes 120 and the through electrodes 125 of the electrode portion.

[0130] Meanwhile, when the first insulating layer 111 of the circuit board has a multi-layer structure, the multiple first insulating layers may include the same insulating material, but are not limited thereto. For example, at least one of the multiple first insulating layers may include an insulating material different from at least one other first insulating layer.

[0131] The first insulating layer 111 of the circuit board can be rigid or flexible. For example, the first insulating layer 111 of the circuit board may include glass or plastic. For example, the first insulating layer 111 of the circuit board may include chemically strengthened / semi-strengthened glass, such as soda lime glass or aluminosilicate glass. For example, the first insulating layer 111 of the circuit board may include reinforced or flexible plastic, such as Polyimide (PI), polyethylene terephthalate (PET), propylene glycol (PPG), or polycarbonate (PC). For example, the first insulating layer 111 of the circuit board may include sapphire. For example, the first insulating layer 111 of the circuit board may include an optically isotropic film. For example, the first insulating layer 111 of the circuit board may include COC (Cyclic Olefin Copolymer), COP (Cyclic Olefin Polymer), optically isotropic polycarbonate (PC), or optically isotropic polymethyl methacrylate (PMMA). For example, the first insulating layer 111 of the circuit board may be formed of a material including inorganic fillers and an insulating resin. For example, the first insulating layer 111 of the circuit board may have a structure in which inorganic fillers such as silica or alumina are disposed in a thermosetting resin or a thermoplastic resin.

[0132] The first insulating layer 111 may have a structure in which multiple different insulating materials are laminated, and exemplary arrangement structures will be described in more detail below.

[0133] In one embodiment, the first insulating layer 111 may include a first layer corresponding to a core layer including a reinforcing member. Here, the core layer may refer to an insulating layer that includes a reinforcing member and has a thickness exceeding 30 μm in the vertical direction. Additionally, the insulating layer may include a plurality of second layers respectively disposed on the upper and lower portions of the core layer and not including a reinforcing member. In this case, the circuit board may be a cored circuit board. The reinforcing member may also be referred to as a reinforcing fiber or a glass fiber.

[0134] The reinforcing member may refer to a glass fiber material extending in the horizontal direction of the insulating layer and may have a different meaning from inorganic fillers spaced apart from each other. That is, the reinforcing member of the first layer may have a different length or width in the horizontal direction from the filler of the second layer. Additionally, the reinforcing member of the first layer may have a structure elongated in one direction, but since the filler of the second layer has arbitrary dimensions and is dispersed and disposed, the reinforcing member of the first layer and the filler of the second layer may be distinguishable from each other. For example, the glass fiber may extend to have a width greater than the width of the first layer. Here, the meaning of having a width greater than the width of the first layer may indicate that the glass fiber may be disposed in a shape bent in the horizontal direction. Additionally, even if the second layer includes a filler, the effect of preventing problems such as bending is not greater than that of the glass fiber of the first layer, so the reinforcing member is described separately from the filler of the second layer.

[0135] In another embodiment, the first insulating layer 111 of the circuit board may be a coreless circuit board that does not include a core layer. For example, the first insulating layer 111 of the circuit board may include an organic material that does not include a reinforcing member, which enables excellent processability, thinning of the circuit board, and miniaturization of the electrode portion of the circuit board. For example, the first insulating layer 111 of the circuit board may use ABF (Ajinomoto Build-up Film, a product released by Ajinomoto Co., Ltd.), and may use FR-4, BT (Bismaleimide Triazine), PID (PhotoImageable Dielectric resin), BT, etc. For example, the first insulating layer 111 may include multiple layers composed of ABF.

[0136] At this time, if the first insulating layer 111 of the circuit board is only composed of ABF that does not include a reinforcing member, the warpage characteristics of the circuit board may deteriorate. Therefore, the first insulating layer 111 of the circuit board is composed of ABF (Ajinomoto Build-up Film), and at least one of the multiple ABFs constituting the first insulating layer of the circuit board may include a reinforcing member.

[0137] For example, the first insulating layer 111 of the circuit board may include a first layer composed of a first ABF including a resin and a filler. Additionally, the first insulating layer 111 of the circuit board may include a layer composed of a second ABF including a resin, a filler, and a reinforcing member. At this time, the reinforcing member included in the second ABF may include a GCP (Glass Core Primer) material, but is not limited thereto.

[0138] The layer of the first insulating layer 111 of the circuit board that does not include the reinforcing member may have a thickness in the range of 10 μm to 40 μm. Preferably, the layer of the first insulating layer 111 of the circuit board that does not include the reinforcing member may satisfy a thickness in the range of 15 μm to 35 μm. More preferably, the layer of the first insulating layer 111 of the circuit board that does not include the reinforcing member may satisfy a thickness in the range of 18 μm to 32 μm. If the thickness of the layer of the first insulating layer 111 of the circuit board that does not include the reinforcing member is less than 10 μm, the rigidity of the circuit board may deteriorate. Additionally, if the thickness of the layer of the first insulating layer 111 of the circuit board that does not include the reinforcing member is less than 10 μm, the electrode portion of the circuit board 100 may not be stably protected, and thus the electrical reliability may deteriorate. Additionally, if the thickness of the layer of the first insulating layer 111 of the circuit board that does not include the reinforcing member exceeds 40 μm, the total thickness of the circuit board may increase, and thus, the thickness of the semiconductor package may increase. Additionally, if the thickness of the layer of the first insulating layer 111 of the circuit board that does not include the reinforcing member exceeds 40 μm, it may be difficult to miniaturize the electrode portion of the circuit board.

[0139] The thickness may correspond to the distance in the vertical direction of the circuit board between the connection electrodes 120 provided in different layers. That is, the thickness may represent the length in the direction from the upper surface to the lower surface or from the lower surface to the upper surface of the circuit board, and may represent the length in the vertical direction of the circuit board. Here, the upper surface may represent the highest position in the vertical direction in each component, and the lower surface may represent the lowest position in the vertical direction in each component. Additionally, their positions may be referred to conversely.

[0140] The upper surface of the first insulating layer 111 may have steps. For example, the first insulating layer 111 may include a raised portion. Alternatively, the first insulating layer 111 may include a recessed portion. For example, the upper surface of the first insulating layer 111 that vertically overlaps with the connection member 200 and the upper surface that does not vertically overlap with the connection member 200 may have different heights. This will be described in more detail below.

[0141] In addition, the insulating layer of the circuit board may include a second insulating layer 112 and a third insulating layer 113. The second insulating layer 112 and the third insulating layer 113 of the circuit board may be resist layers. For example, the second insulating layer 112 of the circuit board may be a first resist layer provided on the uppermost side of the circuit board. In addition, the third insulating layer 113 of the circuit board may be a second resist layer provided on the lowermost side of the circuit board. The resist layer may have a function of preventing solder flow during solder bonding by having low wettability characteristics of the solder, or may have a function of preventing moisture or contaminants from penetrating from the outside into the interior of the circuit board.

[0142] At this time, the second insulating layer 112 of the circuit board may include the same insulating material as the first insulating layer 111 of the circuit board. For example, when the first insulating layer 111 of the circuit board is composed of multiple layers, the first insulating layer closest to the second insulating layer 112 among the multiple first insulating layers may include the same insulating material as the second insulating layer 112. In this case, it may be difficult to distinguish the interface between the first insulating layer 111 and the second insulating layer 112 of the circuit board. In this case, the connection electrode 120 and the via electrode 125 of the electrode portion provided on the first insulating layer 111 and the second insulating layer 112 of the circuit board can be used to distinguish the interface between the first insulating layer 111 and the second insulating layer 112 of the circuit board.

[0143] Accordingly, the third insulating layer 113 of the circuit board may include the same insulating material as the first insulating layer 111 of the circuit board.

[0144] The second insulating layer 112 and the third insulating layer 113 of the circuit board may have functions of protecting the upper surface and the lower surface of the first insulating layer 111 of the circuit board, respectively. Therefore, the second insulating layer 112 and the third insulating layer 113 of the circuit board may be referred to as protective layers. For example, the second insulating layer 112 may be an upper protective layer provided on the first insulating layer 111 stacked in the vertical direction, and the third insulating layer 113 may be a lower protective layer.

[0145] The second insulating layer 112 and the third insulating layer 113 of the circuit board may be solder mask layers including an organic polymer material. For example, the second insulating layer 112 and the third insulating layer 113 of the circuit board may include epoxy acrylate series resins. Specifically, the second insulating layer 112 and the third insulating layer 113 of the circuit board may include resins, curing agents, photoinitiators, pigments, solvents, fillers, additives, acrylic monomers, etc. However, the embodiments are not limited thereto, and the second insulating layer 112 and the third insulating layer 113 of the circuit board may be any one of a photosensitive solder mask layer, a cover-lay, and a polymer material.

[0146] The thickness of each of the second insulating layer 112 and the third insulating layer 113 of the circuit board may be from 1 μm to 20 μm. The thickness of each of the second insulating layer 112 and the third insulating layer 113 of the circuit board may be from 1 μm to 15 μm. For example, the thickness of each of the second insulating layer 112 and the third insulating layer 113 of the circuit board may be from 5 μm to 20 μm.

[0147] If the thickness of each of the second insulating layer 112 and the third insulating layer 113 of the circuit board exceeds 20 μm, the thickness of the semiconductor package may increase, so it may be difficult to form a thin film, or the stress applied to the first insulating layer 111 may increase. If the thickness of each of the second insulating layer 112 and the third insulating layer 113 of the circuit board is less than 1 μm, it may be difficult to stably protect the electrode portions included in the circuit board, so the electrical reliability or physical reliability may deteriorate.

[0148] Meanwhile, the upper surface of the second insulating layer 112 may have steps. For example, the second insulating layer 112 may include a protruding portion. Alternatively, the second insulating layer 112 may include a recessed portion. For example, the upper surface of the second insulating layer 112 that vertically overlaps with the connection member 200 and the upper surface that does not vertically overlap with the connection member 200 may have different heights. This will be described in more detail below.

[0149] The circuit board may include electrode portions. The electrode portions of the circuit board may be provided in the first insulating layer 111. For example, at least a part of the electrode portions may be embedded in the first insulating layer 111. For example, at least a part of the electrode portions may be embedded in the second insulating layer 112. For example, at least a part of the electrode portions may be embedded in the third insulating layer 113. In addition, at least a part of the electrode portions may protrude above the second insulating layer 112. In addition, at least a part of the electrode portions may protrude below the third insulating layer 113.

[0150] The electrode portions may mainly include connection electrodes 120 and via electrodes 125. The connection electrodes 120 may be provided adjacent to the upper surface or the lower surface of each layer of the first insulating layer 111. The via electrodes 125 may be connected to the connection electrodes 120. The via electrodes 125 may penetrate at least a part of each layer of the first insulating layer 111. At this time, depending on the position and function, the connection electrodes 120 may be referred to as pads or traces. In addition, the via electrodes 125 may also be referred to as via electrodes 125.

[0151] At this time, when the first insulating layer 111 of the circuit board has a 7-layer structure, the via electrodes 125 of the electrode portions may have a 4-layer structure, with each connection electrode 120 inserted therebetween and spaced apart from each other in the vertical direction.

[0152] Meanwhile, at least one of the connection electrodes 120 of the circuit board may have an ETS (Embedded Trace Substrate) structure. For example, the electrode disposed on the uppermost or lowermost side of the connection electrode 120 may be disposed in a recess provided in the first insulating layer 111. The ETS structure may also be referred to as a concretized structure. Compared with the electrode portion having a general protruding structure, the ETS structure is conducive to miniaturization. Therefore, the embodiment can enable the formation of the electrode to correspond to the size and pitch of the terminals provided in the semiconductor device. Thus, the embodiment can improve circuit integration. In addition, the embodiment can minimize the transmission distance of the signal transmitted through the semiconductor device, thereby minimizing the signal transmission loss.

[0153] The connection electrode 120 may have a function of transmitting a signal in the horizontal direction in the first insulating layer 111. In addition, the connection electrode 120 may have a function of connecting between the plurality of through electrodes 125. The through electrode 125 may have a function of transmitting a signal in the vertical direction in the first insulating layer 111. For example, the through electrode 125 may connect the connection electrodes 120 provided in different layers in the vertical direction.

[0154] According to the position, the electrode portion may include a plurality of electrode portions. For example, the electrode portion may include a plurality of electrode portions connected to the semiconductor device and / or the connection member 200.

[0155] The electrode portion may include a first electrode portion 130 and a second electrode portion 140. The first electrode portion 130 and the second electrode portion 140 may be distinguished based on the position of the connection member 200 embedded in the first insulating layer 111. The first electrode portion 130 and the second electrode portion 140 may penetrate from the upper surface of the first insulating layer 111 to a partial area of the first insulating layer 111.

[0156] The first electrode portion 130 may vertically overlap with the connection member 200 and penetrate from the upper surface of the first insulating layer 111 to a part of the first insulating layer 111. For example, the first electrode portion 130 may be an electrode connecting the semiconductor device and the connection member 200. A part of the first electrode portion 130 may be connected to the first semiconductor device, and the remaining part may be connected to the second semiconductor device. In addition, the first electrode portion 130 may be connected to the connection member 200 to electrically connect the first semiconductor device and the second semiconductor device.

[0157] The second electrode portion 140 may penetrate from the upper surface of the first insulating layer 111 to a part of the first insulating layer without vertically overlapping with the connection member 200. The second electrode portion 140 may be an electrode portion that horizontally overlaps with the first electrode portion 130. The second electrode portion 140 may be an electrode connected to a semiconductor device. For example, the second electrode portion 140 may be an electrode portion connected to the same semiconductor device as the semiconductor device to which the first electrode portion 130 is connected. However, different from the first electrode portion 130, the second electrode portion 140 may not be directly electrically connected to the connection member 200. The second electrode portion may be electrically connected between the circuit board and the first semiconductor device and / or the second semiconductor device.

[0158] The first electrode portion 130 and the second electrode portion 140 may be disposed above the connection member 200 in the first insulating layer 111. The first electrode portion 130 may represent an electrode portion that vertically overlaps with the connection member 200. Additionally, the second electrode portion 140 may represent an electrode portion that horizontally overlaps with the first electrode portion 130 but does not vertically overlap with the connection member 200.

[0159] Additionally, each of the first electrode portion 130 and the second electrode portion 140 may represent an electrode connected to a semiconductor device. For example, the first semiconductor device and the second semiconductor device may be disposed on the circuit board of the embodiment at intervals from each other in the horizontal direction. Additionally, the first electrode portion 130 may represent an electrode portion that vertically overlaps with the connection member 200 and is connected to the first semiconductor device and the second semiconductor device. Additionally, the second electrode portion 140 may represent an electrode portion that is connected to at least one of the first semiconductor device and the second semiconductor device without vertically overlapping with the connection member 200.

[0160] Specifically, the first electrode portion 130 may penetrate from the upper surface of the first insulating layer 111 to a part of the region in the first insulating layer 111 that vertically overlaps with the connection member 200. In one embodiment, the first electrode portion 130 may be an electrode directly connecting the semiconductor device and the connection member. In another embodiment, the first electrode portion 130 may be an electrode connecting between the first protruding electrode 135 connected to the semiconductor device and the connection member 200.

[0161] The second electrode portion 140 may penetrate from the upper surface of the first insulating layer 111 to a part of the region in the first insulating layer 111 that does not vertically overlap with the connection member 200. In one embodiment, the second electrode portion 140 may be an electrode directly connected to the same semiconductor device as the first electrode portion 130. In another embodiment, the second electrode portion 140 may be an electrode connected to the second protruding electrode 145 connected to the semiconductor device.

[0162] The first protruding electrode 135 and the second protruding electrode 145 can be bumps. The first protruding electrode 135 and the second protruding electrode 145 can be provided to facilitate the coupling between the circuit board and the semiconductor device. The first protruding electrode 135 and the second protruding electrode 145 can refer to electrodes on which a conductive adhesive for bonding with the semiconductor device is provided.

[0163] The first electrode portion 130 can be connected to the connection member 200. For example, the first electrode portion 130 can be connected to the pad 310 provided on the connection member 200.

[0164] In addition, the second electrode portion 140 can be connected to the connection electrode 143 that horizontally overlaps the connection member 200 or the first electrode portion 130. At this time, the heights of the upper surface of the connection electrode 143 and the upper surface of the pad 310 of the connection electrode 143 can be different from each other.

[0165] Therefore, the lower surfaces of the first electrode portion 130 and the second electrode portion 140 can have different heights.

[0166] In one embodiment, the lower surface of the first electrode portion 130 can be positioned lower than the lower surface of the second electrode portion 140. At this time, the upper surface of the first electrode portion 130 can be positioned lower than the upper surface of the second electrode portion 140.

[0167] In another embodiment, the lower surface of the first electrode portion 130 can be positioned lower than the lower surface of the second electrode portion 140. At this time, the upper surface of the first electrode portion 130 can be positioned higher than the upper surface of the second electrode portion 140.

[0168] The electrode portion can include a third electrode portion 150. The third electrode portion 150 can be embedded in the first insulating layer 111. For example, the third electrode portion 150 can penetrate a part of the region inside the first insulating layer 111. The third electrode portion 150 can be connected to the third semiconductor device 220 embedded in the first insulating layer 111. For example, the third electrode portion 150 can vertically overlap the third semiconductor device 220. The lower surface of the third electrode portion 150 can be connected to the terminal 225 of the third semiconductor device 220. The third electrode portion 150 can have the function of electrically connecting between the circuit board and the terminal 225 of the embedded third semiconductor device 220.

[0169] The electrode portion may include a fourth electrode portion 160. The fourth electrode portion 160 may be embedded in the first insulating layer 111. For example, the fourth electrode portion 160 may penetrate a part of the region inside the first insulating layer 111. The fourth electrode portion 160 may be connected to a fourth semiconductor device 230 embedded in the first insulating layer 111. For example, the fourth electrode portion 160 may vertically overlap the fourth semiconductor device 230. The lower surface of the fourth electrode portion 160 may be connected to a terminal 235 of the fourth semiconductor device 230. The fourth electrode portion 160 may be used for electrically connecting between the circuit board and the terminal 235 of the embedded fourth semiconductor device 230.

[0170] The electrode portion may include a fifth electrode portion 170. The fifth electrode portion 170 may vertically overlap the connection member 200. The fifth electrode portion 170 may be embedded in the first insulating layer 111. The fifth electrode portion 170 may be an electrode for forming a receiving space for receiving the connection member 200 in the first insulating layer 111. For example, the fifth electrode portion 170 may be an etch stop electrode. For example, the fifth electrode portion 170 may be a laser stop electrode.

[0171] The electrode portion may include a protruding electrode. The electrode portion may include a first protruding electrode 135. The first protruding electrode 135 may be disposed on the first electrode portion 130. The first protruding electrode 135 may protrude onto the second insulating layer 112. The first protruding electrode 135 may improve the bonding between the semiconductor device and the circuit board. The fact that the first protruding electrode 135 protrudes above the second insulating layer 112 may indicate that the upper surface of the first protruding electrode 135 is positioned higher than the upper surfaces of other components of the circuit board. For example, this may indicate that the upper surface of the first protruding electrode 135 is located on the uppermost side of the circuit board.

[0172] In addition, the electrode portion may include a second protruding electrode 145. The second protruding electrode 145 may be disposed on the second electrode portion 140. The second protruding electrode 145 may protrude above the second insulating layer 112. The second protruding electrode 145 may improve the bonding between the semiconductor device and the circuit board. The fact that the second protruding electrode 145 protrudes above the second insulating layer 112 may indicate that the upper surface of the second protruding electrode 145 is positioned higher than the upper surfaces of other components of the circuit board. For example, this may indicate that the upper surface of the second protruding electrode 145 is located on the uppermost side of the circuit board together with the first protruding electrode 135.

[0173] The first protruding electrode 135 and the second protruding electrode 145 can be referred to as bumps. The first protruding electrode 135 and the second protruding electrode 145 can also be referred to as posts. The first protruding electrode 135 and the second protruding electrode 145 can also be referred to as pillars. Preferably, the first protruding electrode 135 and the second protruding electrode 145 can refer to electrodes provided with conductive bonding members for coupling to semiconductor devices. That is, as the pitch of the terminals of the semiconductor device becomes finer, a short circuit may occur between a plurality of conductive connection members each connected to a plurality of terminals of the semiconductor device through a conductive adhesive such as solder. Therefore, in an embodiment, thermal compression bonding may be performed to reduce the volume of the conductive bonding member. Accordingly, the embodiment is provided with the first protruding electrode 135 and the second protruding electrode 145 to ensure diffusion prevention ability to prevent an intermetallic compound (IMC) formed between a conductive adhesive such as solder and the protrusion from diffusing into the circuit board, such as alignment, diffusion, etc.

[0174] The connection member 200 may be embedded in the first insulating layer 111. In an embodiment, the connection member 200 may be an organic bridge. For example, the organic bridge may be a bridge including an organic insulating layer. The organic bridge may be embedded in the first insulating layer 111 and may be used to connect between different semiconductor devices therethrough. To this end, the organic bridge may be provided with electrodes having a higher density or finer pitch than the electrode portions of the circuit board and may be horizontally connected between a plurality of semiconductor devices mounted on the circuit board therethrough.

[0175] The connection member 200 may be embedded in the first insulating layer 111. At this time, at least a part of the insulating layer constituting the connection member 200 may include an insulating material different from the insulating material of the first insulating layer 111. Accordingly, at least a part of the side surface of the connection member 200 embedded in the first insulating layer 111 may be distinguishable from the first insulating layer 111. The side surface of the connection member 200 may have a step. For example, the connection member 200 may be composed of multiple layers. In addition, the multiple layers of the connection member 200 may have different widths. Therefore, the connection member 200 may have a structure in which multiple layers having different widths are laminated, so that the side surface may have a step.

[0176] The connection member 200 may include a plurality of insulating layers including different insulating materials. In addition, the side surfaces of the plurality of insulating layers may have steps. In addition, the side surface of the connection member 200 having a step may be in contact with the first insulating layer 111. Accordingly, the contact area between the first insulating layer 111 and the connection member 200 may be improved. Accordingly, the problem of the connection member 200 peeling off from the first insulating layer 111 may be solved.

[0177] Meanwhile, the connection member 200 may include an insulating member 180. The insulating member 180 may be an adhesive member. For example, the insulating member 180 may be disposed between the fifth electrode portion 170 and the connection member 200. The insulating member 180 may have a different width from the connection member 200. For example, the width of the insulating member 180 may be greater than the width of the region having the maximum width among the outer widths of the connection member 200. The insulating member 180 may be disposed on the fifth electrode portion 170. The width of the insulating member 180 may be smaller than the width of the fifth electrode portion 170. Accordingly, at least a part of the upper surface of the fifth electrode portion 170 may be in contact with the insulating member 180, and the remaining part may be in contact with the first insulating layer 111.

[0178] Meanwhile, a plurality of semiconductor devices may be coupled to the circuit board.

[0179] For example, a plurality of semiconductor devices may be coupled to the circuit board. For example, a plurality of semiconductor devices may be embedded in the circuit board.

[0180] Specifically, a plurality of semiconductor devices may be coupled to the outside of the circuit board and spaced apart from each other in a horizontal direction. In addition, a plurality of semiconductor devices may be embedded in the first insulating layer 111 of the circuit board and spaced apart from each other in a horizontal direction.

[0181] For example, the first insulating layer 111 may include a first receiving portion 110TH1 in which a third semiconductor device 220 is embedded. In addition, the third semiconductor device 220 may be embedded in the first receiving portion 110TH1. In addition, the third semiconductor device 220 may be connected to the third electrode portion 150. The third semiconductor device 220 may be an Integrated Passive Device (IPD), but is not limited thereto.

[0182] In addition, the first insulating layer 111 may include a second receiving portion 110TH2 in which a fourth semiconductor device 230 is embedded. In addition, the fourth semiconductor device 230 may be embedded in the second receiving portion 110TH2 of the first insulating layer 111. The fourth semiconductor device 230 may be connected to the fourth electrode portion 160. The fourth semiconductor device 230 may be a multi-layer ceramic capacitor (MLCC, Multi-Layer Ceramic Condenser (multi-layer ceramic capacitor), Multi-Layer Ceramic Capacitor (multi-layer ceramic capacitor)) or an Si-based capacitor, but is not limited thereto.

[0183] Hereinafter, the detailed structures of the connection member 200, the first electrode portion 130, the second electrode portion 140, the pad 210 of the connection member 200, and the connection electrode 143 according to the embodiments will be specifically described.

[0184] Reference Figure 4 and Figure 5 ,the first electrode portion 130 and the second electrode portion 140 can be divided into multiple groups.

[0185] For example, each of the first electrode portion 130 and the second electrode portion 140 can be an electrode portion connected to a semiconductor device. For example, the semiconductor device can include a first semiconductor device 240 and a second semiconductor device 250. Additionally, each of the first electrode portion 130 and the second electrode portion 140 can represent an electrode connected to the first semiconductor device and the second semiconductor device.

[0186] In addition, the first electrode portion 130 and the second electrode portion 140 can be distinguished from each other according to their positions. For example, the first electrode portion 130 can be an electrode portion vertically overlapping with the connecting member 200. Additionally, the second electrode portion 140 can be an electrode portion horizontally overlapping with the first electrode portion 130 but not vertically overlapping with the connecting member 200.

[0187] Each of the first electrode portion 130 and the second electrode portion 140 can be divided into multiple groups.

[0188] The first electrode portion 130 can include a first group of the first electrode portion 130A and a second group of the first electrode portion 130B. The first group of the first electrode portion 130A can represent an electrode portion vertically overlapping with the first semiconductor device 240. For example, the first group of the first electrode portion 130A can represent an electrode portion connected to the first semiconductor device 240. The second group of the first electrode portion 130B can represent an electrode portion vertically overlapping with the second semiconductor device 250. For example, the second group of the first electrode portion 120B can represent an electrode portion connected to the second semiconductor device 250.

[0189] The second electrode portion 140 can include a first group of the second electrode portion 140A and a second group of the second electrode portion 140B. The first group of the second electrode portion 140A can be disposed adjacent to the first group of the first electrode portion 130A. For example, the first group of the second electrode portion 140A can be disposed on one side of the first group of the first electrode portion 130A. The first group of the second electrode portion 140A can vertically overlap with the first semiconductor device. The first group of the second electrode portion 140A can be connected to the first semiconductor device. The second group of the second electrode portion 140B can be disposed adjacent to the second group of the first electrode portion 130B. For example, the second group of the second electrode portion 140B can be disposed on the other side of the second group of the first electrode portion 140B. The second group of the second electrode portion 140B can vertically overlap with the second semiconductor device. The second group of the second electrode portion 140B can be connected to the first semiconductor device.

[0190] Accordingly, the first protruding electrode 135 may include a first group of first protruding electrodes disposed on the first group of first electrode portions 130A, and a second group of first protruding electrodes disposed on the second group of first electrode portions 130B.

[0191] In addition, the second protruding electrode 145 may include a first group of second protruding electrodes disposed on the first group of second electrode portions 140A, and a second group of second protruding electrodes disposed on the second group of second electrode portions 140B.

[0192] In addition, the conductive adhesive member 260 may be disposed on the first group of first protruding electrodes, the second group of first protruding electrodes, the first group of second protruding electrodes, and the second group of second protruding electrodes.

[0193] Meanwhile, referring Figure 6 and Figure 7 , the connection member 200 may be an organic bridge. The connection member 200 may include an organic insulating layer. For example, the connection member 200 may include a plurality of organic insulating layers.

[0194] The connection member 200 may include a first insulating layer 201, a second insulating layer 202, and a third insulating layer 203.

[0195] In addition, the first insulating layer 201, the second insulating layer 202, and the third insulating layer 203 may include different insulating materials. However, the embodiments are not limited thereto. For example, the first insulating layer 201 may include an organic material. The first insulating layer 201 may include a material different from that of the second insulating layer 202, but is not limited thereto.

[0196] The first insulating layer 201 may have properties that enable the formation of an electrode layer 206 of the connection member 200 including a microelectrode pattern. For example, the first insulating layer 201 may include an insulating material having excellent processability and elasticity. For example, the first insulating layer 201 of the connection member 200 may include polyimide (PI). In this case, the connection member of the prior art is an inorganic bridge, such as a silicon bridge. Silicon has a different coefficient of thermal expansion from that of the first insulating layer 111 of the circuit board, so there may be a problem of being prone to cracks due to thermal stress. In addition, compared with a silicon bridge, an organic bridge may have advantages such as reducing the process unit cost or material cost, thereby reducing the total price of the product.

[0197] In contrast, the first insulating layer 201 of the connection member 200 of the embodiment may include an organic material having a coefficient of thermal expansion similar to that of the first insulating layer 111 of the circuit board. Accordingly, the embodiment can minimize the stress applied to the connection member 200. In addition, the embodiment can solve the problems of cracks occurring in the connection member 200 or the connection member 200 peeling off from the circuit board. Accordingly, the embodiment can improve the mechanical reliability and electrical reliability of the semiconductor package.

[0198] In addition, the embodiment can reduce the cost of the connection member 200 by changing the first insulating layer 201 of the connection member 200 to polyimide, which is cheaper than silicon.

[0199] In addition, the connection member 200 may be provided with via electrodes having a small width. In addition, the alignment state between the plurality of via electrodes provided in different layers may have a great influence on the operating characteristics of the connection member 200, the operating characteristics of the semiconductor package, and the operating characteristics of an electronic product or a server to which the semiconductor package is applied. At this time, the polyimide may have a transparent property. Accordingly, the embodiment can improve the alignment state of the plurality of via electrodes provided in different layers. Thereby, the operating characteristics of the connection member 200, the operating characteristics of the semiconductor package, and the operating characteristics of an electronic product or a server to which the semiconductor package is applied can be further improved.

[0200] In addition, the first insulating layer 201 may refer to an insulating layer provided in the inner layer of the connection member 200. In addition, the overall characteristics of the connection member 200 may be determined by the characteristics of the first insulating layer 201. At this time, the first insulating layer 201 may have elasticity and at the same time have a coefficient of thermal expansion similar to that of the insulating layer of the circuit board. Accordingly, when the circuit board is thermally deformed, the first insulating layer 201 of the connection member 200 may flow together with the circuit board. Accordingly, the embodiment can solve the problem of cracks in the connection member 200 that may occur due to the thermal deformation of the circuit board.

[0201] In addition, by including polyimide (PI) in the first insulating layer 201 of the connection member 200, the embodiment can easily control the thickness of the connection member 200. Accordingly, the embodiment can minimize the difference between the depth of the cavity C, which is the accommodation space of the connection member 200 formed in the circuit board, and the thickness of the connection member 200. Accordingly, the embodiment can minimize the height difference between the first electrode portion 130 and the second electrode portion 140 and / or the height difference between the first protrusion electrode 135 and the second protrusion electrode 145. Accordingly, the embodiment can stably couple the semiconductor device to the first protrusion electrode 135 and the second protrusion electrode 145.

[0202] The connecting member 200 may include a second insulating layer 202 disposed on the first insulating layer 201. The second insulating layer 202 may include an insulating material different from that of the first insulating layer 201, but is not limited thereto. For example, the second insulating layer 202 may include polyimide, which is the same insulating material as the first insulating layer 201. For example, the first insulating layer 201 may include the same insulating material as the second insulating layer 202 described below, rather than polyimide.

[0203] The second insulating layer 202 may include a photosensitive material. For example, the second insulating layer 202 may include PID. For example, the second insulating layer 202 may be a PID in which the photosensitive material is a resin layer and the filler is dispersed in the resin layer.

[0204] In another embodiment, the second insulating layer 202 may include the same insulating material as the first insulating layer 111 of the circuit board. For example, the second insulating layer 202 may include ABF, which is the same insulating material as the first insulating layer 111 of the circuit board. At the same time, the second insulating layer 202 may be disposed on each of the two surfaces of the first insulating layer 201.

[0205] In addition, the connecting member 200 may include a third insulating layer 203 disposed on the second insulating layer 202. The third insulating layer 203 may be a protective layer. For example, the third insulating layer 203 may be a solder resist layer.

[0206] At this time, the side surface of the connecting member 200 may have a step. For example, the first insulating layer 201, the second insulating layer 202, and the third insulating layer 203 of the connecting member 200 may have a step.

[0207] For example, the width of the first insulating layer 201 of the connecting member 200 in the horizontal direction may be different from the width of the second insulating layer 202 in the horizontal direction and the width of the third insulating layer 203 in the horizontal direction. Preferably, the width of the first insulating layer 201 of the connecting member 200 in the horizontal direction may be greater than the width of the second insulating layer 202 in the horizontal direction and the width of the third insulating layer 203 in the horizontal direction.

[0208] That is, among the insulating layers of the connecting member 200, the elasticity and / or rigidity of the first insulating layer 201 may be the highest compared to the second insulating layer 202 and the third insulating layer 203. Therefore, the embodiment allows the first insulating layer 201 of the connecting member 200 to have the maximum width. Therefore, the embodiment allows the impact applied to the connecting member 200 to be absorbed by the first insulating layer 201, thereby preventing it from being transmitted to the second insulating layer 202 and / or the third insulating layer 203.

[0209] In addition, the width of the second insulating layer 202 of the connection member 200 in the horizontal direction may be different from the width of the third insulating layer 203 in the horizontal direction. The width of the second insulating layer 202 in the horizontal direction may be greater than the width of the third insulating layer 203 in the horizontal direction. At this time, the third insulating layer 203 may be a solder resist, and thus, cracks may easily occur due to external impact. In addition, the manufacturing process of the connection member 200 may include a sawing process. The above sawing process may be a process for separately separating a plurality of connection members. At this time, if impact is applied to the third insulating layer 203 during the above sawing process, there is a problem that cracks may occur in the third insulating layer 203. Therefore, by making the width of the third insulating layer 203 smaller than the widths of the first insulating layer 201 and the second insulating layer 202, the embodiment enables the third insulating layer 203 to be protected from impact.

[0210] Specifically, the horizontal distance W1 from the side end of the first insulating layer 201 of the connection member 200 to the side end of the third insulating layer 203 may satisfy the range of 50 μm to 70 μm. If the horizontal distance W1 from the side end of the first insulating layer 201 of the connection member 200 to the side end of the third insulating layer 203 is less than 50 μm, impact may be applied to the third insulating layer 203 during the sawing process, and thus cracks may occur in the third insulating layer 203. In addition, if the horizontal distance W1 from the side end of the first insulating layer 201 of the connection member 200 to the side end of the third insulating layer 203 exceeds 70 μm, it may not be possible to stably protect the circuit layer included in the connection member 200, or the area where no circuit layer is provided in the connection member 200 may be increased, and thus circuit integration may be reduced.

[0211] Therefore, the side surfaces of the first insulating layer 201, the second insulating layer 202, and the third insulating layer 203 of the connection member 200 may have steps with each other. Thus, the steps on the side surface of the connection member 200 may contact the insulating layer of the circuit board, thereby increasing the contact area.

[0212] At this time, the third insulating layer 203 of the connection member 200 may be attached to the insulating member 180. At this time, the insulating member 180 may have a width different from the horizontal width of the connection member 200. For example, the width of the insulating member 180 may be greater than the width of the connection member 200 of the insulating member 180. Thus, the embodiment may further improve the bonding strength between the connection member 200 and the insulating member 180, and further improve the bonding strength with the insulating layer of the circuit board.

[0213] Meanwhile, the connection member 200 may be provided with a circuit pattern. The circuit pattern 206 may include a connection pattern 204 and a via pattern 205. The connection circuit 204 and the via circuit 205 may correspond to the connection electrode and the via electrode of the circuit board, respectively.

[0214] Each of the connection pattern 204 and the via pattern 205 of the circuit pattern 206 may have a different size from the connection electrode and the via electrode of the circuit board. For example, the connection pattern 204 and the via pattern 205 of the circuit pattern 206 of the connection member 200 may be finer than the connection electrode and the via electrode of the circuit board.

[0215] The connection pattern 204 and the via pattern 205 of the circuit pattern 206 may each include a plurality of metal layers. The plurality of metal layers may include a first metal layer and a second metal layer.

[0216] The first metal layer may be a metal layer formed by sputtering. The first metal layer may be a seed layer. The first metal layer may have a single-layer structure, or alternatively, may have a double-layer structure.

[0217] When the first metal layer has a single-layer structure, the first metal layer may only include a first layer containing at least one of nickel (Ni) and chromium (Cr). Additionally, when the first metal layer has a double-layer structure, the first metal layer may further include a second layer containing copper (Cu) on the first layer. Hereinafter, the first metal layer will be described as including the first layer and the second layer. However, the embodiments are not limited thereto.

[0218] The first layer of the first metal layer includes at least one of nickel (Ni) and chromium (Cr) formed by a sputtering process. Additionally, the second layer of the first metal layer may be formed by sputtering a copper (Cu)-containing metal on the first layer of the first metal layer.

[0219] The first layer of the first metal layer may have a thickness of 0.01 μm to 0.15 μm. For example, the first layer of the first metal layer may have a thickness of 0.03 μm to 0.14 μm. For example, the first layer of the first metal layer may have a thickness of 0.05 μm to 0.12 μm. If the first layer of the first metal layer is less than 0.01 μm, the first metal layer may not be able to be used as a seed layer. Additionally, if the first layer of the first metal layer is less than 0.01 μm, the adhesion between the first metal layer and the second metal layer may not be ensured.

[0220] Additionally, if the thickness of the first layer of the first metal layer is greater than 0.15 μm, the line width and the pitch of the connection pattern 204 of the connection member 200 may increase. For example, if the thickness of the first layer of the first metal layer is greater than 0.15 μm, it may be difficult to micronize the connection pattern 204 of the connection member 200.

[0221] The second layer of the first metal layer may have a thickness in the range of 0.1 μm to 0.35 μm. For example, the second layer of the first metal layer may have a thickness in the range of 0.12 μm to 0.34 μm. For example, the second layer of the first metal layer may have a thickness in the range of 0.15 μm to 0.33 μm.

[0222] Meanwhile, the total thickness of the first layer and the second layer including the first metal layer may be 0.5 μm or less. Preferably, the total thickness of the first layer and the second layer including the first metal layer may be 0.4 μm or less. More preferably, the total thickness of the first layer and the second layer including the first metal layer may be 0.3 μm or less. If the total thickness of the first layer and the second layer including the first metal layer exceeds 0.5 μm, it may be difficult to miniaturize the connection member 200. Specifically, the process of forming the connection pattern 204 of the connection member 200 includes a seed layer removal process for removing the first metal layer. At this time, as the thickness of the first metal layer increases, the amount of etching in the seed layer processing increases, so it may be difficult to miniaturize the connection pattern 204 of the connection member 200.

[0223] The first metal layer of the embodiment is formed by a sputtering process, and miniaturization of the connection pattern 204 is possible.

[0224] The second metal layer may be an electroplated layer formed by electroplating the first metal layer as a seed layer. The second metal layer may have a thickness in the range of 2 μm to 12 μm. The second metal layer may have a thickness in the range of 3 μm to 11 μm. The second metal layer may have a thickness in the range of 4 μm to 10 μm.

[0225] If the thickness of the second metal layer is less than 2 μm, the second metal layer is also etched together during the process of etching the seed layer, and it may be difficult to normally realize the connection pattern 204. If the thickness of the second metal layer is greater than 12 μm, it may be difficult to miniaturize the connection pattern 204 of the connection member 200.

[0226] The thickness of the connection pattern 204 of the connection member 200 as described above may have a thickness in the range of 3 μm to 13 μm. The thickness of the connection pattern 204 of the connection member 200 having the layer structure as described above may have a thickness in the range of 4 μm to 12 μm. The thickness of the connection pattern 204 of the connection member 200 may have a thickness in the range of 5 μm to 11 μm. If the thickness of the connection pattern 204 of the connection member 200 is less than 5 μm, the resistance of the connection pattern 204 may increase, thereby deteriorating the characteristics of the electrical signals used for communicating with the first semiconductor device and the second semiconductor device. If the thickness of the connection pattern 204 of the connection member 200 exceeds 11 μm, it may be difficult to realize the fine pattern required for the connection member 200.

[0227] Therefore, the connection pattern 204 can be an ultra-fine pattern. For example, the connection pattern 204 can have a line width of 5 μm or less. For example, the connection pattern 204 can have a line width of 3 μm or less. For example, the connection pattern 204 can have a line width of 2 μm or less. The connection pattern 204 can have a pitch of 5 μm or less. The pitch can represent the pitch between the traces of the connection pattern 204 provided on the same layer. For example, the connection pattern 204 can have a pitch of 3 μm or less. For example, the connection pattern 204 can have a pitch of 2 μm or less.

[0228] Preferably, the connection pattern 204 can have a line width of 1 μm to 5 μm. The connection pattern 204 can have a line width of 1.2 μm to 3 μm. The connection pattern 204 can have a line width of 1.5 μm to 2 μm. If the line width of the connection pattern 204 is less than 1 μm, the resistance of the connection pattern 204 increases, and thus normal communication with the processor chip may be difficult. If the line width of the connection pattern 204 is greater than 5 μm, it may be difficult to implement the connection member 200 for connection between multiple processor chips in a limited space. For example, if the line width of the connection pattern 204 is greater than 6 μm, it may be difficult to arrange all the circuit patterns in a limited space.

[0229] Meanwhile, referring to Figure 8 , the first insulating layer 111 of the circuit board can include a first region 112R1, a second region 112R2, and a third region 112R3 in the thickness direction.

[0230] The fifth electrode portion 170 can be provided on the first region 112R1 of the first insulating layer 111. The second region 112R2 of the first insulating layer 111 can represent a region that horizontally overlaps with the connection member 200. The second region 112R2 of the first insulating layer 111 can include a cavity C. The third region 112R3 of the first insulating layer 111 can represent a region that horizontally overlaps with the first electrode portion 130 and the second electrode portion 140.

[0231] The first electrode portion 130 can be provided on the pad 210 of the connection member 200. Additionally, the second electrode portion 140 can be provided on the connection electrode 143 at a distance from the pad 210 of the connection member 200 in one direction.

[0232] The second region 112R2 and the third region 112R3 of the first insulating layer 111 can include different materials. In this case, the interface between the cavity C in the second region 112R2 and the third region 112R3 can be distinguished.

[0233] The second region 112R2 and the third region 112R3 of the first insulating layer 111 may include the same material. In this case, the interface between the cavity C of the second region 112R2 and the third region 112R3 may not be distinguishable.

[0234] At this time, the pad 210 of the connection member 200 may be manufactured together with the connection member 200 during the manufacture of the connection member 200. In addition, the connection electrode 143 may be manufactured through a process of separating from the pad 210 of the connection member 200. Therefore, the pad 210 of the connection member 200 and the connection electrode 143 may have different thicknesses in the vertical direction.

[0235] The thickness of the cavity C may be different from the thickness of the connection member 200. Thus, there may be a height difference H1 between the upper surface of the second region 112R2 of the first insulating layer 111 and the connection member 200.

[0236] For example, the thickness of the cavity C may be less than the thickness of the connection member 200. Therefore, the upper surface of the second region 112R2 of the first insulating layer 111 may be positioned lower than the upper surface of the connection member 200 by the height difference H1.

[0237] Therefore, the upper surface of the first insulating layer 111 may have a step.

[0238] For example, the upper surface of the first insulating layer 111 may include a first upper surface 110T1 that vertically overlaps with the connection member 200. In addition, the upper surface of the first insulating layer 111 may include a second upper surface 110T2 that does not vertically overlap with the connection member 200. In addition, the first upper surface 110T1 and the second upper surface 110T2 of the first insulating layer 111 may have a step. For example, the first upper surface 110T1 of the first insulating layer 111 may be positioned higher than the second upper surface 110T2. For example, the first insulating layer 111 may include a raised portion corresponding to the first upper surface 110T1.

[0239] Meanwhile, the first electrode portion 130 and the second electrode portion 140 may be provided on the first insulating layer 111. In addition, the upper surface 130T of the first electrode portion 130 and the upper surface 140T of the second electrode portion 140 may have different heights. For example, the upper surface 130T of the first electrode portion 130 and the upper surface 140T of the second electrode portion 140 may have a step H2. For example, the upper surface 130T of the first electrode portion 130 may be positioned higher than the upper surface 140T of the second electrode portion 140 by the step H2.

[0240] In addition, the upper surface of the second insulating layer 112 of the circuit board may also have a step.

[0241] For example, the upper surface of the second insulating layer 112 may include a first upper surface 112T1 that vertically overlaps with the connection member 200. Additionally, the upper surface of the second insulating layer 112 may include a second upper surface 112T2 that does not vertically overlap with the connection member 200. Additionally, the first upper surface 112T1 and the second upper surface 112T2 of the second insulating layer 111 may have a step. For example, the first upper surface 112T1 of the second insulating layer 112 may be positioned higher than the second upper surface 112T2. For example, the second insulating layer 112 may include a raised portion corresponding to the first upper surface 112T1.

[0242] Additionally, the upper surface of each of the first protruding electrode 135 and the second protruding electrode 145 may have a different height. For example, the upper surface 135T of the first protruding electrode 135 may have a step difference from the upper surface 145T of the second protruding electrode 145. For example, the upper surface 135T of the first protruding electrode 135 may be positioned higher than the upper surface 145T of the second protruding electrode 145.

[0243] Therefore, since the first protruding electrode 135 and the second protruding electrode 145 have a step, the arrangement positions of the first semiconductor device and the second semiconductor device can be identified. Thus, the first semiconductor device and the second semiconductor device can be mounted at more accurate positions. Furthermore, embodiments can adjust the volumes of the conductive bonding members (such as solder) respectively provided on the first protruding electrode 135 and the second protruding electrode 145 differently from each other. Therefore, embodiments can position the protruding electrode on which a larger volume of the conductive bonding member is provided lower than other protruding electrodes. This can be achieved by adjusting the thickness difference between the cavity C and the connection member 200. Thereby, embodiments can enable the semiconductor device to be more stably coupled to the circuit board. Therefore, embodiments can enable the semiconductor device to operate smoothly and further improve the operating characteristics of electronic products and / or servers to which the semiconductor package is applied.

[0244] Meanwhile, referring to Figure 9 , there may be multiple interfaces between the first insulating layer 111 of the circuit board and the connection member 200.

[0245] For example, the interface may include a first interface IS1 between the first insulating layer 111 of the circuit board and the first insulating layer 201 of the connection member 200. The interface may include a second interface IS2 between the first insulating layer 111 of the circuit board and the second insulating layer 202 of the connection member 200. The interface may include a third interface IS3 between the first insulating layer 111 of the circuit board and the third insulating layer 201 of the connection member 200. Additionally, the first to third interfaces IS1, IS2, and IS3 may not be aligned in the vertical direction and may have a step.

[0246] Meanwhile, the second insulating layer 202 of the connection member 200 may include the same insulating material as the first insulating layer 111 of the circuit board. In this case, it may be difficult to distinguish the second interface IS2.

[0247] At this time, the filler 202F included in the second insulating layer 202 of the connection member 200 may have characteristics different from those of the filler 111F included in the first insulating layer 111 of the circuit board.

[0248] For example, compared with the electrode portion provided in the connection member 200, the electrode portion provided in the first insulating layer 111 may not require a fine pattern. Therefore, the filler 111F included in the first insulating layer 111 may have a relatively large diameter to ensure the rigidity of the circuit board. For example, the filler 111F included in the first insulating layer 111 may have a diameter in the range of 1 μm to 5 μm.

[0249] In contrast, the second insulating layer 202 of the connection member 200 must be able to form a fine electrode portion by a sputtering process. Therefore, the filler 202F included in the second insulating layer 202 of the connection member 200 may have a relatively small diameter. For example, the filler 202F included in the second insulating layer 202 of the connection member 200 may have a diameter in the range of 0.2 μm to 0.9 μm. Therefore, even if the second insulating layer 202 of the connection member 200 includes the same insulating material, the embodiment can distinguish the interface between the second insulating layer 202 of the connection member 200 and the first insulating layer 111 of the circuit board by the diameter of the filler.

[0250] Meanwhile, referring to Figure 10 , each of the first protrusion electrode 135 and the second protrusion electrode 145 may include a plurality of metal layers.

[0251] For example, the first protrusion electrode 135 may include a first metal layer 135-1 provided on the first electrode portion 130. Additionally, the first protrusion electrode 135 may include a second metal layer 135-2 provided on the first metal layer 135-1. At this time, the first metal layer 135-1 and the second metal layer 135-2 may include different metal materials.

[0252] Preferably, the first metal layer 135-1 may include nickel. Additionally, the second metal layer 135-2 may include copper. The first metal layer 135-1 can improve the bonding strength between the second metal layer 135-2 and the first electrode portion 130. For example, when the second metal layer 135-2 is directly disposed on the first electrode portion 130, oxidation of the first electrode portion 130 may occur, which may reduce the bonding strength between the first electrode portion 130 and the second metal layer 135-2. Therefore, the first metal layer 135-1 can be used to prevent oxidation of the first electrode portion 130 while improving the bonding strength between the second metal layer 135-2 and the first electrode portion 130. Additionally, the first metal layer 135-1 can solve the problem that the first protrusion electrode 135 peels off from the first electrode portion 130 due to the shrinkage and expansion of the second insulating layer 112 caused by thermal stress.

[0253] Specifically, when the first metal layer 135-1 contains nickel, the adhesion between the first electrode portion 130 and the second metal layer 135-2 can be improved. Additionally, when the first electrode portion 130 is electrically connected to the first electrode portion 130 later by forming a material such as solder, the solder may diffuse into the first electrode portion 130 to form an inter-metallic compound, and the inter-metallic compound has problems with poor mechanical and electrical reliability. In particular, when the second metal layer 135-2 is made of copper, the problem of forming an inter-metallic compound may be further exacerbated. However, when nickel is provided, the diffusion of the solder can be prevented, thereby preventing the formation of an inter-metallic compound, and thus improving the electrical and mechanical reliability of the semiconductor package.

[0254] At this time, the first electrode portion 130 may include a slit 130C. For example, the upper surface of the first electrode portion 130 may include a slit 130C that vertically overlaps with the first protrusion electrode 135 and is recessed toward the lower surface of the first electrode portion 130. The slit 130C may be filled with the first metal layer 135-1 of the first protrusion electrode 135. Thereby, the contact area between the first electrode portion 130 and the first protrusion electrode 135 can be increased, and thus the bonding strength can be further improved.

[0255] Additionally, the second protrusion electrode 145 may also include a first metal layer 145-1 and a second metal layer 145-2. The first metal layer 145-1 of the second protrusion electrode 145 may be disposed on the second electrode portion 140. Additionally, the second metal layer 145-2 of the second protrusion electrode 145 may be disposed on the first metal layer 145-1. A slit 140C may be provided at the upper surface of the second electrode portion 140, and the first metal layer 145-1 of the second protrusion electrode 145 may be provided to fill the slit 140C of the second electrode portion 140.

[0256] Meanwhile, referring to Figure 11 , the thickness of the cavity C may be different from the thickness of the connecting member 200. Accordingly, there may be a height difference H1 between the upper surface of the second region 112R2 of the first insulating layer 111 and the connecting member 200.

[0257] For example, the thickness of the cavity C may be greater than the thickness of the connecting member 200. Accordingly, the upper surface of the second region 112R2 of the first insulating layer 111 may be positioned higher than the upper surface of the connecting member 200 by the height difference H1.

[0258] Accordingly, the upper surface of the first insulating layer 111 may have a step.

[0259] For example, the upper surface of the first insulating layer 111 may include a first upper surface 110T1 that vertically overlaps with the connecting member 200. Additionally, the upper surface of the first insulating layer 111 may include a second upper surface 110T2 that does not vertically overlap with the connecting member 200. Additionally, there may be a step between the first upper surface 110T1 and the second upper surface 110T2 of the first insulating layer 111. For example, the first upper surface 110T1 of the first insulating layer 111 may be positioned lower than the second upper surface 110T2. For example, the first insulating layer 111 may include a recessed portion corresponding to the first upper surface 110T1.

[0260] Meanwhile, the first electrode portion 130 and the second electrode portion 140 may be provided on the first insulating layer 111. Additionally, the upper surface 130T of the first electrode portion 130 and the upper surface 140T of the second electrode portion 140 may have different heights. For example, there may be a step H2 between the upper surface 130T of the first electrode portion 130 and the upper surface 140T of the second electrode portion 140. For example, the upper surface 130T of the first electrode portion 130 may be positioned lower than the upper surface 140T of the second electrode portion 140 by the step H2.

[0261] Additionally, the upper surface of the second insulating layer 112 of the circuit board may also have a step.

[0262] For example, the upper surface of the second insulating layer 112 may include a first upper surface 112T1 that vertically overlaps with the connecting member 200. Additionally, the upper surface of the second insulating layer 112 may include a second upper surface 112T2 that does not vertically overlap with the connecting member 200. Additionally, there may be a step between the first upper surface 112T1 and the second upper surface 112T2 of the second insulating layer 111. For example, the first upper surface 112T1 of the second insulating layer 112 may be positioned lower than the second upper surface 112T2. For example, the second insulating layer 112 may include a recessed portion corresponding to the first upper surface 112T1.

[0263] In addition, the upper surfaces of each of the first protruding electrode 135 and the second protruding electrode 145 may have different heights. For example, the upper surface 135T of the first protruding electrode 135 may have a step difference from the upper surface 145T of the second protruding electrode 145. For example, the upper surface 135T of the first protruding electrode 135 may be positioned lower than the upper surface 145T of the second protruding electrode 145.

[0264] Meanwhile, referring to Figure 12 , the thickness of the cavity C may be the same as the thickness of the connecting member 200. Thus, the upper surface of the second region 112R2 of the first insulating layer 111 and the connecting member 200 may be located on the same plane.

[0265] Therefore, the upper surface of the first insulating layer 111 may be completely flat.

[0266] Meanwhile, the first electrode portion 130 and the second electrode portion 140 may be provided on the first insulating layer 111. In addition, the upper surface 130T of the first electrode portion 130 and the upper surface 140T of the second electrode portion 140 may also have the same height. For example, the upper surface 130T of the first electrode portion 130 and the upper surface 140T of the second electrode portion 140 may be located on the same plane.

[0267] In addition, the upper surface of the second insulating layer 112 of the circuit board may also be completely flat.

[0268] In addition, the upper surfaces of each of the first protruding electrode 135 and the second protruding electrode 145 may have the same height.

[0269] On the other hand, when the circuit board having the above-described features of the present invention is used in IT devices or household appliances (such as smartphones, server computers, TVs, etc.), functions such as signal transmission or power supply can be stably performed. For example, when the circuit board having the features of the present invention performs a semiconductor packaging function, the circuit board can be used to safely protect the semiconductor chip from external moisture or contaminants, or alternatively, problems such as leakage current, electrical short circuit, and electrical open circuit between terminals provided to the semiconductor chip can be solved. In addition, when the signal transmission function is dominant, the noise problem can be solved. Thus, the circuit board having the above-described features of the present invention can maintain the stable functions of IT devices or household appliances, such that the entire product and the circuit board applying the present invention can achieve functional unity or technical interlock with each other.

[0270] When the circuit board having the features of the present invention described above is used in a transport device such as a vehicle, the problem of signal distortion transmitted to the transport device can be solved. Alternatively, by safely protecting the semiconductor chip that controls the transport device from the outside and solving the problems of leakage current, electrical short circuit, or electrical open circuit between the terminals provided to the semiconductor chip, the safety of the transport device can be further improved. Therefore, the transport device and the circuit board applying the present invention can achieve functional integrity or technical interlock with each other.

[0271] The features, structures, and effects described in the above embodiments are included in at least one embodiment, but are not limited to one embodiment. In addition, those of ordinary skill in the art to which the embodiments pertain can even combine or modify the features, structures, and effects shown in each embodiment relative to other embodiments. Therefore, it should be understood that the content related to such combinations and such modifications is included within the scope of the embodiments.

[0272] The description focuses on the embodiments, but it is merely illustrative and does not limit the embodiments. Those skilled in the art to which the embodiments pertain can understand that various modifications and applications not shown above are possible without departing from the basic features of the embodiments. For example, each component specifically represented in the embodiments can be modified and implemented. Additionally, it should be understood that the differences related to these changes and applications are included within the scope of the embodiments defined in the appended claims.

Claims

1. A circuit board, comprising: Stacked insulating layers; Connecting members embedded in the stacked insulating layers; And Insulating members disposed on one surface of the connecting members, wherein the connecting members include: A first insulating layer; and A second insulating layer disposed on the first insulating layer, wherein the first insulating layer, the second insulating layer, and the insulating members include different insulating materials, and wherein the side surfaces of the first insulating layer, the second insulating layer, and the insulating members have steps.

2. The circuit board according to claim 1, wherein, The connecting members further include a third insulating layer disposed on the second insulating layer, and wherein the third insulating layer includes an insulating material different from that of at least one of the first insulating layer and the second insulating layer, and wherein the side surface of the third insulating layer has a step starting from the side surfaces of the first insulating layer, the second insulating layer, and the insulating members.

3. The circuit board according to claim 1, wherein, The width of the first insulating layer of the connecting members in the horizontal direction is greater than the width of the second insulating layer in the horizontal direction.

4. The circuit board according to claim 3, wherein, The width of the insulating members in the horizontal direction is greater than the width of each of the first insulating layer and the second insulating layer in the horizontal direction.

5. The circuit board according to any one of claims 1 to 4, wherein, The first insulating layer of the connecting members includes polyimide.

6. The circuit board according to any one of claims 1 to 4, wherein The second insulating layer of the connecting members includes a resin layer containing fillers.

7. The circuit board according to claim 6, wherein, The stacked insulating layers include an insulating material different from that of the second insulating layer of the connecting members.

8. The circuit board according to claim 6, wherein, The stacked insulating layers include the same insulating material as the second insulating layer of the connecting members, and wherein the diameter of the fillers disposed in the stacked insulating layers is different from the diameter of the fillers disposed in the second insulating layer of the connecting members.

9. The circuit board according to claim 8, wherein, The diameter of the fillers disposed in the stacked insulating layers is greater than the diameter of the fillers disposed in the second insulating layer of the connecting members.

10. The circuit board according to any one of claims 1 to 4, wherein, The horizontal distance from the outermost end to the innermost end of the connecting members satisfies the range of 50 μm to 70 μm.

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