Double-inverter parallel redundant system and control method thereof
Through the dual inverter parallel redundant system, the interlocking relationship between synchronous fiber and contactor unit is used to realize automatic switching and uninterrupted power supply in the case of failure or power outage, solving the synchronization offset and synchronization delay problems in the dual inverter parallel system, and improving the reliability and safety of the system.
Patent Information
- Application Number
- CN202510405970.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-02
- Publication Date
- 2025-07-01
AI Technical Summary
There are problems of synchronization misalignment and synchronization delay in existing dual inverter parallel systems, which affects the reliability and security of the system.
A dual inverter parallel redundant system is adopted, including an inverter module, a contactor unit and a resonant cavity unit. The synchronous fiber connection ensures the consistent output voltage waveform of the inverter, and the interlocking relationship of the contactor unit realizes automatic switching and uninterrupted power supply of the faulty inverter.
Automatically disconnect the fault inverter in case of a single-side fault or power outage, ensuring no shutdown and uninterrupted power supply. Through the same set of PWM signals, the synchronization problem of synchronization failure caused by clock abnormalities is solved, and the reliability and safety of the system are improved.
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Figure CN120237787A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of power electronics technology, and particularly to a dual-inverter parallel redundant system and its control method. Background Art
[0002] In power electronics applications, a single inverter has a risk of single-point failure. Once a failure occurs, the entire system will stop working, affecting the reliability and safety of the system. For this reason, redundant design has become one of the key means to improve the reliability of the inverter system. Most of the existing redundant inverter systems adopt the master-slave control strategy on the controller, but there are still problems of synchronization disorder and synchronization delay in actual applications. Especially in a dual-inverter parallel system, how to achieve efficient and reliable redundant design is an important research direction. Summary of the Invention
[0003] Based on this, it is necessary to provide a dual-inverter parallel redundant system and its control method for the problems of synchronization disorder and synchronization delay existing in the existing dual-inverter parallel system.
[0004] To solve the above technical problems, the technical solution adopted by the present invention is:
[0005] A dual-inverter parallel redundant system includes an inverter module, a contactor unit, and a resonant cavity unit.
[0006] The inverter module includes a first inverter unit and a second inverter unit with independent working capabilities and communication interfaces.
[0007] The contactor unit includes contactors MC3 to MC6; the first inverter unit controls MC3 and MC4, the second inverter unit controls MC7 and MC8, and the control of MC5 and MC6 is interlocked by MC3, MC4, MC7, and MC8.
[0008] The resonant cavity unit includes inductors LF1 to LF4, capacitors CF and CP, and a guide rail LP; CF is connected to MC3 and MC5 through LF1, connected to MC5 and MC7 through LF2, connected to MC4 and MC6 through LF3, and connected to MC6 and MC8 through LF4; LP is connected in parallel with CF through CP;
[0009] Output the normally closed signals of MC5 and MC6 as Failover mode signals.
[0010] Further, the first inverter unit includes a first inverter, contactors MC1 and MC2, and resistors R1 and R2; MC1 is connected to the first inverter through MC2, R1 controls MC1, and R2 and the auxiliary contact of MC1 control MC2; the second inverter unit includes a second inverter, contactors MC11 and MC12, and resistors R11 and R12; MC11 is connected to the second inverter through MC12, R11 controls MC11, and R12 and the auxiliary contact of MC12 control MC12.
[0011] Further, the enable signal ports and PWM signal ports of the first inverter and the second inverter are connected through a synchronous optical fiber to ensure that the voltage waveforms output by the first inverter and the second inverter are consistent in phase and frequency.
[0012] Further, the contactor unit is powered by two 220VAC power supplies and two 24VDC power supplies simultaneously.
[0013] Further, when the electrical equipment detects the Failover mode signal, it actively reduces the load by half.
[0014] Further, the interlock relationship of contactors MC3 to MC6 includes:
[0015] (1) When MC3 and MC4 are closed and MC7 and MC8 are open, then MC5 and MC6 are closed; at this time, for the first inverter, LF1 and LF2 are in parallel, and LF3 and LF4 are in parallel, and the equivalent inductance Since LF1 = LF2 = LF3 = LF4, LF = LF1 = LF2 = LF3 = LF4;
[0016] (2) When MC3 and MC4 are open and MC7 and MC8 are closed, then MC5 and MC6 are closed; at this time, for the second inverter, LF1 and LF2 are in parallel, and LF3 and LF4 are in parallel, and the equivalent inductance
[0017] (3) When MC3 and MC4 are closed and MC7 and MC8 are closed, then MC5 and MC6 are open; at this time, the first inverter and the second inverter are in a parallel relationship, and the equivalent inductance
[0018] Among the three interlock relationships, LF1 to LF4 always maintain a two-in-parallel and two-in-series relationship to keep the LF equivalent inductance consistent.
[0019] Further, when MC1 is closed, the system pre-charges the DC bus capacitor of the first inverter through R1 and R2; when MC2 is closed, the pre-charging ends; when MC11 is closed, the system pre-charges the DC bus capacitor of the second inverter through R11 and R12; when MC12 is closed, the pre-charging ends.
[0020] Furthermore, the first inverter unit and the second inverter unit are correspondingly installed in two sets of independent electrical cabinets.
[0021] The present invention also relates to a control method for a dual-inverter parallel redundancy system, where the dual-inverter parallel redundancy system is the dual-inverter parallel redundancy system as described above, and the control method is as follows:
[0022] After the system is powered on, initialize the inverter modules and read the status information of each module to ensure that the voltage waveforms output by the two inverters in the inverter modules are consistent in phase and frequency;
[0023] Use one of the inverters as the master station drive and the other as the slave station drive, and make the following decisions based on the status of the inverters:
[0024] (1) When the two inverters start simultaneously, the master station drive is used to send a control enable signal and output an inverter PWM signal, and the slave station drive is used to receive the control enable signal and synchronize according to the inverter PWM signal;
[0025] (2) When the inverter used as the master station drive fails, the master station drive enable signal is reset. After the slave station drive detects the enable reset, the slave station drive automatically obtains the control right of the inverter.
[0026] Furthermore, when the inverter used as the master station drive exits, the power is transferred to the inverter used as the slave station drive; when the inverter used as the slave station drive exits, the power is transferred to the inverter used as the master station drive.
[0027] Compared with the prior art, the beneficial effects of the present invention include:
[0028] 1. The present invention can automatically disconnect the faulty inverter unit in case of single-sided fault or accidental power failure, and can be manually switched in without shutting down after the fault is restored, realizing uninterrupted power supply to the load;
[0029] 2. The present invention uses synchronous optical fibers to ensure that the voltage waveforms output by the two inverters are consistent in phase and frequency. For inverters supplying power at medium and high frequencies, essentially the same set of PWM signals is adopted, and synchronization is no longer dependent on a single clock, solving the problem of synchronization failure caused by abnormal clocks. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] The disclosure of the present invention is described with reference to the accompanying drawings. It should be understood that the drawings are only for illustrative purposes and are not intended to limit the scope of protection of the present invention. In the drawings, the same reference numerals are used to refer to the same components. Among them:
[0031] Figure 1 is a block diagram of a dual-inverter parallel redundancy system introduced in the present invention;
[0032] Figure 2 Schematic diagram of the synchronous optical fiber connection for two inverters;
[0033] Figure 3 Schematic diagram of the contactor action logic for a dual-inverter parallel redundant system;
[0034] Figure 4 Schematic diagram of the contactor interlock for the Failover module;
[0035] Figure 5 Schematic diagram of the logic for parsing the optical fiber signal from the drive. Detailed implementation manners
[0036] It is easy to understand that according to the technical solution of the present invention, without changing the essence of the present invention, those of ordinary skill in the art can propose various structural ways and implementation ways that can be mutually replaced. Therefore, the following detailed implementation manners and the accompanying drawings are only exemplary descriptions of the technical solution of the present invention, and should not be regarded as all of the present invention or as a limitation or restriction on the technical solution of the present invention.
[0037] Embodiment 1
[0038] As Figure 1 shown, the present invention introduces a dual-inverter parallel redundant system, including an inverter module, a contactor unit, and a resonant cavity unit.
[0039] The inverter module includes a first inverter unit and a second inverter unit with independent working capabilities and communication interfaces. The first inverter unit includes a first inverter, contactors MC1 and MC2, and resistors R1 and R2; MC1 is connected to the first inverter through MC2, R1 controls MC1, and R2 and the auxiliary contact of MC1 control MC2; the second inverter unit includes a second inverter, contactors MC11 and MC12, and resistors R11 and R12; MC11 is connected to the second inverter through MC12, R11 controls MC11, and R12 and the auxiliary contact of MC12 control MC12.
[0040] There is no master-slave distinction between the two inverters on the main controller, and the synchronization of the inverter bridge arms is achieved on the synchronous drive. The connection method of the synchronous optical fiber signal is as Figure 2As shown. The enable signal ports between the two inverters are connected by synchronous optical fibers. IGBT2 - IGBT5 of the first inverter are connected to IGBT12 - IGBT15 of the second inverter through synchronous optical fibers. When the main drives of both inverters operate simultaneously without errors and there is PWM output, the slave drive passively uses the signals of the main drive to complete the reliable synchronization of the bridge arms. During normal operation, the slave drive also receives the PWM from the controller. When the main drive exits, the slave drive immediately uses the controller PWM for driving.
[0041] Since the grid-connected inverter detects the grid frequency and then follows it, this method is applicable to the power frequency (50HZ), but it has limitations for wireless power supply because wireless power supply is mainly in the medium and high frequencies, such as dozens of KHZ, and problems such as synchronization disorder and synchronization delay are likely to occur. Therefore, when the two inverters operate simultaneously, the two inverters essentially use the same set of PWM signals on both sides, thus no longer relying on a single clock for synchronization and solving the problem of synchronization failure caused by abnormal clocks.
[0042] MC1 and MC2 are the main contactors of the first inverter, and MC11 and MC12 are the main contactors of the second inverter. When MC1 or MC11 is closed, the system pre-charges the DC bus capacitor through R1, R2 or R11, R12. When MC2 or MC12 is closed, the pre-charging ends. The contactor action logic is as Figure 3 shown, which is a simplified schematic diagram of the connection between the first inverter unit and the contactor unit. R1 controls the S1 coil (MC1), the auxiliary contact RS1 of R2 and the S1 coil (MC1) controls S2 (MC2), and the auxiliary contact RS3 of the S2 coil controls the S3 coil (MC3 / MC4).
[0043] Since the first inverter unit and the second inverter unit are respectively installed in two independent electrical cabinets, the two electrical cabinets may come from different power supplies, and there may be power outages and power-off maintenance times on one side. Therefore, there are two situations in the Failover switching process. One is that during normal operation, sudden power failure or faults on one side cause shutdown. The second situation is that there is no power on one side at all, and one side starts normally and enters the Failover mode. This requires that in the case of power failure on one side, it does not affect the normal operation of the other side.
[0044] The switching in and out of the inverter is controlled by 6 contactors of the contactor unit. The power supply of the contactor is 220VAC, and the coil of the intermediate relay that controls the contactor coil is 24VDC. Since the two inverters share a guide rail, the power supply of the guide rail temperature sensing line control board cannot be suddenly interrupted. Therefore, the contactor unit requires two 220VAC power supplies and two 24VDC power supplies to supply power simultaneously to achieve the switching in and out of redundant inverters, output the Failover signal, and output a 220VAC to supply power to the temperature sensing line control board.
[0045] The contactor unit mainly includes contactors MC3 to MC6; MC3, MC5, and MC7 are connected in series in sequence, MC4, MC6, and MC8 are connected in series in sequence, the first inverter unit controls MC3 and MC4, the second inverter unit controls MC7 and MC8, and the control of MC5 and MC6 is interlocked by MC3, MC4 and MC7, MC8; the normally closed signals of MC5 and MC6 are output as Failover mode signals.
[0046] The resonant cavity unit includes inductors LF1 to LF4, capacitors CF and CP, and a guide rail LP; CF is connected to MC3 and MC5 through LF1, connected to MC5 and MC7 through LF2, connected to MC4 and MC6 through LF3, and connected to MC6 and MC8 through LF4; LP is connected in parallel with CF through CP.
[0047] As Figure 4 shown, it is a simplified interlock schematic diagram of the connection of MC3, MC5, and MC7. When the auxiliary contact RS3 of MC3 and the auxiliary contact RS7 of MC7 control the coil S5 of MC5.
[0048] The first inverter and the second inverter complete the control of the cut-in and cut-out of each inverter through a total of 6 contactors MC3 to MC8, realizing physical connection and disconnection. Among them, the control of MC5 and MC6 is interlocked by MC3, MC4 and MC7, MC8, and the interlock relationship is:
[0049] When MC3 and MC4 are energized and MC7 and MC8 are de-energized, then MC5 and MC6 are energized. For the first inverter, there is LF1 and LF2 are connected in parallel, LF3 and LF4 are connected in parallel, and the equivalent inductance Since LF1 LF2 = LF3 = LF4, = Figure 2 There is LF = LF1 = LF2 = LF3 = LF4;
[0050] When MC3 and MC4 are de-energized and MC7 and MC8 are energized, then MC5 and MC6 are energized. For the first inverter, LF1 and LF2 are connected in parallel, LF3 and LF4 are connected in parallel, and the equivalent inductance
[0051] When MC3 and MC4 are energized and MC7 and MC8 are energized, then MC5 and MC6 are de-energized. For the first inverter and the second inverter, they are in a parallel relationship, and the equivalent inductance
[0052] The three interlock relationships LF1, LF2, LF3, and LF4 always maintain a two-parallel and two-series relationship. If LF1, LF2, LF3, and LF4 maintain the same inductance, the equivalent inductance can be kept the same in all three operating states, so that the same set of resonance parameters can be used, that is, the parameters of CF, CP, and LP remain unchanged. Therefore, in all three operating states, the inverter can be in the same operating state, and when the inverter is switched in and out, the damage to the inverter will be minimized. In the Failover module, six contactors and four LF inductors are used. When the inverter is switched in and out, the equivalent inductance can first double and then return to its original value, which acts as a buffer for the inverter and reduces the impact on the inverter. Moreover, the fact that LF1, LF2, LF3, and LF4 always maintain a two-parallel and two-series relationship also plays a role in shunting, avoiding magnetic saturation due to excessive current in a single inductor.
[0053] In addition, the advantage of using six contactors to connect two inverters and the resonant cavity is that: whether the inverter is switched out due to a fault or switched in in the Failover state, for the normally operating inverter, the inductance connected in series at the inverter output first doubles and then halves. This process is the response time of the contactor itself, about 100 ms. The increase in the inductance connected in series at the inverter can suppress the sudden change of current, thus protecting the normally operating inverter.
[0054] When the load is operating normally, the load device can distinguish whether the inverter is operating alone or in parallel through the states of MC5 and MC6. Therefore, the normally closed signals of the control MC5 and MC6 signals are output as the output of the system Failover mode signal. When the load device detects the Failove signal, it operates at half load, and when it does not detect the Failove signal, it operates at full speed.
[0055] The inverter synchronous drive is divided into the main synchronous drive and the slave synchronous drive. When the main drive is operating, the controller needs to set the enable EN signal and transmit it through the EN optical fiber signal line. Figure 5 As shown in the schematic diagram of the synchronous drive optical fiber connection. The slave drive receives the EN signal and automatically determines whether to use the main drive PWM signal or its own controller PWM signal through its own logic circuit. The specific logic gates are as shown in the schematic diagram of the logic analysis of the optical fiber signal for the slave drive.
[0056] The slave drive signals are shown in the following table:
[0057]
[0058]
[0059] When the first inverter and the second inverter are started simultaneously, both inverters use the master station PWM signal, thus ensuring the complete synchronization of the two inverters. Since one of them is the master inverter and the other is the slave inverter. When the slave inverter exits, the master inverter uses the master station PWM signal, and the power of the slave inverter is transferred to the master inverter. When the master inverter fails, the master station enables signal is reset, and the slave inverter uses the slave station PWM signal, and the power of the master inverter is transferred to the slave inverter.
[0060] When the slave inverter cuts in or cuts out, the slave inverter always receives the enable signal and the PWM signal of the master inverter. Therefore, there is no signal delay and interruption during cut-in and cut-out. When the master inverter cuts in and cuts out, the master synchronous drive needs to send out the signal, and then the slave drive needs to parse it, which requires a certain physical delay. In order to minimize the load fluctuation, a quick response method is made by combining the common reasons for the inverter to cut in and cut out. When the master inverter cuts out, the device is generally in the maximum load stage. Therefore, the slave inverter needs to cut in with the phase shift angle of the maximum load, so that the device has time to reduce the load. When the master inverter cuts in, the device is in the low load stage. Therefore, the master inverter cuts in with the phase shift angle of the no-load state to reduce the fluctuation of the LP current.
[0061] In this embodiment, in the case of unilateral fault or accidental power failure, the faulty inverter unit can be automatically disconnected, and can be manually cut in without stopping the machine after the fault is restored, realizing uninterrupted power supply to the load; by using synchronous optical fiber to ensure that the voltage waveforms output by the two inverters are consistent in phase and frequency. For the inverters supplying power in the medium and high frequencies, essentially the same set of PWM signals is used, and synchronization is no longer dependent on a single clock, solving the problem of synchronization failure caused by abnormal clock.
[0062] Embodiment 2
[0063] This embodiment introduces a control method for a dual-inverter parallel redundancy system. The dual-inverter parallel redundancy system is the aforementioned dual-inverter parallel redundancy system, and the control method is as follows:
[0064] After the system is powered on, the inverter modules are initialized and the status information of each module is read to ensure that the voltage waveforms output by the two inverters in the inverter module are consistent in phase and frequency;
[0065] Using one of the inverters as the master station drive and the other as the slave station drive, and making the following decisions according to the status of the inverter:
[0066] (1) When the two inverters are started simultaneously, the master station drive is used to send out the control enable signal and output the inverter PWM signal, and the slave station drive is used to receive the control enable signal and synchronize according to the inverter PWM signal;
[0067] (2) When the inverter driving as the master station fails and the enabling signal of the master station drive is reset, after the slave station drive detects the enabling reset, the slave station drive automatically acquires the control right of the inverter.
[0068] When the inverter driving as the master station exits, the power is transferred to the inverter driving as the slave station; when the inverter driving as the slave station exits, the power is transferred to the inverter driving as the master station. When the electrical equipment detects the Failover mode signal, it actively reduces the load by half.
[0069] The technical scope of the present invention is not limited to the content described above. Those skilled in the art can make various deformations and modifications to the above embodiments without departing from the technical idea of the present invention, and these deformations and modifications should all fall within the protection scope of the present invention.
Claims
1. A dual inverter parallel redundant system, characterized in that: It includes: An inverter module, comprising a first inverter unit and a second inverter unit having independent working capabilities and communication interfaces; The contactor unit includes contactors MC3 to MC6; the first inverter unit controls MC3 and MC4, the second inverter unit controls MC7 and MC8, and the control of MC5 and MC6 is interlocked by MC3 and MC4 and MC7 and MC8; The resonant cavity unit includes inductors LF1 to LF4, capacitors CF and CP, and a guide rail LP; CF is connected to MC3 and MC5 through LF1, connected to MC5 and MC7 through LF2, connected to MC4 and MC6 through LF3, and connected to MC6 and MC8 through LF4; LP is connected to CF in parallel through CP; The normally closed signal outputs of MC5 and MC6 are used as failover mode signal outputs.
2. The dual inverter parallel redundant system according to claim 1, characterized in that: The first inverter unit includes a first inverter, contactors MC1 and MC2, and resistors R1 and R2; MC1 is connected to the first inverter through MC2, R1 controls MC1, and R2 and the auxiliary contact of MC1 control MC2; The second inverter unit includes a second inverter, contactors MC11 and MC12, and resistors R11 and R12; MC11 is connected to the second inverter via MC12, R11 controls MC11, and R12 and the auxiliary contact of MC12 control MC12.
3. The dual inverter parallel redundant system according to claim 2, characterized in that: The enable signal port and the PWM signal port of the first inverter and the second inverter are connected through a synchronous optical fiber to ensure that the voltage waveforms output by the first inverter and the second inverter are consistent in phase and frequency.
4. The dual inverter parallel redundant system according to claim 1, characterized in that: When the electrical equipment detects the failover mode signal, it will actively reduce the load by half.
5. The dual inverter parallel redundant system according to claim 1, characterized in that: The contactor unit is powered by two 220VAC power supplies and two 24VDC power supplies simultaneously.
6. The dual inverter parallel redundant system according to claim 1, characterized in that: The interlocking relationship of contactors MC3 to MC6 includes: (1) When MC3 and MC4 are energized and MC7 and MC8 are disconnected, MC5 and MC6 are energized. At this time, for the first inverter, LF1 and LF2 are connected in parallel, LF3 and LF4 are connected in parallel, and the equivalent inductance is (2) When MC3 and MC4 are disconnected, MC7 and MC8 are energized, and MC5 and MC6 are energized; at this time, for the second inverter, LF1 and LF2 are connected in parallel, LF3 and LF4 are connected in parallel, and the equivalent inductance is (3) When MC3 and MC4 are energized, MC7 and MC8 are energized, and MC5 and MC6 are disconnected; at this time, the first inverter and the second inverter are in parallel relationship, and the equivalent inductance The three interlocking relationships LF1 to LF4 always maintain a two-parallel-two-series relationship, keeping the equivalent inductance LF consistent.
7. The dual inverter parallel redundant system according to claim 2, characterized in that: When MC1 is energized, the system pre-charges the DC bus capacitor of the first inverter through R1 and R2; when MC2 is energized, the pre-charging ends; When MC11 is energized, the system pre-charges the DC bus capacitor of the second inverter through R11 and R12; when MC12 is energized, the pre-charging ends.
8. The dual inverter parallel redundant system according to claim 1, characterized in that: The first inverter unit and the second inverter unit are installed in two independent electric cabinets respectively.
9. A control method for a dual-inverter parallel redundant system, wherein the dual-inverter parallel redundant system is the dual-inverter parallel redundant system according to any one of claims 1 to 7, characterized in that: The control method is: After the system is powered on, the inverter module is initialized and the status information of each module is read to ensure that the voltage waveforms output by the two inverters in the inverter module are consistent in phase and frequency; One of the inverters is used as the master drive and the other as the slave drive. The following decisions are made based on the status of the inverters: (1) When the two inverters are started at the same time, the master station driver is used to send a control enable signal and output an inverter PWM signal, and the slave station driver is used to receive the control enable signal and synchronize according to the inverter PWM signal; (2) When the inverter driven by the master fails, the master drive enable signal is reset. After the slave drive detects the enable reset, the slave drive automatically obtains control of the inverter.
10. The control method of the dual inverter parallel redundant system according to claim 9, characterized in that: When the inverter driving the master station exits, the power is transferred to the inverter driving the slave station; when the inverter driving the slave station exits, the power is transferred to the inverter driving the master station.