Display device
By alternately setting the maximum and minimum intervals of the luminescent areas in the electroluminescent display device, the problem of dead margin limiting the opening rate and brightness of the luminescent area is solved, and higher display performance and lower power consumption are achieved.
Patent Information
- Application Number
- CN202411356608.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-12-29
- Filing Date
- 2024-09-27
- Publication Date
- 2025-07-01
AI Technical Summary
In the conventional electroluminescent display device, due to the dead margin between the openings of the fine metal mask, the opening rate and brightness of the light emitting region are limited.
By alternately setting the maximum and minimum intervals of the light emitting areas in the display area, a light emitting area with the minimum interval is formed using the integrated opening of the mask, thereby overcoming the dead zone limitations and improving the opening rate and brightness.
It achieves an increase in the opening rate and brightness of the luminescent area, improves display performance, and reduces the current density of the luminescent area, extends the device life and achieves low power consumption.
Smart Images

Figure CN120239458A_ABST
Abstract
Description
[0001] Cross - reference to related applications
[0002] This application claims the benefit of Korean Patent Application No. 10 - 2023 - 0196753, filed on December 29, 2023, which is incorporated herein by reference in its entirety as if fully set forth herein. Technical field
[0003] The present disclosure relates to a display device. Background art
[0004] Electroluminescent display devices have the advantages of using light - emitting elements, high brightness, low driving voltage, ultra - thin films, and free form.
[0005] An electroluminescent display device may include a light - cutting film (LCF) built in a display panel to limit the vertical viewing angle by cutting off the vertical viewing angle according to use.
[0006] In an electroluminescent display device having an LCF built in, the light - emitting region of the light - emitting element in each sub - pixel may have an elongated shape in the left - right direction, and the light - emitting regions of the same color may be arranged in the left - right direction.
[0007] Due to the minimum gap margin as a dead zone between the openings of a fine metal mask (FMM) for forming the light - emitting element, the longest light - emitting region in the left - right direction among the plurality of light - emitting regions has limitations in increasing the aperture ratio and brightness. Summary of the invention
[0008] Accordingly, the present disclosure aims to provide a display device that substantially eliminates one or more problems caused by the limitations and disadvantages of the prior art.
[0009] One aspect of the present disclosure provides a display device capable of increasing the aperture ratio and brightness of a light - emitting region.
[0010] Additional advantages and features of the present disclosure will be set forth in part in the description below, and in part will become apparent to those of ordinary skill in the art upon examination of the following, or may be learned from practice of the present disclosure. The objectives and other advantages of the present disclosure may be realized and attained by the structure particularly pointed out in the specification and the claims as well as the accompanying drawings.
[0011] To achieve these and other advantages and in accordance with the purpose of the present disclosure, as embodied and broadly described herein, a display device is provided. The display device includes a display area that includes a plurality of first light-emitting areas arranged in a first direction and having a first color. Among them, the intervals between adjacent first light-emitting areas in the first direction alternate between a maximum interval and a minimum interval smaller than the maximum interval along the first direction.
[0012] According to another aspect of the present disclosure, a display device is provided. The display device includes a display area that includes first to sixth row lines extending in a first direction and arranged in a second direction intersecting the first direction. Among them, each of the first row line and the fourth row line includes a plurality of first sub-pixels in which a plurality of first light-emitting areas are arranged along the first direction; each of the second row line and the fifth row line includes a plurality of second sub-pixels in which a plurality of second light-emitting areas are arranged along the first direction; the third row line includes a plurality of 3-1 sub-pixels and 3-2 sub-pixels in which 3-1 light-emitting areas and 3-2 light-emitting areas are alternately arranged along the first direction; the sixth row line includes a plurality of 3-2 sub-pixels and 3-1 sub-pixels in which 3-2 light-emitting areas and 3-1 light-emitting areas are alternately arranged along the first direction. In each of the third row line and the sixth row line, the 3-1 light-emitting area and the 3-2 light-emitting area adjacent to each other in the first direction are spaced apart by a maximum interval, and the 3-2 light-emitting area and the 3-1 light-emitting area adjacent to each other in the first direction are spaced apart by a minimum interval smaller than the maximum interval.
[0013] According to another aspect of the present disclosure, there is provided a display device including a pixel array including a plurality of pixels arranged in a first direction and a second direction intersecting the first direction, each pixel including a plurality of light-emitting elements, one of the plurality of light-emitting elements having a maximum light-emitting area greater than that of the other light-emitting elements; an encapsulation layer provided on the pixel array to seal a light-emitting element layer including the light-emitting elements; a touch sensor array including a black matrix and sensor electrodes provided on the encapsulation layer and overlapping a non-light-emitting area of the pixel array; and a light control array including light control elements provided on the touch sensor array and overlapping the light-emitting elements, wherein, in the pixel array, among the (N-1)th pixel and the Nth pixel adjacent to each other in the first direction, the light-emitting elements having the maximum light-emitting area are adjacent to each other in the first direction and spaced apart by a first distance, N is an integer of 2 or greater, and among the Nth pixel and the (N+1)th pixel adjacent to each other in the first direction, the light-emitting elements having the maximum light-emitting area are adjacent to each other in the first direction and spaced apart by a second distance less than the first distance.
[0014] It should be understood that the foregoing summary and the following detailed description of the present disclosure are both exemplary and explanatory and are intended to provide further explanation of the claimed present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] The drawings that provide a further understanding of the present disclosure and are incorporated in and constitute a part of this application illustrate embodiments of the present disclosure and, together with the specification, are used to explain the principles of the present disclosure. In the drawings:
[0016] Figure 1 FIG. is a diagram schematically showing an example of the configuration of a display device according to an embodiment of the present disclosure.
[0017] Figure 2 FIG. is a cross-sectional view schematically showing an example of the structure of a display panel according to an embodiment of the present disclosure.
[0018] Figure 3 FIG. is a diagram schematically showing the configuration of a sub-pixel according to an embodiment of the present disclosure.
[0019] Figure 4 FIG. is an equivalent circuit diagram showing an example of the configuration of a sub-pixel according to an embodiment of the present disclosure.
[0020] Figure 5 FIG. is a diagram showing an example of a driving waveform of a sub-pixel according to an embodiment of the present disclosure.
[0021] Figure 6 It is an enlarged plan view showing an example of a plurality of pixel regions of a display device according to an embodiment of the present disclosure.
[0022] Figure 7 It schematically shows along Figure 6 a cross-sectional view showing an example of the structure of a plurality of second sub-pixel regions taken along line I-I' in
[0023] Figure 8 It schematically shows along Figure 6 a cross-sectional view showing an example of the structure of a plurality of third sub-pixel regions taken along line II-II' in
[0024] Figure 9 It is an enlarged plan view showing an example of a pixel region according to an embodiment of the present disclosure.
[0025] Figure 10 It is a plan view showing an example of a first mask according to an embodiment of the present disclosure.
[0026] Figure 11 It is a plan view showing an example of a second mask according to an embodiment of the present disclosure.
[0027] Figure 12 It is a plan view showing an example of a third mask according to an embodiment of the present disclosure.
[0028] Figure 13 It is a schematic diagram schematically showing an example of a deposition method of a second light-emitting layer of a display device according to an embodiment of the present disclosure.
[0029] Figure 14 It is a schematic diagram schematically showing an example of a deposition method of a third light-emitting layer of a display device according to an embodiment of the present disclosure.
[0030] Figure 15 It shows along Figure 6 a cross-sectional view showing an example of the overall structure of a second sub-pixel region taken along line III-III' in
[0031] Figure 16 It shows along Figure 6 a cross-sectional view showing an example of the overall structure of a third sub-pixel region taken along line IV-IV' in
[0032] Figure 17 It is a cross-sectional view showing an example of another structure of a third sub-pixel region according to an embodiment of the present disclosure. Detailed Description
[0033] The advantages, features, and methods for implementing the present disclosure will be elucidated by the following aspects described with reference to the accompanying drawings. However, the present disclosure may be implemented in different forms and should not be construed as limited to the aspects set forth herein. On the contrary, these aspects are provided so that the present disclosure is thorough and complete, and fully conveys the scope of the present disclosure to those skilled in the art. Furthermore, the present disclosure is defined only by the scope of the claims.
[0034] The shapes, sizes, ratios, angles, and quantities used to describe the aspects of the present disclosure disclosed in the drawings are merely examples, and thus, the present disclosure is not limited to the details shown. Throughout the specification, the same reference numerals denote the same elements. In the following description, when the detailed description of related known functions or configurations is determined to unnecessarily obscure the focus of the present disclosure, the detailed description will be omitted. When using "comprising", "having", and "including" described in this specification, another part may be added unless "only" is used. Unless otherwise stated, terms in the singular form may include the plural form.
[0035] When interpreting an element, the element is interpreted as including a range of errors even though not explicitly described.
[0036] When describing a positional relationship, for example, when the positional relationship between two parts is described as "on", "above", "below", and "next to", one or more other parts may be provided between the two parts unless more restrictive terms such as "immediately" or "directly" are used.
[0037] When describing a temporal relationship, for example, when the temporal order is described as "after", "subsequently", "next", and "before", discontinuous cases may be included unless more restrictive terms such as "immediately", "instantly", or "directly" are used.
[0038] It should be understood that although terms such as "first" and "second" may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of the present disclosure, the first element may be referred to as the second element, and similarly, the second element may be referred to as the first element.
[0039] When describing the elements of the present disclosure, terms such as "first", "second", "A", "B", "(a)", "(b)", etc. may be used. These terms are intended to identify corresponding elements from other elements, and the basis, order, sequence, or quantity of the corresponding elements should not be defined or limited by these terms. Regarding the expression that an element or layer is "connected", "coupled", or "adhered" to another element or layer, unless otherwise stated, the element or layer can not only be directly connected or adhered to another element or layer, but also be indirectly connected or adhered to another element or layer, with one or more intermediate elements or layers "disposed" between the element or layer.
[0040] The term "at least one" should be understood to include any and all combinations of one or more of the associated listed elements. For example, the meaning of "at least one or more of the first element, the second element, and the third element" represents all combinations of two or more of the elements selected from the first element, the second element, and the third element, as well as the first element, the second element, or the third element.
[0041] As can be fully understood by those skilled in the art, the features of the various aspects of the present disclosure can be partially or wholly coupled or combined with each other, and can operate differently from each other and be technically driven. The aspects of the present disclosure can be carried out independently of each other, or can be carried out together in a mutually dependent relationship.
[0042] Hereinafter, aspects of the present disclosure will be described with reference to the accompanying drawings. Since, for the sake of convenience of description, the scale of each element shown in the drawings is different from the actual scale, the present disclosure is not limited to the shown scale. In addition, all components of each display device according to all aspects of the present disclosure can be operatively coupled and configured.
[0043] Figure 1 is a diagram schematically showing an example of the configuration of a display device according to an embodiment of the present disclosure, Figure 2 is a cross-sectional view schematically showing an example of the structure of a display panel according to an embodiment of the present disclosure, Figure 3 is a diagram schematically showing the configuration of sub-pixels according to an embodiment of the present disclosure.
[0044] The display device 1000 according to an embodiment can provide a display function for displaying an image and a touch sensing function for sensing the presence or absence of a user touch and / or touch coordinates.
[0045] The display device 1000 according to an embodiment can be an electroluminescent display device or a micro light emitting diode display device including a touch sensor. The electroluminescent display including a touch sensor can be an organic light emitting diode (OLED) display device, a quantum dot light emitting diode display device, or an inorganic light emitting diode display device.
[0046] Reference Figure 1 Figure 1 , the display device 1000 may include a display panel 100, a display driving circuit 200 for driving the display panel 100, and a touch sensing circuit 300 for driving and sensing a touch sensor array embedded in the display panel 100. The display device 1000 may further include a power management circuit for generating and providing a plurality of power supply voltages required for the operation of the display panel 100, the display driving circuit 200, and the touch sensing circuit 300.
[0047] The display panel 100 may be a rigid display panel or a flexible display panel capable of being deformed, such as a foldable, bendable, rollable, and stretchable display panel.
[0048] The display panel 100 may include a display area DA for displaying an image and a non-display area NDA, and the non-display area NDA is a border area surrounding the display area DA and located in the outer part.
[0049] The display panel 100 may further include a touch sensor array provided in the display area DA to sense a user's touch.
[0050] The display panel 100 may use the display area DA in which a plurality of sub-pixels are arranged in a matrix form to display an image. The pixel matrix of the display area DA may include a plurality of row lines composed of a plurality of sub-pixels arranged in a first direction X and a plurality of column lines composed of a plurality of sub-pixels arranged in a second direction Y. The display panel 100 may include a plurality of signal lines connected to the plurality of sub-pixels, and the plurality of signal lines include a plurality of gate lines, a plurality of data lines, a plurality of power supply lines, etc.
[0051] The display driving circuit 200 may include a data driver for providing data signals to a plurality of data lines of the display panel 100, a gate driver for providing gate signals to the plurality of gate lines, and a timing controller for controlling the operations of the data driver and the gate driver.
[0052] The touch sensing circuit 300 may include a touch driving circuit and a touch controller, etc. The touch driving circuit provides a touch driving signal to the touch sensor array embedded in the display panel 100, receives a readout signal from the touch sensor array to generate sensing data, and the touch controller detects the presence or absence of a touch and the touch coordinate position based on the sensing data provided by the touch driving circuit.
[0053] The touch sensor array may be a self-capacitance scheme for sensing self-capacitance changes according to a touch, or a mutual-capacitance scheme for sensing mutual-capacitance changes according to a touch.
[0054] The multiple pixels of the display panel 100 may include a first pixel PX1 and a second pixel PX2, and the first pixel PX1 and the second pixel PX2 have different light-emitting region arrangements of at least one sub-pixel among the multiple sub-pixels.
[0055] Each of the first pixel PX1 and the second pixel PX2 may include multiple sub-pixels, and the multiple sub-pixels have light-emitting elements with different light-emitting colors. The multiple sub-pixels may include a first sub-pixel having a first-color light-emitting element, a second sub-pixel having a second-color light-emitting element, and a third sub-pixel having a third-color light-emitting element. The first to third color light-emitting elements may be red, green, and blue light-emitting elements, but are not limited thereto. The multiple sub-pixels may further include a fourth sub-pixel having a white light-emitting element.
[0056] In the first pixel PX1 and the second pixel PX2, the light-emitting regions EAk1 and EAk2 of each sub-pixel may have an elongated shape including a long side in the first direction X and a short side in the second direction Y, but are not limited thereto, and may have various shapes.
[0057] In each of the first pixel PX1 and the second pixel PX2 according to an embodiment, the light-emitting regions EAk1 and EAk2 of at least one color may have an arrangement structure shifted in the first direction X or in the direction opposite to the first direction X in each pixel region.
[0058] Therefore, in the first pixel PX1 and the second pixel PX2 (the (N - 1)th pixel and the Nth pixel, where N is an integer equal to or greater than 2), the light-emitting regions EAk1 and EAk2 adjacent to each other in the first direction X may have a maximum interval in the first direction X, and in the second pixel PX2 and the first pixel PX1 (the Nth pixel and the (N + 1)th pixel), the light-emitting regions EAk2 and EAk1 may have a minimum interval in the first direction X. In an embodiment, among the multiple light-emitting regions of each pixel, the light-emitting regions EAk1 and EAk2 may have the largest light-emitting area in the first direction X.
[0059] In the pixel array of the display panel 100, the first pixel PX1 and the second pixel PX2 may be alternately arranged along the first direction X in a first pixel row in the first direction X, and in a second pixel row adjacent to the first pixel row in the second direction Y, the second pixel PX2 and the first pixel PX1 may be alternately arranged along the first direction X. In the display panel 100 according to an embodiment, the multiple light-emitting regions EAk1 and EAk2 arranged in the first direction X may be set such that the maximum interval and the minimum interval are alternately arranged, and the positions in the first direction X may be alternately arranged along the second direction Y.
[0060] Therefore, in the display panel 100 according to the embodiment, since the light-emitting regions EAk2 and EAk1 in the first direction X can be formed by any one of the openings OA of the mask, the minimum interval between the light-emitting regions EAk2 and EAk1 can be smaller than the dead zone, which is the minimum gap margin between the openings OA of the mask.
[0061] Therefore, the display panel 100 according to the embodiment can overcome the dead zone limitation of the mask, improve the aperture ratio of the light-emitting regions EAk1 and EAk2, and increase the brightness according to the aperture ratio.
[0062] Reference Figure 2 , the display panel 100 according to the embodiment may include a pixel array 140 and a packaging layer 150. The pixel array 140 has a circuit element layer 120 including a plurality of transistors and a plurality of signal lines disposed on a substrate 110, and a light-emitting element layer 130 including a plurality of light-emitting elements EL disposed on the circuit element layer 120. The packaging layer 150 is disposed on the pixel array 140 to seal the light-emitting element layer 130. The display panel 100 may include a touch sensor array 160 having a plurality of sensor electrodes disposed on the packaging layer 150 and a light control array 170 having a plurality of light control elements L disposed on the touch sensor array 160 to control the viewing angle. The touch sensor array 160 according to the embodiment may include sensor electrodes, bridges, and a black matrix disposed to overlap with the non-light-emitting regions of the light-emitting elements EL. The display panel 100 may further include a cover substrate 190 coupled to the light control array 170 through an optically transparent adhesive (OCA) 180.
[0063] The display panel 100 according to the embodiment may include a viewing angle cut-off function that limits the viewing angle in either the first direction X or the second direction Y within a cut-off angle using the light control element L that controls the viewing angle.
[0064] The light control element L may emit light having a first viewing angle by restricting the path of the light emitted from the light-emitting element EL within a specific cut-off angle in the second direction Y, and may emit light having a second viewing angle wider than the first viewing angle in the first direction X because it is not restricted within a specific angle.
[0065] The first viewing angle may be represented as a narrow viewing angle, and the second viewing angle may be represented as a wide viewing angle. The light control array 170 may be represented as a light cut-off film (LCF) that restricts the viewing angle in the second direction Y.
[0066] The first direction X may represent the left-right direction (horizontal direction) of the display panel 100, the second direction Y may represent the up-down direction (vertical direction) of the display panel 100, and the third direction Z may represent the front-back direction (thickness direction) of the display panel 100.
[0067] The display panel 100 according to an embodiment can provide an image displayed on the display area DA within a first viewing angle range by restricting the viewing angle with respect to the second direction Y within a cut-off angle, and can provide an image displayed on the display area DA within a second viewing angle range wider than the first viewing angle range within a second viewing angle range with respect to the first direction X.
[0068] Therefore, when the display device 1000 according to an embodiment is applied to a vehicle, the image displayed on the display device 1000 is prevented from being propagated to the front glass of the vehicle located in the second direction Y, thereby preventing the reflected light from disturbing the driver's front view. In an embodiment, the display device 1000 can be applied to a vehicle display device provided on a vehicle dashboard. The vehicle display device can include a cluster, a center information display (CID), a co-driver display (CDD), etc.
[0069] The display device 1000 according to an embodiment can be applied not only to a vehicle display device, but also to various display devices that require viewing angle limitation for privacy and information protection, such as a mobile display, an IT display, and a TV display.
[0070] Reference Figure 3 , each sub-pixel SP can include a light-emitting element EL and a pixel circuit 10 for driving the light-emitting element EL, and a light control element for controlling the viewing angle (see L in Figure 2 ) can overlap on the light-emitting element EL.
[0071] The sub-pixel SP according to an embodiment can receive a data voltage Vdata from a data driver of the display driving circuit 200 through any one of the data lines 22. The sub-pixel SP can receive a scan signal SCAN from a gate driver of the display driving circuit 200 through at least one gate line 12, and can receive a light emission control signal EM through at least one gate line 16. The sub-pixel SP according to an embodiment can receive a high-potential power supply voltage ELVDD from a power management circuit through a first power supply line 32, receive a low-potential power supply voltage ELVSS through a common electrode CE and a second power supply line 34, and receive a reference voltage Vref through a reference line 24.
[0072] The gate driver can be embedded and provided in a non-display area NDA of the display panel 100, but is not limited thereto, and the gate driver can be distributed and provided in the display area DA. The gate driver according to an embodiment can be embedded in the display panel 100 in a gate-in-panel (GIP) type and is composed of transistors formed by the same process as the transistors in the display area DA.
[0073] The gate driver may include at least one scan driver 210 that drives at least one gate line 12 and at least one light emission control driver 220 that drives at least one gate line 16. The number of gate lines connected to the sub-pixel SP, the number of scan drivers 210, and the number of light emission control drivers 220 may be variably changed according to the detailed configuration of the pixel circuit constituting the sub-pixel SP.
[0074] The scan driver 210 may generate at least one scan signal SCAN and provide it to at least one gate line 12 provided in each of the plurality of pixel row lines.
[0075] The light emission control driver 220 may generate at least one light emission control signal EM and provide it to at least one gate line 16 provided in each of the plurality of pixel row lines.
[0076] At least one of an LTPS transistor using a low-temperature polycrystalline silicon (LTPS) semiconductor and an oxide transistor using a metal oxide semiconductor may be applied to the plurality of transistors provided in the display area DA of the display panel 100 and the non-display area NDA including the gate driver. The display panel 100 according to an embodiment may be configured such that the LTPS transistor and the oxide transistor coexist to reduce power consumption.
[0077] Figure 4 is an equivalent circuit diagram showing an example of the configuration of a sub-pixel according to an embodiment of the present disclosure, Figure 5 is a diagram showing an example of the driving waveform of a sub-pixel according to an embodiment of the present disclosure.
[0078] Reference Figure 4 , the sub-pixel SP may include a light emitting element EL and a pixel circuit 10 that drives the light emitting element EL. In an embodiment, the pixel circuit 10 may include a driving transistor DT, a plurality of switching transistors T1 to T5, and a storage capacitor Cst, but is not limited thereto.
[0079] The pixel circuit 10 may receive a first scan signal SCAN1 from the first scan driver 210 through the first gate line 12, and may receive a second scan signal SCAN2 from the second scan driver 212 through the second gate line 14.
[0080] The pixel circuit 10 may receive a light emission control signal EM from the light emission control driver 220 through the third gate line 16.
[0081] The pixel circuit 10 may receive a data signal Vdata from a data driver of a display driving circuit (see Figure 1 200 in). The pixel circuit 10 may receive power from a display driving circuit (see Figure 1The power management circuit (200) therein receives the high-potential power supply voltage ELVDD, receives the low-potential power supply voltage ELVSS through the second power line 34 and the common electrode CE, and receives the reference voltage Vref through the reference line 24.
[0082] Reference Figure 5 Moreover, each frame period N for driving the sub-pixel SP may include an initialization period t1, a sampling and writing period t2, and a light-emitting period t3.
[0083] Each of the driving transistor DT of the pixel circuit 10 and the plurality of switching transistors T1 to T5 includes a gate electrode, a source electrode, and a drain electrode. Since the source electrode and the drain electrode are not fixed and can be changed according to the voltage applied to the gate electrode and the current direction, one of the source electrode and the drain electrode can be represented as the first electrode, and the other of the source electrode and the drain electrode can be represented as the second electrode. The driving transistor DT of the pixel circuit 10 and the plurality of switching transistors T1 to T5 can use at least one of polycrystalline silicon semiconductors, amorphous silicon semiconductors, and oxide semiconductors, can be of P-type or N-type, and can use a combination of P-type and N-type.
[0084] The light-emitting element EL may include an anode electrode AE connected to the fourth switching transistor 4, a cathode electrode CE connected to the second power line 34 providing the low-potential power supply voltage ELVSS, and a light-emitting layer between the anode electrode AE and the cathode electrode CE. In the light-emitting element EL, when a driving current is provided from the driving transistor DT through the fourth switching transistor T4, electrons from the cathode electrode CE are injected into the light-emitting layer, and holes from the anode electrode AE are injected into the light-emitting layer, so as to emit light with a brightness proportional to the current value of the driving current through the recombination of electrons and holes in the light-emitting layer.
[0085] The gate electrode of the driving transistor DT may be connected to the storage capacitor Cst, the first electrode may be connected to the first power line 32 providing the high-potential power supply voltage ELVDD, and the second electrode may be connected to the first electrode of the fourth switching transistor T4. The driving transistor DT can be connected to the light-emitting element EL through the fourth switching transistor T4 and can drive the light-emitting element EL through the fourth switching transistor T4. The driving transistor DT can control the light-emitting intensity of the light-emitting element EL through the fourth switching transistor T4 by controlling the driving current according to the driving voltage charged in the storage capacitor Cst.
[0086] The storage capacitor Cst can be connected between the second electrode of the first switching transistor T1 and the gate electrode of the driving transistor DT to charge a driving voltage corresponding to the data voltage Vdata. The storage capacitor Cst can hold the charged driving voltage during the light-emitting period t3 when the first switching transistor T1 is turned off, and supply the driving voltage to the driving transistor DT.
[0087] The first switching transistor T1 can be turned on or off in response to a first scan signal SCAN1 of the first gate line 12 provided in the i-th (i is a natural number) pixel row line. During the sampling and writing period t2 when the first scan signal SCAN1 has a gate-on voltage VON, the first switching transistor T1 can supply the data voltage Vdata provided through the data line 22 to the first electrode of the storage capacitor Cst. The switching transistor T1 can be turned off during the initialization period t1 and the light-emitting period t3 when the first scan signal SCAN1 has a gate-off voltage VOFF.
[0088] The second switching transistor T2 and the fifth switching transistor T5 can be turned on or off in response to a second scan signal SCAN2 of the second gate line 14 provided to the i-th pixel row line. The second switching transistor T2 and the fifth switching transistor T5 can be turned on during the initialization period t1 and the sampling and writing period t2 when the second scan signal SCAN2 has a gate-on voltage VON, and can be turned off during the light-emitting period t3 when the second scan signal SCAN2 has a gate-off voltage VOFF.
[0089] The second switching transistor T2 can connect the gate electrode of the driving transistor DT to the second electrode in a diode structure in response to the second scan signal SCAN2 during the initialization period t1 and the sampling and writing period t2. The second switching transistor T2 can charge the threshold voltage Vth of the driving transistor DT into the storage capacitor Cst to compensate for the threshold voltage Vth of the driving transistor DT. Therefore, the storage capacitor Cst can be charged with the data voltage that compensates for the threshold voltage Vth of the driving transistor DT.
[0090] The fifth switching transistor T5 can supply the reference voltage Vref provided through the reference line 24 to the anode electrode AE of the light-emitting element EL during the initialization period t1 and the sampling and writing period t2 in response to the second scan signal SCAN2.
[0091] The third switching transistor T3 and the fourth switching transistor T4 can be turned on or off in response to the emission control signal EM of the third gate line 16 supplied to the i-th pixel row line. The third switching transistor T3 and the fourth switching transistor T4 can be turned on during the initialization period t1 and the emission period t3 when the emission control signal EM has a gate-on voltage VON. The third switching transistor T3 and the fourth switching transistor T4 can be turned off during the sampling and writing period t2 and during the period when the emission control signal EM has a gate-off voltage VOFF between the sampling and writing period t2 and the emission period t3.
[0092] The third switching transistor T3 can supply the reference voltage Vref supplied through the reference line 24 to the first electrode of the storage capacitor Cst during the initialization period t1 and the emission period t3 in response to the emission control signal EM.
[0093] The fourth switching transistor T4 can connect the driving transistor DT to the light-emitting element EL during the initialization period t1 and the emission period t3 in response to the emission control signal EM.
[0094] During the emission period t3 of each frame N, the driving transistor DT can drive the light-emitting element EL through the fourth switching transistor T4.
[0095] Figure 6 is an enlarged plan view showing an example of a plurality of pixel regions of a display device according to an embodiment of the present disclosure, Figure 7 and Figure 8 is a cross-sectional view schematically showing an example of the structure of a plurality of second sub-pixel regions taken along the line I-I' in Figure 6 and a cross-sectional view schematically showing an example of the structure of a plurality of third sub-pixel regions taken along the line II-II' in Figure 6 is a cross-sectional view schematically showing an example of the structure of a plurality of third sub-pixel regions taken along the line II-II' in Figure 9 is an enlarged plan view showing an example of a pixel region according to an embodiment of the present disclosure.
[0096] The display panel 100 according to an embodiment includes a plurality of pixel regions. For ease of description, Figure 6 shows a structure of a plurality of sub-pixels constituting a plurality of row lines RLn1 to RLn6 and a plurality of column lines CLm1 to CLm6.
[0097] Refer to Figure 6, the display area DA of the display panel 100 may include a pixel array in which a plurality of pixels PX1 and PX2 are arranged in a matrix form. The plurality of pixels PX1 and PX2 include a first pixel PX1 and a second pixel PX2, and the first pixel PX1 and the second pixel PX2 have different arrangement structures of the light-emitting regions EA3 (EA31 and EA32) of at least one of the plurality of sub-pixels SP1, SP2, and SP3 (SP31 and SP32).
[0098] The first pixel PX1 and the second pixel PX2 may be alternately arranged along the first direction X and may be alternately arranged along the second direction Y.
[0099] The first pixel PX1 and the second pixel PX2 may be arranged to repeat the order of the first pixel PX1 and the second pixel PX2 along the first direction X in any one of two pixel rows adjacent to each other in the second direction Y, and may be arranged to repeat the order of the second pixel PX2 and the first pixel PX1 along the first direction X in the other pixel row. The first pixel PX1 and the second pixel PX2 may be arranged to repeat the order of the first pixel PX1 and the second pixel PX2 along the second direction Y in any one of two pixel rows adjacent to each other in the first direction X, and may be arranged to repeat the order of the second pixel PX2 and the first pixel PX1 along the second direction Y in the other pixel row.
[0100] A pixel group including the first pixel PX1 and the second pixel PX2 adjacent to each other in the first direction X, the second pixel PX2 adjacent to the first pixel PX1 in the second direction Y, and the first pixel PX1 adjacent to the second pixel PX2 in the second direction Y may be repeatedly provided in the first direction X and the second direction Y.
[0101] Each of the first pixel PX1 and the second pixel PX2 may include a plurality of sub-pixels SP1, SP2, and SP3 having light-emitting elements EL1, EL2, and EL3 with different light-emitting colors. The plurality of sub-pixels SP1, SP2, and SP3 may include a first sub-pixel SP1 having a first-color light-emitting element EL1, a second sub-pixel SP2 having a second-color light-emitting element EL2, and a third sub-pixel SP3 having a third-color light-emitting element EL3. The first to third color light-emitting elements EL1, EL2, and EL3 may be red, green, and blue light-emitting elements, but are not limited thereto.
[0102] In each of the first pixel PX1 and the second pixel PX2, the plurality of light-emitting elements EL1, EL2, and EL3 of each of the plurality of sub-pixels SP1, SP2, and SP3 may be arranged in parallel in the second direction Y, and the light-emitting elements of the same color may be aligned and arranged in the first direction X.
[0103] In the light-emitting regions EA1, EA2, and EA3 of the light-emitting elements EL1, EL2, and EL3 of multiple sub-pixels SP1, SP2, and SP3, the light-emitting regions of the same color can be arranged along the first direction X, and the light-emitting regions EA1, EA2, and EA3 of different colors can be arranged along the second direction Y.
[0104] In an embodiment, the first row line RLn1 or the fourth row line RLn4 may include multiple first sub-pixels SP1 in which multiple first light-emitting regions EA1 are arranged along the first direction X. The second row line RLn2 or the fifth row line RLn5 may include multiple second sub-pixels SP2 in which multiple second light-emitting regions EA2 are arranged along the first direction X. The third row line RLn3 may include multiple 3-1 sub-pixels SP31 and 3-2 sub-pixels SP32 in which the 3-1 light-emitting region EA31 and the 3-2 light-emitting region EA32 are alternately arranged along the first direction X. Contrary to the third row line RLn3, the sixth row line RLn6 may include multiple 3-2 sub-pixels SP32 and 3-1 sub-pixels SP31 in which the 3-2 light-emitting region EA32 and the 3-1 light-emitting region EA31 are alternately arranged along the first direction X.
[0105] In an embodiment, each of the odd-numbered column lines CLm1, CLm3, and CLm5 may include multiple first to third sub-pixels SP1, SP2, SP31, and SP32, where the first to 3-1 light-emitting regions EA1, EA2, and EA31 and the first to 3-2 light-emitting regions EA1, EA2, and EA32 are alternately arranged along the second direction Y. In an embodiment, each of the even-numbered column lines CLm2, CLm4, and CLm6 may include multiple first to third sub-pixels SP1, SP2, SP32, and SP31, where the first to 3-2 light-emitting regions EA1, EA2, and EA32 and the first to 3-1 light-emitting regions EA1, EA2, and EA31 are alternately arranged along the second direction Y.
[0106] Each of the light-emitting regions EA1, EA2, and EA3 of the multiple sub-pixels SP1, SP2, and SP3 may include a long side in the first direction X and a short side in the second direction Y. The multiple light-emitting regions EA1, EA2, and EA3 may have different or the same light-emitting areas for each color, or the light-emitting area of at least one color may be different from that of another color.
[0107] In an embodiment, the first light-emitting region EA1 may be less than or equal to the second light-emitting region EA2. The third light-emitting region EA3 (EA31 and EA32) may have the largest light-emitting area. In an embodiment, the first light-emitting region EA1 and the second light-emitting region EA2 may have the same long-side length in the first direction X, and the third light-emitting region EA3 may have the largest long-side length in the first direction X. In an embodiment, the plurality of light-emitting regions EA1, EA2, and EA3 may have the same short-side length in the second direction Y.
[0108] The light control element L may overlap the plurality of light-emitting regions EA1, EA2, and EA3 of the first pixel PX1 and the second pixel PX2. The light incident surface of the light control element L may include a long side in the first direction X and a short side in the second direction Y.
[0109] In an embodiment, the light control element L may have a semi-cylindrical lens structure elongated in the first direction X, but is not limited thereto.
[0110] The light control element L provided on each of the plurality of light-emitting regions EA1, EA2, and EA3 may have the same light incident surface size, or may have different light incident surface sizes according to the light-emitting areas of the light-emitting regions EA1, EA2, and EA3. The light incident surface size of the light control element L may be set to be larger than the light-emitting area of each of the plurality of light-emitting regions EA1, EA2, and EA3, thereby improving the light-emitting efficiency.
[0111] In the first pixel PX1, the first light-emitting region EA1 and the second light-emitting region EA2 may be aligned in the second direction Y and provided at the same first center point x1, and the 3-1 light-emitting region EA31 may be aligned and provided at a second center point x2 shifted from the first center point x1 in the 1-1 direction -X. The light control element L provided on the plurality of light-emitting regions EA1, EA2, and EA31 of the first pixel PX1 may be aligned and provided at the first center point x1. In the first pixel PX1, the center point x2 of the 3-1 light-emitting region EA31 may be shifted from the center point x1 of the light control element L in the 1-1 direction -X.
[0112] In the second pixel PX2, the first light-emitting region EA1 and the second light-emitting region EA2 may be aligned in the second direction Y and disposed at the same third center point x3, and the 3-2 light-emitting region EA32 may be aligned and disposed at a fourth center point x4 shifted in the 1-2 direction +X from the third center point x3, rather than at the third center point x3. The light control element L disposed on the plurality of light-emitting regions EA1, EA2, and EA32 of the second pixel PX2 may be aligned and disposed at the third center point x3. In the second pixel PX2, the center point x4 of the 3-2 light-emitting region EA32 may be shifted in the 1-2 direction +X from the center point x3 of the light control element L.
[0113] Therefore, in the first pixel PX1 and the second pixel PX2, the first light-emitting regions EA1 adjacent to each other in the first direction X may have a first distance D1, and the second light-emitting regions EA2 adjacent to each other in the first direction X may also have a second distance D2 equal to or similar to the first distance D1.
[0114] In the first pixel PX1 (the N-1th pixel) and the second pixel PX2 (the Nth pixel) adjacent to each other in the first direction X, the third light-emitting regions EA31 and EA32 may have a third distance D3. In the second pixel PX2 (the Nth pixel) and the first pixel PX1 (the N+1th pixel) adjacent to each other in the first direction X, the third light-emitting regions EA32 and EA31 may have a fourth distance D4. The third distance D3 may be greater than or equal to the first distance D1 and the second distance D2, and may be greater than the fourth distance D4. The fourth distance D4 may be less than the first distance D1 and the second distance D2. The third distance D3 may be the maximum interval in the pixel array, and the fourth distance D4 may be the minimum interval in the pixel array.
[0115] In the display panel 100 according to the embodiment, the plurality of third light-emitting regions EA31 and EA32 aligned in the first direction X may be alternately disposed to have the third distance D3 (the maximum interval) and the fourth distance D4 (the minimum interval), and may be disposed in a zigzag shape having different positions in the first direction X along the second direction Y.
[0116] Therefore, since the light-emitting regions EA31 and EA32 having the minimum interval D4 in the first direction X may be formed through any one of the openings OA of the mask, the minimum interval D4 between the light-emitting regions EA31 and EA32 may be smaller than the dead zone between the openings OA of the mask. Therefore, the dead zone limitation of the mask can be overcome, the aperture ratio of the light-emitting regions EA31 and EA32 having the maximum light-emitting area can be increased, and the brightness can be increased.
[0117] Reference Figure 7 and Figure 8, in the light-emitting element layer 130 of the pixel array, a plurality of second light-emitting elements EL2 arranged in the first direction X may include a plurality of second light-emitting regions EA2, and a second distance D2 may be provided between the plurality of second light-emitting regions EA2 by means of a dam insulating layer 132. In the light-emitting element layer 130, a plurality of third light-emitting elements EL31, EL32, EL31 arranged in the first direction X may include a 3-1 light-emitting region EA31, a 3-2 light-emitting region EA32, and a 3-1 light-emitting region EA31. A third distance D3 may be provided between the 3-1 light-emitting region EA31 and the 3-2 light-emitting region EA32 by means of a dam insulating layer 132, and a fourth distance D4 may be provided between the 3-2 light-emitting region EA32 and the 3-1 light-emitting region EA31 by means of a dam insulating layer 132.
[0118] The encapsulation layer 150 may be provided on the light-emitting element layer 130, and the touch sensor array 160 may be provided on the encapsulation layer 150.
[0119] According to an embodiment, the touch sensor array 160 is provided to overlap with a non-light-emitting region of the pixel array (i.e., a non-light-emitting region other than the light-emitting regions EA (EA1, EA2, EA31, and EA32) of the sub-pixels SP1, SP2, SP31, and SP32), and may include a bridging electrode BE, a black matrix BM, and a sensor electrode SE stacked on the encapsulation layer 150, with at least one insulating layer therebetween. The bridging electrode BE, the black matrix BM, and the sensor electrode SE may be provided in the non-light-emitting region to serve as a light-blocking barrier. In an embodiment, the sensor electrode SE and the black matrix BM may overlap and be provided in the non-light-emitting region surrounding the light-emitting region EA of the pixel array.
[0120] Reference Figures 7 to 9 , the bridging electrode BE provided to overlap with the non-light-emitting regions of the sub-pixels SP1, SP2, SP31, and SP32 may be electrically connected to the sensor electrode SE through a contact portion CNT. In the contact portion CNT, the sensor electrode SE may be connected to the bridging electrode BE through a contact hole passing through a plurality of touch insulating layers 166 and 164. The black matrix BM may not overlap with the contact portion CNT.
[0121] In an embodiment, the contact portion CNT may be provided in the non-light-emitting region between the second sub-pixel SP2 and the third sub-pixel SP3 adjacent to each other in the second direction Y. In an embodiment, in the non-light-emitting region between the second sub-pixel SP2 and the 3-1 sub-pixel SP31 adjacent to each other in the second direction Y, the contact portion CNT may be provided in the non-light-emitting region diagonally disposed with respect to the second light-emitting region EA2 and the 3-1 light-emitting region EA31.
[0122] The bridging electrode BE may be disposed on the encapsulation layer 150, and the black matrix BM may be disposed on the bridging electrode BE with any one of the touch insulating layers 164 therebetween. The sensor electrode SE may be disposed on the black matrix BM with any one of the touch insulating layers 166 therebetween. Any one of the touch insulating layers 168 may be disposed on the sensor electrode SE.
[0123] The sensor electrode SE overlapping with the non-light-emitting regions of the sub-pixels SP1, SP2, SP31, and SP32 may have openings overlapping with the light-emitting regions EA (EA1, EA2, EA31, and EA32) of the light-emitting elements EL (EL1, EL2, EL31, and EL32) and the light control element L.
[0124] In an embodiment, an end portion of the opening of the sensor electrode SE may overlap with an end portion in the second direction Y of the light incident surface of the light control element L, and may also overlap with an end portion X in the first direction X. In an embodiment, the overlapping portion of the sensor electrode SE and the light control element L may be disposed adjacent to the light-emitting regions EA1, EA2, EA31, and EA32 in the second direction Y to limit the radiation angle of the light emitted from the light-emitting regions EA (EA1, EA2, EA31, and EA32) within a first cut-off angle (first viewing angle) in the second direction Y and block light leakage. In an embodiment, the overlapping portion of the sensor electrode SE and the light control element L may be spaced apart from the light-emitting regions EA (EA1, EA2, EA31, and EA32) in the first direction X to control the radiation angle of the light emitted from the light-emitting regions EA (EA1, EA2, EA31, and EA32) within a second cut-off angle (second viewing angle) greater than the first cut-off angle (first viewing angle) in the first direction X and block light leakage.
[0125] The black matrix BM overlapping with the non-light-emitting regions of the sub-pixels SP1, SP2, SP31, and SP32 may include openings overlapping with the light-emitting regions EA (EA1, EA2, EA31, and EA32) of the light-emitting elements EL (EL1, EL2, EL31, and EL32) and the light control element L. The size of the opening of the sensor electrode SE may be smaller than or larger than the size of the opening of the black matrix BM. In an embodiment, an end portion of the opening of the black matrix BM may not overlap with the light incident surface of the light control element L.
[0126] The bridging electrode BE overlapping the non-light-emitting regions of the sub-pixels SP1, SP2, SP31, and SP32 may include an opening overlapping the light-emitting regions EA (EA1, EA2, EA31, and EA32) of the light-emitting elements EL (EL1, EL2, EL31, and EL32) and the light control element L. A plurality of bridging electrodes BE may extend in the second direction Y, and the openings of the bridging electrodes BE may be disposed between the plurality of bridging electrodes BE adjacent to each other in the first direction X. The bridging electrode BE overlapping the black matrix BM may have a row width smaller than that of the black matrix BM in the first direction X.
[0127] The light control array 170 including a plurality of light control elements L may be disposed on the touch sensor array 160. The plurality of light control elements L may be disposed to individually overlap the light-emitting regions EA (EA1, EA2, EA31, and EA32) of the plurality of light-emitting elements EL (EL1, EL2, EL31, and EL32). The light control array 170 may further include a protective layer 172 covering the light control elements L disposed on the touch sensor array 160.
[0128] In an embodiment, respective center points x1 and x3 of the light control element L in the first direction X may be aligned with the center points of the light-emitting regions EA1 and EA2 in the first direction X.
[0129] A plurality of first light-emitting regions EA1 may be disposed at the same distance D1 along the first direction X, and a plurality of second light-emitting regions EA2 may be disposed at the same distance D2 along the first direction X.
[0130] In an embodiment, the center point x2 of the 3-1 light-emitting region EA31 in the first direction X may be shifted in the 1-1 direction -X from the center point x1 in the first direction X in the region of the light control element L. The center point x4 of the 3-2 light-emitting region EA32 in the first direction X may be shifted in the 1-2 direction +X from the center point x3 in the first direction X in the region of the light control element L. A plurality of third light-emitting regions EA31 and EA32 may be alternately disposed to have a third distance D3 (maximum interval) and a fourth distance D4 (minimum interval) along the first direction X.
[0131] Figures 10 to 12 is a plan view showing an example of a first mask to a third mask according to an embodiment of the present disclosure, Figure 13 is a schematic diagram schematically showing an example of a deposition method of a second light-emitting layer of a display device according to an embodiment of the present disclosure, Figure 14 is a schematic diagram schematically showing an example of a deposition method of a third light-emitting layer of a display device according to an embodiment of the present disclosure.
[0132] Reference Figures 10 to 12, the first to third masks 410, 420, and 430 according to the embodiment may be fine metal masks (FMMs).
[0133] Reference Figure 6 and Figure 10 , the plurality of first light-emitting elements EL1 may include a first light-emitting layer deposited in a pattern shape through the first opening OA1 of the first mask 410 in the plurality of first light-emitting regions EA1. The first opening OA1 of the first mask 410 may overlap with the first light-emitting region EA1, and the first opening OA1 may have an area larger than that of the first light-emitting region EA1. The plurality of first light-emitting regions EA1 may be arranged at a first distance D1 in the first direction X.
[0134] Reference Figure 6 , Figure 11 and Figure 13 , the plurality of second light-emitting elements EL2 may include a second light-emitting layer 322G deposited in a pattern shape through the second opening OA2 of the second mask 420 in the plurality of second light-emitting regions EA2. The second opening OA2 of the second mask 420 may overlap with the second light-emitting region EA2, and the second opening OA2 may have an area larger than that of the second light-emitting region EA2. The plurality of second light-emitting regions EA2 may be arranged at a second distance D2 in the first direction X.
[0135] The deposition source 520 may eject deposition vapor by evaporating the second light-emitting material, and the ejected deposition vapor may pass through the second opening OA2 between the ribs 422 of the second mask 420 and be deposited in a pattern shape on the working substrate SUB to form the second light-emitting layer 322G. The working substrate SUB may be a substrate in an intermediate stage, where an anode electrode and a dam insulating layer 132 are provided on the circuit element layer 120 of the substrate 110. A spacer for supporting the ribs 422 of the mask 420 may be further provided on the dam insulating layer 132.
[0136] Reference Figure 6 , Figure 12 and Figure 14 , the plurality of 3-2 light-emitting elements EL32 and 3-1 light-emitting elements EL31 may include a third light-emitting layer 322B deposited in a pattern shape through the third opening OA3 of the third mask 430 in the 3-2 light-emitting region EA32 and the 3-1 light-emitting region EA31. The third opening OA3 of the third mask 430 may overlap with the 3-2 light-emitting region EA32 and the 3-1 light-emitting region EA31 adjacent to each other in the first direction X, and the area of the third opening OA3 may be larger than the combined area of the 3-2 light-emitting region EA32 and the 3-1 light-emitting region EA31. The third opening OA3 may be referred to as an integrated opening.
[0137] The deposition source 530 can eject and deposit vapor by evaporating a third light-emitting material, and the ejected and deposited vapor can pass through the third opening OA3 between the ribs 432 of the third mask 430 and be deposited on the working substrate SUB in a pattern shape to form a third light-emitting layer 322B. The third mask 430 may further include a fourth opening OA4 that overlaps with any one of the 3-1 light-emitting region EA31 and the 3-2 light-emitting region EA32. The working substrate SUB may be a substrate in an intermediate stage, where an anode electrode and a dam insulating layer 132 are provided on the circuit element layer 120 of the substrate 110. A spacer for supporting the ribs 422 of the mask 420 may be further provided on the dam insulating layer 132.
[0138] The third light-emitting layer 322B deposited in the 3-2 light-emitting region EA32 and the 3-1 light-emitting region EA31 through the third opening OA3 of the third mask 430 may also be deposited on the dam insulating layer 132 between the 3-2 light-emitting region EA32 and the 3-1 light-emitting region EA31. Since the third light-emitting layer 322B deposited on the dam insulating layer 132 does not contact the anode electrode, the 3-2 light-emitting region EA32 and the 3-1 light-emitting region EA31 can be separated and emit light independently.
[0139] Therefore, according to the embodiment, the 3-2 light-emitting region EA32 and the 3-1 light-emitting region EA31 adjacent to each other in the first direction X can be formed through the integrated opening OA3 of the third mask 430. Therefore, since the minimum interval D4 between the 3-2 light-emitting region EA32 and the 3-1 light-emitting region EA31 can be smaller than the minimum dead zone margin between the openings OA3 of the mask 430, the dead zone limitation of the mask can be overcome, and since the aperture ratio of the light-emitting regions EA32 and EA31 having the largest light-emitting area in the first direction X can be increased, the brightness can also be increased.
[0140] Figure 15 and Figure 16 is a cross-sectional view showing an example of the overall structure of a second sub-pixel region taken along line III-III' in Figure 6 and a cross-sectional view showing an example of the overall structure of a third sub-pixel region taken along line IV-IV' in Figure 6 and is a cross-sectional view showing an example of another structure of the third sub-pixel region according to an embodiment of the present disclosure. Figure 17
[0141] Refer to Figures 15 to 17 , the display panel 100 according to an embodiment may include: a pixel array 140 having a circuit element layer 120 disposed on a substrate 110 and a light-emitting element layer 130 disposed on the circuit element layer 120, a packaging layer 150 disposed on the pixel array 140 to seal the light-emitting element layer 130, a touch sensor array 160 disposed on the packaging layer 150, and a light control array 170 disposed on the touch sensor array 160. The display panel 100 may further include a polarizer POL, an optically clear adhesive OCA 180, a cover substrate 190, etc. disposed on the light control array 170.
[0142] The substrate 110 may include an insulating material such as glass or plastic. The plastic substrate may be formed of a flexible material. For example, the substrate 110 may include at least one organic insulating material among acrylic resin, epoxy resin, silicone resin, polyimide resin, and polyamide resin.
[0143] The circuit element layer 120 according to an embodiment may include a plurality of insulating layers stacked on the substrate 110. For example, the plurality of insulating layers may include a buffer layer 121, a gate insulating layer 122, an interlayer insulating layer 123, a protection layer 124, and a planarization layer 125.
[0144] The buffer layer 121 may have a single-layer or multi-layer structure including an inorganic insulating material such as silicon oxide (SiOx), silicon nitride (SiNx), or aluminum oxide (Al2O3). The buffer layer 121 may prevent impurities such as hydrogen from passing through the substrate 110 and being introduced into the semiconductor layer 221.
[0145] In an embodiment, the buffer layer 121 may include a multi-buffer layer and an active buffer layer. In this case, the multi-buffer layer may be disposed on the substrate 110, and the active buffer layer may be disposed on the multi-buffer layer. A light-blocking layer may be disposed between the multi-buffer layer and the active buffer layer.
[0146] A plurality of transistors including transistors TFT may be disposed on the buffer layer 121. The transistor TFT includes a semiconductor layer 221 disposed on the buffer layer 121, a gate electrode 223, a source electrode 225, and a drain electrode 227. The gate insulating layer 122 is disposed between the semiconductor layer 221 and the gate electrode 223. The interlayer insulating layer 123 is disposed between the gate electrode 223 and the source electrode 225 and the drain electrode 227. The source electrode 225 and the drain electrode 227 of the transistor TFT may be connected to the source region and the drain region of the semiconductor layer 221 through contact holes penetrating the interlayer insulating layer 123 and the gate insulating layer 122, respectively.
[0147] The semiconductor layer 221 may include polysilicon or may include an oxide semiconductor material. The semiconductor layer 221 may include low-temperature polysilicon (LTPS). The semiconductor layer 221 may include at least one oxide semiconductor material among IZO (InZnO)-based, IGO (InGaO)-based, ITO (InSnO)-based, IGZO (InGaZnO)-based, IGZTO (InGaZnSnO)-based, GZTO (GaZnSnO)-based, GZO (GaZnO), and ITZO (InSnZnO)-based. A light-shielding layer (not shown) may be further provided under the semiconductor layer 221.
[0148] The gate insulating layer 122 may include an inorganic insulating material such as silicon oxide (SiOx) and silicon nitride (SiNx). The gate insulating layer 122 may include a material having a high dielectric constant. For example, the gate insulating layer 122 may include a high-K material such as hafnium oxide (HfO). The gate insulating layer 122 may have a multilayer structure.
[0149] The gate electrode 223 and the gate line may be provided on the gate insulating layer 122.
[0150] The interlayer insulating layer 123 may include an inorganic insulating material such as silicon oxide (SiOx) and silicon nitride (SiNx). The interlayer insulating layer 123 may have a multilayer structure.
[0151] The source electrode 225, the drain electrode 227, the data line, and the power line may be provided on the interlayer insulating layer 123.
[0152] The protective layer 124 and the planarization layer 125 may be stacked on the transistor TFT. The protective layer 124 may include an inorganic insulating material such as silicon oxide (SiOx) and silicon nitride (SiNx). The planarization layer 125 may include an organic insulating material different from the material of the protective layer 124 and may provide a flat surface. The planarization layer 125 may have a bilayer structure.
[0153] The light-emitting element layer 130 including a plurality of light-emitting elements EL (EL2, EL31, and EL32) may be provided on the planarization layer 125.
[0154] Each light-emitting element EL may include an anode electrode 321 provided on the planarization layer 125, a light-emitting layer 322 provided on the anode electrode 321, and a common cathode electrode 323 provided on the light-emitting layer 322.
[0155] The anode electrode 321 can be connected to one of the source electrode 225 and the drain electrode 227 of the transistor TFT through a contact hole penetrating the planarization layer 125 and the protective layer 124. The anode electrode 321 can include a conductive material with a high reflectivity. The anode electrode 321 can include metals such as aluminum (Al), silver (Ag), titanium (Ti), and silver-palladium-copper (APC) alloy. The anode electrode 321 can also include a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). In an embodiment, the anode electrode 321 can have a multilayer structure of titanium (Ti) and aluminum (Al) (Ti / Al / Ti), a multilayer structure of ITO and aluminum (Al) (ITO / Al / ITO), or a multilayer structure of ITO and APC (ITO / APC / ITO).
[0156] The light-emitting layer 322 can include a light-emitting material layer (EML) containing a light-emitting material. The light-emitting material can include an organic material, an inorganic material, or a hybrid material. The light-emitting layer 322 can have a multilayer structure. In an embodiment, the light-emitting layer 322 can also include at least one of a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL).
[0157] The cathode electrode 323 can be a common electrode and can include a conductive material that transmits light. The cathode electrode 323 can include a transparent conductive material such as ITO or IZO. The cathode electrode 323 can include aluminum (Al), magnesium (Mg), silver (Ag), or an alloy thereof, and can have a thin thickness capable of transmitting light.
[0158] The anode electrodes 321 of the light-emitting element EL can be spaced apart from each other, and the dam insulating layer 132 can be located between the anode electrodes 321 of the light-emitting element EL. The dam insulating layer 132 can cover the edges of the anode electrode 321. The dam insulating layer 132 can include an opening through which the anode electrodes 321 of the light-emitting element EL are exposed to respectively define light-emitting regions EA (EA2, EA31, and EA32). The light-emitting layer 322 and the cathode electrode 323 can be stacked on the anode electrode 321 exposed through the opening of the dam insulating layer 132.
[0159] The dam insulating layer 132 can include an organic insulating material. The dam insulating layer 132 can include an organic material different from the material of the planarization layer 125 and can have a single-layer or double-layer structure.
[0160] Reference Figure 16 and Figure 17, the 3-2 light-emitting element EL32 and the 3-1 light-emitting element EL31 adjacent to each other with a minimum interval D4 in the first direction X may include an anode electrode 321 independently provided in the 3-2 light-emitting region EA32 and the 3-1 light-emitting region EA31, a light-emitting layer 322 provided on the anode electrode 320 and the dam insulating layer 132 located between the anode electrodes 320 so as to be interconnected, and a cathode electrode 323 provided on the light-emitting layer 322. The light-emitting layer 322 shared by the 3-2 light-emitting region EA32 and the 3-1 light-emitting region EA31 may be formed through the integration opening OA3 of the third mask 430 as shown in Figure 12 .
[0161] The spacer 134 may be further provided on the dam insulating layer 132. When the light-emitting layer 322 is formed, the spacer 134 may support the mask.
[0162] The encapsulation layer 150 located on the light-emitting element layer 130 may prevent the light-emitting element EL from being damaged due to external moisture and impact. The encapsulation layer 150 may have a multi-layer structure. In an embodiment, the encapsulation layer 150 may include a first encapsulation layer 152, a second encapsulation layer 154, and a third encapsulation layer 156 stacked in sequence, but is not limited thereto. The first encapsulation layer 152, the second encapsulation layer 154, and the third encapsulation layer 156 may include an insulating material. The second encapsulation layer 154 may include a material different from that of the first encapsulation layer 152 and the third encapsulation layer 156. For example, the first encapsulation layer 152 and the third encapsulation layer 156 are inorganic encapsulation layers including an inorganic insulating material, and the second encapsulation layer 154 is an organic encapsulation layer including an organic insulating material. Therefore, the light-emitting element EL of the display device can be more effectively prevented from being damaged by external moisture and impact.
[0163] The touch sensor array 160 may include a first touch insulating layer 162 provided on the encapsulation layer 150, a bridging electrode BE provided on the first touch insulating layer 162, a second touch insulating layer 164 covering the bridging electrode BE, a black matrix BM provided on the second touch insulating layer 164, a third touch insulating layer 166 covering the black matrix BM, a sensor electrode SE provided on the third touch insulating layer 166, and a fourth touch insulating layer 168 covering the sensor electrode SE. The bridging electrode BE, the black matrix BM, and the sensor electrode SE may be provided in the non-light-emitting region of each sub-pixel overlapping with the dam insulating layer 132. The sensor electrode SE may be electrically connected to the bridging electrode BE through a contact portion CNT (see Figure 9 ).
[0164] The light control array 170 may include a light control element L provided on the touch sensor array 160 and a protective layer 172 covering the light control element L. The light control array 170 may be represented as a light blocking film LCF including a plurality of lenses corresponding to the light control element L.
[0165] The light control element L can be disposed on the light emitting region EA of the light emitting element EL to control the path of the light generated in the light emitting region EA. The light control element L can control the path of the light generated in the light emitting region EA of the light emitting element EL to a wide viewing angle in the first direction X and a narrow viewing angle in the second direction Y. The light control element L can overlap with at least one end portion of the sensor electrode SE and the black matrix BM in the non-light emitting region.
[0166] Reference Figure 15 and Figure 16 According to an embodiment, the light control element L can overlap with each light emitting region EA and can have the same size.
[0167] Reference Figure 17 According to an embodiment, the light control element L' can have an integrated lens shape that is further elongated in the first direction X to overlap with the 3-2 light emitting region EA32 and the 3-1 light emitting region EA31 that are arranged adjacent to each other in the first direction X.
[0168] Reference Figure 15 and Figure 17 According to an embodiment, the light control array 170 can include a first light control element L that overlaps with the first light emitting region EA1 and the second light emitting region EA2 separately, and a second light control element L' that is shared by the 3-2 light emitting region EA32 and the 3-1 light emitting region EA31. The second light control element L' can have a longer side length in the first direction X than the first light control element L.
[0169] The protective layer 172 covering the light control element L can include an organic insulating material. The refractive index of the protective layer 172 can be less than the refractive index of the light control element L. Therefore, the light passing through the light control element L can be prevented from reflecting toward the substrate 110 due to the refractive index difference with the protective layer 172.
[0170] Therefore, the present disclosure can have the following advantages.
[0171] According to an embodiment of the present disclosure, a display device according to an embodiment can arrange a plurality of light emitting regions of the same color aligned along any one direction such that the plurality of light emitting regions alternately have a maximum interval and a minimum interval, and the light emitting regions with the minimum interval can be formed through an integrated opening of a mask.
[0172] According to an embodiment of the present disclosure, a display device according to an embodiment can reduce the minimum interval between the light emitting regions to be less than the minimum gap margin (dead zone) between the openings of the mask, thereby overcoming the dead zone limitation of the mask, increasing the aperture ratio of the light emitting regions, and increasing the brightness.
[0173] According to an embodiment of the present disclosure, a display device according to the embodiment can improve display performance by increasing the aperture ratio and brightness of a light-emitting region.
[0174] According to an embodiment of the present disclosure, since the display device according to the embodiment can reduce the current density of the light-emitting region by increasing the aperture ratio of the light-emitting region, deterioration of the light-emitting region can be reduced, the lifespan can be increased, and a low-power consumption effect can be achieved.
[0175] A display device according to some aspects may include a display area including a plurality of first pixels and a plurality of second pixels alternately arranged in a first direction. Each of the first pixels and the second pixels may include a plurality of light-emitting elements having different colors. The first pixels and the second pixels may have different light-emitting region arrangements of at least one of the plurality of light-emitting elements. Any light-emitting region of a first pixel and any light-emitting region of a second pixel adjacent in the first direction may be spaced apart by a maximum interval, and any light-emitting region of a second pixel and any light-emitting region of another first pixel adjacent in the first direction may be spaced apart by a minimum interval less than the maximum interval.
[0176] In the display device according to some aspects, light-emitting elements adjacent to each other with the minimum interval in the first direction may include an anode electrode independently provided in each of the light-emitting regions adjacent to each other in the first direction, a light-emitting layer provided on the anode electrode and on a partition layer provided between the light-emitting regions adjacent to each other in the first direction, and a cathode electrode provided on the light-emitting layer.
[0177] In the display device according to some aspects, each of the first pixels and the second pixels may include a first light-emitting element, a second light-emitting element, and a third light-emitting element arranged in a second direction different from the first direction. The light-emitting region of each of the first light-emitting element, the second light-emitting element, and the third light-emitting element may include a long side length in the first direction and a short side length in the second direction.
[0178] In the display device according to some aspects, in each of the first pixels and the second pixels, a first light-emitting region and a second light-emitting region may be aligned with a first center point in the first direction, and a third light-emitting region may be aligned with a second center point in the first direction.
[0179] In the display device according to some aspects, the first light-emitting region and the second light-emitting region of the first pixel may be aligned at a first center point in the first direction, and the third light-emitting region of the first pixel may be aligned with a second center point shifted in the 1-1 direction from the first center point in the first pixel.
[0180] In a display device according to some aspects, a first light-emitting region and a second light-emitting region of a second pixel may be aligned at a third center point in a first direction, and a third light-emitting region of the second pixel may be aligned with a fourth center point shifted in a 1-2 direction opposite to the 1-1 direction from the third center point in the second pixel.
[0181] A display device according to some aspects may further include a light control array including a plurality of light control elements overlapping and disposed on the light-emitting regions of each of a plurality of light-emitting elements, wherein each of the plurality of light control elements may include a long side length in a first direction and a short side length in a second direction, and wherein each of the plurality of light control elements may control the path of light emitted from the light-emitting region within a cut-off angle in the second direction.
[0182] In a display device according to some aspects, a plurality of light control elements overlapping the first light-emitting region, the second light-emitting region, and the third light-emitting region of a first pixel may be aligned at a first center point in a first direction, and a plurality of light control elements overlapping the first light-emitting region, the second light-emitting region, and the third light-emitting region of a second pixel may be aligned with a third center point in the first direction.
[0183] In a display device according to some aspects, the plurality of light control elements may include a first light control element overlapping two third light-emitting regions adjacent to each other in the first direction at a minimum interval, and the two adjacent third light-emitting regions may share the first light control element.
[0184] A display device according to some aspects may further include a light-emitting element layer, a packaging layer, and a touch sensor array, the light-emitting element layer including a plurality of light-emitting elements, the packaging layer disposed on the light-emitting element layer, and the touch sensor array disposed between the packaging layer and the light control array.
[0185] In a display device according to some aspects, the touch sensor array may include a bridging electrode, a black matrix, and a sensor electrode, the bridging electrode, the black matrix, and the sensor electrode overlapping in a non-light-emitting region surrounding the light-emitting region of each of the plurality of light-emitting elements in a display region and having an insulating layer disposed in different layers, and wherein the bridging electrode may be electrically connected to the sensor electrode through a contact portion disposed in the non-light-emitting region.
[0186] In a display device according to some aspects, a display area may include a first row line to a sixth row line arranged side by side in a second direction. Among them, each of the first row line and the fourth row line may include a plurality of first sub-pixels in which a plurality of first light-emitting regions are arranged along a first direction. Each of the second row line and the fifth row line may include a plurality of second sub-pixels in which a plurality of second light-emitting regions are arranged along the first direction. The third row line may include a plurality of 3-1 sub-pixels and 3-2 sub-pixels in which a 3-1 light-emitting region and a 3-2 light-emitting region are alternately arranged along the first direction. The sixth row line may include a plurality of 3-2 sub-pixels and 3-1 sub-pixels in which a 3-2 light-emitting region and a 3-1 light-emitting region are alternately arranged along the first direction.
[0187] In a display device according to some aspects, each of the plurality of first light-emitting regions may be spaced apart at a first distance in the first direction. Each of the plurality of second light-emitting regions may be spaced apart at a second distance in the first direction. The 3-1 light-emitting region and the 3-2 light-emitting region adjacent to each other in the first direction may be spaced apart at a maximum interval, and the 3-2 light-emitting region and the 3-1 light-emitting region adjacent to each other in the first direction may be spaced apart at a minimum interval.
[0188] According to another aspect of the present disclosure, a display device is provided. The display device includes: a pixel array including a pixel circuit and a plurality of sub-pixels, the plurality of sub-pixels including light-emitting elements connected to the pixel circuit; a packaging layer provided on the pixel array to seal a light-emitting element layer including the light-emitting elements; a touch sensor array including a black matrix and sensor electrodes provided on the packaging layer and overlapping a non-light-emitting region of the pixel array; and a light control array including light control elements provided on the touch sensor array and overlapping the light-emitting elements. Among them, in the pixel array, among the (N-1)th pixel (N is an integer greater than or equal to 2) and the Nth pixel adjacent to each other in the first direction, the light-emitting element having the largest light-emitting region is spaced apart at a first distance in the first direction, and among the Nth pixel and the (N+1)th pixel adjacent to each other in the first direction, the light-emitting element having the largest light-emitting region may be spaced apart at a second distance smaller than the first distance in the first direction.
[0189] In a display device according to some aspects, the light-emitting elements adjacent to each other at the second distance in the Nth pixel and the (N+1)th pixel may include an anode electrode independently provided in each light-emitting region, a light-emitting layer shared by adjacent light-emitting elements, and a cathode electrode shared by adjacent light-emitting elements.
[0190] In a display device according to some aspects, each of the (N-1)th pixel and the Nth pixel may include a first light-emitting element, a second light-emitting element, and a third light-emitting element arranged in a second direction intersecting a first direction, wherein each of the first light-emitting region to the third light-emitting region of the first light-emitting element to the third light-emitting element may include a long side length in the first direction and a short side length in the second direction, and wherein the long side of the third light-emitting region in the first direction may be the longest.
[0191] In a display device according to some aspects, the first light-emitting region and the second light-emitting region of the (N-1)th pixel may be aligned at a first center point in the first direction within the (N-1)th pixel, the third light-emitting region of the (N-1)th pixel may be aligned with a second center point shifted in the 1-1 direction from the first center point in the (N-1)th pixel, and the arrangement structure of the light-emitting regions of the (N + 1)th pixel may be the same as the arrangement structure of the light-emitting regions of the (N-1)th pixel.
[0192] In a display device according to some aspects, the light control element may include a long side length in the first direction and a short side length in the second direction, wherein a plurality of light control elements overlapping the first light-emitting region to the third light-emitting region of the (N-1)th pixel may be aligned with the first center point in the first direction.
[0193] In a display device according to some aspects, the first light-emitting region and the second light-emitting region of the Nth pixel may be aligned at a third center point in the first direction within the Nth pixel, and the third light-emitting region of the Nth pixel may be aligned with a fourth center point shifted in the 1-2 direction opposite to the 1-1 direction from the first center point in the Nth pixel.
[0194] In a display device according to some aspects, the light control element may include a long side length in the first direction and a short side length in the second direction, wherein a plurality of light control elements overlapping the first light-emitting region to the third light-emitting region of the Nth pixel may be aligned with the third center point in the first direction.
[0195] The above features, structures, and effects of the present disclosure are included in at least one embodiment of the present disclosure, but are not limited to only one embodiment. In addition, the features, structures, and effects described in at least one embodiment of the present disclosure may be achieved by those skilled in the art through combinations or modifications of other embodiments. Therefore, the content associated with the combinations and modifications should be construed as being within the scope of the present disclosure.
[0196] It will be apparent to those skilled in the art that various substitutions, modifications, and variations are possible within the scope of the present disclosure without departing from the spirit and scope of the present disclosure. Accordingly, the scope of the present disclosure is represented by the appended claims, and all changes or modifications derived from the meaning, scope, and equivalent concepts of the claims should be construed as being included within the scope of the present disclosure.
Claims
1. A display device, comprising: a display area, the display area comprising a plurality of first light emitting areas arranged in a first direction and having a first color, The intervals between the adjacent first light emitting regions in the first direction alternate along the first direction between a maximum interval and a minimum interval that is smaller than the maximum interval.
2. The display device according to claim 1, in, A bank layer is provided between adjacent first light emitting regions in the first direction, wherein the light-emitting layers disposed in the first light-emitting regions adjacent to each other at the minimum interval are connected to each other, The light-emitting layers arranged in the first light-emitting regions adjacent to each other at the maximum interval are disconnected from each other.
3. The display device according to claim 1, in, The display area includes a plurality of second light emitting areas arranged in the first direction and having a second color, The first light emitting areas and the second light emitting areas are alternately arranged in a second direction intersecting the first direction.
4. The display device according to claim 3, in, The interval between the second light emitting areas adjacent to each other in the first direction is greater than the minimum interval.
5. The display device according to claim 3, in, An interval between adjacent first light emitting regions in the first direction alternates between the maximum interval and the minimum interval along the second direction.
6. The display device according to claim 3, in, Each of the first light emitting area and the second light emitting area includes a long side length in the first direction and a short side length in the second direction.
7. The display device according to claim 6, in, The length of a long side of each of the first light-emitting regions is greater than the length of a long side of each of the second light-emitting regions.
8. The display device according to claim 3, in, The center points of the second light emitting areas arranged in the second direction are aligned with each other along the second direction, The center point of the first light emitting area arranged in the second direction is shifted from the center point of the second light emitting area in the first direction or in a direction opposite to the first direction.
9. The display device according to claim 8, further comprising: a light control array, the light control array comprising a plurality of light control elements overlapping and arranged on the plurality of first light emitting areas and the plurality of second light emitting areas, wherein each of the plurality of light control elements comprises a long side length in the first direction and a short side length in the second direction, Each of the plurality of light control elements controls a path of light emitted from each of the plurality of first light emitting regions and the plurality of second light emitting regions to be within a cutoff angle in the second direction.
10. The display device according to claim 9, in, Center points of the plurality of light control elements are aligned with a center point of the second light emitting area along the second direction.
11. The display device according to claim 9, in, The light control array includes light control elements shared by first light emitting areas adjacent to each other at the minimum interval.
12. The display device according to claim 9, further comprising: a light emitting element layer, the light emitting element layer comprising a plurality of light emitting elements; An encapsulation layer, the encapsulation layer being disposed on the light-emitting element layer; as well as A touch sensor array is disposed between the encapsulation layer and the light control array.
13. The display device according to claim 12, in, The touch sensor array includes a bridge electrode, a black matrix and a sensor electrode overlapped in a non-luminescent area of the display area, The bridge electrode is electrically connected to the sensor electrode via a contact portion disposed in the non-luminescent region.
14. A display device, comprising: a display area, the display area comprising first to sixth row lines extending along a first direction and arranged in a second direction intersecting the first direction, Each of the first row line and the fourth row line includes a plurality of first sub-pixels whose first light-emitting regions are arranged along the first direction. Each of the second row line and the fifth row line includes a plurality of second sub-pixels whose second light emitting areas are arranged along the first direction. The third row line includes a plurality of 3-1 sub-pixels and 3-2 sub-pixels in which the 3-1 light emitting area and the 3-2 light emitting area are alternately arranged along the first direction, The sixth row line includes a plurality of 3-2 sub-pixels and 3-1 sub-pixels in which the 3-2 light-emitting area and the 3-1 light-emitting area are alternately arranged along the first direction, In each of the third row line and the sixth row line, the 3-1 light emitting area and the 3-2 light emitting area adjacent to each other in the first direction are spaced apart at a maximum interval, and the 3-2 light emitting area and the 3-1 light emitting area adjacent to each other in the first direction are spaced apart at a minimum interval smaller than the maximum interval.
15. The display device according to claim 14, in, In each of the first row line and the fourth row line, the plurality of first light emitting regions are spaced apart by a first distance in the first direction, In each of the second row line and the fifth row line, the plurality of second light emitting areas are spaced apart by a second distance in the first direction, The minimum interval is smaller than the first distance and the second distance.
16. A display device, comprising: A pixel array, the pixel array comprising a plurality of pixels arranged along a first direction and a second direction intersecting the first direction, each pixel comprising a plurality of light emitting elements, one of the plurality of light emitting elements having a maximum light emitting area greater than that of the other light emitting elements; an encapsulation layer, the encapsulation layer being disposed on the pixel array to seal a light-emitting element layer including the light-emitting element; A touch sensor array, the touch sensor array comprising a black matrix and sensor electrodes, disposed on the encapsulation layer and overlapping a non-luminescent area of the pixel array; as well as a light control array, the light control array comprising light control elements disposed on the touch sensor array and overlapping the light emitting elements, Wherein, in the pixel array, In the N-1th pixel and the Nth pixel adjacent to each other in the first direction, the light emitting elements having the maximum light emitting area are adjacent to each other in the first direction and spaced apart by a first distance, N being an integer of 2 or greater, In the Nth pixel and the N+1th pixel adjacent to each other in the first direction, the light emitting elements having the maximum light emitting area are adjacent to each other in the first direction and are spaced apart by a second distance smaller than the first distance.
17. The display device according to claim 16, in, The light emitting elements adjacent to each other at the second distance in the Nth pixel and the N+1th pixel include: an anode electrode, the anode electrode being independently disposed in each light emitting element; a light-emitting layer, the light-emitting layer being shared by adjacent light-emitting elements; and A cathode electrode is shared by adjacent light emitting elements.
18. The display device according to claim 16, in, Each of the N-1th pixel, the Nth pixel, and the N+1th pixel includes: A first light emitting element, a second light emitting element and a third light emitting element arranged in the second direction, wherein the light emitting area of each of the first to third light emitting elements includes a long side length in the first direction and a short side length in the second direction, Wherein, the third light-emitting element has the maximum light-emitting area.
19. The display device according to claim 18, in, In each of the N-1th pixel and the N+1th pixel, the light emitting areas of the first light emitting element and the second light emitting element have first center points aligned in the second direction, In each of the N-1th pixel and the N+1th pixel, the maximum light emitting area of the third light emitting element has a second center point shifted from the first center point in the first direction.
20. The display device according to claim 19, in, The light control element comprises a long side length in the first direction and a short side length in the second direction, In each of the N-1th pixel and the N+1th pixel, a center point of a long side length of a light control element overlapping each of the first to third light emitting elements is aligned with the first center point in the second direction.
21. The display device according to claim 18, in, In the Nth pixel, the light emitting areas of the first light emitting element and the second light emitting element have third center points aligned in the second direction, In the Nth pixel, the maximum light emitting area of the third light emitting element has a fourth center point shifted from the third center point in a direction opposite to the first direction.
22. The display device according to claim 21, in, The light control element comprises a long side length in the first direction and a short side length in the second direction, In the N-th pixel, a center point of a long side length of a light control element overlapping each of the first to third light emitting elements is aligned with the third center point in the second direction.