Crystal oscillator and chip fan-out packaging structure and method

Abstract

The embodiment of the present application relates to the field of semiconductor integrated circuit technology and discloses a crystal oscillator and chip fan-out packaging structure and method. The crystal oscillator and chip fan-out packaging structure includes a chip, a passivation layer, a plurality of shielding columns, a crystal oscillator, a packaging body and a communication component. The crystal oscillator and chip fan-out packaging structure provided by the embodiment of the present application, on the one hand, realizes the spatial interconnection between the crystal oscillator and the bare chip, reducing the occupied area of ​​the chip and the crystal oscillator; on the other hand, through the setting of the shielding columns, it can play the role of metal isolation, avoid other signals from interfering with the operation of the crystal oscillator, and solve the problem of jitter caused by external environmental interference on the crystal oscillator. While realizing the miniaturization of the crystal oscillator and chip fan-out packaging structure, it improves the anti-interference ability of the crystal oscillator and greatly reduces the cost.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of semiconductor integrated circuit technology, and in particular to a crystal oscillator and chip fan-out packaging structure and method. Background Art

[0002] With the development trend of miniaturization and high reliability in industrial society, applications represented by mobile phones and smart cockpits have increasingly precise requirements for clocks. Crystal oscillators, as reference sources that can provide clock frequency, have more and more application scenarios and are becoming more and more complex. However, with the continuous improvement of people's living standards, a single crystal oscillator can no longer meet everyone's high-precision requirements. The chip and crystal oscillator need to work together. In most related technologies, the crystal oscillator and chip are soldered on the PCB, which greatly occupies the size and area of ​​the PCB. In some solutions, the crystal oscillator and chip are packaged in the same package, but the crystal oscillator is easily interfered with, which can easily affect the accuracy. Summary of the Invention

[0003] The Summary of the Invention introduces a series of simplified concepts that will be further described in the Detailed Description of the Invention. This section of the invention is not intended to limit the key features and essential features of the claimed technical solution, nor is it intended to determine the scope of protection of the claimed technical solution.

[0004] The present invention aims to solve at least one of the technical problems existing in the prior art or related art.

[0005] To this end, a first aspect of the present invention provides a crystal oscillator and chip fan-out packaging structure.

[0006] A second aspect of the present invention provides a crystal oscillator and chip fan-out packaging method.

[0007] In view of this, according to a first aspect of an embodiment of the present application, a crystal oscillator and chip fan-out packaging structure is proposed, including:

[0008] chip;

[0009] a passivation layer covering the chip;

[0010] A plurality of shielding columns, wherein the plurality of shielding columns are connected to the passivation layer and the plurality of shielding columns enclose a shielding space;

[0011] a crystal oscillator, the crystal oscillator being connected to the passivation layer and being located in the shielding space;

[0012] A package body, wherein the crystal oscillator and the chip are arranged in the package body;

[0013] A communication component, part of which is disposed in the package, connected to the chip, and led out through the package.

[0014] In a feasible implementation manner, the shielding column is made of metal material; and / or

[0015] The diameter of the shielding column is 8um to 15um.

[0016] In a feasible implementation manner, the surface of the chip on which the crystal oscillator is provided is a first surface, and a ratio of an area of ​​a connection between the shielding pillar and the first surface to an area of ​​the first surface is greater than or equal to 25%.

[0017] The height of the shielding column is higher than that of the crystal oscillator.

[0018] In a feasible implementation manner, the communication component includes:

[0019] a first metal circuit layer, disposed on the passivation layer and connected to the pads of the chip;

[0020] a first metal column, one end of the first metal column being connected to the first metal circuit layer;

[0021] a second metal circuit layer connected to the other end of the first metal pillar;

[0022] A lead-out metal column, one end of which is connected to the second metal circuit layer, and the other end of which is led out to the surface of the package body;

[0023] A metal solder ball is disposed on the package body and connected to the lead-out metal column.

[0024] In a feasible implementation manner, the communication component is further connected to the crystal oscillator, and the communication component further includes:

[0025] A connecting metal column, one end of which is connected to the crystal oscillator, and the other end of which is connected to the second metal circuit layer.

[0026] In a feasible embodiment, the raw materials for preparing the package body include, in parts by weight:

[0027] 25 to 35 parts of resin matrix, 8 to 12 parts of curing agent, 50 to 60 parts of filler, 1 to 2 parts of silane coupling agent and 0.3 to 0.6 parts of additives;

[0028] The material used to prepare the filler includes silicon dioxide, and the mass of the silicon dioxide accounts for 80% to 90% of the total mass of the filler.

[0029] In a feasible embodiment, the materials used to prepare the filler include methylhexahydrobenzene, aluminum oxide, boron nitride and silicon dioxide.

[0030] According to a second aspect of an embodiment of the present application, a crystal oscillator and chip fan-out packaging method is proposed, which is used to prepare a crystal oscillator and chip fan-out packaging structure as described in any of the above technical solutions. The crystal oscillator and chip fan-out packaging method includes:

[0031] providing a wafer, and disposing a passivation layer on the wafer;

[0032] Etching the passivation layer on the wafer to expose the bonding pads of the wafer;

[0033] providing a first metal circuit layer connected to the pad and a first metal column connected to the first metal circuit layer;

[0034] Arranging a plurality of shielding columns on the passivation layer to enclose and form a shielding space;

[0035] The crystal oscillator is bonded to the passivation layer, and the crystal oscillator is located in the shielding space.

[0036] In a feasible implementation, the crystal oscillator and wafer fan-out packaging method further includes:

[0037] Arranging a connecting metal column on the crystal oscillator;

[0038] performing a first packaging on the wafer and the crystal oscillator to form a primary package;

[0039] Polishing the primary package body to expose the connecting metal pillars and the first metal pillars;

[0040] forming a second metal circuit layer on the primary package;

[0041] Disposing a lead-out metal column on the second metal circuit layer;

[0042] performing a second packaging on the second metal circuit layer and the lead-out metal pillars to form a packaging body;

[0043] A metal solder ball connected to the lead-out metal column is provided on the package body.

[0044] In a feasible implementation, the crystal oscillator and wafer fan-out packaging method further includes:

[0045] Slice and cut the packaged wafer to obtain multiple chip devices;

[0046] Taping is performed on a plurality of the chip devices.

[0047] Compared with the prior art, the present invention has at least the following beneficial effects:

[0048] The crystal oscillator and chip fan-out packaging structure provided in the embodiment of the present application includes a chip, a passivation layer, a plurality of shielding columns, a crystal oscillator, a packaging body and a communication component. Based on this, in the process of preparing the crystal oscillator and chip fan-out packaging structure, a passivation layer can be first set on the wafer, and then a communication component connected to the wafer is constructed. A plurality of shielding columns are set on the passivation layer to form a shielding area. The crystal oscillator is then connected to the passivation layer, and the crystal oscillator is located in the shielding area. Finally, the wafer is sliced ​​and cut to obtain the chip fan-out packaging structure. The crystal oscillator and chip fan-out packaging structure provided in the embodiment of the present application, on the one hand, realizes the spatial interconnection between the crystal oscillator and the bare chip, reducing the occupied area of ​​the chip and the crystal oscillator; on the other hand, through the setting of the shielding columns, it can play the role of metal isolation, avoid other signals from interfering with the operation of the crystal oscillator, and solve the problem of jitter caused by external environmental interference on the crystal oscillator. While realizing the miniaturization of the crystal oscillator and chip fan-out packaging structure, the anti-interference ability of the crystal oscillator is improved, which greatly reduces the cost.

[0049] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are specifically listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] Various other advantages and benefits will become apparent to those skilled in the art upon reading the detailed description of the preferred embodiment below. The accompanying drawings are for illustration purposes only and are not to be considered as limiting the present application. The same reference symbols are used throughout the drawings to represent the same components. In the drawings:

[0051] Figure 1 A schematic structural diagram of a crystal oscillator and chip fan-out packaging structure according to an embodiment of the present application;

[0052] Figure 2 A schematic structural diagram of a step in the preparation process of a crystal oscillator and chip fan-out packaging structure according to an embodiment of the present application;

[0053] Figure 3 A schematic structural diagram of another step in the preparation process of a crystal oscillator and chip fan-out packaging structure according to an embodiment of the present application;

[0054] Figure 4 This is a schematic structural diagram of another step in the preparation process of the crystal oscillator and chip fan-out packaging structure according to an embodiment of the present application;

[0055] Figure 5This is a schematic structural diagram of another step in the preparation process of the crystal oscillator and chip fan-out packaging structure according to an embodiment of the present application;

[0056] Figure 6 A schematic structural diagram from another angle of another step in the process of preparing a crystal oscillator and chip fan-out packaging structure according to an embodiment of the present application;

[0057] Figure 7 A schematic flowchart of the steps of a crystal oscillator and chip fan-out packaging method according to an embodiment of the present application.

[0058] in, Figures 1 to 6 The corresponding relationship between the reference numerals and component names is as follows:

[0059] 110 chip, 120 passivation layer, 130 shielding column, 140 crystal oscillator, 150 package, 160 communication component;

[0060] 111 solder pad, 161 first metal circuit layer, 162 first metal column, 163 second metal circuit layer, 164 lead-out metal column, 165 metal solder ball, 166 connection metal column, 167 third metal circuit layer. DETAILED DESCRIPTION

[0061] In the following description, a number of specific details are provided to provide a more thorough understanding of the technical solutions provided by the present invention. However, it is obvious to those skilled in the art that the technical solutions provided by the present invention can be implemented without one or more of these details.

[0062] It should be noted that the terms used herein are only for the purpose of describing specific embodiments and are not intended to limit exemplary embodiments according to the present invention. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should also be understood that when the terms "comprise" and / or "include" are used in this specification, they indicate the presence of the features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or combinations thereof.

[0063] Exemplary embodiments of the present invention will now be described in greater detail with reference to the accompanying drawings. However, these exemplary embodiments may be implemented in a variety of different forms and should not be construed as being limited to the embodiments set forth herein. It should be understood that these embodiments are provided to make the disclosure of the present invention thorough and complete and to fully convey the concepts of these exemplary embodiments to those of ordinary skill in the art.

[0064] like Figures 1 to 6As shown, according to the first aspect of the embodiment of the present application, a crystal oscillator and chip fan-out packaging structure is proposed, including: a chip 110; a passivation layer 120, the passivation layer 120 covers the chip 110; a plurality of shielding columns 130, the plurality of shielding columns 130 are connected to the passivation layer 120, and the plurality of shielding columns 130 enclose a shielding space; a crystal oscillator 140, the crystal oscillator 140 is connected to the passivation layer 120 and is located in the shielding space; a package body 150, the crystal oscillator 140 and the chip 110 are arranged in the package body 150; a communication component 160, part of the communication component 160 is arranged in the package body 150, connected to the chip 110, and led out through the package body 150.

[0065] The crystal oscillator and chip fan-out packaging structure provided in the embodiment of the present application includes a chip 110, a passivation layer 120, multiple shielding pillars 130, a crystal oscillator 140, a packaging body 150 and a communication component 160. Based on this, in the preparation process of the crystal oscillator and chip fan-out packaging structure, the passivation layer 120 can be first set on the wafer, and then the communication component 160 connected to the wafer is constructed, and multiple shielding pillars 130 are set on the passivation layer 120 to form a shielding area. Thereafter, the crystal oscillator 140 is connected to the passivation layer 120, and the crystal oscillator 140 is located in the shielding area. Finally, the wafer is diced and cut to obtain the chip 110 fan-out packaging structure. The crystal oscillator and chip fan-out packaging structure provided in the embodiments of the present application, firstly, achieves spatial interconnection between the crystal oscillator 140 and the bare chip, reducing the footprint of the chip 110 and crystal oscillator 140. Secondly, the provision of shielding posts 130 provides metal isolation, preventing other signals from interfering with the operation of the crystal oscillator 140 and resolving the issue of jitter caused by external environmental interference on the crystal oscillator 140. This miniaturization of the crystal oscillator and chip fan-out packaging structure improves the anti-interference capability of the crystal oscillator 140 and significantly reduces costs.

[0066] The crystal oscillator and chip fan-out packaging structure provided in the embodiment of the present application ensures the communication between the crystal oscillator 140 and the chip 110 through the provision of the communication component 160, and can realize the functions of the semiconductor device.

[0067] The crystal oscillator and chip fan-out packaging structure provided in the embodiment of the present application can realize spatial interconnection between the bare chip and the crystal oscillator. The chip 110 and the crystal oscillator 140 can form a 1:1 surface, thereby improving the signal transmission speed.

[0068] The crystal oscillator and chip fan-out packaging structure provided in the embodiment of the present application forms a shielded space by enclosing multiple shielding columns 130. During the operation of the crystal oscillator and chip fan-out packaging structure, the shielding columns 130 can reflect high-frequency electromagnetic waves to prevent them from penetrating the shielding columns 130 and affecting the crystal oscillator 140. At the same time, when the electromagnetic waves propagate in the shielding material, eddy currents will be formed, which will gradually attenuate and further weaken the interference, thereby forming a low-impedance path, reducing the interference to the internal circuit, and further reducing the interference to the crystal oscillator 140. This can solve the problem of frequency jumping of the crystal oscillator 140 and ensure the reliability of the operation of the chip 110 and the crystal oscillator 140.

[0069] In a feasible implementation manner, the shielding post 130 is made of a metal material; and / or the diameter of the shielding post 130 is 8 um to 15 um.

[0070] This technical solution further provides a design for shielding post 130, which is made of a metal material and has a diameter of 8 to 15 μm. This metal material selection allows for better reflection of high-frequency electromagnetic waves. The 8 to 15 μm diameter of shielding post 130 not only facilitates its fabrication but also increases the probability of contact between high-frequency electromagnetic waves and shielding post 130, thereby better suppressing interference from external signals on crystal oscillator 140 and ensuring device reliability. The 8 to 15 μm diameter of shielding post 130 further facilitates its fabrication and reduces processing costs.

[0071] In some examples, the shielding post 130 may be made of copper. This configuration facilitates the preparation of the shielding post 130 and reduces production costs.

[0072] like Figure 1 As shown, in a feasible embodiment, the surface of the chip 110 on which the crystal oscillator 140 is provided is the first surface, and the ratio of the area of ​​the connection between the shielding column 130 and the first surface to the area of ​​the first surface is greater than or equal to 25%; and / or the height of the shielding column 130 is higher than the height of the crystal oscillator 140.

[0073] In this technical solution, an arrangement of the shielding column 130 is further provided. The surface of the chip 110 on which the crystal oscillator 140 is provided is the first surface. The ratio of the area where the shielding column 130 is connected to the first surface to the area of ​​the first surface is greater than or equal to 25%. That is to say, the coverage area of ​​one surface of the chip 110 by the shielding column 130 is greater than or equal to 25%. Such an arrangement can further increase the probability of contact between the high-frequency electromagnetic waves formed externally and the shielding column 130, and can better suppress the high-frequency electromagnetic waves formed externally, making the operation of the crystal oscillator 140 more precise.

[0074] In this technical solution, the ratio of the area of ​​the connection between the shielding column 130 and the first surface to the area of ​​the first surface is greater than or equal to 25%. On the one hand, it is beneficial to increase the electroplating area and improve the electroplating effect. On the other hand, it can further increase the reflection efficiency of the shielding column 130 for electromagnetic waves, increase the contact area, and better suppress the high-frequency electromagnetic waves generated externally, making the vibration frequency of the crystal oscillator 140 more accurate.

[0075] In this technical solution, the height of the shielding column 130 is higher than that of the crystal oscillator 140 , which can better play the role of metal isolation, better suppress the interference of external signals on the crystal oscillator 140 , and ensure the reliability of device operation.

[0076] like Figures 1 to 6 As shown, in a feasible embodiment, the communication component 160 includes: a first metal circuit layer 161, which is arranged on the passivation layer 120 and is connected to the pad 111 of the chip 110; a first metal pillar 162, the first metal pillar 162 is connected to the first metal circuit layer 161; a second metal circuit layer 163, the second metal circuit layer 163 is connected to the other end of the first metal pillar 162; a lead-out metal pillar 164, one end of the lead-out metal pillar 164 is connected to the second metal circuit layer 163, and the other end is led to the surface of the package body 150; a metal solder ball 165, the metal solder ball 165 is arranged on the package body 150 and connected to the lead-out metal pillar 164.

[0077] This technical solution further provides a communication component 160. The communication component 160 may include a first metal circuit layer 161, a first metal pillar 162, a second metal circuit layer 163, and metal solder balls 165. During the preparation of the fan-out package structure for the crystal oscillator and chip, after forming the passivation layer 120, a hole can be opened at the location of the pad 111 on the chip 110 by developing and etching. The hole can be in the shape of a base, exposing the pad 111. The first metal circuit layer 161 is then prepared using processes such as metal sputtering, photolithography, and electroplating. A first metal pillar 162 can then be set on the first metal circuit layer 161. The first metal pillar 162 can then communicate with the chip 110 through the first metal circuit layer 161 and the pad 111. The first metal pillar 162 can then be packaged with the first metal pillar 162, the metal layer, the chip 110, and the crystal oscillator 140 for the first time, and the packaging material is then polished to expose the first metal pillar 162. A second metal circuit layer 163 is then prepared on the packaging material, and then a lead-out metal column 164 is prepared on the second metal circuit layer 163 in the same manner. The second metal circuit layer 163 and the lead-out metal column 164 are then packaged to achieve communication between the chip 110 and external devices.

[0078] In some examples, to facilitate the preparation of the first metal circuit layer 161 and the second metal circuit layer 163 , the first metal circuit layer 161 and the second metal circuit layer 163 may be made of copper.

[0079] In some examples, the first metal pillar 162 and the lead-out metal pillar 164 may be made of the same material, and may both be made of nickel-tin-silver material.

[0080] In this technical solution, the communication component 160 also includes a metal solder ball 165. By arranging the metal solder ball 165 on the surface of the package body 150, the chip 110 can be connected to other components for communication by welding. There are gaps between the multiple metal solder balls 165, which can effectively dissipate heat and prevent the crystal oscillator from being irreversibly damaged by high temperature due to excessive temperature after reflow soldering.

[0081] In this technical solution, metal solder balls 165 are selected as the connection structure between the crystal oscillator and the chip fan-out packaging structure and external components, which facilitates the bonding of other circuits. At the same time, the gaps between multiple metal solder balls 165 can be used for heat dissipation, which can avoid the phenomenon of frequency jumps of the crystal oscillator 140 caused by rapid temperature changes.

[0082] like Figure 1 As shown, in a feasible embodiment, the communication component 160 is also connected to the crystal oscillator 140 , and the communication component 160 further includes: a connecting metal column 166 , one end of the connecting metal column 166 is connected to the crystal oscillator 140 , and the other end is connected to the second metal circuit layer 163 .

[0083] In this technical solution, the communication component 160 can also be connected to the crystal oscillator 140. This configuration facilitates the operation of the crystal oscillator 140, facilitates communication between the crystal oscillator 140 and other components, and also facilitates communication between the crystal oscillator 140 and the chip 110. On this basis, the communication component 160 can also include a connecting metal pillar 166, which is connected to the crystal oscillator 140 and the second metal circuit layer 163. In other words, after the first metal pillar 162 is prepared, a lead-out metal pillar 164 can also be prepared on the crystal oscillator 140. The lead-out metal pillar 164 is connected to the second metal circuit layer 163, and the second metal circuit layer 163 and the lead-out metal pillar 164 can be used to communicate with external devices.

[0084] In a feasible embodiment, the raw materials for preparing the package body 150 include, by weight: 25 to 35 parts of a resin matrix, 8 to 12 parts of a curing agent, 50 to 60 parts of a filler, 1 to 2 parts of a silane coupling agent, and 0.3 to 0.6 parts of an additive; wherein the material for preparing the filler includes silicon dioxide, and the mass of silicon dioxide accounts for 80% to 90% of the total mass of the filler.

[0085] In this technical solution, raw materials for preparing the package body 150 are further provided. By selecting the above-mentioned ratio, the dielectric constant of the package body 150 can be reduced. By increasing the content of silicon dioxide in the filler, the structure is increased, so that the package body 150 can form a three-dimensional network structure and restrict the movement of molecular chains, thereby hindering orientation polarization, reducing dielectric loss capacity, and improving frequency transmission speed.

[0086] It can be understood that the resin matrix, as the main component of the package body 150, can bond the package body 150 to the chip 110 and the crystal oscillator 140, which is conducive to forming a stable packaging structure, and can support and protect the chip 110 and the crystal oscillator 140, so that the chip 110 and the crystal oscillator 140 are protected from external physical shocks and vibrations; the curing agent is a key component that triggers the curing reaction of the resin matrix. During the packaging process, the curing agent reacts chemically with the resin matrix, causing the resin matrix to transform from a liquid or plastic state to a solid state, thereby forming a hard packaging structure; the filler can adjust the performance parameters of the package body 150, such as adjusting the thermal expansion coefficient, hardness, wear resistance and other properties, so that the thermal expansion coefficient of the package body 150 is close to that of the crystal oscillator 140 and the chip 110, which can reduce the probability of warping and cracking of the package body 150. In this technical solution, by controlling the amount of silicon dioxide added, the dielectric constant of the package body 150 can be adjusted, which can reduce dielectric loss and increase frequency transmission speed; the silane coupling agent can form chemical bonds between inorganic materials and organic materials, thereby improving the interface compatibility between them, reducing stress concentration and defects inside the packaging material, and improving the reliability and durability of the packaging material; additives are trace components in the packaging material, and the additives may include but are not limited to release agents, flame retardants, stress additives and antioxidants.

[0087] In some examples, the resin matrix is ​​bisphenol A epoxy resin, the curing agent is phenolic resin, and the silane coupling agent is KH-560. This configuration can further improve the mechanical strength of the package 150 while ensuring the efficiency of signal transmission.

[0088] In one feasible embodiment, the filler material includes methyl hexahydrobenzene, aluminum oxide, boron nitride, and silicon dioxide. Methyl hexahydrobenzene can increase the glass transition temperature, reduce solid shrinkage volume, and reduce internal stress. Aluminum oxide can improve the material's high thermal conductivity. Boron nitride mainly serves as a high thermal conductivity filler. Silicon dioxide can reduce the material's dielectric loss.

[0089] The crystal oscillator and chip fan-out packaging structure provided in the embodiment of the present application provides test examples, multiple embodiments, and multiple comparative examples for the raw materials of the package body 150, wherein:

[0090] Example 1:

[0091] The raw materials for preparing the package body 150 include, by weight:

[0092] Resin matrix 25, curing agent 12 parts, filler 50, silane coupling agent 2 parts and additive 0.3;

[0093] The material used to prepare the filler includes silicon dioxide, and the mass of the silicon dioxide accounts for 80% of the total mass of the filler.

[0094] Example 2:

[0095] The raw materials for preparing the package body 150 include, by weight:

[0096] 35 parts of resin matrix, 8 parts of curing agent, 60 parts of filler, 1 part of silane coupling agent and 0.6 parts of additives;

[0097] The material used to prepare the filler includes silicon dioxide, and the mass of the silicon dioxide accounts for 90% of the total mass of the filler.

[0098] Example 3:

[0099] The raw materials for preparing the package body 150 include, by weight:

[0100] 30 parts of resin matrix, 10 parts of curing agent, 58 parts of filler, 1.5 parts of silane coupling agent and 0.5 parts of additives;

[0101] The material used to prepare the filler includes silicon dioxide, and the mass of the silicon dioxide accounts for 87% of the total mass of the filler.

[0102] Example 4:

[0103] The raw materials for preparing the package body 150 include, by weight:

[0104] 30 parts of resin matrix, 10 parts of curing agent, 58 parts of filler, 1.5 parts of silane coupling agent and 0.5 parts of additives;

[0105] Wherein, the material for preparing the filler includes silicon dioxide, and the mass of the silicon dioxide accounts for 87% of the total mass of the filler;

[0106] Among them, the resin matrix is ​​bisphenol A epoxy resin, the curing agent is phenolic resin, and the silane coupling agent is KH-560;

[0107] Materials used to prepare the filler include methyl hexahydrobenzene, aluminum oxide, boron nitride and silicon dioxide.

[0108] Example 5:

[0109] The difference from Example 4 is that the mass of silicon dioxide accounts for 90% of the total mass of the filler.

[0110] Example 6:

[0111] The difference from Example 4 is that the mass of silicon dioxide accounts for 80% of the total mass of the filler.

[0112] Example 7:

[0113] The difference from Example 4 is that the mass of silicon dioxide accounts for 85% of the total mass of the filler.

[0114] Comparative Example 1

[0115] The difference from Example 4 is that the mass of silicon dioxide accounts for 75% of the total mass of the filler.

[0116] Comparative Example 2

[0117] The difference from Example 4 is that the mass of silicon dioxide accounts for 95% of the total mass of the filler.

[0118] Test Case

[0119] The dielectric constant, dielectric loss and frequency of the materials of Examples 1 to 7 and Comparative Examples 1 and 2 were tested. The specific test results are shown in Table 1:

[0120] Table 1 Dielectric constant and dielectric loss test results

[0121]

[0122] It can be seen from Table 1 that the raw materials of the package 150 provided in the embodiment of the present application can produce a package 150 with a lower dielectric constant.

[0123] like Figure 7 As shown, according to the second aspect of the embodiment of the present application, a crystal oscillator and chip fan-out packaging method is proposed, which is used to prepare a crystal oscillator and chip fan-out packaging structure as any of the above technical solutions. The crystal oscillator and chip fan-out packaging method includes:

[0124] Step 201: providing a wafer and forming a passivation layer on the wafer;

[0125] Step 202: etching the passivation layer on the wafer to expose the bonding pads of the wafer;

[0126] Step 203: providing a first metal circuit layer connected to the pad and a first metal column connected to the first metal circuit layer;

[0127] Step 204: Disposing a plurality of shielding pillars on the passivation layer to enclose and form a shielding space;

[0128] Step 205: Bond the crystal oscillator to the passivation layer and place the crystal oscillator in the shielding space.

[0129] The fan-out packaging method for the crystal oscillator 140 and the chip 110 provided in the embodiment of the present application is used to prepare a fan-out packaging structure for the crystal oscillator and the chip as in any of the above-mentioned technical solutions. Therefore, the fan-out packaging method for the crystal oscillator 140 and the chip 110 has all the beneficial effects of the above-mentioned technical solutions.

[0130] The embodiment of the present application provides a fan-out packaging method for a crystal oscillator 140 and a chip 110. The prepared fan-out packaging structure of the crystal oscillator and the chip includes a chip 110, a passivation layer 120, a plurality of shielding pillars 130, a crystal oscillator 140, a packaging body 150 and a communication component 160. Based on this, in the preparation process of the fan-out packaging structure of the crystal oscillator and the chip, a passivation layer 120 can be first set on the wafer, and then a communication component 160 connected to the wafer is constructed. A plurality of shielding pillars 130 are set on the passivation layer 120 to form a shielding area. Thereafter, the crystal oscillator 140 is connected to the passivation layer 120, and the crystal oscillator 140 is located in the shielding area. Finally, the wafer is diced and cut to obtain the fan-out packaging structure of the chip 110. The crystal oscillator and chip fan-out packaging structure provided in the embodiments of the present application, firstly, achieves spatial interconnection between the crystal oscillator 140 and the bare chip, reducing the footprint of the chip 110 and crystal oscillator 140. Secondly, the provision of shielding posts 130 provides metal isolation, preventing other signals from interfering with the operation of the crystal oscillator 140 and resolving the issue of jitter caused by external environmental interference on the crystal oscillator 140. This miniaturization of the crystal oscillator and chip fan-out packaging structure improves the anti-interference capability of the crystal oscillator 140 and significantly reduces costs.

[0131] In a feasible embodiment, the fan-out packaging method of the crystal oscillator 140 and the wafer also includes: setting a connecting metal column 166 on the crystal oscillator 140; performing a first packaging of the wafer and the crystal oscillator 140 to form a primary package body; polishing the primary package body to expose the connecting metal column 166 and the first metal column 162; forming a second metal circuit layer 163 on the primary package body; setting a lead-out metal column 164 on the second metal circuit layer 163; performing a second packaging of the second metal circuit layer 163 and the lead-out metal column 164 to form a package body 150; and setting a metal solder ball 165 connected to the lead-out metal column 164 on the package body 150.

[0132] In this technical solution, a method for forming the package body 150 is further provided. By first preparing the first metal circuit layer 161 and the first metal column 162, and then performing the first packaging, and then preparing the second metal circuit layer 163 and the lead-out metal column 164, and then performing the second packaging, the communication component 160 can be prepared while packaging, which can simplify the preparation process, further reduce the preparation cost, and form a fan-out packaging structure, which is convenient for signal input and output.

[0133] In a feasible embodiment, the fan-out packaging method for the crystal oscillator 140 and the wafer further includes: dicing the packaged wafer to obtain a plurality of chip 110 devices; and taping the plurality of chip 110 devices.

[0134] In this technical solution, after the crystal oscillator 140 and the wafer are packaged and the internal communication component 160 is prepared, the packaged wafer can be diced and cut to obtain multiple chip 110 devices. Then, the chip 110 devices can be taped using a blanking machine, a taping machine and a visual recognition system to obtain a finished product.

[0135] like Figures 1 to 7 As shown, in some examples, the fan-out packaging method of the crystal oscillator 140 and the chip 110 of the crystal oscillator and chip fan-out packaging structure provided by the embodiments of the present application may specifically include the following steps:

[0136] The first step: If Figures 1 to 4 As shown, an 8-inch wafer is picked up by a robotic arm and attached to a pallet fixture. A 10 μm thick organic passivation layer 120 is spin-coated on the dielectric layer of the wafer. A mask is prepared, and a photolithography machine is used to develop the window openings for the bonding pads 111 of the chip 110, exposing the aluminum bonding pads 111.

[0137] The second step: Figure 5 As shown, the first metal circuit layer 161 is made of copper by metal sputtering, photolithography and electroplating. The first metal circuit layer 161 includes a metal interconnect structure for pads 111 of the chip 110 and metal traces on the surface of the passivation layer 120 .

[0138] The third step: A copper-nickel-tin-silver metal bump with a size of 10um×10um is established at the position of the first metal circuit layer 161. The formed first metal column 162 is connected to the first metal circuit layer 161, and at the same time, the pad 111 of the chip 110 is electrically connected to the first metal column 162.

[0139] The fourth step: Figure 6As shown, a shielding isolation area for the crystal oscillator 140 is established at the position of the passivation layer 120. The size of the crystal oscillator 140 is selected to be 1.6cm×1.0cm. Metal bumps in a 4×2 area are sequentially established as shielding columns 130. The shielding columns 130 are spaced 0.5cm apart and their height is consistent with or higher than the crystal oscillator 140, forming a 2.5cm×1.5cm area surrounding the crystal oscillator 140 to isolate it and reduce signal interference.

[0140] The fifth step: drop a drop of glue into the 2.5cm×1.5cm area through the glue dispensing nozzle. Use S210 glue with low expansion coefficient and high thermal conductivity. Press down the nozzle to absorb air. Place the crystal oscillator 140 into the glue dispensing area. After fixing, bake it at 175℃ for 4 hours to fully cure the adhesive. The thrust number is greater than 5Kgf.

[0141] The sixth step is to establish connecting metal pillars 166 on the two end electrodes of the crystal oscillator 140 .

[0142] The seventh step: select the material of the package 150 according to the characteristics of the crystal oscillator 140 according to the following steps.

[0143] According to the formula of dielectric constant and dielectric loss:

[0144] tanδ=P / ( 2πfεE^2 )

[0145] Where P is the dielectric loss power of the dielectric, f is the frequency of the oscillator, ε is the dielectric constant, E is the electric field strength, and δ is the loss factor.

[0146] E = U ab / d

[0147] Among them, U ab is the voltage between two points, d is the distance between the two points in the direction of the electric field, and E is the electric field strength.

[0148]

[0149] Where f is the frequency of the oscillator, L is the inductance of the inductor, and C is the capacitance of the capacitor.

[0150] The dielectric loss calculation formula is obtained:

[0151]

[0152] The crystal oscillator 140 selected in the present invention has an inductance of 4Mh and a capacitance of 0.95pf. The raw materials of the package 150 include the following in parts by weight:

[0153] 25 to 35 parts of resin matrix, 8 to 12 parts of curing agent, 50 to 60 parts of filler, 1 to 2 parts of silane coupling agent and 0.3 to 0.6 parts of additives; wherein the material for preparing the filler includes silicon dioxide, and the mass of the silicon dioxide accounts for 80% to 90% of the total mass of the filler.

[0154] Step 8: Place the material of the package body 150 in an injection molding machine at 200°C for melting, cover the entire crystal oscillator 140, and then perform secondary curing at a curing temperature of 180°C for 8 hours. After curing, place the entire wafer on a grinding table and grind until the first metal pillars 162 on the bonding pads 111 of the chip 110 and the connecting metal pillars 166 of the crystal oscillator 140 are exposed. During the process, control the wafer warpage to not exceed 5μm, and keep the height of the connecting metal pillars 166 consistent with the first metal pillars 162. After grinding, use a level tester to measure the wafer thickness at five points (top, bottom, left, right, and center) to ensure that the wafer warpage is less than 5μm.

[0155] The ninth step: using metal sputtering and photolithography to form a second metal circuit layer 163 , thereby electrically connecting the crystal oscillator 140 , the connecting metal pillar 166 , the first metal pillar 162 , and the pad 111 of the chip 110 .

[0156] The tenth step: establish a lead-out metal column 164 on the second metal circuit layer 163, and then perform secondary injection molding. The injection molding materials and conditions are the same as the first time. With the lead-out metal column 164 as the center, a metal window shape with a size of 0.5×0.5 is made by electroplating to form a third metal circuit layer 167. Through the ball planting process, metal tin balls 165 are formed on the third metal circuit layer 167 at the metal interconnection structure position. The metal tin balls 165 are made of copper, tin and silver. On the one hand, it is convenient for customers to easily perform welding. There are gaps between the metal tin balls 165, which can dissipate heat well to prevent the crystal oscillator from being irreversibly damaged by high temperature due to excessive temperature after reflow soldering.

[0157] Step 11: Place the finished wafer into a cassette and use a disco dicing machine to slice and cut it into single chips 110.

[0158] Step 12: Use a blanking machine and a taping machine with a visual recognition system. The camera identifies chipped edges as 100 μm long and 50 μm wide. The chipped edges should be half the thickness of the chip 110. The solder balls should not scratch the chip. Once the chip 110 is identified as intact, place it on the track for taping.

[0159] In the present invention, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance. The term "plurality" refers to two or more, unless expressly limited otherwise. Terms such as "installed," "connected," "connected," and "fixed" should be interpreted broadly. For example, "connected" can mean a fixed connection, a detachable connection, or an integral connection; "connected" can mean a direct connection or an indirect connection through an intermediary. Those skilled in the art will understand the specific meanings of these terms in the present invention based on specific circumstances.

[0160] In the description of the present invention, it should be understood that the directions or positional relationships indicated by terms such as "up", "down", "left", "right", "front" and "back" are based on the directions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or unit referred to must have a specific direction, be constructed and operated in a specific direction. Therefore, they should not be understood as limiting the present invention.

[0161] Throughout this specification, terms such as "one embodiment," "some embodiments," and "specific embodiments" mean that the specific features, structures, materials, or characteristics described in conjunction with that embodiment or example are included in at least one embodiment or example of the present invention. In this specification, schematic representations of these terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0162] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Those skilled in the art will readily appreciate that various modifications and variations of the present invention are possible. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention shall be included within the scope of protection of the present invention.

Claims

1. A crystal oscillator and chip fan-out packaging structure, characterized in that: include: chip; a passivation layer covering the chip; A plurality of shielding columns, wherein the plurality of shielding columns are connected to the passivation layer and the plurality of shielding columns enclose a shielding space; a crystal oscillator, the crystal oscillator being connected to the passivation layer and being located in the shielding space; A package body, wherein the crystal oscillator and the chip are arranged in the package body; a communication component, part of which is disposed in the package, connected to the chip, and led out through the package; The surface of the chip on which the crystal oscillator is provided is a first surface, and a ratio of an area of ​​a connection between the shielding column and the first surface to an area of ​​the first surface is greater than or equal to 25%.

2. The crystal oscillator and chip fan-out packaging structure according to claim 1, characterized in that: The shielding column is made of metal material; and / or The diameter of the shielding column is 8um to 15um.

3. The crystal oscillator and chip fan-out packaging structure according to claim 1, characterized in that: The height of the shielding column is higher than that of the crystal oscillator.

4. The crystal oscillator and chip fan-out packaging structure according to claim 1, characterized in that: The communication components include: a first metal circuit layer, disposed on the passivation layer and connected to the pads of the chip; a first metal column, one end of the first metal column being connected to the first metal circuit layer; a second metal circuit layer connected to the other end of the first metal pillar; a lead-out metal column, one end of which is connected to the second metal circuit layer, and the other end of which is led out to the surface of the package body; A metal solder ball is disposed on the package body and connected to the lead-out metal column.

5. The crystal oscillator and chip fan-out packaging structure according to claim 4, characterized in that: The communication component is further connected to the crystal oscillator, and the communication component further comprises: A connecting metal column, one end of which is connected to the crystal oscillator, and the other end of which is connected to the second metal circuit layer.

6. The crystal oscillator and chip fan-out packaging structure according to any one of claims 1 to 5, characterized in that: The raw materials for preparing the package body include, by weight: 25 to 35 parts of resin matrix, 8 to 12 parts of curing agent, 50 to 60 parts of filler, 1 to 2 parts of silane coupling agent and 0.3 to 0.6 parts of additives; The material used to prepare the filler includes silicon dioxide, and the mass of the silicon dioxide accounts for 80% to 90% of the total mass of the filler.

7. The crystal oscillator and chip fan-out packaging structure according to claim 6, characterized in that: The materials used to prepare the filler include methylhexahydrobenzene, aluminum oxide, boron nitride and silicon dioxide.

8. A crystal oscillator and chip fan-out packaging method, characterized in that: For preparing a crystal oscillator and chip fan-out packaging structure according to any one of claims 1 to 7, the crystal oscillator and chip fan-out packaging method comprising: providing a wafer, and disposing a passivation layer on the wafer; Etching the passivation layer on the wafer to expose the bonding pads of the wafer; providing a first metal circuit layer connected to the pad and a first metal column connected to the first metal circuit layer; Arranging a plurality of shielding columns on the passivation layer to enclose and form a shielding space; The crystal oscillator is bonded to the passivation layer, and the crystal oscillator is located in the shielding space.

9. The crystal oscillator and chip fan-out packaging method according to claim 8, characterized in that: Also includes: Arranging a connecting metal column on the crystal oscillator; performing a first packaging on the wafer and the crystal oscillator to form a primary package; Polishing the primary package body to expose the connecting metal pillars and the first metal pillars; forming a second metal circuit layer on the primary package; Disposing a lead-out metal column on the second metal circuit layer; performing a second packaging on the second metal circuit layer and the lead-out metal pillars to form a packaging body; A metal solder ball connected to the lead-out metal column is provided on the package body.

10. The crystal oscillator and chip fan-out packaging method according to claim 8, characterized in that: Also includes: Slicing the packaged wafer to obtain multiple chip devices; Taping is performed on a plurality of the chip devices.

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