Automatic testing method and system based on time sequence generation module

Abstract

The invention provides an automatic testing method and system based on a time sequence generation module, and relates to the technical field of automatic testing. The method comprises the steps that after input parameters of a to-be-tested time sequence generation module are obtained, theoretical time sequence data and simulation time sequence data of the to-be-tested time sequence generation module are obtained through a preset calculation formula and preset simulation software, and a to-be-tested time sequence output signal output by the to-be-tested time sequence generation module is obtained at the same time; and then judging whether the simulation time sequence data is abnormal by utilizing the theoretical time sequence data, if the simulation time sequence data is in a normal state, obtaining the simulation time sequence data according to the to-be-detected time sequence output signal, and judging whether the simulation time sequence data is abnormal through the theoretical time sequence data so as to evaluate whether the to-be-detected time sequence output signal accords with expectation. On the basis, the problems that in an existing ATE system, the time sequence generator module is low in testing efficiency and insufficient in accuracy can be solved.

Description

Technical Field

[0001] The present invention relates to the field of automated testing, and more particularly, to an automated testing method and system based on a timing generation module. Background Art

[0002] With the rapid progress of integrated circuit technology and the increasing demand for high-precision and high-efficiency testing, the testing requirements for the timing generator module in an automatic test equipment (ATE) are also increasing day by day. The existing testing methods for the timing generator module are mainly manual testing schemes or semi-automatic testing schemes. Although the above testing methods are simple and intuitive to operate, they have problems such as low efficiency, insufficient accuracy, and low automation. Taking the manual testing scheme as an example, the manual testing scheme often requires a long setup and measurement time, is prone to introducing human errors, and cannot provide real-time feedback and analysis of test results, thus prolonging the test cycle and affecting the accuracy of data.

[0003] Based on this, there is an urgent need for a timing generator testing scheme to improve the problems of low testing efficiency and insufficient accuracy of the timing generator module in the existing ATE system. Summary of the Invention

[0004] In view of this, the purpose of the present invention is to provide an automated testing method and system based on a timing generation module. After determining that the simulated timing data obtained by the simulation software conforms to the theoretical timing data, receive and obtain simulated timing data based on the timing output signal to be tested, and then determine whether the simulated timing data is abnormal based on the theoretical timing data to evaluate whether the timing output signal to be tested meets the expectations, and improve the problems of low testing efficiency and insufficient accuracy of the timing generator module in the existing ATE system.

[0005] To achieve the above purpose, the technical solutions adopted in the embodiments of the present invention are as follows:

[0006] In a first aspect, the present invention provides an automated testing method based on a timing generation module, including the following steps:

[0007] Obtain the input parameters of the timing generation module to be tested;

[0008] Calculate the theoretical timing data of the timing generation module to be tested according to the input parameters using a pre-designed calculation formula;

[0009] Obtain the simulated timing data of the timing generation module to be tested according to the input parameters using a pre-set simulation software;

[0010] Determine whether the simulated timing data is abnormal according to the theoretical timing data;

[0011] If the simulated timing data is in a normal state, receive and obtain the analog timing data based on the timing output signal to be tested; wherein, the timing output signal to be tested is determined by the timing generation module to be tested according to the input parameters;

[0012] Judge whether the analog timing data is abnormal according to the theoretical timing data, so as to evaluate whether the timing output signal to be tested meets the expectation.

[0013] Optionally, the steps of judging whether the simulated timing data is abnormal according to the theoretical timing data include:

[0014] Calculate the theoretical high and low level time values corresponding to the theoretical timing data;

[0015] Calculate the simulated high and low level time values corresponding to the simulated timing data;

[0016] Judge whether the theoretical high and low level time values are consistent with the simulated high and low level time values. If they are consistent, it is determined that the simulated timing data is in a normal state.

[0017] Optionally, the steps of receiving and obtaining the analog timing data based on the timing output signal to be tested include:

[0018] Send a first control signal to the oscilloscope to make the oscilloscope adjust its own configuration parameters according to the first control signal;

[0019] Input the timing output signal to be tested into the adjusted oscilloscope to obtain the analog timing data.

[0020] Optionally, the steps of judging whether the analog timing data is abnormal according to the theoretical timing data include:

[0021] Convert the analog timing data into a digital signal and calculate the measured high and low level time values corresponding to the digital signal;

[0022] Judge whether the difference between the measured high and low level time values and the theoretical timing data is equal to the preset difference; if so, it is determined that the current timing output signal to be tested meets the expectation; if not, it is determined that the current timing output signal to be tested does not meet the expectation.

[0023] Optionally, the theoretical timing data satisfies:

[0024]

[0025] Among them, S is the level value of the theoretical output signal; P is the vector data; He is the high timing edge; Le is the low timing edge.

[0026] Optionally, for any test interval, when the input parameters include the test rate, before the step of obtaining the input parameters of the timing generation module to be tested, it includes:

[0027] Divide the current test interval into multiple consecutive sampling periods according to the test rate;

[0028] For any sampling period, send a control instruction to the data generation module to make the data generation module generate data parameters that meet the preset rules, and obtain input parameters.

[0029] Optionally, the step of sending a control instruction to the data generation module to make the data generation module generate data parameters that meet the preset rules for any sampling period includes:

[0030] Send a second control signal to the data generation module at the end moment of the current sampling period, so that the data generation module generates vector data with opposite values in the next sampling period;

[0031] Send a third control signal to the data generation module at the start moment of the current sampling period, so that the data generation module randomly generates different timing edge data at different moments in the current sampling period.

[0032] Optionally, the step of making the data generation module randomly generate different timing edge data at different moments in the current sampling period includes:

[0033] When any sampling period includes eight time points, send a third control signal to the data generation module at the start moment of the current sampling period, so that the data generation module randomly generates high timing edge signals or low timing edge signals at each time point according to the third control signal.

[0034] Optionally, the timing edge data satisfies:

[0035]

[0036] He≠Le;

[0037] where He is the high timing edge signal; Le is the low timing edge signal; T is the sampling period; n is the number of time points.

[0038] In a second aspect, the present invention also provides an automated test system based on a timing generation module, including:

[0039] A data receiving module for obtaining input parameters of the timing generation module to be tested;

[0040] A calculation module for calculating the theoretical timing data of the timing generation module to be tested according to the input parameters by using a pre-designed calculation formula;

[0041] A simulation module for obtaining the simulation timing data of the timing generation module to be tested according to the input parameters by using a preset simulation software;

[0042] A judgment module for judging whether the simulation timing data is abnormal according to the theoretical timing data;

[0043] A hardware detection module, configured to receive and obtain analog timing data according to the to-be-tested timing output signal when the simulation timing data is in a normal state; wherein, the to-be-tested timing output signal is determined by a to-be-tested timing generation module according to input parameters.

[0044] The judgment module is further configured to judge whether the analog timing data is abnormal according to the theoretical timing data, so as to evaluate whether the to-be-tested timing output signal meets the expectation.

[0045] The automated test method and system based on a timing generation module provided by an embodiment of the present invention have the following beneficial effects:

[0046] In the automated test method based on a timing generation module in the present invention, after obtaining the input parameters of the to-be-tested timing generation module, the theoretical timing data and simulation timing data of the to-be-tested timing generation module are respectively obtained by using a pre-designed calculation formula and a pre-set simulation software; then, the theoretical timing data is used to judge whether the simulation timing data is abnormal. If it is in a normal state, the analog timing data is obtained according to the to-be-tested timing output signal, and the theoretical timing data is used to judge whether the analog timing data is abnormal, so as to evaluate whether the to-be-tested timing output signal meets the expectation. In the present invention, the abnormal state of the obtained simulation timing data is first judged according to the theoretical timing data, and when the simulation timing data is in a normal state, the theoretical timing data is used to judge whether the analog timing data is abnormal, so as to evaluate whether the to-be-tested timing output signal meets the expectation. Based on this, the present invention can improve the problems of low test efficiency and insufficient accuracy of the timing generator module in the existing ATE system through a combination of software and hardware.

[0047] In order to make the above objects, features, and advantages of the present invention more obvious and understandable, the following specific preferred embodiments are given below in conjunction with the accompanying drawings and are described in detail as follows. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required to be used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention, and therefore should not be regarded as limiting the scope. For those of ordinary skill in the art, other related drawings can be obtained based on these drawings without creative efforts.

[0049] Figure 1 FIG. 1 shows one of the flowcharts of the steps of the automated test method based on a timing generation module provided by an embodiment of the present invention;

[0050] Figure 2 FIG. 2 shows another flowchart of the steps of the automated test method based on a timing generation module provided by an embodiment of the present invention;

[0051] Figure 3 Shows the sub - step flowchart of step 200 in the embodiment of the present invention;

[0052] Figure 4 Shows the timing diagram of the theoretical output signal in the embodiment of the present invention;

[0053] Figure 5 Shows the sub - step flowchart of step 600 in the embodiment of the present invention;

[0054] Figure 6 Shows the theoretical high and low level time values of the theoretical output signal in the embodiment of the present invention;

[0055] Figure 7 Shows the sub - step flowchart of step 700 in the embodiment of the present invention;

[0056] Figure 8 Shows the sub - step flowchart of step 800 in the embodiment of the present invention;

[0057] Figure 9A Shows one of the high and low level time value diagrams of the measured data in the embodiment of the present invention;

[0058] Figure 9B Shows the second high and low level time value diagram of the measured data in the embodiment of the present invention;

[0059] Figure 10 Shows the difference distribution diagram between the theoretical data and the measured data in the embodiment of the present invention;

[0060] Figure 11 Shows the structural schematic diagram of the automated test system based on the timing generation module provided in the embodiment of the present invention;

[0061] Figure 12A Shows one of the superposition comparison diagrams between the theoretical value and the measured value in this embodiment;

[0062] Figure 12B Shows the second superposition comparison diagram between the theoretical value and the measured value in this embodiment;

[0063] Figure 13 Shows the structural schematic diagram of the server provided in this embodiment.

[0064] Icon: 100 - automated test system; 101 - data receiving module; 102 - calculation module; 103 - simulation module; 104 - judgment module; 105 - hardware detection module; 106 - to - be - measured timing generation module. Detailed implementation manners

[0065] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Usually, the components of the embodiments of the present invention described and shown in the accompanying drawings here can be arranged and designed in various different configurations.

[0066] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed present invention, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative efforts fall within the scope of protection of the present invention.

[0067] It should be noted that relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "including one..." does not exclude the presence of additional identical elements in the process, method, article or device including the said element.

[0068] As described in the background art, the testing of the TG module mainly relies on manual or semi-automated methods, which are difficult to meet the increasingly complex electronic testing requirements. Based on this, this embodiment provides an automated testing solution to overcome the problems of low testing efficiency and insufficient accuracy of the timing generator (TG) module in the existing ATE system. The following will introduce the above solution in detail.

[0069] In the first aspect, please refer to Figure 1 , Figure 1 which shows the step flowchart of the automated testing method based on the timing generation module in the present invention. For any test interval, the automated testing method includes the following steps 300-step 800.

[0070] Step 300: Obtain the input parameters of the timing generation module to be tested.

[0071] Step 400: Calculate the theoretical timing data of the timing generation module to be tested according to the input parameters by using a pre-designed calculation formula.

[0072] Step 500: Obtain the simulation timing data of the timing generation module to be tested according to the input parameters by using a pre-set simulation software.

[0073] Step 600: Determine whether the simulated timing data is abnormal according to the theoretical timing data.

[0074] Step 700: If the simulated timing data is in a normal state, receive and obtain the analog timing data based on the timing output signal to be measured.

[0075] Wherein, the timing output signal to be measured is determined by the timing generation module to be measured according to the input parameters.

[0076] Step 800: Determine whether the analog timing data is abnormal according to the theoretical timing data to evaluate whether the timing output signal to be measured meets the expectation.

[0077] In this embodiment, the theoretical timing data and the simulated timing data of the timing generation module to be measured are respectively obtained based on the input parameters by using the preset simulation software and the preset calculation formula, and the state of the simulated timing data is determined according to the theoretical timing data. If the simulated timing data is in a normal state, the timing output signal to be measured is further received, and the analog timing data is obtained based on the timing output signal to be measured. Subsequently, it is determined whether the analog timing data is abnormal by using the theoretical timing data to evaluate whether the timing output signal to be measured meets the expectation. The present invention compares the theoretical timing data, the simulated timing data, and the analog timing data of the timing generation module to be measured multiple times, ensuring the accuracy of the automated detection; at the same time, the timing output signal is constructed based on the same input parameters, further ensuring the accuracy of the automated detection.

[0078] In a possible implementation manner, when the input parameter includes the test rate F, the time length of each test interval (the length of the sampling period T) can be determined by the test rate F.

[0079] On this basis, please refer to Figure 2 , Figure 2 which shows another step flowchart of the automated test method based on the timing generation module in the embodiment of the present invention. Before step 300 of obtaining the input parameters of the timing generation module to be measured, steps 100 and 200 are included.

[0080] Step 100: Divide the current test interval into multiple consecutive sampling periods according to the test rate;

[0081] Step 200: For any sampling period, send a control instruction to the data generation module to make the data generation module generate data parameters that meet the preset rules to obtain the input parameters.

[0082] In this embodiment, the input parameters further include vector data and timing edge data. Furthermore, the holding time of the vector data can be determined by the test rate. The high and low of the vector data respectively control the high and low levels of the output timing signal, and the timing edge data is used to define the leading edge and the trailing edge of the corresponding waveform of the output timing signal.

[0083] In a possible implementation manner, in this embodiment, the length of the sampling period T can be determined first according to the test rate F, so as to divide the current test interval into a plurality of consecutive sampling periods T, that is, the relationship between the test rate F and the sampling period T satisfies:

[0084]

[0085] Based on this, the preset rule in this embodiment is:

[0086] There is a high timing edge (He) and a low timing edge (Le) in each sampling period T. The vector data (P) remains unchanged within the same test period, but can change between different test periods, and the test rate (F) is allowed to randomly change after the end of each test period.

[0087] In Figure 2 On this basis, please refer to Figure 3 , Figure 3 shows a step-by-step schematic diagram of step 200 in this embodiment. For any sampling period, sending a control instruction to the data generation module to make the data generation module generate data parameters that meet the preset rules in step 200 includes steps 201-step 202.

[0088] Step 201: Send a second control signal to the data generation module at the end moment of the current sampling period, so that the data generation module generates vector data with opposite values in the next sampling period.

[0089] Step 202: Send a third control signal to the data generation module at the start moment of the current sampling period, so that the data generation module randomly generates different timing edge data at different moments in the current sampling period.

[0090] In this embodiment, the time points are related to the timing accuracy. The more time points there are, the higher the timing accuracy. However, it should be noted that this embodiment does not limit the number of time points in any sampling period.

[0091] In a possible implementation manner, in order to improve the accuracy and sufficiency of the test, and at the same time facilitate observation and analysis, any sampling period can be divided into eight time points. Based on this, the specific manner of generating different timing edge data in step 202 is:

[0092] When any sampling period includes eight time points, send a third control signal to the data generation module at the start moment of the current sampling period, so that the data generation module randomly generates high timing edge signals or low timing edge signals at each time point according to the third control signal.

[0093] Among them, the timing edge data can satisfy:

[0094]

[0095] He ≠ Le;

[0096] Wherein, He is the high timing edge signal; Le is the low timing edge signal; T is the sampling period; n is the number of time points.

[0097] After obtaining the data parameters that meet the preset rules above, the present invention uses the data set containing the data parameters that meet the preset rules as the input parameters of the to-be-tested timing generation module, and then uses the preset simulation software and the pre-designed calculation formula to obtain corresponding different timing data respectively.

[0098] Among them, in this embodiment, the specific steps 400 of calculating the theoretical timing data of the to-be-tested timing generation module according to the input parameters by using the pre-designed calculation formula are as follows:

[0099] To ensure the test accuracy, in this embodiment, the vector data P remains unchanged within the same sampling period T. At the same time, for adjacent sampling periods T, the vector data P corresponding vector data is opposite, that is, it is inverted after the end of each sampling period. That is, it satisfies:

[0100]

[0101] Among them, num can represent the serial number of the sampling period, and any test interval in this embodiment can include 1024 sampling periods.

[0102] In a possible implementation manner, the theoretical timing data in this embodiment satisfies:

[0103] When the vector data P is 1 and the high timing edge He is 1, the theoretical output signal is 1;

[0104] When the vector data P is 0 and the low timing edge Le is 0, the theoretical output signal is 0.

[0105] In other cases, the level of the theoretical output signal will maintain the current value until it is triggered to change by meeting the corresponding conditions.

[0106] That is, it is expressed as:

[0107]

[0108] Among them, S is the level value of the theoretical output signal.

[0109] Please refer to Figure 4 , Figure 4The timing diagram of the theoretical output signal in this embodiment is shown. In this embodiment, the theoretical output signals in some sampling periods (for example, the first sampling period num1, the second sampling period num2, the third sampling period num3, the fourth sampling period num4, and the fifth sampling period num5) are described. Among them, in the second sampling period num2, since the serial number of the current sampling period is even, the vector data P remains 1 in this sampling period. In the figure, the sampling period is evenly divided into 8 time points. Among them, the high timing edge He is set at the position of the 3rd time point. At this time, the level value of the theoretical output signal S becomes 1. In the third sampling period num3, the serial number of the current sampling period is odd, the vector data P remains 0, and the low timing edge Le is set at the position of the 6th time point. At this time, the level value of the theoretical output signal S becomes 0.

[0110] By analogy, it can be seen that at the 6th time point of the fourth sampling period num4, at this time the vector data P is 1 and the high timing edge He is 1, and the level value of the theoretical output signal S is 1. At the 3rd time point of the fifth sampling period num5, at this time the vector data P is 0 and the low timing edge Le is 0, and the corresponding level value of the theoretical output signal S is 0.

[0111] After obtaining the above input parameters, this embodiment can use a preset simulation software to obtain the simulation timing data of the timing generation module to be tested according to the input parameters.

[0112] In a possible implementation manner, by running a TCL script, the above test rate, vector data, and timing edge data are passed to the TCL script, and then the above parameters are imported into the software detection module loaded with the preset simulation software through the TCL script to obtain the simulation timing data.

[0113] In this embodiment, the software detection module can not only run the simulation program, but also detect the waveform of the timing output to be tested generated by the timing generation module to be tested. Furthermore, after the simulation is completed, the simulation timing data is saved as a TXT file for the user to retrieve.

[0114] Please, on the basis of Figure 1 , refer to Figure 5 , Figure 5 The sub-step schematic diagram of step 600 in this embodiment is shown. This step 600 at least includes step 601-step 603.

[0115] Step 601, calculate the theoretical high and low level time values corresponding to the theoretical timing data.

[0116] Step 602, calculate the simulation high and low level time values corresponding to the simulation timing data.

[0117] Step 603: Determine whether the theoretical high and low level time values are consistent with the simulated high and low level time values.

[0118] If so, it is determined that the simulated timing data is in a normal state.

[0119] If not, it is determined that the simulated timing data is in an abnormal state.

[0120] In this embodiment, after obtaining the theoretical output signal as shown in Figure 4 , the high-level duration and / or low-level duration of the theoretical output signal can be obtained or counted, and then the theoretical high and low level time value St can be obtained. It should be noted that in this embodiment, the theoretical high and low level time value St includes the high-level duration and / or low-level duration, and the theoretical high and low level time value St is used to characterize the accurate timing waveform that the TG module should output under ideal conditions.

[0121] Please continue to refer to Figure 4 , between the 3rd time point of the second sampling period num2 and the 5th time point of the third sampling period num3, the theoretical output signal S always remains 1, that is, the high level, and the time when the theoretical output signal S remains 1 is the high-level time value. Subsequently, the theoretical output signal S becomes 0, that is, the low level, and remains at the low level between the 6th time point of the third sampling period num3 and the 5th time point of the fourth sampling period num4. This is the duration when the theoretical output signal S is 0, that is, the low-level time value. Then, the theoretical output signal S becomes 1 again and remains at the high level between the 6th time point of the fourth sampling period num4 and the 2nd time point of the fifth sampling period num5. At this time, the duration when the theoretical output signal S is 1 is another high-level time value. Please refer to Figure 6 , Figure 6 shows the theoretical high and low level time values corresponding to some sampling periods of the theoretical sequence output signal in this embodiment.

[0122] In this embodiment, it is further possible to determine whether the simulated timing data is abnormal by obtaining the high and low level time values corresponding to the theoretical timing data and the simulated timing data. If the theoretical high and low level time values are consistent with the simulated high and low level time values, it indicates that the simulated timing data is normal and the simulation model of the current timing generation module to be tested is accurate; otherwise, it indicates that the simulated timing data is abnormal and the simulation model of the current timing generation module to be tested is inaccurate and needs to be adjusted.

[0123] After determining that the simulation model of the timing generation module to be tested is accurate, it is still necessary to further verify the simulated timing data of the timing generation module to be tested.

[0124] Please, on the basis of Figure 1 , refer to Figure 7 , Figure 7A sub-step schematic diagram of step 700 in this embodiment is shown. This step 700 includes at least step 701 - step 702.

[0125] Step 701: Send a first control signal to the oscilloscope to cause the oscilloscope to adjust its own configuration parameters according to the first control signal.

[0126] Step 702: Input the timing output signal to be measured into the adjusted oscilloscope to obtain analog timing data.

[0127] Based on this, in this embodiment, the configuration parameters of the oscilloscope can be pre-adjusted by sending a control signal to the oscilloscope, thereby greatly increasing the efficiency of the automated test method provided by the present invention. For example, the first control signal can adjust the configuration of conventional parameters such as the sampling rate, trigger type, trigger position, trigger depth, etc. of the oscilloscope, and / or the start and stop operations of the oscilloscope acquisition.

[0128] After detecting that the above simulation timing data is normal, the adjusted oscilloscope can receive and analyze the above measured timing output signal, that is, the timing output signal to be measured, to obtain analog timing data.

[0129] In a possible implementation manner, the process of obtaining analog timing data using an oscilloscope can be as follows:

[0130] First, configure the sampling rate of the oscilloscope at the maximum sampling rate (for example, 40G sampling rate) to ensure that signal details can be captured finely. At the same time, set the time base of the oscilloscope to 2 ns, the channel to DC coupling, and correspondingly adjust the vertical scale and offset of the oscilloscope to ensure that the waveform of the measured timing output signal can be clearly and accurately displayed on the oscilloscope. Finally, configure the trigger conditions. For example, the trigger mode can be set to rising edge trigger, the trigger level to 0.9V, and the trigger position to 0 ns to ensure that data acquisition is started at the appropriate moment to capture the key signals output from the corresponding pins of the timing generation module to be measured.

[0131] At the same time, to completely capture 1024 high and / or low level time data samples on the timing output signal to be measured, the sampling mode of the oscilloscope also needs to be configured as real-time sampling (Real Time), and the storage depth is configured as 262,144 sampling points (kpts) to ensure that the oscilloscope can completely collect and store the required data samples and ensure the accuracy and integrity of the test data.

[0132] Finally, a differential probe on the oscilloscope can be used to measure the output end of the timing generation module to be measured to obtain analog timing data.

[0133] After obtaining the analog timing data, it is also necessary to further obtain the measured high and low level time values corresponding to the analog timing data to evaluate using the theoretical high and low level time values to obtain the final evaluation result.

[0134] Please Figure 1 Based on the reference Figure 8 , Figure 8 A schematic diagram of the steps of step 800 in this embodiment is shown, and step 800 at least includes step 801 and step 802.

[0135] Step 801: Convert the analog timing data into a digital signal, and calculate the measured high and low level time values ​​corresponding to the digital signal.

[0136] Step 802: Determine whether the difference between the measured high and low level time values ​​and the theoretical timing data is equal to a preset difference.

[0137] If yes, it is determined that the current timing output signal to be tested meets expectations.

[0138] If not, it is determined that the current timing output signal to be tested does not meet expectations.

[0139] In a possible implementation, after obtaining the analog timing signal, the analog signal can be directly converted into a digital signal through an oscilloscope. For example, the conversion formula and basic parameters of the analog voltage can be obtained through the setting signal of the oscilloscope, so as to convert the analog timing signal into a digital signal through the conversion formula. For example, by setting a threshold voltage and judging the relationship between the analog voltage and the threshold voltage at each data point under the analog timing signal, if it is greater than or equal to the threshold voltage, the current data point is set to a high level, otherwise it is a low level, and then a digital signal is obtained. Subsequently, based on adjacent data points, the difference between adjacent data points is obtained. If the difference is 1, it is recorded as a rising edge; otherwise, it is a falling edge, so as to detect the edge data corresponding to the analog timing data, and at the same time, according to the time interval between the data points, the corresponding high and low level time values ​​are obtained to obtain the measured high and low level time values. Finally, it is further judged whether the difference between the measured high and low level time values ​​and the theoretical timing data meets the preset value. If it meets, it is determined that the current timing output signal to be measured meets expectations; if not, it is determined that the current timing output signal to be measured does not meet expectations.

[0140] In this embodiment, the method of comparing the high and low level time values ​​corresponding to the simulated timing data and / or the emulation timing data with the theoretical high and low level time values ​​can be the same.

[0141] In a possible implementation method, a method of comparing the high and low level time values ​​corresponding to the simulated timing data with the theoretical high and low level time values ​​is used as an example for introduction. The specific method is:

[0142] For the sake of simplicity, the theoretical high and low level time values ​​are referred to as theoretical values; the high and low level time values ​​corresponding to the simulated timing data are the measured values.

[0143] Subtract the high-level time value and low-level time value at each sampling period in the theoretical value from the high-level time value and low-level time value at the corresponding moment in the measured value respectively to obtain 1024 high and low level time differences. At the same time, calculate the maximum value, difference distribution and cumulative deviation between the measured value and the theoretical difference based on the above 1024 high and low level time differences, and draw the high and low level time value diagram and deviation value distribution diagram of the measured data. Among them, please refer to Figure 9A , Figure 9B , Figure 10 , Figure 9A , which is the waveform diagram of the first 50 high and low level time values in the measured data in this embodiment; Figure 9B , which is the waveform diagram of the last 50 high and low level time values in the measured data in this embodiment; Figure 10 , which is the deviation value distribution diagram in this embodiment. In this embodiment, Figure 10 the abscissa is the number of statistical data, and the ordinate is the time difference of each statistical data.

[0144] Based on this, if the maximum value and cumulative deviation of the corresponding time difference are both within the preset difference, for example, within the allowable range of measurement error, the measured data is verified to be correct, and it is determined that the timing output signal in the current test interval meets the expectation; otherwise, it is determined that the timing output signal in the current test interval does not meet the expectation.

[0145] Based on this, in this embodiment, through the above steps, the original acquisition data is converted into high and low level time values by the hardware detection module, that is, the oscilloscope, and the detection and judgment of the above data are realized. Compared with the traditional manual measurement method, this automatic processing flow reduces the intervention of manual operation and improves the efficiency and accuracy of data processing.

[0146] In summary, the present invention can respectively obtain the analog timing data and simulation timing data corresponding to the timing generation module to be tested in a software and hardware combination manner, and then respectively judge whether the analog timing data and simulation timing data are abnormal based on the high and low level time values corresponding to the theoretical timing data, so as to evaluate whether the timing generation module to be tested meets the expectation, and improve the problems of low test efficiency and insufficient accuracy of the timing generator module in the existing ATE system.

[0147] With the same idea as the previous embodiment, please refer to Figure 11 , Figure 11 which shows the structural schematic diagram of an automatic test system based on a timing generation module in the present invention, including:

[0148] A data receiving module 101, which is used to obtain the input parameters of the timing generation module to be tested;

[0149] A calculation module 102, which is used to calculate the theoretical timing data of the timing generation module to be tested according to the input parameters by using a pre-designed calculation formula;

[0150] The simulation module 103 is used to obtain the simulation timing data of the timing generation module to be tested according to the input parameters by using a preset simulation software;

[0151] The judgment module 104 is used to judge whether the simulation timing data is abnormal according to the theoretical timing data;

[0152] The hardware detection module 105 is used to receive and obtain the analog timing data according to the output signal of the timing to be tested when the simulation timing data is in a normal state; wherein, the output signal of the timing to be tested is determined by the timing generation module to be tested according to the input parameters;

[0153] The judgment module 104 is also used to judge whether the analog timing data is abnormal according to the theoretical timing data to evaluate whether the output signal of the timing to be tested meets the expectation.

[0154] Among them, please continue to refer to Figure 11 , the output end of the data receiving module 101 is respectively connected to the input ends of the calculation module 102, the simulation module 103 and the timing generation module 106 to provide input parameters for the above structure. The output ends of the calculation module 102 and the simulation module 103 are both connected to the input end of the judgment module 104, the output end of the timing generation module 106 is connected to the input end of the hardware detection module 105, and the output end of the hardware detection module 105 is connected to the input end of the judgment module 104. Based on this, this embodiment can respectively realize the comparison and judgment between the theoretical timing data and the analog timing data, and between the theoretical timing data and the simulation timing data through the above connection relationship to evaluate the abnormal state of the timing generation module to be tested.

[0155] To improve the integration degree of the above automatic test system 100, the data receiving module 101, the calculation module 102 and the judgment module 104 can be integrated together. For the convenience of description, the above integrated structure can be described as a data processing module.

[0156] Based on this, this embodiment realizes the abnormal judgment between the theoretical timing data and the simulation timing data through the data processing module, and on the basis that the simulation timing data is in a normal state, uses the hardware detection module to detect the measured data of the timing generation module to be tested, that is, the analog timing data, and then evaluates whether the output signal of the timing to be tested meets the expectation in the current test interval based on the measured data.

[0157] On the basis of realizing the automatic test of each module through the data processing module in this embodiment, the accuracy of the automatic detection is ensured through multiple comparisons of the theoretical timing data, the simulation timing data and the measured data. At the same time, the timing generation module to be tested constructs the timing output signal according to the same input parameters, which further ensures the accuracy of the automatic detection.

[0158] Further, in this embodiment, the automated test system 100 (e.g., the judgment module 104 and / or the data receiving module 101 and / or the calculation module 102) can also analyze the test results. If the test results are not within the allowable measurement error range, the data can also be marked to accurately locate the error point. At the same time, the timing diagram drawn from 1024 high and low level time values (continue to refer to Figure 9A and Figure 9B ) is superimposed and compared with the theoretically calculated timing diagram (continue to refer to Figure 4 ) to obtain the superimposed comparison diagram between the theoretical value and the measured value, that is, Figure 12A and Figure 12B , where Figure 12A is the superimposed comparison diagram corresponding to the first 50 high and low level time values in the measured data in this embodiment, Figure 12B is the superimposed comparison diagram corresponding to the last 50 high and low level time values in the measured data in this embodiment. Among them, Figure 12A and Figure 12B have the time as the abscissa, and the time unit is picoseconds (ps). The abscissa is the timing data at each time point, and thus the deviation value between the measured value and the theoretical value can be intuitively analyzed.

[0159] In this embodiment, the automated test system also automatically generates a test report containing the analysis results and saves it in the Excel format.

[0160] Based on this, the automated test system in this embodiment can help engineers quickly locate problems by generating test reports and comparing analysis results. At the same time, the automated test system in this embodiment can also integrate the data visualization function to enable operators to more intuitively analyze and observe data by generating a graph window.

[0161] In a possible implementation manner, in the automated test system 100 in this embodiment, the judgment module 104 and / or the data receiving module 101 and / or the calculation module 102 can select self-developed data analysis software, so as to utilize the precise calculation ability of the self-developed data analysis software and combine with the high-precision oscilloscope data acquisition to improve the accuracy of the test results.

[0162] The automated test system provided by the present invention can avoid being easily affected by human errors in the traditional manual test method, provide higher measurement accuracy and data consistency, and greatly increase the reliability of the test results. At the same time, the present invention can significantly reduce the time required for testing through the automated control of the self-developed data analysis software and the TCL script, and realize fast and batch testing operations.

[0163] Based on this, compared with the traditional manual measurement and verification method, the processing flow corresponding to the automated test system provided in this embodiment can not only support the verification of 1024 high and low level time values at a time, but also achieve multiple long-term automated test verifications, greatly improving the test efficiency and accuracy, simplifying the process of data collation and report writing, effectively avoiding the cumbersome manual recording and possible errors, thereby improving the overall work efficiency and accuracy.

[0164] With the same idea as the above embodiment, the present invention also provides a server. Please refer to Figure 13 , which is a schematic structural diagram of the server. The server includes a memory, a processor, and a communication module. Each element of the memory, the processor, and the communication module is directly or indirectly electrically connected to each other to achieve data transmission or interaction. For example, these elements can be electrically connected to each other through one or more communication buses or signal lines.

[0165] Among them, the memory is used to store programs or data. The memory can be, but is not limited to, a random access memory (RAM), a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), etc.

[0166] The processor is used to read / write the data or programs stored in the memory and execute corresponding functions, that is, the above steps: obtaining the input parameters of the to-be-tested timing generation module; calculating the theoretical timing data of the to-be-tested timing generation module according to the input parameters using a pre-designed calculation formula; obtaining the simulation timing data of the to-be-tested timing generation module according to the input parameters using a pre-set simulation software; judging whether the simulation timing data is abnormal according to the theoretical timing data; if the simulation timing data is in a normal state, receiving and obtaining the analog timing data according to the to-be-tested timing output signal; wherein, the to-be-tested timing output signal is determined by the to-be-tested timing generation module according to the input parameters; judging whether the analog timing data is abnormal according to the theoretical timing data to evaluate whether the to-be-tested timing output signal meets the expectations.

[0167] The communication module is used to establish a communication connection between the server and other communication terminals through the network and is used to transmit and receive data through the network.

[0168] It should be understood that Figure 13The structure shown is only a schematic diagram of the server, and the server may further include more or fewer components than those shown in Figure 13 or have a configuration different from that shown in Figure 13 . Each component shown in Figure 13 can be implemented by hardware, software, or a combination thereof.

[0169] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. An automated test method based on a timing generation module, characterized in that It includes the following steps: Obtain the input parameters of the timing generation module to be tested; Calculate the theoretical timing data of the timing generation module to be tested according to the input parameters by using a pre-designed calculation formula; Obtain the simulation timing data of the timing generation module to be tested according to the input parameters by using a pre-set simulation software; Judge whether the simulation timing data is abnormal according to the theoretical timing data; If the simulation timing data is in a normal state, receive and obtain the analog timing data according to the output signal of the timing to be tested; wherein, the output signal of the timing to be tested is determined by the timing generation module to be tested according to the input parameters; Judge whether the analog timing data is abnormal according to the theoretical timing data to evaluate whether the output signal of the timing to be tested meets the expectation.

2. The automated test method according to claim 1, wherein The step of judging whether the simulation timing data is abnormal according to the theoretical timing data includes: Calculate the theoretical high and low level time values corresponding to the theoretical timing data; Calculate the simulation high and low level time values corresponding to the simulation timing data; Judge whether the theoretical high and low level time values are consistent with the simulation high and low level time values. If they are consistent, it is determined that the simulation timing data is in a normal state.

3. The automated testing method according to claim 1 or 2, wherein The step of receiving and obtaining the analog timing data according to the output signal of the timing to be tested includes: Send a first control signal to the oscilloscope to make the oscilloscope adjust its own configuration parameters according to the first control signal; Input the output signal of the timing to be tested into the adjusted oscilloscope to obtain the analog timing data.

4. The automated testing method according to claim 3, wherein The step of judging whether the analog timing data is abnormal according to the theoretical timing data includes: Convert the analog timing data into a digital signal and calculate the measured high and low level time values corresponding to the digital signal; Judge whether the difference between the measured high and low level time values and the theoretical timing data is equal to a preset difference; if so, it is determined that the current output signal of the timing to be tested meets the expectation; if not, it is determined that the current output signal of the timing to be tested does not meet the expectation.

5. The automated testing method according to claim 2, characterized in that, The theoretical timing data satisfies: Wherein, S is the level value of the theoretical output signal; P is the vector data; He is the high timing edge; Le is the low timing edge.

6. The automated testing method according to claim 2, wherein For any test interval, when the input parameters include the test rate, before the step of obtaining the input parameters of the timing generation module to be tested, it includes: Divide the current test interval into multiple consecutive sampling periods according to the test rate; For any sampling period, send a control instruction to the data generation module to make the data generation module generate data parameters that meet the preset rules to obtain the input parameters.

7. The automated test method according to claim 6, wherein The step of sending a control instruction to the data generation module for any sampling period to make the data generation module generate data parameters that meet the preset rules includes: Send a second control signal to the data generation module at the cut-off moment of the current sampling period to make the data generation module generate vector data with opposite values in the next sampling period; Send a third control signal to the data generation module at the start moment of the current sampling period to make the data generation module randomly generate different timing edge data at different moments of the current sampling period.

8. The automated testing method according to claim 7, wherein The steps of causing the data generation module to randomly generate different timing edge data at different moments in the current sampling period include: When any sampling period includes eight time points, a third control signal is sent to the data generation module at the starting moment of the current sampling period, so that the data generation module randomly generates high timing edge signals or low timing edge signals at each of the time points according to the third control signal.

9. The automated testing method according to claim 7 or 8, characterized in that, The timing edge data satisfies: (1 ≤ n ≤ 8, n is a positive integer); (1 ≤ n ≤ 8, n is a positive integer); He≠Le; where He is the high timing edge signal; Le is the low timing edge signal; T is the sampling period; n is the number of time points.

10. An automated test system based on a timing generation module, characterized in that, It includes: A data receiving module for obtaining the input parameters of the timing generation module to be tested; A calculation module for calculating the theoretical timing data of the timing generation module to be tested according to the input parameters by using a pre-designed calculation formula; A simulation module for obtaining the simulated timing data of the timing generation module to be tested according to the input parameters by using pre-set simulation software; A judgment module for judging whether the simulated timing data is abnormal according to the theoretical timing data; A hardware detection module for receiving and obtaining analog timing data according to the output signal of the timing to be tested when the simulated timing data is in a normal state; wherein, the output signal of the timing to be tested is determined by the timing generation module to be tested according to the input parameters; The judgment module is further used for judging whether the analog timing data is abnormal according to the theoretical timing data to evaluate whether the output signal of the timing to be tested meets the expectation.

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