Display device and method of manufacturing same

Abstract

The invention relates to a display device and a method of manufacturing the same. The display device may include a substrate including a first sub-pixel region, a second sub-pixel region, and a third sub-pixel region, and a non-emission region corresponding to boundaries between the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region; a display element layer including light emitting elements disposed in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region, respectively, on the substrate; a light conversion layer disposed on the display element layer and including a bank disposed in the non-emission area; and a color filter layer disposed on the light conversion layer and including a first color filter, a second color filter, and a third color filter. One of the first color filter, the second color filter, and the third color filter may be disposed in the non-emission region.

Description

[0001] Cross - reference to related applications

[0002] This application claims the priority and benefit of Korean Patent Application No. 10 - 2024 - 0002876, filed on January 8, 2024, the entire content of which is incorporated herein by reference. Technical Field

[0003] Various embodiments relate to a display device and a method of manufacturing a display device. Background Art

[0004] Due to characteristics such as light weight and thinness, flat - panel display devices are used as alternatives to cathode - ray tube display devices. Representative examples of such flat - panel display devices include liquid - crystal display devices and organic light - emitting display devices.

[0005] A display device may include a light - emitting element that generates light, a color - conversion component that converts the wavelength of the light generated from the light - emitting element, and a color filter layer disposed on the color - conversion component. The color filter layer may include color filters that selectively transmit light of different colors. Summary of the Invention

[0006] Various embodiments relate to a display device that adjusts a reflected color through a design change.

[0007] Various embodiments relate to a method of manufacturing a display device.

[0008] However, the embodiments are not limited to the embodiments set forth herein. The above and other embodiments will become more apparent to those of ordinary skill in the art to which the present disclosure pertains by referring to the detailed description of the present disclosure given below.

[0009] An embodiment may provide a display device including: a substrate including a first sub - pixel region, a second sub - pixel region, and a third sub - pixel region, and a non - emitting region corresponding to boundaries between the first sub - pixel region, the second sub - pixel region, and the third sub - pixel region; a display element layer including light - emitting elements respectively disposed in the first sub - pixel region, the second sub - pixel region, and the third sub - pixel region on the substrate; a light - conversion layer disposed on the display element layer and including a bank disposed in the non - emitting region; and a color filter layer disposed on the light - conversion layer and including a first color filter, a second color filter, and a third color filter. One of the first color filter, the second color filter, and the third color filter may be disposed in the non - emitting region.

[0010] In an embodiment, the light - conversion layer may further include: a first layer disposed in the first sub - pixel region, the second sub - pixel region, and the third sub - pixel region; and a second layer covering the first layer. The bank may be disposed in the non - emitting region on the second layer.

[0011] In an embodiment, at least one of the first color filter, the second color filter, and the third color filter may contact the second layer.

[0012] In an embodiment, the light conversion layer may further include: a low refractive index layer disposed on the second layer; and a third layer covering the low refractive index layer.

[0013] In an embodiment, at least one of the first color filter, the second color filter, and the third color filter may contact the third layer.

[0014] In an embodiment, the first layer may be formed by a photolithography process.

[0015] In an embodiment, the first color filter, the second color filter, and the third color filter may be formed by a photolithography process.

[0016] An embodiment may provide a display device including: a substrate including a first sub-pixel region, a second sub-pixel region, and a third sub-pixel region and a non-emitting region corresponding to boundaries between the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region; a display element layer including light-emitting elements respectively disposed in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region on the substrate; a light conversion layer disposed on the display element layer and including dams disposed in the non-emitting region; and a color filter layer disposed on the light conversion layer and including a first color filter, a second color filter, and a third color filter. Two of the first color filter, the second color filter, and the third color filter may be disposed in the non-emitting region.

[0017] In an embodiment, the first color filter and the second color filter may be disposed in the non-emitting region. The first color filter may be disposed on the second color filter in the non-emitting region.

[0018] In an embodiment, the light conversion layer may further include: a first layer disposed in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region; and a second layer covering the first layer. The dams may be disposed on the second layer in the non-emitting region.

[0019] In an embodiment, at least one of the first color filter, the second color filter, and the third color filter may contact the second layer.

[0020] In an embodiment, the light conversion layer may further include: a low refractive index layer disposed on the second layer; and a third layer covering the low refractive index layer.

[0021] In an embodiment, at least one of the first color filter, the second color filter, and the third color filter may contact the third layer.

[0022] In an embodiment, the first layer may be formed by a photolithography process.

[0023] In an embodiment, the first color filter, the second color filter, and the third color filter may be formed by a photolithography process.

[0024] An embodiment may provide a method of manufacturing a display device, the method including: providing a substrate including a first sub-pixel region, a second sub-pixel region, and a third sub-pixel region, and a non-emitting region corresponding to a boundary between the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region; forming a display element layer on the substrate, the display element layer including light-emitting elements respectively disposed in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region on the substrate; forming a light conversion layer on the display element layer, the light conversion layer including a bank disposed in the non-emitting region; and forming a color filter layer on the light conversion layer, the color filter layer including a first color filter, a second color filter, and a third color filter. Forming the color filter layer may include forming one of the first color filter, the second color filter, and the third color filter in the non-emitting region on the bank.

[0025] In an embodiment, forming the light conversion layer may include: forming a first layer in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region; forming a second layer covering the first layer. The bank may be formed on the second layer in the non-emitting region.

[0026] In an embodiment, forming the light conversion layer may include: forming a low refractive index layer on the second layer; and forming a third layer covering the low refractive index layer. At least one of the first color filter, the second color filter, and the third color filter may contact the third layer.

[0027] In an embodiment, the first layer may be formed by a photolithography process.

[0028] In an embodiment, the first color filter, the second color filter, and the third color filter may be formed by a photolithography process. Description of the Drawings

[0029] Figure 1 is a schematic plan view showing a display device according to an embodiment.

[0030] Figures 2 to 4 is a schematic plan view showing Figure 1 an embodiment of a pixel.

[0031] Figure 5 is a schematic plan view showing Figure 1 an embodiment of a display panel.

[0032] Figure 6 is a schematic diagram of an equivalent circuit of an embodiment of a sub-pixel included in a pixel in Figures 2 to 4 the.

[0033] Figure 7 is a schematic cross-sectional view showing an embodiment of a light-emitting element Figure 6 .

[0034] Figure 8 is a cross-sectional view showing another embodiment of a light-emitting element Figure 6 .

[0035] Figure 9 is a schematic cross-sectional view showing an embodiment of a pixel of a light-emitting element including Figure 7 or Figure 8 .

[0036] Figure 10 is a schematic cross-sectional view showing Figure 9 a light conversion layer and a color filter layer.

[0037] Figure 11 is a schematic cross-sectional view for describing the thickness of a bank Figure 10 according to the transmittance of a second color filter.

[0038] Figure 12 and Figure 13 are schematic cross-sectional views showing a light conversion layer and a color filter layer of a display device according to an embodiment.

[0039] Figure 14 are schematic cross-sectional views showing a light conversion layer and a color filter layer of a display device according to an embodiment.

[0040] Figures 15 to 17 are schematic cross-sectional views showing a light conversion layer and a color filter layer of a display device according to an embodiment.

[0041] Figure 18 is a flowchart showing a method of manufacturing a display device according to an embodiment.

[0042] Figures 19 to 23 is a schematic view showing Figure 18 step S300.

[0043] Figure 24 and Figure 25 are schematic views showing Figure 18 step S400. Detailed Description

[0044] In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the various embodiments or examples of the present invention. As used herein, "embodiment" and "example" are interchangeable terms that are non-limiting examples of the apparatus or method disclosed herein. However, it will be apparent that the various embodiments may be practiced without these specific details or by one or more equivalent arrangements. In this document, the various embodiments need not be exclusive and do not limit the disclosure. For example, the specific shape, configuration, and characteristics of an embodiment may be used or implemented in another embodiment.

[0045] Unless otherwise stated, the embodiments shown are to be understood as providing features of the present invention. Thus, unless otherwise stated, the features, components, modules, layers, films, panels, regions, and / or aspects, etc. (hereinafter individually or collectively referred to as "elements") of the various embodiments may be otherwise combined, separated, interchanged, and / or rearranged without departing from the scope of the present invention.

[0046] The use of cross-hatching and / or shading in the drawings is generally used to clarify the boundaries between adjacent elements. Thus, unless stated otherwise, the presence or absence of cross-hatching or shading does not convey or indicate any preference or requirement for a particular material, material property, size, ratio, commonality between the elements shown, and / or any other characteristic, attribute, property, etc. of the elements. Additionally, in the drawings, the dimensions and relative dimensions of elements may be exaggerated for clarity and / or for descriptive purposes. When an embodiment can be implemented differently, a particular process order may be performed differently than that described. For example, two consecutively described processes may be performed substantially simultaneously or in an order opposite to that described. Additionally, like reference numerals denote like elements.

[0047] When an element or layer is referred to as being “on,” “connected to,” or “coupled to” another element or layer, it can be directly on, directly connected to, or directly coupled to the other element or layer, or intervening elements or layers may be present. However, when an element or layer is referred to as being “directly on,” “directly connected to,” or “directly coupled to” another element or layer, no intervening elements or layers are present. For this reason, the term “connected” can refer to physical connection, electrical connection, and / or fluid connection with or without intervening elements. Additionally, the axes of the first direction DR1, the second direction DR2, and the third direction DR3 are not limited to the three axes such as the X-axis, Y-axis, and Z-axis of a rectangular coordinate system, and can be interpreted in a broader sense. For example, the axes of the first direction DR1, the second direction DR2, and the third direction DR3 can be perpendicular to each other, or can represent different directions that are not perpendicular to each other. For the purposes of this disclosure, “at least one of A and B” can be understood to mean only A, only B, or any combination of A and B. Additionally, “at least one of X, Y, and Z” and “at least one selected from the group consisting of X, Y, and Z” can be interpreted to mean only X, only Y, only Z, or any combination of two or more of X, Y, and Z. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items.

[0048] Although the terms “first,” “second,” etc. may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another. Thus, a first element discussed below may be referred to as a second element without departing from the teachings of this disclosure.

[0049] For descriptive purposes, spatial relative terms such as “below,” “beneath,” “under,” “lower,” “above,” “upper,” “on,” “over,” “higher,” “side” (e.g., as in “sidewall”), etc. may be used herein and thereby to describe the relationship of one element to another(s) as shown in the figures. In addition to the orientation depicted in the figures, the spatial relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture. For example, if the device in the figures is flipped over, an element described as “below” or “beneath” another element or feature will then be oriented “above” the other element or feature. Thus, the term “below” can encompass both an orientation above and below. The device may be otherwise oriented (e.g., rotated 90 degrees or at other orientations), and thus, the spatial relative descriptors used herein should be interpreted accordingly.

[0050] The terms used herein are for the purpose of describing particular embodiments and are not intended to be limiting. Unless the context clearly dictates otherwise, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well. Further, when used in this specification, the terms "comprises", "comprising", "includes" and / or "including" specify the presence of the stated features, integers, steps, operations, elements, components and / or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof. It should also be noted that as used herein, the terms "substantially", "about" and other similar terms are used as approximate terms and not as terms of degree, and are therefore intended to account for inherent deviations in measured, calculated and / or provided values recognized by one of ordinary skill in the art.

[0051] Various embodiments are described herein with reference to cross-sectional views and / or exploded views that are schematic diagrams of embodiments and / or intermediate structures. Accordingly, differences from the shapes shown in the figures, for example due to manufacturing techniques and / or tolerances, should be expected. Thus, the embodiments disclosed herein should not necessarily be construed as limited to the shapes of the specific regions shown, but should include deviations in shape caused, for example, by manufacturing. In this manner, the regions shown in the figures may be schematic in nature, and the shapes of these regions may not reflect the actual shape of the regions of the device, and are therefore not necessarily intended to be limiting.

[0052] As is customary in the art, some embodiments are described and illustrated in the figures with respect to functional blocks, units and / or modules. Those skilled in the art will understand that these blocks, units and / or modules are physically implemented by electronic (or optical) circuits such as logic circuits, discrete components, microprocessors, hardwired circuits, memory elements, wiring connectors, etc., which may be formed using semiconductor-based manufacturing techniques or other manufacturing techniques. In the case where the blocks, units and / or modules are implemented by a microprocessor or other similar hardware, the blocks, units and / or modules may be programmed and controlled using software (e.g., microcode) to perform the various functions discussed herein, and may be selectively driven by firmware and / or software. It is also contemplated that each block, unit and / or module may be implemented by dedicated hardware, or may be implemented as a combination of dedicated hardware for performing some functions and a processor (e.g., one or more programmed microprocessors and associated circuitry) for performing other functions. Further, without departing from the scope of the present invention, each block, unit and / or module of some embodiments may be physically separated into two or more interacting and discrete blocks, units and / or modules. Additionally, without departing from the scope of the present invention, the blocks, units and / or modules of some embodiments may be physically combined into more complex blocks, units and / or modules.

[0053] In the following, the present disclosure will be described in detail with reference to the accompanying drawings.

[0054] Figure 1 is a schematic plan view showing a display device DD according to an embodiment.

[0055] Reference Figure 1 , according to an embodiment, the display panel DP (or the display device DD) can be arranged in various forms. For example, it can be arranged in the form of a rectangular plate having two pairs of parallel sides, but the embodiment is not limited thereto. In the case where the display panel DP is arranged in the form of a rectangular plate, one of the two pairs of sides can be arranged to be longer than the other pair.

[0056] At least a part of the display panel DP can be flexible, and the display panel DP can be folded at the flexible part, but the embodiment is not limited thereto.

[0057] The display panel DP can display an image. Self-emissive display panels such as an organic light-emitting display (OLED) panel including an organic light-emitting diode as a light-emitting element, a micro light-emitting diode (LED) (micro-LED or nano-LED) display panel including a micro light-emitting diode as a light-emitting element, and a quantum dot organic light-emitting display (QDOLED) panel including a quantum dot and an organic light-emitting diode can be used as the display panel DP. For example, non-emissive display panels such as a liquid crystal display (LCD) panel, an electrophoretic display (EPD) panel, or an electro-wetting display (EWD) panel can be used as the display panel DP. In the case where a non-emissive display panel is used as the display panel DP, the display device DD can include a backlight unit that provides light to the display panel DP.

[0058] The display panel DP can include a substrate SUB and pixels PXL provided (or arranged) on the substrate SUB.

[0059] The substrate SUB can include a transparent insulating material that transmits light. The substrate SUB can be a rigid substrate or a flexible substrate. For example, the rigid substrate can be one of a glass substrate, a quartz substrate, a glass-ceramic substrate, and a crystallized glass substrate.

[0060] The flexible substrate can be a film substrate or a plastic substrate including a polymer organic material. For example, the flexible substrate can include at least one of polystyrene, polyvinyl alcohol, polymethyl methacrylate, polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, cellulose triacetate, and cellulose acetate propionate.

[0061] The display device DD can have various shapes. For example, the display device DD can be set in the form of a rectangular plate, but the embodiments are not limited thereto. For example, the display device DD can have a shape such as a circular shape or an oval shape. In addition, the display device DD can have angled corners and / or curved corners. For ease of explanation, Figure 1 it is shown that the display device DD has a rectangular plate shape. For example, in Figure 1 it, the extending direction of the short side of the display device DD (e.g., the horizontal direction) is designated as the first direction DR1, and the extending direction of the long side of the display device DD (e.g., the vertical direction) is designated as the second direction DR2.

[0062] The substrate SUB (or the display device DD) can include a display area DA for displaying an image and a peripheral area PA (or non-display area) formed in an area other than the display area DA. The substrate SUB can include a display area DA and a peripheral area PA provided around the periphery of the display area DA (or adjacent to the display area DA), and the display area DA includes a plurality of pixel areas in which corresponding pixels PXL are provided.

[0063] The peripheral area PA can be provided adjacent to the display area DA. The peripheral area PA can be provided (or set) on at least one side of the display area DA. For example, the peripheral area PA can surround the periphery (or edge portion) of the display area DA. In an embodiment, the peripheral area PA can be a border area of the display device DD.

[0064] The pixel PXL can be provided in the display area DA on the substrate SUB. The peripheral area PA can be provided around the display area DA. A structure for protecting components included in the pixel PXL provided in the display area DA can be provided in the peripheral area PA, but the embodiments are not limited thereto. For example, in the peripheral area PA, there can be a line component connected to the corresponding pixel PXL and a driver connected to the line component. The driver can drive the pixel PXL.

[0065] Each of the pixels PXL can include sub-pixels SPX1, SPX2, and SPX3. For example, the pixel PXL can include a first sub-pixel SPX1, a second sub-pixel SPX2, and a third sub-pixel SPX3. The first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can be arranged in sequence in the first direction DR1. However, the embodiments are not limited to the foregoing description, and the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can be sequentially provided in a second direction DR2 intersecting the first direction DR1.

[0066] The first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can emit light of different colors. For example, the first sub-pixel SPX1 can be a red sub-pixel that emits red light, the second sub-pixel SPX2 can be a green sub-pixel that emits green light, and the third sub-pixel SPX3 can be a blue sub-pixel that emits blue light. However, the colors, types, and / or numbers of the sub-pixels forming the pixel PXL are not limited thereto. For example, the colors of the light emitted from each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can be changed in various ways. Hereinafter, the term "pixel PXL" will be used to generally designate the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3.

[0067] Figures 2 to 4 is a schematic plan view showing Figure 1 an embodiment of the pixel.

[0068] Referring to Figures 1 to 4 , the pixel PXL can include the sub-pixels SPX1, SPX2, and SPX3. Although Figures 2 to 4 it is shown that each of the pixels PXL includes the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3, the embodiment is not limited thereto.

[0069] The first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can be connected to at least one data line among the data lines and at least one scan line among the scan lines.

[0070] Referring to Figures 2 to 4 , each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can have a planar shape of a polygon such as a rectangular shape, a square shape, or a hexagonal shape.

[0071] Referring to Figure 2, each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may have a rectangular planar shape having a short side extending in a first direction DR1 and a long side extending in a second direction DR2. However, the embodiments are not limited to the above examples. In an embodiment, each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may have a planar shape of a square or a rhombus having sides of the same length in the first direction DR1 and the second direction DR2. In an embodiment, the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may be arranged in the first direction DR1. In an embodiment, the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may have the same surface area (or the same size), but the embodiments are not limited thereto. For example, the surface area (or size) of at least one of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may be different from that of another. In another example, any two of the surface area (or size) of the first sub-pixel SPX1, the surface area (or size) of the second sub-pixel SPX2, and the surface area (or size) of the third sub-pixel SPX3 may be substantially the same as each other, and the remaining one may be different from these two. In another example, the surface area (or size) of the first sub-pixel SPX1, the surface area (or size) of the second sub-pixel SPX2, and the surface area (or size) of the third sub-pixel SPX3 may be different from each other.

[0072] Reference Figure 3 , the first sub-pixel SPX1 may be arranged with one of the second sub-pixel SPX2 and the third sub-pixel SPX3 in the first direction DR1 and may be arranged with the remaining one of the second sub-pixel SPX2 and the third sub-pixel SPX3 in the second direction DR2. For example, the first sub-pixel SPX1 may be arranged parallel to the second sub-pixel SPX2 in the first direction DR1. The first sub-pixel SPX1 may be arranged parallel to the third sub-pixel SPX3 in the second direction DR2. In an embodiment, the third sub-pixel SPX3 may be positioned in the second direction DR2 relative to the first sub-pixel SPX1 and the second sub-pixel SPX2. In an embodiment, the surface area (or size) of the first sub-pixel SPX1 and the second sub-pixel SPX2 may be substantially the same as each other. The surface area (or size) of the third sub-pixel SPX3 may be different from the surface areas of the first sub-pixel SPX1 and the second sub-pixel SPX2. For example, the surface area (or size) of the third sub-pixel SPX3 may be greater than the surface area (or size) of each of the first sub-pixel SPX1 and the second sub-pixel SPX2.

[0073] Reference Figure 4, each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may have a planar shape of a hexagon or a regular hexagon. In an embodiment, two adjacent sides of the six sides of each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may face the corresponding sides of the adjacent sub-pixels.

[0074] Reference Figures 2 to 4 , the first sub-pixel SPX1 may emit first light. The second sub-pixel SPX2 may emit second light. The third sub-pixel SPX3 may emit third light. The first light may be light in a red wavelength band. The second light may be light in a green wavelength band. The third light may be light in a blue wavelength band. The red wavelength band may be a wavelength band in the range from about 600 nm to about 750 nm. The green wavelength band may be a wavelength band in the range from about 480 nm to about 560 nm. The blue wavelength band may be a wavelength band in the range from about 370 nm to about 460 nm. However, the embodiment is not limited thereto.

[0075] Each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may be a light-emitting element that emits light (e.g., Figure 7 and Figure 8 light-emitting element LD). The light-emitting element may include an organic light-emitting element having an organic layer.

[0076] Figure 5 is a schematic cross-sectional view of a display panel showing Figure 1 .

[0077] Reference Figure 5 , the display panel DP may include a substrate SUB, a pixel circuit layer PCL, a display element layer DPL, a packaging layer TFE, a light conversion layer LCL, and a color filter layer CFL. In an embodiment, the substrate SUB, the pixel circuit layer PCL, the display element layer DPL, the packaging layer TFE, the light conversion layer LCL, and the color filter layer CFL may be sequentially stacked in a third direction DR3.

[0078] The pixel circuit layer PCL may be provided (or disposed) on the substrate SUB and include transistors and signal lines connected to the transistors. For example, each transistor may have a shape in which a semiconductor pattern, a gate electrode, a source electrode, and a drain electrode are sequentially stacked with an insulating layer interposed therebetween. The semiconductor pattern may include amorphous silicon, polysilicon, low-temperature polysilicon, and organic semiconductors and / or oxide semiconductors. Although each of the gate electrode, the source electrode, and the drain electrode may include one of aluminum (Al), copper (Cu), titanium (Ti), and molybdenum (Mo), the embodiment is not limited thereto. For example, the pixel circuit layer PCL may include at least one or more insulating layers.

[0079] The display element layer DPL may be disposed on the pixel circuit layer PCL. The display element layer DPL may include light-emitting elements that emit light (e.g., Figure 7 or Figure 8 light-emitting element LD). Although the light-emitting element may be, for example, an organic light-emitting diode, the embodiments are not limited thereto. In an embodiment, the light-emitting element may be an inorganic light-emitting element including an inorganic light-emitting material, or a light-emitting element that emits light generated by changing (or converting) the wavelength of light using quantum dots.

[0080] The encapsulation layer TFE may be disposed on the display element layer DPL. The encapsulation layer TFE may be an encapsulation substrate or may have the form of an encapsulation film having a multi-layer structure. In the case where the encapsulation layer TFE has the form of an encapsulation film, the encapsulation layer TFE may include an inorganic layer and / or an organic layer. For example, the encapsulation layer TFE may have a structure formed by sequentially stacking an inorganic layer, an organic layer, and an inorganic layer. The encapsulation layer TFE may prevent external air or water from penetrating the display element layer DPL or the pixel circuit layer PCL.

[0081] The light conversion layer LCL may be disposed on the encapsulation layer TFE. The light conversion layer LCL may convert the light emitted from the display element layer DPL into light of a specific color and may include elements for enhancing the light output efficiency. In an embodiment, the light conversion layer LCL may include a color conversion layer (e.g., Figure 9 color conversion layer CCL) and a low refractive index layer (e.g., Figure 9 low refractive index layer LRL).

[0082] The color filter layer CFL may be disposed on the light conversion layer LCL. The color filter layer CFL may selectively transmit the light passing through the light conversion layer LCL (or the display element layer DPL). The color filter layer CFL may include a first color filter, a second color filter, and a third color filter (e.g., Figure 9 first color filter CF1, second color filter CF2, and third color filter CF3).

[0083] Figure 6 is a schematic diagram of an equivalent circuit of an embodiment of a sub-pixel included in a pixel in Figures 2 to 4 The sub-pixel SPX shown in may be any one of the sub-pixels SPX1, SPX2, and SPX3 shown in

[0084] Figure 6 The sub-pixels SPX1, SPX2, and SPX3 arranged in the display area DA of the display device DD may have substantially the same or similar configurations. Figure 1 For ease of explanation,

[0085] For ease of explanation, Figure 6Shows a sub-pixel SPX located on the i-th pixel row (or the i-th horizontal line) and the j-th pixel column, where each of i and j is a positive integer.

[0086] Reference Figure 6 , the sub-pixel SPX may include an emission component EMU that generates light having a luminance corresponding to a data signal. In addition, the sub-pixel SPX may further include a pixel circuit PXC that drives the emission component EMU.

[0087] The emission component EMU may include a light-emitting element LD connected between a first power line PL1 and a second power line PL2. The first power line PL1 receives a voltage from a first driving power supply VDD (or a first power supply), and the second power line PL2 receives a voltage from a second driving power supply VSS (or a second power supply). For example, the emission component EMU may include a light-emitting element LD that includes a first pixel electrode AE connected to the first driving power supply VDD via the pixel circuit PXC and the first power line PL1, and a second pixel electrode CE connected to the second driving power supply VSS via the second power line PL2. The first pixel electrode AE may be an anode, and the second pixel electrode CE may be a cathode. The first driving power supply VDD and the second driving power supply VSS may have different potentials. For example, during the emission period of the sub-pixel SPX, the potential difference between the first driving power supply VDD and the second driving power supply VSS may be set to a value equal to or greater than the threshold voltage of the light-emitting element LD.

[0088] When the sub-pixel SPX is disposed on the i-th pixel row and the j-th pixel column in the display area DA, the pixel circuit PXC of the sub-pixel SPX may be electrically connected to the i-th scan line Si and the j-th data line Dj. In addition, the pixel circuit PXC may be electrically connected to the i-th control line CLi and the j-th sensing line SENj.

[0089] The pixel circuit PXC may include a first transistor T1, a second transistor T2, a third transistor T3, and a storage capacitor Cst.

[0090] The first transistor T1 can be electrically connected between the first driving power supply VDD and the light-emitting element LD as a driving transistor to control the driving current to be applied to the light-emitting element LD. For example, the first terminal of the first transistor T1 can be electrically connected to the first driving power supply VDD through the first power line PL1. The second terminal of the first transistor T1 can be electrically connected to the second node N2. The gate electrode of the first transistor T1 can be electrically connected to the first node N1. In response to the voltage applied to the first node N1, the first transistor T1 can control the driving current to be applied from the first driving power supply VDD to the light-emitting element LD through the second node N2. In an embodiment, the first terminal of the first transistor T1 can be a drain electrode, and the second terminal of the first transistor T1 can be a source electrode. However, the embodiment is not limited thereto. In an embodiment, the first terminal can be a source electrode, and the second terminal can be a drain electrode.

[0091] The second transistor T2 can be electrically connected between the data line Dj (e.g., the j-th data line) and the first node N1, and can be used as a switching transistor to select the sub-pixel SPX and activate the sub-pixel SPX in response to a scan signal. The first terminal of the second transistor T2 can be electrically connected to the data line Dj. The second terminal of the second transistor T2 can be electrically connected to the first node N1 (or the gate electrode of the first transistor T1). The gate electrode of the second transistor T2 can be electrically connected to the scan line Si (or the i-th scan line). The first terminal and the second terminal of the second transistor T2 can be different terminals. For example, when the first terminal is a drain electrode, the second terminal can be a source electrode.

[0092] When a scan signal having a gate-on voltage (e.g., a high-level voltage) is provided from the scan line Si, the second transistor T2 can be turned on to electrically connect the data line Dj to the first node N1. The first node N1 can be the point where the second terminal of the second transistor T2 and the gate electrode of the first transistor T1 are connected to each other. The second transistor T2 can send a data signal to the gate electrode of the first transistor T1.

[0093] The third transistor T3 can obtain (or acquire) a sensing signal through the sensing line SENj (e.g., the j-th sensing line) by electrically connecting the first transistor T1 to the sensing line SENj, and use the sensing signal to detect (or measure) the characteristics of the sub-pixel SPX (such as the threshold voltage of the first transistor T1). Information about the characteristics of each sub-pixel SPX can be used to convert image data to compensate for the characteristic deviation between sub-pixels SPX. The second terminal of the third transistor T3 can be electrically connected to the second terminal of the first transistor T1. The first terminal of the third transistor T3 can be electrically connected to the sensing line SENj. The gate electrode of the third transistor T3 can be electrically connected to the control line CLi (e.g., the i-th control line). The first terminal can be a drain electrode, and the second terminal can be a source electrode.

[0094] The third transistor T3 may be an initialization transistor that initializes the second node N2 and may be turned on when a sense control signal is provided thereto from the control line CLi, thereby applying the voltage of the initialization power supply to the second node N2. Accordingly, the storage capacitor Cst electrically connected to the second node N2 may be initialized.

[0095] The storage capacitor Cst may include a lower electrode LE (or a first storage electrode) and an upper electrode UE (or a second storage electrode). The lower electrode LE may be electrically connected to the first node N1. The upper electrode UE may be electrically connected to the second node N2. The storage capacitor Cst may be charged with a data voltage corresponding to the data signal to be provided to the first node N1 during one frame period. Accordingly, the storage capacitor Cst may store a voltage corresponding to the difference between the voltage of the gate electrode of the first transistor T1 and the voltage of the second node N2.

[0096] Although Figure 6 the embodiment in which all of the first transistor T1, the second transistor T2, and the third transistor T3 are N-type transistors is shown, the embodiment is not limited thereto. For example, at least one of the first transistor T1, the second transistor T2, and the third transistor T3 may be changed (or modified) to a P-type transistor. The structure of the pixel circuit PXC may be changed (or modified) in various ways.

[0097] In the following embodiments, for convenience of description, the lateral direction (or the X-axis direction or the horizontal direction) in the plan view will be represented by the first direction DR1, the longitudinal direction (or the Y-axis direction or the vertical direction) in the plan view will be represented by the second direction DR2, and the vertical direction in the cross-sectional view will be represented by the third direction DR3.

[0098] Figure 7 is a schematic cross-sectional view showing Figure 6 an embodiment of the light-emitting element LD. Figure 8 is a schematic cross-sectional view showing Figure 6 another embodiment of the light-emitting element LD.

[0099] Referring Figure 7 , the light-emitting element LD may include a first pixel electrode AE, an organic emission component EL, and a second pixel electrode CE that are sequentially stacked.

[0100] In an embodiment, the first pixel electrode AE may be patterned to correspond to the first sub-pixel, the second sub-pixel, and the third sub-pixel (e.g., the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3).

[0101] In an embodiment, the organic emission component EL may be provided (or disposed) on the first pixel electrode AE. The organic emission component EL may have a multi-layer thin film structure including a light generating layer. The organic emission component EL may include a hole injection layer HIL, a hole transport layer HTL, an emission layer EML, an electron transport layer ETL, and an electron injection layer EIL stacked in sequence.

[0102] The hole injection layer HIL may be an organic layer disposed between the first pixel electrode AE and the hole transport layer HTL to facilitate the injection of holes from the first pixel electrode AE into the emission layer EML. The hole transport layer HTL may be disposed between the hole injection layer HIL and the emission layer EML to receive holes from the first pixel electrode AE and transport the holes to the emission layer EML.

[0103] The electron injection layer EIL may be disposed between the electron transport layer ETL and the second pixel electrode CE. The electron transport layer ETL may be disposed on the emission layer EML and may receive electrons from the second pixel electrode CE and transport the electrons to the emission layer EML.

[0104] The emission layer EML may be a region where light is generated by the recombination of electrons and holes provided from the first pixel electrode AE and the second pixel electrode CE. The emission layer EML may include an organic light emitting material such as a polymer organic material or a low molecular organic material that emits light of a specific color. For example, the emission layer EML may be formed of an organic material that emits blue light. However, the embodiment is not limited thereto. In an embodiment, the emission layer EML may be formed of an organic material that emits red or green light, or may be formed of an inorganic material or quantum dots.

[0105] In an embodiment, the second pixel electrode CE may be integrally provided (or integrally formed). The second pixel electrode CE may be disposed on the organic emission component EL. The second pixel electrode CE may be integrated with the light emitting element LD.

[0106] Reference Figure 8 , the light emitting element LD may include the first pixel electrode AE, the organic emission component EL, and the second pixel electrode CE.

[0107] The organic emission component EL may include a light generating layer. In an embodiment, the organic emission component EL may include a first organic emission component ELa, a charge generation layer CGL, and a second organic emission component ELb. The first pixel electrode AE, the first organic emission component ELa, the charge generation layer CGL, the second organic emission component ELb, and the second pixel electrode CE may be stacked in sequence.

[0108] The first organic emission component ELa may have a structure in which a hole injection layer HIL, a first hole transport layer HTLa, a first organic emission layer EMLa, and a first electron transport layer ETLa are sequentially stacked. The second organic emission component ELb may include a structure in which a second hole transport layer HTLb, a second organic emission layer EMLb, a second electron transport layer ETLb, and an electron injection layer EIL are sequentially stacked.

[0109] In an embodiment, a buffer layer may be disposed on the first organic emission layer EMLa and the second organic emission layer EMLb. The buffer layer may include an electron transport compound.

[0110] The charge generation layer CGL may supply charges to the first organic emission component ELa and the second organic emission component ELb. The charge generation layer CGL may include an n-type charge generation layer n-CGL that supplies charges to the first organic emission component ELa and a p-type charge generation layer p-CGL that supplies holes to the second organic emission component ELb. The n-type charge generation layer n-CGL may include a metal material as a dopant.

[0111] Although Figure 8 it is shown that two organic emission components ELa and ELb are stacked and disposed in the light-emitting element LD, embodiments are not limited thereto. For example, three, four, or more organic emission components may be stacked and disposed in the light-emitting element LD.

[0112] Figure 9 is a schematic cross-sectional view of an embodiment of a pixel of a light-emitting element LD including Figure 7 or Figure 8 .

[0113] Referring to Figure 1 and Figure 9 , the display device DD may include a display area DA. The display area DA may include a first sub-pixel area SPA1, a second sub-pixel area SPA2, and a third sub-pixel area SPA3, and a non-emission area NEA. In an embodiment, the first sub-pixel area SPA1 may be an area from which the first sub-pixel SPX1 emits light of a first color. The second sub-pixel area SPA2 may be an area from which the second sub-pixel SPX2 emits light of a second color. The third sub-pixel area SPA3 may be an area from which the third sub-pixel SPX3 emits light of a third color. In an embodiment, the emission area of the display area DA may correspond to the first sub-pixel area SPA1, the second sub-pixel area SPA2, and the third sub-pixel area SPA3. The first sub-pixel area SPA1, the second sub-pixel area SPA2, the third sub-pixel area SPA3, and the non-emission area NEA may be defined by the bank BNK of the light conversion layer LCL.

[0114] Referring toFigure 9 , although an embodiment is shown in which the first sub-pixel region SPA1, the second sub-pixel region SPA2, and the third sub-pixel region SPA3 are adjacent to each other in a direction intersecting the third direction DR3, the embodiment is not limited thereto.

[0115] In an embodiment, the pixel PXL may include a pixel circuit layer PCL, a display element layer DPL, a packaging layer TFE, a light conversion layer LCL, and a color filter layer CFL that are sequentially disposed on the substrate SUB in the third direction DR3.

[0116] In the pixel circuit layer PCL, circuit elements (e.g., Figure 6 the first transistor T1, the second transistor T2, and the third transistor T3) and signal lines electrically connected to the circuit elements may be provided. The pixel circuit layer PCL may be disposed on the substrate SUB. The pixel circuit layer PCL may include the first transistor T1, a buffer layer BFL, a gate insulating layer GI, an interlayer insulating layer ILD, a passivation layer PVX, and a via layer VIA. As an example, although one transistor T1 is shown, the sub-pixel SPX may include a plurality of transistors and at least one capacitor to drive the light-emitting element LD.

[0117] The buffer layer BFL may be disposed on the substrate SUB. The buffer layer BFL may prevent impurities from diffusing from the outside. The buffer layer BFL may prevent impurities from diffusing into the first transistor T1 provided (or disposed) on the substrate SUB and may enhance the flatness of the substrate SUB. The buffer layer BFL may be provided (or formed) in the form of a single-layer structure or in the form of a multi-layer structure. The buffer layer BFL may be an inorganic insulating layer including an inorganic material. The inorganic insulating layer may include, for example, silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ), and at least one of metal oxides such as aluminum oxide (AlO x ). In the case where the buffer layer BFL is provided in the form of a multi-layer structure, each layer may be formed of the same material or different materials. In some cases, the buffer layer BFL may be omitted.

[0118] The first transistor T1 may include a semiconductor pattern SCP, a gate electrode GE, a first terminal TE1, and a second terminal TE2. The first terminal TE1 may be one of a source electrode and a drain electrode, and the second terminal TE2 may be the other of the source electrode and the drain electrode. For example, in the case where the first terminal TE1 is a drain electrode, the second terminal TE2 may be a source electrode.

[0119] The semiconductor pattern SCP may be disposed and / or formed on the buffer layer BFL. The semiconductor pattern SCP may include a first region in contact with the first terminal TE1, a second region in contact with the second terminal TE2, and a channel region formed between the first region and the second region. The channel region may overlap with the gate electrode GE of the first transistor T1. The semiconductor pattern SCP may be a semiconductor pattern formed of amorphous silicon, polycrystalline silicon, low-temperature polycrystalline silicon, oxide semiconductor, organic semiconductor, etc. For example, the channel region may be an undoped semiconductor pattern and may be an intrinsic semiconductor. Each of the first region and the second region may be a semiconductor pattern doped with impurities. In an embodiment, the first terminal TE1 may be electrically connected to the light-emitting element LD through the connection electrodes CNE1 and CNE2.

[0120] The gate insulating layer GI may be disposed and / or formed on the semiconductor pattern SCP. The gate insulating layer GI may be an inorganic insulating layer including an inorganic material. The gate insulating layer GI may include one or more materials selected from the materials that are constituent materials of the buffer layer BFL. For example, the gate insulating layer GI and the buffer layer BFL may include the same material. For example, the gate insulating layer GI may be formed of an organic insulating layer including an organic material. Although the gate insulating layer GI may be disposed in a single-layer structure, the gate insulating layer GI may be disposed in a multi-layer structure having at least two or more layers.

[0121] The gate electrode GE may be disposed and / or formed on the gate insulating layer GI to correspond to (or overlap with) the channel region of the semiconductor pattern SCP. The gate electrode GE may be provided (or disposed) on the gate insulating layer GI and overlap with the channel region of the semiconductor pattern SCP. The gate electrode GE may have a single-layer structure formed of one or a combination selected from the group consisting of copper (Cu), molybdenum (Mo), tungsten (W), neodymium (Nd), titanium (Ti), aluminum (Al), silver (Ag), and their alloys (such as aluminum neodymium (AlNd)), or may have a double-layer structure or a multi-layer structure formed of molybdenum (Mo), titanium (Ti), copper (Cu), aluminum (Al), or silver (Ag) to reduce the line resistance.

[0122] The interlayer insulating layer ILD may be disposed and / or formed on the gate electrode GE. The first connection electrode CNE1 may be disposed on the interlayer insulating layer ILD. The first connection electrode CNE1 may be electrically connected to the first terminal TE1 through a contact hole passing through the gate insulating layer GI and the interlayer insulating layer ILD.

[0123] The passivation layer PVX may be disposed and / or formed on the first connection electrode CNE1. The second connection electrode CNE2 may be disposed on the passivation layer PVX. The second connection electrode CNE2 may be electrically connected to the first connection electrode CNE1 through a contact hole passing through the passivation layer PVX.

[0124] The passivation layer PVX can be configured to include a structure having an inorganic insulating layer disposed on an organic insulating layer, or a structure having an organic insulating layer disposed on an inorganic insulating layer. The inorganic insulating layer may include, for example, silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), and at least one metal oxide such as aluminum oxide (AlO x ). The organic insulating layer may include at least one of, for example, polyacrylate resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene ether resin, polyphenylene sulfide resin, and benzocyclobutene resin.

[0125] The via layer VIA can be provided and / or formed on the entire surface of the passivation layer PVX. The via layer VIA can be an inorganic insulating layer including an inorganic material or an organic insulating layer including an organic material.

[0126] The display element layer DPL can be provided on the via layer VIA. The display element layer DPL can include a light-emitting element LD and a pixel defining layer PDL. The light-emitting element LD and the pixel defining layer PDL can be provided and / or formed on the via layer VIA. The light-emitting element LD can include a first light-emitting element LD1 disposed in a first sub-pixel region SPA1, a second light-emitting element LD2 disposed in a second sub-pixel region SPA2, and a third light-emitting element LD3 disposed in a third sub-pixel region SPA3.

[0127] Each of the light-emitting elements LD can include a first pixel electrode AE, an organic emission component EL, and a second pixel electrode CE. The light-emitting element LD can be electrically connected to the pixel circuit of the corresponding pixel PXL (e.g., Figure 6 's pixel circuit PXC).

[0128] The first pixel electrode AE can be provided and / or formed on the via layer VIA of the corresponding pixel PXL. The first pixel electrode AE can be the anode electrode of the light-emitting element LD. The first pixel electrode AE can be electrically connected to the first terminal TE1 through a corresponding contact. In an embodiment, the first pixel electrode AE can include anode electrodes corresponding to the first sub-pixel region SPA1, the second sub-pixel region SPA2, and the third sub-pixel region SPA3. The first pixel electrode AE can be patterned to correspond to (or overlap with) the first sub-pixel region SPA1, the second sub-pixel region SPA2, and the third sub-pixel region SPA3.

[0129] The first pixel electrode AE may be formed of a conductive material (or substance). The conductive material may include an opaque metal. For example, the opaque metal may include metals such as silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), titanium (Ti), and alloys thereof. However, the material of the first pixel electrode AE is not limited to the foregoing embodiments. In an embodiment, the first pixel electrode AE may include a transparent conductive material (or substance). The transparent conductive material (or substance) may include transparent conductive oxides such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO x) , indium gallium zinc oxide (IGZO), and indium tin zinc oxide (ITZO), and conductive polymers such as poly(3,4-ethylenedioxythiophene) (PEDOT). In the case where the first pixel electrode AE includes a transparent conductive material (or substance), a separate conductive layer made of an opaque metal may be provided to reflect light emitted from the organic emission component EL in the image display direction of the display device (e.g., Figure 1 the display device DD) (or in the direction toward the encapsulation layer TFE).

[0130] The pixel defining layer PDL may define (or partition) the region where the organic emission component EL is provided. The pixel defining layer PDL may be an organic insulating layer made of an organic material. In an embodiment, the pixel defining layer PDL may include a light absorbing material or be coated with a light absorbing material so that the pixel defining layer PDL can absorb light introduced from the outside. For example, the pixel defining layer PDL may include a carbon-based black pigment. The embodiment is not limited thereto.

[0131] The pixel defining layer PDL may be partially opened to include an opening that exposes the first pixel electrode AE through it. The pixel defining layer PDL may protrude from the via layer VIA in the third direction DR3 along the periphery of the sub-pixel region SPA. The pixel defining layer PDL may be provided on the via layer VIA to define the region where the organic emission component EL is provided and accommodated on the first pixel electrode AE. The organic emission component EL may be provided on the first pixel electrode AE exposed through the opening of the pixel defining layer PDL.

[0132] The organic emission component EL may have a multi-layer thin film structure including a light generating layer that generates light. The organic emission component EL may emit one of red, green, and blue light, but the embodiment is not limited thereto. For example, the organic emission component EL may include a white emission layer that emits white light. The internal design of the organic emission component EL may also vary according to the selected color of the light to be generated.

[0133] The second pixel electrode CE may be disposed on the organic emission component EL and the pixel defining layer PDL. The second pixel electrode CE may be disposed in the form of a plate over the entire area of the display area DA.

[0134] The second pixel electrode CE may be a thin metal layer having a thickness sufficient to allow light emitted from the organic emission component EL to pass therethrough. The second pixel electrode CE may be made of a metal material or a transparent conductive material and may have a relatively small thickness. The second pixel electrode CE may include at least one of various transparent conductive materials including indium tin oxide, indium zinc oxide, indium tin zinc oxide, aluminum zinc oxide, gallium zinc oxide, zinc tin oxide, and gallium tin oxide, and may be substantially transparent or translucent to provide a satisfactory transmittance. Thus, light emitted from the organic emission component EL positioned under the second pixel electrode CE may be emitted through the second pixel electrode CE in a direction toward the upper surface of the encapsulation layer TFE.

[0135] The encapsulation layer TFE may be disposed and / or formed over the entire surface of the second pixel electrode CE. The encapsulation layer TFE may include a first encapsulation layer EN1, a second encapsulation layer EN2, and a third encapsulation layer EN3 sequentially positioned on the second pixel electrode CE. The first encapsulation layer EN1 and the third encapsulation layer EN3 may be inorganic layers including inorganic materials. The second encapsulation layer EN2 may be an organic layer including an organic material. The first encapsulation layer EN1 and the third encapsulation layer EN3 may protect the sub-pixel SPX from the effects of water and oxygen. The second encapsulation layer EN2 may protect the sub-pixel SPX from foreign substances such as dust particles.

[0136] The light conversion layer LCL may be disposed on the encapsulation layer TFE. In an embodiment, the light conversion layer LCL may be disposed on the third encapsulation layer EN3 of the encapsulation layer TFE. The light conversion layer LCL may include a bank BNK, a first cover layer CAP1 (or the second layer of the light conversion layer LCL), a color conversion layer CCL (or the first layer of the light conversion layer LCL), a low refractive index layer LRL, and a second cover layer CAP2 (or the third layer of the light conversion layer LCL).

[0137] The color conversion layer CCL can be disposed in a region overlapping with the first sub-pixel region SPA1, the second sub-pixel region SPA2, and the third sub-pixel region SPA3. The color conversion layer CCL can include a first color conversion layer CCL1, a second color conversion layer CCL2, and a third color conversion layer CCL3 corresponding to (or overlapping with) the first sub-pixel region SPA1, the second sub-pixel region SPA2, and the third sub-pixel region SPA3, respectively. The first color conversion layer CCL1 can be disposed in the first sub-pixel region SPA1. The second color conversion layer CCL2 can be disposed in the second sub-pixel region SPA2. The third color conversion layer CCL3 can be disposed in the third sub-pixel region SPA3.

[0138] The color conversion layer CCL can include color conversion particles, wavelength conversion particles, or quantum dot particles QD. For example, the color conversion particles can convert light of a first color (or light in a first wavelength band) incident thereon from the light-emitting element LD into light of a second color (or light of a specific color, or light in a second wavelength band), and emit the converted light. For example, the color conversion layer CCL can be formed by a photolithography process. For example, the method of forming the color conversion layer according to the embodiment is not limited thereto.

[0139] In an embodiment, the first sub-pixel region SPA1, the second sub-pixel region SPA2, and the third sub-pixel region SPA3 can include a first light-emitting element LD1, a second light-emitting element LD2, and a third light-emitting element LD3 that emit light of the same color. For example, the first light-emitting element LD1, the second light-emitting element LD2, and the third light-emitting element LD3 can emit light of a third color (or blue light). The first color conversion layer CCL1, the second color conversion layer CCL2, and the third color conversion layer CCL3 including color conversion particles are respectively disposed in the first sub-pixel region SPA1, the second sub-pixel region SPA2, and the third sub-pixel region SPA3, so that a full-color image can be displayed.

[0140] The first color conversion layer CCL1 can include first color conversion particles for converting light of a third color emitted from the first light-emitting element LD1 into light of a first color (or red light). For example, the first color conversion layer CCL1 can include first quantum dot particles QD dispersed in a matrix material such as a base resin. The first quantum dot particles QD of the first color conversion layer CCL1 can absorb blue light and change the wavelength of the blue light according to energy transition to emit red light.

[0141] The second color conversion layer CCL2 may include second color conversion particles for converting light of a third color emitted from the second light-emitting element LD2 into light of a second color (or green light). For example, the second color conversion layer CCL2 may include second quantum dot particles QD dispersed in a matrix material such as a base resin. The second quantum dot particles QD of the second color conversion layer CCL2 may absorb blue light and change the wavelength of the blue light according to energy transitions to emit green light.

[0142] The third color conversion layer CCL3 may be arranged to effectively use the third color light (or blue light) emitted from the third light-emitting element LD3. For example, in the case where the third light-emitting element LD3 is a blue light-emitting element that emits blue light and the third sub-pixel region SPA3 is a blue sub-pixel region, the third color conversion layer CCL3 may include at least one type of scatterer SCT to effectively use the light emitted from the third light-emitting element LD3.

[0143] The first cover layer CAP1 may cover the color conversion layer CCL. For example, the first cover layer CAP1 may be disposed on the entire surface of the color conversion layer CCL. The first cover layer CAP1 may prevent water or foreign substances from penetrating into the color conversion layer CCL. The first cover layer CAP1 may include an inorganic material.

[0144] In an embodiment, a low refractive index layer LRL may be disposed on the first cover layer CAP1. The low refractive index layer LRL may control the path of light emitted from the color conversion layer CCL (or the display element layer DPL) from below. For example, the low refractive index layer LRL may change the path of incident light to a direction perpendicular to the planarization layer OC. The low refractive index layer LRL may include a polymer material and a material based on disilicate.

[0145] In an embodiment, a second cover layer CAP2 may cover the low refractive index layer LRL. For example, the second cover layer CAP2 may be disposed on the low refractive index layer LRL. The second cover layer CAP2 may prevent water or foreign substances from penetrating into the low refractive index layer LRL. The second cover layer CAP2 may include an inorganic material.

[0146] The bank BNK may be disposed on the second cover layer CAP2. The bank BNK may be disposed between the first sub-pixel region SPA1, the second sub-pixel region SPA2, and the third sub-pixel region SPA3 (or Figure 1 the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3), or in the boundary between the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3. For example, the bank BNK may define the boundary between the color conversion layers CCL.

[0147] The bank BNK may define a first sub-pixel area SPA1, a second sub-pixel area SPA2, a third sub-pixel area SPA3, and a non-emission area NEA. The first sub-pixel area SPA1, the second sub-pixel area SPA2, and the third sub-pixel area SPA3 may be areas corresponding (or overlapping) to areas between parts of the bank BNK. The non-emission area NEA may be an area corresponding (or overlapping) to the bank BNK.

[0148] In an embodiment, the non-emission area NEA may refer to an area where the bank BNK is disposed. In a plan view, the bank BNK may surround (or enclose) the first sub-pixel area SPA1, the second sub-pixel area SPA2, and the third sub-pixel area SPA3.

[0149] The bank BNK may include an organic material such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, a polyester resin, a polyphenylene sulfide resin, or a benzocyclobutene (BCB). However, the embodiment is not limited thereto. The bank BNK may include various inorganic materials including silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum nitride (AlN x ), aluminum oxide (AlO x ), zirconium oxide (ZrO x ), hafnium oxide (HfO x ), or titanium oxide (TiO x ).

[0150] The bank BNK may include at least one light-shielding material and / or a reflective material. Accordingly, light leakage between adjacent sub-pixels SPX may be prevented or blocked by the bank BNK. For example, the bank BNK may include a black pigment, but the embodiment is not limited thereto.

[0151] The bank BNK can be used to define the boundary between the color conversion layers CCL. In addition, the bank BNK can be used to define the regions (e.g., the first sub-pixel region SPA1, the second sub-pixel region SPA2, and the third sub-pixel region SPA3) from which light of corresponding colors is emitted. In the case where the regions (e.g., the first sub-pixel region SPA1, the second sub-pixel region SPA2, and the third sub-pixel region SPA3) from which light of corresponding colors is emitted are defined by the color filter CF, the color filter CF in the non-emitting region NEA can be used only for light-shielding purposes. However, since the bank BNK is used to define the regions (e.g., the first sub-pixel region SPA1, the second sub-pixel region SPA2, and the third sub-pixel region SPA3) from which light of various colors is emitted, the design freedom of the color filter CF in the non-emitting region NEA can be relatively enhanced. For example, one or two layers of the color filter CF can be used in the non-emitting region NEA.

[0152] A detailed description of the color filter layer CFL will be provided below with reference to Figure 10 Provide a detailed description of the color filter layer CFL.

[0153] Figure 10 is a schematic cross-sectional view showing Figure 9 the light conversion layer LCL and the color filter layer CFL.

[0154] Referring to Figure 10 , the color filter layer CFL can be disposed on the light conversion layer LCL. In an embodiment, the color filter layer CFL can be disposed on the second cover layer CAP2 in the sub-pixel region SPA. The color filter layer CFL can be disposed on the bank BNK in the non-emitting region NEA. The color filter layer CFL can include the color filter CF and the planarization layer OC. The color filter CF can include a first color filter CF1, a second color filter CF2, and a third color filter CF3 corresponding to the first sub-pixel region SPA1, the second sub-pixel region SPA2, and the third sub-pixel region SPA3, respectively. The color filter CF can contact the second cover layer CAP2 in the sub-pixel region SPA and can be disposed on the second cover layer CAP2. In an exemplary embodiment, at least one of the first color filter CF1, the second color filter CF2, and the third color filter CF3 can contact the second cover layer CAP2. For example, the first color filter CF1, the second color filter CF2, and the third color filter CF3 can be formed by a photolithography process.

[0155] In an embodiment, the first color filter CF1, the second color filter CF2, and the third color filter CF3 can be a red color filter, a green color filter, and a blue color filter, respectively, but the embodiment is not limited thereto.

[0156] In an embodiment, the first color filter CF1 may be disposed on the second capping layer CAP2 to correspond to (or overlap with) the first sub-pixel region SPA1, and may selectively transmit light emitted from the first light-emitting element LD1 and the first color conversion layer CCL1. In an embodiment, the first color filter CF1 may overlap with the first color conversion layer CCL1 in the third direction DR3. The first color filter CF1 may include a color filter material for selectively allowing light of a first color (or red light) to pass therethrough. For example, in the case where the first sub-pixel region SPA1 is a red sub-pixel region, the first color filter CF1 may include a red color filter material.

[0157] In an embodiment, the second color filter CF2 may be disposed on the second capping layer CAP2 to correspond to (or overlap with) the second sub-pixel region SPA2, and may selectively transmit light emitted from the second light-emitting element LD2 and the second color conversion layer CCL2. In an embodiment, the second color filter CF2 may overlap with the second color conversion layer CCL2 in the third direction DR3. The second color filter CF2 may include a color filter material for selectively allowing light of a second color (or green light) to pass therethrough. For example, in the case where the second sub-pixel region SPA2 is a green sub-pixel region, the second color filter CF2 may include a green color filter material.

[0158] In an embodiment, the third color filter CF3 may be disposed on the second capping layer CAP2 to correspond to (or overlap with) the third sub-pixel region SPA3, and may selectively transmit light emitted from the third light-emitting element LD3 and the third color conversion layer CCL3. In an embodiment, the third color filter CF3 may overlap with the third color conversion layer CCL3 in the third direction DR3. The third color filter CF3 may include a color filter material for selectively allowing light of a third color (or blue light) to pass therethrough. For example, in the case where the third sub-pixel region SPA3 is a blue sub-pixel region, the third color filter CF3 may include a blue color filter material.

[0159] In an embodiment, a planarization layer OC may be disposed on the first color filter CF1, the second color filter CF2, and the third color filter CF3. The planarization layer OC may cover the first color filter CF1, the second color filter CF2, and the third color filter CF3. The planarization layer OC is not limited as long as it is made of a material having excellent planarization characteristics and light transmittance, but the planarization layer OC may include an organic material or an inorganic material.

[0160] In an embodiment, the second color filter CF2 may be disposed in the non-emission area NEA. For example, the second color filter CF2 may be disposed on the bank BNK in the non-emission area NEA. For example, the light transmittance of the second color filter CF2 may be lower than that of the first color filter CF1 or the third color filter CF3.

[0161] For ease of explanation, it is assumed that the second color is green. The human eye is more sensitive to green than to red or blue. Therefore, in order to reduce the reflectance of the display panel DP (refer to Figure 1 ), it may be most effective to reduce the transmittance of the green color filter. For example, the transmittance of the second color filter CF2 may be reduced by changing the material of the second color filter CF2.

[0162] However, when the transmittance of the green color filter is reduced, the color of the reflected light caused by external light (e.g., the reflected color) may appear close to magenta. Therefore, the green color filter may be disposed in the non-emission area NEA to increase the proportion of green in the reflected light and adjust the reflected color. However, in the present specification, the reason for the color to appear close to magenta is not limited to the transmittance. For example, in the case where the reflected color appears close to magenta although the first color filter CF1, the second color filter CF2, and the third color filter CF3 have the same transmittance, the second color filter CF2 may be disposed in the non-emission area NEA.

[0163] In addition, the thickness of the planarization layer OC may be reduced by disposing only the second color filter CF2 in the non-emission area NEA. Therefore, the production cost of the display device DD (refer to Figure 1 ) may be reduced.

[0164] Figure 11 is a schematic cross-sectional view for describing Figure 10 the thickness BNK_D of the bank BNK.

[0165] Refer to Figure 11 , the thickness BNK_D of the bank BNK may be determined according to the color of the reflected light. For example, as the thickness BNK_D of the bank BNK decreases, the amount of reflected light may relatively decrease. Therefore, the bank BNK may be formed to have a reduced thickness such that the increase in the proportion of the second color due to the second color filter CF2 in the non-emission area NEA may be slightly reduced.

[0166] Figure 12 and Figure 13 are schematic cross-sectional views showing the light conversion layer LCL and the color filter layer CFL of the display device DD according to an embodiment.

[0167] Because in addition to the color filter CF disposed in the non-emission area NEA, the color filter layer CFL according to the embodiment has the same asFigure 10 The color filter layer CFL has substantially the same configuration as that of

[0168] Reference Figure 12 and Figure 13 , and the color filter CF provided in the non-emission area NEA can be changed (or modified) according to the reflected color. For example, as Figure 12 shown in Figure 13 , when the reflected color looks close to cyan, the first color filter CF1 can be provided in the non-emission area NEA. For example, as

[0169] Figure 14 shown in

[0170] , when the reflected color looks close to yellow, the third color filter CF3 can be provided in the non-emission area NEA. Figure 10 ), and the second cover layer CAP2 (refer to Figure 10 ), the light conversion layer LCL according to the embodiment has substantially the same configuration as that of the light conversion layer LCL of Figure 10 except for the structure without the low refractive index layer LRL (refer to

[0171] Reference Figure 14 , the bank BNK can be provided on the first cover layer CAP1, and the color filter CF can be provided on the first cover layer CAP1 in the sub-pixel area SPA. For example, the color filter CF can be in contact with the first cover layer CAP1 in the sub-pixel area SPA and can be provided on the first cover layer CAP1. In an exemplary embodiment, at least one of the first color filter CF1, the second color filter CF2, and the third color filter CF3 can be in contact with the first cover layer CAP1.

[0172] Figures 15 to 17 is a schematic cross-sectional view showing the light conversion layer LCL and the color filter layer CFL of the display device DD according to the embodiment.

[0173] Since the color filter layer CFL according to the embodiment has substantially the same configuration as that of the color filter layer CFL of Figure 10 except for the color filter CF provided in the non-emission area NEA, the same reference numerals and symbols are used to denote the same or similar components, and redundant descriptions are omitted for convenience of description.

[0174] Reference Figures 15 to 17, the color filter CF provided in the non-emission area NEA can be changed (or modified) according to the reflected color. For example, the color filter CF provided in the non-emission area NEA can be changed (or modified) according to the color of the reflected light.

[0175] For example, as Figure 15 shown, when the reflected color appears to be close to blue, the first color filter CF1 and the second color filter CF2 can be provided in the non-emission area NEA.

[0176] In an embodiment, although the first color filter CF1 is provided on the second color filter CF2 in the non-emission area NEA, the embodiment is not limited thereto. For example, the second color filter CF2 can be provided on the first color filter CF1.

[0177] For example, as Figure 16 shown, when the reflected color appears to be close to red, the second color filter CF2 and the third color filter CF3 can be provided in the non-emission area NEA.

[0178] In an embodiment, although the third color filter CF3 is provided on the second color filter CF2 in the non-emission area NEA, the embodiment is not limited thereto. For example, the second color filter CF2 can be provided on the third color filter CF3.

[0179] For example, as Figure 17 shown, when the reflected color appears to be close to green, the first color filter CF1 and the third color filter CF3 can be provided in the non-emission area NEA.

[0180] In an embodiment, although the third color filter CF3 is provided on the first color filter CF1 in the non-emission area NEA, the embodiment is not limited thereto. For example, the first color filter CF1 can be provided on the third color filter CF3.

[0181] Figure 18 is a flowchart showing a method of manufacturing a display device DD according to an embodiment.

[0182] Refer to Figure 18, a method of manufacturing a display device DD may include a step S100 of providing a substrate SUB including a first sub-pixel region SPA1, a second sub-pixel region SPA2, and a third sub-pixel region SPA3, and a non-emitting region NEA corresponding to boundaries between the first sub-pixel region SPA1, the second sub-pixel region SPA2, and the third sub-pixel region SPA3, a step S200 of forming a display element layer DPL including light-emitting elements LD respectively disposed in the first sub-pixel region SPA1, the second sub-pixel region SPA2, and the third sub-pixel region SPA3 on the substrate SUB, a step S300 of forming a light conversion layer LCL on the display element layer DPL, and a step S400 of forming a color filter layer CFL including a first color filter CF1, a second color filter CF2, and a third color filter CF3 on the light conversion layer LCL.

[0183] Figures 19 to 23 is a schematic diagram showing Figure 18 step S300.

[0184] Referring to Figure 19 , a color conversion layer CCL may be formed on a encapsulation layer TFE formed on the display element layer DPL. For example, the color conversion layer CCL may be formed by a photolithography process.

[0185] A first color conversion layer CCL1 may be disposed in the first sub-pixel region SPA1. A second color conversion layer CCL2 may be disposed in the second sub-pixel region SPA2. A third color conversion layer CCL3 may be disposed in the third sub-pixel region SPA3.

[0186] Referring to Figure 20 , a first cover layer CAP1 may be formed to cover the color conversion layer CCL. For example, the first cover layer CAP1 may be disposed on the entire surface of the color conversion layer CCL.

[0187] Referring to Figure 21 and Figure 22 , a low refractive index layer LRL may be formed on the first cover layer CAP1. A second cover layer CAP2 may be formed on the low refractive index layer LRL.

[0188] For example, the steps of forming the low refractive index layer LRL and the second cover layer CAP2 may be omitted. For example, a bank BNK (refer to Figure 10 ) may be formed in the non-emitting region NEA (refer to Figure 23 ) on the first cover layer CAP1, and a color filter CF (refer to Figure 10 ) may be formed in the sub-pixel region SPA (refer to Figure 24 ) on the first cover layer CAP1.

[0189] Referring to Figure 23, a bank BNK can be formed in a non-emission area NEA (refer to Figure 10 ) on the first cover layer CAP1. A second color filter CF2 (refer to Figure 24 ) can be formed on the bank BNK.

[0190] Figure 24 And Figure 25 are schematic diagrams showing Figure 18 of step S400.

[0191] Refer to Figure 24 and Figure 25 , a color filter CF can be formed in a sub-pixel area SPA (refer to Figure 10 ) on the second cover layer CAP2. A second color filter CF2 can be formed on the bank BNK in the non-emission area NEA (refer to Figure 10 ). A planarization layer OC can be disposed on the color filter CF. In an exemplary embodiment, at least one of the first color filter CF1, the second color filter CF2, and the third color filter CF3 can contact the second cover layer CAP2.

[0192] In a display device according to an embodiment, the bank BNK for defining the boundary between color conversion layers CCL can be used to define an area that emits light of a corresponding color.

[0193] In a display device according to an embodiment, the bank BNK can be used to define an area that emits light of a corresponding color, so that the design freedom of the color filter CF in the non-emission area NEA can be enhanced.

[0194] In a display device DD according to an embodiment, one or two layers of color filters CF can be used in the non-emission area NEA, so that the reflected color can be adjusted.

[0195] In a display device DD according to an embodiment, one or two layers of color filters CF can be used in the non-emission area NEA, so that the thickness of the planarization layer OC can be reduced. Therefore, the production cost of the display device can be reduced.

[0196] However, the effects of the present disclosure are not limited to the above effects, and various modifications are possible without departing from the spirit and scope of the present disclosure.

[0197] Although specific embodiments and examples have been described herein, this is only provided for a more comprehensive understanding of the present disclosure, and those skilled in the art will understand that the embodiments are not limited to the foregoing embodiments, and other modifications, additions, and substitutions are possible.

[0198] The present disclosure can be applied to a display device and an electronic device including the display device. For example, the present disclosure can be applied to a digital TV, a 3D TV, a cellular phone, a smart phone, a tablet computer, a VR device, a PC, a household appliance, a laptop computer, a PDA, a portable media player (PMP), a digital camera, a music player, a portable game console, a navigation device, and the like.

[0199] In summarizing the detailed description, those skilled in the art will understand that many changes and modifications can be made to the embodiments without substantially departing from the principles, spirit, and scope of the present disclosure. Accordingly, the disclosed embodiments are used only in a general and descriptive sense and not for purposes of limitation.

Claims

1. A display device, comprising: a substrate including a first sub-pixel region, a second sub-pixel region, and a third sub-pixel region, and a non-emitting region corresponding to boundaries between the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region; a display element layer including light-emitting elements respectively disposed on the substrate in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region; a light conversion layer disposed on the display element layer and including dams disposed in the non-emitting region; and a color filter layer disposed on the light conversion layer and including a first color filter, a second color filter, and a third color filter, wherein one of the first color filter, the second color filter, and the third color filter is disposed in the non-emitting region.

2. The display device according to claim 1, wherein the light conversion layer further includes: a first layer disposed in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region; and a second layer covering the first layer, and the dams are disposed on the second layer in the non-emitting region.

3. The display device according to claim 2, wherein, At least one of the first color filter, the second color filter, and the third color filter contacts the second layer.

4. The display device according to claim 2, wherein, The light conversion layer further includes: a low refractive index layer disposed on the second layer; and a third layer covering the low refractive index layer.

5. The display device according to claim 4, wherein, At least one of the first color filter, the second color filter, and the third color filter contacts the third layer.

6. The display device according to claim 2, wherein, The first layer is formed by a photolithography process.

7. The display device according to claim 1, wherein, The first color filter, the second color filter, and the third color filter are formed by a photolithography process.

8. A display device, comprising: a substrate including a first sub-pixel region, a second sub-pixel region, and a third sub-pixel region, and a non-emitting region corresponding to boundaries between the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region; a display element layer including light-emitting elements respectively disposed on the substrate in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region; a light conversion layer disposed on the display element layer and including dams disposed in the non-emitting region; and a color filter layer disposed on the light conversion layer and including a first color filter, a second color filter, and a third color filter, wherein two of the first color filter, the second color filter, and the third color filter are disposed in the non-emitting region.

9. The display device according to claim 8, wherein the first color filter and the second color filter are disposed in the non-emitting region, and the first color filter is disposed on the second color filter in the non-emitting region.

10. The display device according to claim 9, wherein the light conversion layer further includes: a first layer disposed in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region; and a second layer covering the first layer, the dams are disposed on the second layer in the non-emitting region.

11. The display device according to claim 10, wherein, At least one of the first color filter, the second color filter, and the third color filter contacts the second layer.

12. The display device according to claim 10, wherein, The light conversion layer further includes: a low refractive index layer disposed on the second layer; and a third layer covering the low refractive index layer.

13. The display device according to claim 12, wherein, At least one of the first color filter, the second color filter, and the third color filter contacts the third layer.

14. The display device according to claim 10, wherein, The first layer is formed by a photolithography process.

15. The display device according to claim 8, wherein, The first color filter, the second color filter, and the third color filter are formed by a photolithography process.

16. A method of manufacturing a display device, the method comprising: providing a substrate including a first sub-pixel region, a second sub-pixel region, and a third sub-pixel region, and a non-emitting region corresponding to a boundary between the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region; forming a display element layer on the substrate, the display element layer including light-emitting elements respectively disposed in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region on the substrate; forming a light conversion layer on the display element layer, the light conversion layer including a bank disposed in the non-emitting region; and forming a color filter layer on the light conversion layer, the color filter layer including a first color filter, a second color filter, and a third color filter, wherein forming the color filter layer includes forming one of the first color filter, the second color filter, and the third color filter in the non-emitting region on the bank.

17. The method according to claim 16, wherein forming the light conversion layer includes: forming a first layer in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region; and forming a second layer covering the first layer, forming the bank in the non-emitting region on the second layer.

18. The method according to claim 17, wherein forming the light conversion layer includes: forming a low refractive index layer on the second layer; and forming a third layer covering the low refractive index layer, at least one of the first color filter, the second color filter, and the third color filter contacts the third layer.

19. The method according to claim 17, wherein, The first layer is formed by a photolithography process.

20. The method according to claim 16, wherein The first color filter, the second color filter, and the third color filter are formed by a photolithography process.

Images