Three-phase alternating-current solid-state power controller based on three-winding pulse transformer and cooperation method thereof

Abstract

The invention provides a three-phase alternating-current solid-state power controller based on a three-winding pulse transformer and a coordination method of the three-phase alternating-current solid-state power controller. The method comprises the steps that three windings of a three-winding pulse transformer are connected to processor ports of three-phase SSPC channels respectively, the dotted terminal of each winding is connected to the processor power supply positive end of the corresponding SSPC channel, and the non-dotted terminal of each winding is grounded through an MOS tube; when a certain phase SSPC channel detects a tripping condition, the output port of the processor outputs a low level signal to drive the MOS tube to be conducted, so that the current of the corresponding winding is suddenly changed to generate an excitation pulse; through the electromagnetic induction effect of the three-winding pulse transformer, the excitation pulse is coupled to other two-phase windings, and falling edge pulse signals are formed at processor input ports of other two-phase SSPC channels; and the falling edge pulse signal triggers interrupt programs of other two-phase SSPC channels to execute synchronous tripping operation.

Description

Technical Field

[0001] The present invention relates to the technical field of AC solid state power controllers, and particularly to a three-phase AC solid state power controller based on a three-winding pulse transformer and its coordination method. Background Art

[0002] In the distributed power distribution system of advanced aircraft (such as A350, B787, etc.), the remote power distribution unit (RPDU) replaces the traditional thermal circuit breaker through a solid state power controller (SSPC) to achieve load on / off control and circuit protection. For airborne equipment that requires three-phase AC power supply, the prior art controls each phase power supply through three independent SSPC channels. However, the prior art needs to transmit trip signals through a superior processor or a communication bus, resulting in slow coordination speed and dependence on external communication. Once the processor or communication fails, three-phase coordinated tripping cannot be achieved. When discrete signals are used for transmission, it is necessary to isolate the signals between each SSPC channel through optocouplers, resulting in a complex hardware circuit, high cost, and reduced reliability.

[0003] None of the existing solutions effectively solve the contradiction between signal transmission speed and hardware complexity, and there is an urgent need for an efficient and reliable coordination solution. Summary of the Invention

[0004] In view of the above technical problems, the present invention provides a three-phase AC solid state power control solution based on a three-winding pulse transformer, which realizes fast and direct signal transmission between three-phase SSPC channels through the principle of electromagnetic induction, eliminates communication dependence, simplifies the hardware circuit, and ensures the synchronism and reliability of three-phase tripping actions.

[0005] According to one aspect of the present invention, there is provided a coordination method for a three-phase AC solid state power controller (SSPC) based on a three-winding pulse transformer. The method includes: connecting the three windings of the three-winding pulse transformer to the processor ports of the three-phase SSPC channels respectively, where the like-named ends of each winding are connected to the positive end of the processor power supply of the corresponding SSPC channel, and the non-like-named ends are grounded through MOS transistors; when a tripping condition is detected in a certain phase SSPC channel, its processor output port outputs a low-level signal to drive the MOS transistor to conduct, so that the current of the corresponding winding changes suddenly to generate an excitation pulse; through the electromagnetic induction of the three-winding pulse transformer, the excitation pulse is coupled to the other two-phase windings, and a falling-edge pulse signal is formed at the processor input ports of the other two-phase SSPC channels; the falling-edge pulse signal triggers the interrupt programs of the other two-phase SSPC channels to perform synchronous tripping operations.

[0006] In one embodiment, the turns ratio of the three-winding pulse transformer is 1:1:1, and the method further includes: when an interrupt signal is detected in a certain phase SSPC channel, the tripping program is immediately executed.

[0007] In another embodiment, the method further includes: connecting a first resistor in series between the gate of the MOS transistor and the processor output port to suppress the oscillation caused by the parasitic capacitance.

[0008] In another embodiment, the method further includes: providing a Schottky diode between the non-homonymous terminal and the positive terminal of the processor power supply to absorb the induced electromotive force.

[0009] In another embodiment, the drain of the MOS transistor is connected to the non-homonymous terminal, the source of the MOS transistor is grounded, and the method further includes: providing a second resistor between the gate of the MOS transistor and the source of the MOS transistor to ensure reliable on / off of the MOS transistor.

[0010] According to another aspect of the present invention, there is provided a three-phase AC solid-state power controller SSPC, including: a three-winding pulse transformer including three independent windings, each winding having a homonymous terminal and a non-homonymous terminal; and a three-phase SSPC channel module, each SSPC channel module including: a processor provided with a positive power supply terminal, an input port, and an output port; and a MOS transistor, whose drain is connected to the non-homonymous terminal of the corresponding winding, the source is grounded, and the gate is connected to the output port of the processor; wherein the homonymous terminal of each winding is connected to the positive power supply terminal of the processor of the corresponding SSPC channel module, the non-homonymous terminal of the winding is further connected to the input port of the processor of the corresponding SSPC channel module, and wherein the processor is configured to: when the corresponding SSPC channel detects a trip condition, its processor output port outputs a low-level signal to drive the MOS transistor to conduct, so that the current of the corresponding winding changes suddenly to generate an excitation pulse; through the electromagnetic induction of the three-winding pulse transformer, the excitation pulse is coupled to the other two-phase windings, and a falling-edge pulse signal is formed at the input port of the processor of the other two-phase SSPC channels; the falling-edge pulse signal triggers the interrupt program of the other two-phase SSPC channels to perform a synchronous trip operation.

[0011] In one embodiment, the turns ratio of the three-winding pulse transformer is 1:1:1, and the processor is further configured to: when the corresponding SSPC channel detects an interrupt signal, immediately execute a trip program.

[0012] In another embodiment, a first resistor is connected in series between the gate of the MOS transistor and the processor output port to suppress the oscillation caused by the parasitic capacitance.

[0013] In another embodiment, a Schottky diode is provided between the non-homonymous terminal and the positive terminal of the processor power supply to absorb the induced electromotive force.

[0014] In another embodiment, a second resistor is provided between the gate of the MOS transistor and the source of the MOS transistor to ensure reliable on / off of the MOS transistor.

[0015] Compared with the prior art, the three-phase AC solid-state power control solution based on a three-winding pulse transformer provided by the present invention has at least the following advantages:

[0016] 1. The signal transmission speed based on electromagnetic induction reaches the microsecond level, which is much faster than traditional communication methods;

[0017] 2. No optocoupler or complex logic circuit is required, only a single three-winding transformer and a small number of peripheral components are needed;

[0018] 3. Direct hardware coupling avoids the risk of communication failures and ensures strict synchronization of the three-phase tripping actions.

[0019] These and other features and advantages will become apparent by reading the following detailed description and referring to the associated drawings. It should be understood that the foregoing general description and the following detailed description are illustrative only and do not limit the various aspects claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is a flowchart of a method for coordinating a three-phase AC solid-state power controller based on a three-winding pulse transformer according to an embodiment of the present invention.

[0021] Figure 2 is a schematic structural diagram of a three-phase AC solid-state power controller according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0022] The present invention will be described in detail below with reference to the drawings, and the features of the present invention will be further manifested in the following detailed description. In the following detailed description, many specific details are set forth to provide a thorough understanding of the described exemplary embodiments. However, it will be apparent to those skilled in the art that some or all of these specific details may be practiced without these specific details. In other exemplary embodiments, well-known structures or processing steps are not described in detail to avoid unnecessarily obscuring the concepts of the present disclosure.

[0023] In this specification, unless otherwise specified, the term "A or B" used through this specification refers to "A and B" and "A or B", rather than excluding A and B. Similarly, the term "A and / or B" used in this specification refers to "A and B" and "A or B".

[0024] The RPDU generally includes a power supply / communication board and several SSPC boards. Each SSPC board includes multiple SSPC channels. The SSPC channels use semiconductor devices to replace electromechanical switches to control the on / off state of the load, and combine hardware circuits with software algorithms to provide overcurrent protection, short-circuit protection, and I2t inverse time protection for the load. Since some airborne electrical equipment needs to be powered by three-phase AC power, the RPDU needs to have the function of providing three-phase AC power for the load. Each AC SSPC channel provides one phase of the AC power, and the same device is powered by three different AC SSPC channels to meet the three-phase AC power supply requirements of the device. The AC SSPC needs to have a three-phase coordination function. In a group of linked three-phase AC SSPCs, the SSPC channel needs to have the function of transmitting a trip signal to the other two phases. When any one-phase SSPC trips, the other linked phases can also trip accordingly to ensure power supply safety. The three-phase coordination circuit is used to transmit trip signals between SSPCs in different phases of the three-phase circuit to ensure that the switch states of the linked three-phase AC SSPCs are consistent.

[0025] However, if signals are transmitted through a communication channel, the problems are that communication intervention is required, the signal transmission speed is slow, and since there is no direct communication between SSPC channels, it is necessary to rely on the upper-level processor. If the upper-level processor fails or the communication fails, three-phase coordination cannot be carried out; and if signals are transmitted through discrete quantities (that is, when a certain phase fails, a discrete quantity is sent to the other two phases respectively), the problem is that the three SSPC channels are not grounded, and optocouplers are needed to transmit discrete quantities. Each SSPC has to send discrete quantities to the other two SSPCs and also receive discrete quantities from the other two SSPCs, and two optocouplers need to be added to each SSPC channel, making the hardware circuit too complex.

[0026] Therefore, the present invention provides a three-phase AC solid-state power control scheme based on a three-winding pulse transformer to solve the above problems. The present invention utilizes the electromagnetic coupling characteristics of a three-winding pulse transformer (for example, with a turns ratio of 1:1:1) to establish a direct signal transmission link between three-phase SSPC channels.

[0027] Figure 1 The flowchart of a three-phase AC solid-state power controller coordination method 100 based on a three-winding pulse transformer according to an embodiment of the present invention is shown. This method 100 can be executed by a three-phase AC solid-state power controller (for example, the three-phase AC solid-state power controller 200 described below in conjunction with Figure 2 ).

[0028] As Figure 1As shown, in this embodiment, method 100 may include: connecting the three windings of a three-winding pulse transformer to the processor ports of three-phase SSPC channels respectively, where the corresponding ends of each winding are connected to the positive processor power supply of the corresponding SSPC channel, and the non-corresponding ends are grounded through MOS transistors (block 110). As a non-limiting example, the gate (G) of the MOS transistor is connected to the processor output port, the source (S) is grounded, the drain (D) is connected to the non-corresponding end of the transformer, and the non-corresponding end of the transformer can also be connected to the processor input port, which can be set as an interrupt input port, and can be set to trigger an interrupt on the falling edge, while the processor output port can be set as an interrupt output port. When working normally, the MOS transistor connected to the non-corresponding end is not conducting, and the input port of the processor is at a high level. When an interrupt occurs (for example, an interrupt signal is detected in a certain phase SSPC channel), it indicates that a trip has occurred in other phases, and trip processing is performed in the interrupt program. The interrupt signal is transmitted from the channel processor to the channel control switch circuit to control the load state.

[0029] As Figure 1 As further shown, method 100 may include: when a certain phase SSPC channel detects a trip condition, its processor output port outputs a low-level signal to drive the MOS transistor to conduct, so that the current of the corresponding winding changes suddenly to generate an excitation pulse (block 120). As a non-limiting example, the low-level signal is maintained for a certain period of time (generally in the order of microseconds, such as 5 μs, etc.).

[0030] As Figure 1 As further shown, method 100 may include: through the electromagnetic induction of the three-winding pulse transformer, the excitation pulse is coupled to the other two-phase windings, and a falling-edge pulse signal is formed at the processor input ports of the other two-phase SSPC channels (block 130). As a non-limiting example, after the MOS transistor conducts, the non-corresponding end of the transformer changes from a high level to a low level, the current in the transformer winding increases, and the changing current magnetizes the transformer. According to the principle of electromagnetic mutual induction, induced electromotive forces will also be generated in the other two-phase windings of the transformer, thus forming a falling-edge pulse signal at the processor input port.

[0031] As Figure 1 As further shown, method 100 may include: the falling-edge pulse signal triggers the interrupt programs of the other two-phase SSPC channels to perform a synchronous trip operation (block 140). As a non-limiting example, the turns ratio of the three-winding pulse transformer is 1:1:1.

[0032] In another embodiment, method 100 may further include: connecting a Schottky diode in parallel between the non-corresponding end of the transformer and the positive power supply terminal, for consuming the induced electromotive force generated by the coil and protecting the safety of other components in the circuit.

[0033] In another embodiment, method 100 may further include: connecting a first resistor (e.g., 10 kΩ) in series to the G pole of the MOS transistor to reduce the current at the moment when the MOS transistor is turned on and off and suppress oscillations, ensuring the normal operation of the MOS transistor.

[0034] In another embodiment, due to the parasitic capacitance of the MOS transistor, method 100 may further include: setting a second resistor between the G pole and the S pole of the MOS transistor to prevent the voltage between the D pole and the S pole from causing the MOS transistor to conduct and be damaged when the G pole is floating, and at the same time, when there is no drive, it can prevent misoperation and ensure reliable on-off.

[0035] Figure 2 The schematic structural diagram of the three-phase AC solid-state power controller 200 according to an embodiment of the present invention is shown. As Figure 2 shown, in this embodiment, this controller 200 may include a three-winding pulse transformer 210, which includes three independent windings, and each winding has a same-named end and a non-same-named end; and a three-phase SSPC channel module, and each SSPC channel module includes: a processor 220 ( Figure 2 the corresponding processors of the three windings are respectively shown as 220A, 220B, and 220C), provided with a positive power terminal, an input port, and an output port; and a MOS transistor ( Figure 2 the corresponding MOS transistors of the three windings are respectively shown as 230A, 230B, and 230C), whose drain is connected to the non-same-named end of the corresponding winding, the source is grounded, and the gate is connected to the output port of the processor; wherein the same-named end of each winding is connected to the positive power terminal of the processor of the corresponding SSPC channel module, the non-same-named end of this winding is also connected to the input port of the processor of the corresponding SSPC channel module, and wherein the processor 220 may be configured to: when the corresponding SSPC channel detects a trip condition, its processor output port outputs a low-level signal to drive this MOS transistor to conduct, so that the current of the corresponding winding changes suddenly to generate an excitation pulse; through the electromagnetic induction of this three-winding pulse transformer, this excitation pulse is coupled to the other two-phase windings, and a falling-edge pulse signal is formed at the input ports of the processors of the other two-phase SSPC channels; this falling-edge pulse signal triggers the interrupt program of this other two-phase SSPC channel to perform a synchronous trip operation. As a non-limiting example, the turns ratio of the three-winding pulse transformer 210 may be 1:1:1.

[0036] In this embodiment, the processor 220 may also be configured to: when the corresponding SSPC channel detects an interrupt signal, immediately execute a trip program.

[0037] As Figure 2 shown, in another embodiment, this controller 200 may further include: a Schottky diode S provided between the non-same-named end and the positive power terminal of the processor Figure 2A Schottky diode S of the SSPC channel module including Vcca is shown (the other two-phase SSPC channel modules can be similarly arranged) to absorb the induced electromotive force.

[0038] As Figure 2 shown, in another embodiment, this controller 200 may further include: a first resistor R1 connected in series between the gate of the MOS transistor and the output port of the processor ( Figure 2 the first resistor R1 of the SSPC channel module including Vcca is shown, and the other two-phase SSPC channel modules can be similarly arranged) to suppress the oscillation caused by the parasitic capacitance.

[0039] As Figure 2 shown, in another embodiment, this controller 200 may further include: a second resistor R2 arranged between the gate and the source of the MOS transistor ( Figure 2 the second resistor R2 of the SSPC channel module including Vcca is shown, and the other two-phase SSPC channel modules can be similarly arranged) to ensure the reliable on / off of the MOS transistor.

[0040] The various steps and modules of the methods, apparatuses, and systems described above can be implemented using hardware, software, or a combination thereof. If implemented in hardware, the various illustrative steps, modules, and circuits described in conjunction with the present disclosure can be implemented or executed using a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic components, hardware components, or any combination thereof. The general-purpose processor can be a processor, a microprocessor, a controller, a microcontroller, or a state machine, etc. If implemented in software, the various illustrative steps and modules described in conjunction with the present disclosure can be stored on or transmitted as one or more instructions or codes on a computer-readable medium. The software modules for implementing the various operations of the present disclosure can reside in a storage medium such as RAM, flash memory, ROM, EPROM, EEPROM, registers, a hard disk, a removable disk, a CD-ROM, cloud storage, etc. The storage medium can be coupled to the processor so that the processor can read from / write to the storage medium and execute the corresponding program modules to implement the various steps of the present disclosure. Moreover, the software-based embodiments can be uploaded, downloaded, or remotely accessed through appropriate communication means. Such appropriate communication means include, for example, the Internet, the World Wide Web, an intranet, a software application, a cable (including an optical fiber cable), magnetic communication, electromagnetic communication (including RF, microwave, and infrared communication), electronic communication, or other such communication means.

[0041] The numerical values given in the embodiments are only examples and do not limit the scope of the present invention. In addition, as a whole technical solution, there are other components or steps not enumerated in the claims or the specification of the present invention. Moreover, a single name of a component does not exclude other names of the component.

[0042] It should also be noted that these embodiments may be described as processes depicted as flowcharts, flow diagrams, structural diagrams, or block diagrams. Although a flowchart may describe the operations as a sequential process, many of these operations can be performed in parallel or concurrently. Additionally, the order of these operations may be rearranged.

[0043] The disclosed methods, apparatuses, and systems should not be limited in any way. On the contrary, the present disclosure encompasses all novel and non-obvious features and aspects of the various disclosed embodiments (individually and in various combinations and sub-combinations with each other). The disclosed methods, apparatuses, and systems are not limited to any specific aspect or feature or their combination, and no particular advantage or solution to a specific or all technical problems is required for any of the disclosed embodiments.

[0044] The present invention is not limited to the above specific embodiments. The above specific embodiments are merely illustrative and not restrictive. Under the inspiration of the present invention, those of ordinary skill in the art can also make many forms without departing from the spirit of the present invention and the scope protected by the claims. All of these fall within the protection scope of the present invention.

Claims

1. A three-phase AC solid-state power controller SSPC cooperation method based on a three-winding pulse transformer, characterized in that Including: Connect the three windings of the three-winding pulse transformer to the processor ports of the three-phase SSPC channels respectively, where the like-named ends of each winding are connected to the positive power supply of the processor of the corresponding SSPC channel, and the unlike-named ends are grounded through MOS transistors; When a certain phase of the SSPC channel detects a tripping condition, its processor output port outputs a low-level signal to drive the MOS transistor to conduct, so that the current of the corresponding winding changes suddenly to generate an exciting pulse; Through the electromagnetic induction of the three-winding pulse transformer, the exciting pulse is coupled to the other two-phase windings, and a falling-edge pulse signal is formed at the processor input ports of the other two-phase SSPC channels; The falling-edge pulse signal triggers the interrupt programs of the other two-phase SSPC channels to perform synchronous tripping operations.

2. The method according to claim 1, wherein The turns ratio of the three-winding pulse transformer is 1:1:1, and the method further includes: when a certain phase of the SSPC channel detects an interrupt signal, immediately execute the tripping program.

3. The method according to claim 1, wherein, Further including: A first resistor is connected in series between the gate of the MOS transistor and the processor output port to suppress the oscillation caused by the parasitic capacitance.

4. The method according to claim 1, wherein Further including: A Schottky diode is provided between the unlike-named end and the positive power supply of the processor to absorb the induced electromotive force.

5. The method according to claim 1, wherein The drain of the MOS transistor is connected to the unlike-named end, the source of the MOS transistor is grounded, and the method further includes: a second resistor is provided between the gate and the source of the MOS transistor to ensure the reliable on-off of the MOS transistor.

6. A three-phase AC solid-state power controller SSPC, characterized in that, Including: A three-winding pulse transformer, which includes three independent windings, and each winding has a like-named end and an unlike-named end; And A three-phase SSPC channel module, and each SSPC channel module includes: A processor, which is provided with a positive power supply end, an input port and an output port; and A MOS transistor, whose drain is connected to the unlike-named end of the corresponding winding, the source is grounded, and the gate is connected to the output port of the processor; Wherein the like-named ends of each winding are connected to the positive power supply of the processor of the corresponding SSPC channel module, and the unlike-named ends of the windings are also connected to the input ports of the processors of the corresponding SSPC channel modules, and Wherein the processor is configured to: when the corresponding SSPC channel detects a tripping condition, its processor output port outputs a low-level signal to drive the MOS transistor to conduct, so that the current of the corresponding winding changes suddenly to generate an exciting pulse; through the electromagnetic induction of the three-winding pulse transformer, the exciting pulse is coupled to the other two-phase windings, and a falling-edge pulse signal is formed at the processor input ports of the other two-phase SSPC channels; the falling-edge pulse signal triggers the interrupt programs of the other two-phase SSPC channels to perform synchronous tripping operations.

7. The three-phase AC SSPC according to claim 6, wherein The turns ratio of the three-winding pulse transformer is 1:1:1, and the processor is further configured to: when the corresponding SSPC channel detects an interrupt signal, immediately execute the tripping program.

8. The three-phase AC SSPC according to claim 6, wherein A first resistor is connected in series between the gate of the MOS transistor and the output port of the processor to suppress the oscillation caused by the parasitic capacitance.

9. The three-phase AC SSPC according to claim 6, wherein A Schottky diode is provided between the non-homonymous terminal and the positive power supply terminal of the processor for absorbing the induced electromotive force.

10. The three-phase AC SSPC according to claim 6, characterized in that, A second resistor is provided between the gate and the source of the MOS transistor for ensuring reliable on / off of the MOS transistor.

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