Pixel circuit, image sensor, phase focusing method, camera module and equipment

Abstract

The invention discloses a pixel circuit, an image sensor, a phase focusing method, a camera module and equipment, and belongs to the technical field of camera equipment. The pixel circuit comprises at least four photosensitive elements, a first switch module, a first electric energy storage module, a first signal output module, a second switch module, a second electric energy storage module and a second signal output module, the first poles of the at least three photosensitive elements are electrically connected with the first end of the first electric energy storage module through the first switch module; the first signal output module is electrically connected with the first signal output end and the first end of the first electric energy storage module; the second pole of the photosensitive element is electrically connected with the first end of the second electric energy storage module through the second switch module, and the second switch module is used for controlling connection or disconnection between the second pole of the photosensitive element and the first end of the second electric energy storage module; the second signal output module is electrically connected with the second signal output end and the first end of the second electric energy storage module.

Description

Technical Field

[0001] The present application belongs to the technical field of camera equipment, and specifically relates to a pixel circuit, an image sensor, a phase focusing method, a camera module and equipment. Background Art

[0002] The premise of a camera taking pictures is to have clear focus, so that you can take clear images with accurate colors. Therefore, the speed and accuracy of focusing are very important. The current mainstream focusing technology is Phase Detection Auto Focus (PDAF).

[0003] There are three main types of phase focusing: semi-shielded phase focusing technology, 2PD (also known as dual PD) and QPD. Among them, semi-shielded phase focusing technology and 2PD can only detect the phase signal in the horizontal direction. Although QPD focusing technology allows some pixels to support vertical phase signal detection and some pixels to support horizontal phase signal detection, the same group of pixels can only support phase signal detection in one direction.

[0004] It can be seen that in the above three phase focusing schemes, the same group of pixels can only support outputting phase information in the same direction, that is, either vertically or horizontally, and cannot support cross phase focusing and dual cross phase focusing. Summary of the invention

[0005] The purpose of the embodiments of the present application is to provide a pixel circuit, an image sensor, a phase focusing method, a camera module and a device, which can control the first switch module and the second switch module to make the first signal output terminal and the second signal output terminal output multiple electrical signals in batches after the photosensitive element receives one exposure; through these electrical signals, both the image signal and the phase information in the cross direction and the double cross direction can be obtained, so that the same group of pixels can support cross phase focusing and double cross phase focusing.

[0006] In order to solve the above technical problems, this application is implemented as follows:

[0007] In a first aspect, some embodiments of the present application provide a pixel circuit, comprising: at least four photosensitive elements, a first switch module, a first power storage module, a first signal output module, a second switch module, a second power storage module, and a second signal output module;

[0008] The first electrodes of at least three of the at least four photosensitive elements are electrically connected to the first end of the first electric energy storage module through the first switch module, and the first switch module is used to control the connection or disconnection between the first electrodes of the at least three photosensitive elements and the first end of the first electric energy storage module;

[0009] The second terminal of the first electrical energy storage module is electrically connected to the first voltage terminal, and the first electrical energy storage module is used for storing electrical energy;

[0010] The first signal output module is electrically connected to the first signal output terminal and the first terminal of the first electrical energy storage module, and is used for amplifying the voltage signal output from the first terminal of the first electrical energy storage module, and obtaining and outputting at least one output signal through the first signal output terminal;

[0011] The second pole of the photosensitive element is electrically connected to the first terminal of the second electrical energy storage module through the second switch module, and the second switch module is used for controlling the connection or disconnection between the second pole of the photosensitive element and the first terminal of the second electrical energy storage module;

[0012] The second terminal of the second electrical energy storage module is electrically connected to the second voltage terminal, and the second electrical energy storage module is used for storing electrical energy;

[0013] The second signal output module is electrically connected to the second signal output terminal and the first terminal of the second electrical energy storage module, and is used for amplifying the voltage signal output from the first terminal of the second electrical energy storage module, and obtaining and outputting at least one output signal through the second signal output terminal.

[0014] In a second aspect, some embodiments of the present application provide an image sensor, including the pixel circuit as described in the first aspect.

[0015] In a third aspect, some embodiments of the present application provide a camera module, including the pixel circuit as described in the first aspect, or the image sensor as described in the second aspect.

[0016] In a fourth aspect, some embodiments of the present application provide an electronic device, including the camera module as described in the third aspect.

[0017] Some embodiments of the present application provide a phase focusing method, which is executed by the electronic device in the fourth aspect. The method includes:

[0018] After the image sensor is exposed, by controlling the working state of the first switch module, at least one electrical signal read by the first signal output module is obtained;

[0019] By controlling the working state of the second switch module, at least one electrical signal read by the second signal output module is obtained;

[0020] According to at least one electrical signal read by the first signal output module and at least one electrical signal read by the second signal output module, a phase signal is obtained, and the type of the phase signal includes at least one of the following: horizontal phase signal, vertical phase signal, oblique phase signal;

[0021] Determine the focusing state of the camera module according to the phase signal, where the focusing state includes in-focus and out-of-focus.

[0022] In the embodiments of the present application, the pixel circuit includes: at least four photosensitive elements, a first switch module, a first electric energy storage module, a first signal output module, a second switch module, a second electric energy storage module, and a second signal output module; the first poles of at least three of the at least four photosensitive elements are electrically connected to the first end of the first electric energy storage module through the first switch module, and the first switch module is used to control the connection or disconnection between the first poles of the at least three photosensitive elements and the first end of the first electric energy storage module; the second end of the first electric energy storage module is electrically connected to a first voltage terminal, and the first electric energy storage module is used to store electric energy; the first signal output module is electrically connected to a first signal output terminal and the first end of the first electric energy storage module, and is used to amplify the voltage signal output from the first end of the first electric energy storage module, and obtain and output at least one output signal through the first signal output terminal; the second poles of the photosensitive elements are electrically connected to the first end of the second electric energy storage module through the second switch module, and the second switch module is used to control the connection or disconnection between the second poles of the photosensitive elements and the first end of the second electric energy storage module; the second end of the second electric energy storage module is electrically connected to a second voltage terminal, and the second electric energy storage module is used to store electric energy; the second signal output module is electrically connected to a second signal output terminal and the first end of the second electric energy storage module, and is used to amplify the voltage signal output from the first end of the second electric energy storage module, and obtain and output at least one output signal through the second signal output terminal. In this way, after the photosensitive elements receive one exposure, by controlling the first switch module and the second switch module, the first signal output terminal and the second signal output terminal can output multiple electrical signals in batches; through these electrical signals, both image signals and phase information in the cross direction and phase information in the double-cross direction can be obtained, enabling the same set of pixels to support cross-phase focusing and double-cross-phase focusing. Description of the Drawings

[0023] Figure 1 One of the schematic structural diagrams of the pixel circuit provided by some embodiments of the present application;

[0024] Figure 2 Another schematic structural diagram of the pixel circuit provided by some embodiments of the present application;

[0025] Figure 3 One of the schematic diagrams of the pixel array provided by some embodiments of the present application;

[0026] Figure 4 Another schematic diagram of the pixel array provided by some embodiments of the present application;

[0027] Figure 5 The third schematic diagram of the pixel array provided by some embodiments of the present application;

[0028] Figure 6 The schematic diagram of the horizontal phase signal provided by some embodiments of the present application;

[0029] Figure 7 The schematic diagram of the vertical phase signal provided by some embodiments of the present application;

[0030] Figure 8 The schematic diagram of the oblique phase signal provided by some embodiments of the present application;

[0031] Figure 9 The schematic cross-sectional view of the lens module provided by some embodiments of the present application. Detailed implementation manners

[0032] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are some, but not all, of the embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without creative efforts shall fall within the protection scope of the present application.

[0033] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, rather than to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of the present application can be implemented in an order different from those illustrated or described herein. In addition, "and / or" in the specification and claims means at least one of the connected objects, and the character " / " generally indicates that the associated objects before and after are in an "or" relationship.

[0034] The terms used in the implementation manners part of the present application are only used to explain the specific embodiments of the present application, and are not intended to limit the present application. The terms related to the embodiments of the present application will be explained below.

[0035] Cameras are generally divided into fixed-focus cameras and zoom cameras. A fixed-focus camera refers to a camera that cannot change the focal length and has only one constant focal length. For example, 50mm f1.8 is a fixed-focus camera lens with a 50mm focal length; a zoom camera refers to a camera lens that can rotate to change the focal length, such as 24 - 105mm or 18 - 200mm, etc. Those with two numbers are zoom lenses.

[0036] Focus is a photography term, which means adjusting the focus distance before taking a photo with a camera to make the taken photo clear. Its basic principle is: by moving the lens group in the camera lens back and forth, changing the position of the image distance, so that the object image exactly falls on the negative film or the photosensitive element.

[0037] For example, the principle of focusing of a mobile phone camera is to satisfy the basic formula of convex lens imaging: 1 / u + 1 / v = 1 / f, where u refers to the object distance, that is, the distance from the object to the center of the lens group, v refers to the image distance, that is, the distance from the image to the center, and f refers to the focal length.

[0038] The specific operation is to move the camera lens to change the distance between the lens and the image sensor, that is, the image distance v, so that it can satisfy the imaging formula. Satisfying the imaging formula and staying in this state means successful focusing. At this time, the image obtained by the sensor is the clearest. If the image distance v does not satisfy the imaging formula, whether it is too large or too small, it will cause the sensor to obtain a blurred image, and the greater the difference, the more blurred the image.

[0039] Next, in conjunction with the accompanying drawings, the pixel circuit provided by the embodiments of the present application will be described in detail through specific embodiments and their application scenarios.

[0040] Please refer to Figure 1 , the embodiment of the present invention provides a pixel circuit, including: a photosensitive element unit 10, a first switch module 11, a first electric energy storage module 12, a first signal output module 13, a second switch module 21, a second electric energy storage module 22, and a second signal output module 23; the photosensitive element unit 10 includes at least four photosensitive elements;

[0041] The first poles of at least three of the at least four photosensitive elements are electrically connected to the first end of the first electric energy storage module 12 through the first switch module 11, and the first switch module 11 is used to control the connection or disconnection between the first poles of at least some of the photosensitive elements and the first end of the first electric energy storage module 12;

[0042] The second end of the first electric energy storage module 12 is electrically connected to the first voltage terminal V1, and the first electric energy storage module 12 is used to store electric energy;

[0043] The first signal output module 13 is respectively electrically connected to the first signal output terminal Vout_p and the first end of the first electric energy storage module 12, and is used to amplify the voltage signal output from the first end of the first electric energy storage module 12, and obtain and output at least one output signal through the first signal output terminal;

[0044] The second pole of the photosensitive element included in the photosensitive element unit 10 is electrically connected to the first end of the second electrical energy storage module 22 through the second switch module 21, and the second switch module 21 is used to control the connection or disconnection between the second pole of the photosensitive element and the first end of the second electrical energy storage module 22;

[0045] The second end of the second electrical energy storage module 22 is electrically connected to the second voltage terminal V2, and the second electrical energy storage module 22 is used to store electrical energy;

[0046] The second signal output module 23 is electrically connected to the second signal output terminal Vout_n and the first end of the second electrical energy storage module 22 respectively, and is used to amplify the voltage signal output from the first end of the second electrical energy storage module 22, and obtain and output at least one output signal through the second signal output terminal Vout_n.

[0047] Optionally, the photosensitive element may be a photodiode, the first pole of the photosensitive element may be an anode, and the second pole of the photosensitive element may be a cathode; alternatively, the first pole of the photosensitive element may be a cathode, and the second pole of the photosensitive element may be an anode.

[0048] Optionally, the first voltage terminal V1 and the second voltage terminal V2 may be ground terminals.

[0049] Exemplarily, as Figure 2 In, the photosensitive element unit 10 includes a first photodiode PD1, a second photodiode PD2, a third photodiode PD3, and a fourth photodiode PD4 arranged in 2 rows and 2 columns. The first poles of the photodiodes are anodes, and the second poles of the photodiodes are cathodes. The anodes of PD1, PD2, and PD4 are electrically connected to the first end of the first electrical energy storage module 12 through the first switch module 11; the cathodes of PD1, PD2, PD3, and PD4 are electrically connected to the first end of the second electrical energy storage module 22 through the second switch module 21. Among them, the first electrical energy storage module 12 includes Figure 2 The first capacitor FD_p in Figure 2 The second electrical energy storage module 22 includes

[0050] In the above embodiments, by controlling the first switch module 11 and the second switch module 21, the first signal output module 13 and the second signal output module 23 can output multiple electrical signals in batches; based on the multiple electrical signals, digital signals PD1', PD2', PD3' and PD4' corresponding to PD1, PD2, PD3 and PD4 one by one can be obtained; then, PD1'+PD4' = the diagonal 45° phase signal, PD2'+PD3' = the diagonal 135° phase signal, PD1'+PD2' = the upper phase signal, PD3'+PD4' = the lower phase signal, PD1'+PD3' = the left phase signal, PD2'+PD3' = the right phase signal. In this way, 4 photosensitive elements can support cross-phase focusing and double-cross-phase focusing.

[0051] Among them, the upper phase signal can also be called the first horizontal phase signal, the lower phase signal can also be called the second horizontal phase signal, the left phase signal can also be called the first vertical phase signal, the right phase signal can also be called the second vertical phase signal, the diagonal 45° phase signal can also be called the first diagonal phase signal, and the diagonal 135° phase signal can also be called the second diagonal phase inherit.

[0052] As Figures 6 to 8 shown in the pixel array, after each exposure, each group of four-in-one pixels can obtain both the first horizontal phase signal x1 and the second horizontal phase signal x2, and can also obtain the first vertical phase signal y1 and the second vertical phase signal y2, and can also obtain the first diagonal phase signal s1 and the second diagonal phase signal s2. So that each group of four-in-one pixels can support detecting the phase difference in 4 directions: horizontal, vertical, diagonal 45°, and diagonal 135° at the same time, realizing that each group of four-in-one pixels can support phase focusing in the cross direction and can also support phase focusing in the double-cross direction.

[0053] It should be noted that cross focusing is better than one-line focusing, and more precisely, double-cross focusing. One-line focusing is the focus point shown as "-" in Figure 6 or "|" in Figure 7 , that is, only the phase difference in the horizontal or vertical direction is detected. Cross focusing is the focus of "+", and the cross-shaped phase focus point will focus according to the phase differences in the horizontal and vertical directions, and both the accuracy and reliability are improved. The double-cross phase focus point is to superimpose the first diagonal phase signal s1 and the second diagonal phase signal s2 shown in Figure 8 on the basis of the cross, which can be understood as the "rice" character focus point, that is, the superimposed use of the phase signals in Figures 6 to 8 .

[0054] It should be noted that Figure 2 the 4 photosensitive elements arranged in the array can correspond to Figure 3 and Figure 4A group of four-in-one pixels R, or a group of four-in-one pixels Gr, or a group of four-in-one pixels Gb, or a group of four-in-one pixels B. That is, four photosensitive elements correspond to a pixel area of the same color. A pixel area includes four sub-pixel areas arranged in two rows and two columns, and the four photosensitive elements correspond to the four sub-pixel areas one by one. As Figure 3 In, the area circled by the dashed box a is a group of four-in-one pixels R, and other types of four-in-one pixels are similar to the four-in-one pixels R.

[0055] As Figure 4 And Figure 5 In the pixel array shown, every four pixels of the same color cover a microlens 5, and the covered area of the microlens 5 is Figure 4 And Figure 5 The area corresponding to the elliptical dashed line in.

[0056] Taking the pixel R as an example, the phase signal output by the image sensor can be the left-right phase difference, where R1 + R3 is the left phase and R2 + R4 is the right phase. It can also be the up-down phase difference, where R1 + R2 is the up phase and R3 + R4 is the down phase. Similarly, it can also be the phase information of the upper left and lower right, or the upper right and lower left. The principles of the Gr, Gb, and B pixels are the same and will not be elaborated. Whether it is the left-right phase difference, the up-down phase difference, or the oblique phase difference, PDAF phase focusing can be performed. The difference is that the left-right phase difference has an advantage in the vertical stripe scene, while the up-down phase difference has an advantage in the horizontal stripe scene.

[0057] Taking the pixel R as an example, Figure 3 And Figure 4 The pixels R1, R2, R3, and R4 in respectively correspond to Figure 2 The first photodiode PD1, the second photodiode PD2, the third photodiode PD3, and the fourth photodiode PD4 in.

[0058] In some embodiments, the pixel circuit includes N rows and M columns of the photosensitive elements and N rows and M columns of switch elements; N and M are positive integers;

[0059] The first pole of the photosensitive element in the nth row and the mth column is electrically connected to the third voltage terminal through the switch element in the nth row and the mth column;

[0060] The control terminal of the switch element in the nth row and the mth column is electrically connected to the control terminal in the nth row and the mth column, and is used to control the connection or disconnection between the first pole of the photosensitive element in the nth row and the mth column and the third voltage terminal under the control of the control signal in the nth row and the mth column output by the control terminal of the switch in the nth row and the mth column.

[0061] Optionally, the values of N and M are 2.

[0062] As Figure 2As shown, PD1 is the photosensitive element in the first row and the first column, PD2 is the photosensitive element in the first row and the second column, PD3 is the photosensitive element in the second row and the first column, and PD4 is the photosensitive element in the second row and the second column; the switching element in the first row and the first column is the first transistor TG1_p, the switching element in the first row and the second column is the second transistor TG2_p, the switching element in the second row and the first column is the third transistor TG3_p, and the switching element in the second row and the second column is the fourth transistor TG4_p; the anodes of PD1, PD2, PD3, and PD4 are electrically connected to the third voltage terminal through TG1_p, TG2_p, TG3_p, and TG4_p respectively, and the third voltage terminal is the ground terminal or a low voltage terminal.

[0063] Among them, before the pixel starts to be exposed, the first switching module, the second switching module, and TG1_p to TG4_p need to be closed to clear the residual electrons in PD1 to PD4, the first electric energy storage module, and the second electric energy storage module; after clearing the electrons, the first switching module, the second switching module, and TG1_p to TG4_p need to remain open, and the pixel starts to be exposed. The electron-hole pairs generated by the light irradiation will be separated due to the existence of the electric field of the photodiode. The electrons move to the n region, that is, the cathode side of the photodiode, and the holes move to the p region, that is, the anode side of the photodiode.

[0064] In some embodiments, the first switching module 11 includes M first switching transistors; the gate of the m-th first switching transistor is electrically connected to the m-th first switching control terminal, the first pole of the m-th first switching transistor is electrically connected to the first pole of at least one photosensitive element located in the m-th column, and the second pole of the m-th first switching transistor is electrically connected to the first end of the first electric energy storage module; M is an integer greater than 1; m is a positive integer less than or equal to P.

[0065] Exemplarily, as Figure 2 shown, the pixel circuit includes PD1 to PD4, PD1 - PD4 are arranged in two rows and two columns. PD1 is the photodiode in the first row and the first column, PD2 is the photodiode in the first row and the second column, PD3 is the photodiode in the second row and the first column, and PD4 is the photodiode in the second row and the second column; the first switching module 11 includes the first first switching transistor TG3 and the second first switching transistor TG4. TG3 is located in the first column, and TG4 is located in the second column.

[0066] Among them, the drain of TG3 is electrically connected to the anodes of PD1 and PD3 located in the first column respectively. The source of TG3 is electrically connected to the first end of the first electrical energy storage module 12. The gate of TG3 is electrically connected to the first first-switch control terminal (not shown in the figure). The drain of TG4 is electrically connected to the anode of PD4 located in the second column. The source of TG4 is electrically connected to the first end of the first electrical energy storage module 12. The gate of TG4 is electrically connected to the second first-switch control terminal (not shown in the figure).

[0067] It can be understood that Figure 2 the circuit shown is only an example, and there can be various deformations in specific implementation.

[0068] For example, the drain of TG3 is electrically connected to the anode of PD1 or PD3 located in the first column. The source of TG3 is electrically connected to the first end of the first electrical energy storage module 12. The gate of TG3 is electrically connected to the first first-switch control terminal (not shown in the figure). The drain of TG4 is electrically connected to the anodes of PD3 and PD4 located in the second column. The source of TG4 is electrically connected to the first end of the first electrical energy storage module 12. The gate of TG4 is electrically connected to the second first-switch control terminal.

[0069] For another example, the drain of TG3 is electrically connected to the anodes of PD1 and PD3 located in the first column. The source of TG3 is electrically connected to the first end of the first electrical energy storage module 12. The gate of TG3 is electrically connected to the first first-switch control terminal. The drain of TG4 is electrically connected to the anode of PD3 located in the second column. The source of TG4 is electrically connected to the first end of the first electrical energy storage module 12. The gate of TG4 is electrically connected to the second first-switch control terminal.

[0070] In some other embodiments, the first switch module 11 may include switch transistors independently provided for each photosensitive element, so that the first pole of each photosensitive element can be electrically connected to the first end of the first electrical energy storage module through an independent switch transistor, thereby independently controlling the charge transfer in each photosensitive element.

[0071] For example, the pixel circuit includes a first photodiode PD1, a second photodiode PD, a third photodiode PD3, and a fourth photodiode PD4 arranged in 2 rows and 2 columns. The first switch module 11 includes a first first-switch transistor, a second first-switch transistor, a third first-switch transistor, and a fourth first-switch transistor corresponding to PD1, PD2, PD3, and PD4 one by one. The first first-switch transistor connects the anode of PD1 to the first end of the first electrical energy storage module. The second first-switch transistor connects the anode of PD2 to the first end of the first electrical energy storage module. The third first-switch transistor connects the anode of PD3 to the first end of the first electrical energy storage module. The fourth first-switch transistor connects the anode of PD4 to the first end of the first electrical energy storage module. It can be understood that, compared with Figure 2 the example in which at least some photosensitive elements in the same column share one switch transistor as shown, separately providing a switch transistor for the anode of each photodiode will increase the number of charge transfer operations.

[0072] In some embodiments, the second switch module 21 includes N second switch transistors; the gate of the nth second switch transistor is electrically connected to the nth second switch control terminal. The first pole of the nth second switch transistor is electrically connected to the second pole of the photosensitive element located in the nth row. The second pole of the nth second switch transistor is electrically connected to the first end of the second electrical energy storage module; N is an integer greater than 1, and n is a positive integer less than or equal to N.

[0073] Exemplarily, as Figure 2 shown, the pixel circuit includes a first photodiode PD1, a second photodiode PD2, a third photodiode PD3, and a fourth photodiode PD4 arranged in 2 rows and 2 columns. The second switch module 21 includes a first second switch transistor TG1 and a second second switch transistor TG2. TG1 is located in the first row, and TG2 is located in the second row.

[0074] Among them, the source of TG1 is electrically connected to the cathodes of PD1 and PD2 located in the first row respectively. The drain of TG1 is electrically connected to the first end of the second electrical energy storage module 22. The gate of TG1 is electrically connected to the first second switch control terminal (not shown in the figure); the source of TG2 is electrically connected to the cathodes of PD3 and PD3 located in the second row. The drain of TG2 is electrically connected to the first end of the second electrical energy storage module 22. The gate of TG2 is electrically connected to the second second switch control terminal (not shown in the figure).

[0075] It can be understood that Figure 2 the circuit shown is only one example, and there can be various deformations in specific implementation.

[0076] For example, the drain of TG3 is electrically connected to the anodes of PD1 and PD3 located in the first column, the source of TG3 is electrically connected to the first end of the first electrical energy storage module 12, and the gate of TG3 is electrically connected to the first first switch control terminal (not shown in the figure); the drain of TG4 is respectively electrically connected to the anodes of PD3 and PD4 located in the second column, the source of TG4 is electrically connected to the first end of the first electrical energy storage module 12, and the gate of TG4 is electrically connected to the second first switch control terminal. At the same time, the source of TG1 is respectively electrically connected to the cathodes of PD1 and PD2 located in the first row, the drain of TG1 is electrically connected to the first end of the second electrical energy storage module 22, and the gate of TG1 is electrically connected to the second second switch control terminal (not shown in the figure); the source of TG2 is electrically connected to the cathode of PD3 or PD4 located in the second row, the drain of TG2 is electrically connected to the first end of the second electrical energy storage module 22, and the gate of TG2 is electrically connected to the second second switch control terminal (not shown in the figure).

[0077] In some other embodiments, the second switch module 21 may include switching transistors independently provided for each photosensitive element, so that the second pole of each photosensitive element can be electrically connected to the first end of the second electrical energy storage module 22 through an independent switching transistor, thereby independently controlling the charge transfer in each photosensitive element.

[0078] For example, the pixel circuit includes a first photodiode PD1, a second photodiode PD2, a third photodiode PD3, and a fourth photodiode PD4 arranged in 2 rows and 2 columns. The second switch module 21 includes a first second switching transistor, a second second switching transistor, a third second switching transistor, and a fourth second switching transistor corresponding to PD1, PD2, PD3, and PD4 respectively. The first second switching transistor connects the cathode of PD1 to the first end of the second electrical energy storage module 22, the second second switching transistor connects the cathode of PD2 to the first end of the second electrical energy storage module 22, the third second switching transistor connects the cathode of PD3 to the first end of the second electrical energy storage module 22, and the fourth second switching transistor connects the cathode of PD4 to the first end of the second electrical energy storage module 22. It can be understood that, compared with Figure 2 the example in which the photosensitive elements in the same row share one switching transistor as shown, separately providing a switching transistor for the cathode of each PD will increase the number of charge transfer operations.

[0079] In some embodiments, a first reset circuit 14 and a second reset circuit 24 are further included;

[0080] The first reset circuit 14 is electrically connected to the first reset control terminal, the first power supply voltage terminal, and the first end of the first electrical energy storage module 12 respectively, and is configured to control the connection between the first power supply voltage terminal and the first end of the first electrical energy storage module 12 under the control of a first reset control signal output by the first reset control terminal;

[0081] The second reset circuit 24 is electrically connected to the second reset control terminal, the second power supply voltage terminal, and the first end of the second electrical energy storage module 22 respectively, and is configured to control the connection between the second power supply voltage terminal and the first end of the second electrical energy storage module 22 under the control of a second reset control signal output by the second reset control terminal.

[0082] Wherein, before the pixel starts to be exposed, the first reset circuit 14, the second reset circuit 24, the first switch module, the second switch module, and TG1_p to TG4_p need to be closed to clear the residual electrons in PD1 to PD4, the first electrical energy storage module, and the second electrical energy storage module; after clearing, the first reset circuit 14, the second reset circuit 24, the first switch module, the second switch module, and TG1_p to TG4_p need to be kept open, and the pixel starts to be exposed. The electron-hole pairs generated by light irradiation will be separated due to the existence of the electric field of the photodiode. The electrons move to the n region, that is, the cathode side of the photodiode, and the holes move to the p region, that is, the anode side of the photodiode.

[0083] In some embodiments, the first reset circuit 14 includes a first reset transistor; the control electrode of the first reset transistor is electrically connected to the first reset control terminal, the first electrode of the first reset transistor is electrically connected to the first power supply voltage terminal, and the second electrode of the first reset transistor is electrically connected to the first end of the first electrical energy storage module 12;

[0084] The second reset circuit 24 includes a second reset transistor; the control electrode of the second reset transistor is electrically connected to the second reset control terminal, the first electrode of the second reset transistor is electrically connected to the second power supply voltage terminal, and the second electrode of the second reset transistor is electrically connected to the first end of the second electrical energy storage module 22.

[0085] In at least some embodiments of the present application, each transistor can be a MOS transistor or a TFT; the control electrode can be a gate, the first electrode of each transistor can be a source electrode, the second electrode of each transistor can be a drain electrode, or the control electrode can be a gate, the first electrode of each transistor can be a drain electrode, and the second electrode of each transistor can be a source electrode; or, each transistor can be a triode; the control electrode can be a base, the first electrode of each transistor can be an emitter, the second electrode of each transistor can be a collector, or the control electrode can be a base, the first electrode of each transistor can be a collector, and the second electrode of each transistor can be an emitter.

[0086] Exemplarily, such asFigure 2 In this case, the first reset circuit 14 includes a first reset transistor RST2; the gate of the first reset transistor RST2 is electrically connected to a first reset control terminal (not shown in the figure), the drain of the first reset transistor RST2 is electrically connected to the power supply voltage terminal VDD, and the source of the first reset transistor RST2 is electrically connected to the first end of the first electrical energy storage module 12; the second reset circuit 24 includes a second reset transistor RST1; the gate of the second reset transistor RST1 is electrically connected to a second reset control terminal (not shown in the figure), the drain of the second reset transistor RST1 is electrically connected to the power supply voltage terminal VDD, and the source of the second reset transistor RST1 is electrically connected to the first end of the second electrical energy storage module 22.

[0087] In Figure 2 In at least one of the illustrated embodiments, each transistor is a MOS transistor, and both the first power supply voltage terminal and the second power supply voltage terminal are the power supply voltage terminal VDD.

[0088] In some embodiments, the first signal output module 13 includes a first signal amplification transistor SF_p and a first output transistor SET_p;

[0089] The control electrode of the first signal amplification transistor SF_p is electrically connected to the first end of the first electrical energy storage module, the first pole of the first signal amplification transistor SF_p is electrically connected to the third power supply voltage terminal, and the second pole of the first signal amplification transistor SF_p is electrically connected to the first pole of the first output transistor SET_p; the control electrode of the first output transistor SET_p is electrically connected to the first output control terminal, and the second pole of the first output transistor SET_p is electrically connected to the first signal output terminal Vout_p;

[0090] The second signal output module 23 includes a second signal amplification transistor SF_n and a second output transistor SET_n; the control electrode of the second signal amplification transistor SF_n is electrically connected to the first end of the second electrical energy storage module, the first pole of the second signal amplification transistor SF_n is electrically connected to the fourth power supply voltage terminal, and the second pole of the second signal amplification transistor SF_n is electrically connected to the first pole of the second output transistor SET_n; the control electrode of the second output transistor SET_n is electrically connected to the second output control terminal, and the second pole of the second output transistor SET_n is electrically connected to the second signal output terminal Vout_n.

[0091] Exemplarily, as Figure 2 In this case, the first signal output module 13 includes a first signal amplification transistor SF_p and a first output transistor SET_p; the second signal output module 23 includes a second signal amplification transistor SF_n and a second output transistor SET_n.

[0092] As Figure 2As shown, the first power storage module 12 includes a first capacitor FD_p, and the second power storage module 22 includes a second capacitor FD_n.

[0093] In Figure 2 , Digital_out1 is the first digital output terminal, and Digital_out2 is the second digital output terminal. An embodiment of the present application also provides an image sensor including the pixel circuit as described above.

[0094] Optionally, the image sensor further includes: a plurality of pixel regions arranged in an array, each pixel region corresponding to the same color; wherein, one of the pixel circuits is correspondingly provided for each of the pixel regions. As Figure 3 , which shows a schematic diagram of a four-in-one pixel array.

[0095] In some embodiments, as Figure 2 shown, the image sensor further includes a first analog-to-digital conversion circuit ADC1, a second analog-to-digital conversion circuit ADC2, and a signal processing circuit ISP;

[0096] The first analog-to-digital conversion circuit ADC1 is electrically connected to the first signal output terminal Vout_p, and is configured to perform analog-to-digital conversion on at least one electrical signal output by the first signal output terminal Vout_p to obtain at least one digital signal, and transmit the at least one digital signal to the signal processing circuit;

[0097] The second analog-to-digital conversion circuit ADC2 is electrically connected to the second signal output terminal Vout_n, and is configured to perform analog-to-digital conversion on at least one electrical signal output by the second signal output terminal Vout_n to obtain at least one digital signal, and transmit the at least one digital signal to the signal processing circuit;

[0098] The signal processing circuit is configured to obtain a phase signal according to the digital signal, and the type of the phase signal includes at least one of the following: a horizontal phase signal, a vertical phase signal, and an oblique phase signal.

[0099] Among them, the signal processing circuit transmits the digital signal to the backend main control chip AP through MIPI for processing.

[0100] In the above embodiments, after receiving light, the image sensor generates an electrical signal based on the photoelectric effect. When light irradiates the photosensitive element in the image sensor, the photosensitive element generates a current or voltage change proportional to the light intensity. This initial electrical signal is a continuously varying analog signal. To facilitate processing and analysis by the camera's processor, the analog phase signal needs to be converted into a digital signal by an analog-to-digital converter (ADC). The analog-to-digital conversion process discretizes the continuous analog signal and converts it into a series of discrete values represented by binary digits. In this way, the signal exists in digital form. The converted digital signal is transmitted to the signal processing circuit of the camera, and the signal processing circuit can use various digital algorithms to analyze and calculate it to determine the image signal and the phase signal, determine the focusing direction and distance through the phase signal, and then control the movement of the lens to achieve accurate focusing.

[0101] Taking Figure 2 the pixel circuit shown as an example, the working principle of obtaining the image signal and the phase signal is as follows:

[0102] The operation steps before the pixel starts exposure include: closing Figure 2 RST1, RST2, TG1, TG2, TG3, TG4, and TG1~TG4_p in it to empty the residual electrons in PD1~PD4, FDn, and FDp. After emptying, RST1, RST2, TG1, TG2, TG3, TG4, and TG1~TG4_p all remain open, and the pixel starts to expose. The electron-hole pairs generated by light irradiation will be separated due to the existence of the PD electric field. Electrons move to the n region, and holes move to the p region.

[0103] The operation steps of charge transfer can include:

[0104] Step 1: Process the negative voltage signals of PD1~PD4 to obtain the upper phase and image signals.

[0105] Among them, Step 1 can specifically include:

[0106] Step 1.1: First, close TG1 to completely transfer the electrons in the photosensitive elements PD1 and PD2 to FD_n for reading. The mechanism here is similar to the charge transfer in CCD. At this time, the voltage of FD_n drops due to the charge injection from PD1 and PD2. Then activate SF_n to follow the voltage signal of FD_n to the SF_n amplifier. At this time, the charge in FD_n still exists and is output to ADC1 through the selector SEL_n. ADC1 obtains the sum signal of PD1 and PD2, performs analog-to-digital conversion, and sends it to the image signal processor ISP for processing to obtain the first digital signal A, which is the upper phase signal, also known as the first horizontal phase signal.

[0107] Step 1.2: Then close TG2 to completely transfer the charges from the electrons in photosensitive elements PD3 and PD4 to FD_n. At this time, FD_n contains all the optoelectronic signals of PD1 - PD4. Then activate SF_n to follow the electrical signal of FD_n to the SF_n amplifier and output it to the ADC through the SEL_n selector. The ADC obtains the sum signal of PD1 - PD4, performs analog-to-digital conversion, and sends it to the ISP for processing to obtain the second digital signal C, which is the image signal. Then, C - A = B is the lower-phase signal, also known as the second horizontal-phase signal.

[0108] Step 2: Process the positive voltage signals of PD1 - PD4 to obtain the left and right phase signals and the diagonal phase signal, which can also be called the first vertical-phase signal and the second vertical-phase signal.

[0109] Step 2 can specifically include:

[0110] Step 2.1: Keep TG1p - TG4p disconnected;

[0111] Step 2.2: First, close TG3 to completely transfer the holes in photosensitive elements PD1 and PD3 to FD_p for reading. The mechanism here is similar to the charge transfer in a CCD. At this time, the voltage of FD_p increases due to the injection of holes from PD1 and PD3. Then activate SF_p to transmit the electrical signal of FD_p to the SF_p amplifier and output it to the ADC2 through the SEL_p selector. The ADC2 obtains the sum signal of PD1 and PD3, performs analog-to-digital conversion, and sends it to the ISP for processing to obtain the third digital signal O, which is the left-phase signal, i.e., the first vertical-phase signal.

[0112] Step 2.3: Then close TG4 to completely transfer the holes in photosensitive element PD4 to FD_p. At this time, FD_p contains all the optoelectronic signals of PD1, PD3, and PD4. Then activate SF_p to transmit the electrical signal of FD_p to the SF_p amplifier and output it to the ADC2 through the SEL_p selector. The ADC2 obtains the sum signal of PD1, PD3, and PD4, performs analog-to-digital conversion, and sends it to the ISP for processing. This signal is denoted as P.

[0113] Through the above operation steps, the following data can be obtained:

[0114] A = the first digital signal corresponding to the sum electrical signal of "PD1 + PD2";

[0115] C = the second digital signal corresponding to the sum electrical signal of "PD1 + PD2 + PD3 + PD4";

[0116] O = the third digital signal corresponding to the sum electrical signal of "PD1 + PD3";

[0117] The fourth digital signal corresponding to the sum electrical signal of P = "PD1 + PD3 + PD4".

[0118] Subtracting the third digital signal O from the second digital signal C can obtain the right-phase signal Q, also known as the second vertical phase signal. That is, Q = C - O, and Q is the digital signal corresponding to the sum signal of "PD2 + PD4".

[0119] Step 3: Obtain the oblique phase signal.

[0120] Specifically, step 3 may include:

[0121] Step 3.1: First, according to the first digital signal A, the second digital signal C, the third digital signal O, and the fourth digital signal P, the fifth digital signal, the sixth digital signal, the seventh digital signal, and the eighth digital signal can be calculated; among them, the fifth digital signal is the digital value corresponding to the optoelectronic signal output by the first photosensitive element located in the first row and the first column, the sixth digital signal is the digital value corresponding to the optoelectronic signal output by the second photosensitive element located in the first row and the second column, the seventh digital signal is the digital value corresponding to the optoelectronic signal output by the third photosensitive element located in the second row and the first column, and the eighth digital signal is the digital value corresponding to the optoelectronic signal output by the fourth photosensitive element located in the second row and the second column.

[0122] In specific implementation, according to the first digital signal A, the second digital signal C, the third digital signal O, and the fourth digital signal P, calculating the fifth digital signal, the sixth digital signal, the seventh digital signal, and the eighth digital signal may include:

[0123] The digital signal corresponding to the electrical signal in PD2 = the second digital signal C - the fourth digital signal P;

[0124] The electrical signal corresponding to the electrical signal in PD1 = the first digital signal A - the digital signal corresponding to the electrical signal in PD2;

[0125] The electrical signal corresponding to the electrical signal in PD3 = the third digital signal O - the electrical signal corresponding to the electrical signal in PD1;

[0126] The electrical signal corresponding to the electrical signal in PD4 = the fourth digital signal P - the third digital signal O.

[0127] Step 3.2: Then, according to the fifth digital signal, the sixth digital signal, the seventh digital signal, and the eighth digital signal, the oblique phase signal can be obtained.

[0128] Among them, the first oblique phase signal, that is, the 45° oblique phase signal = the digital signal corresponding to the sum electrical signal output by "PD1 + PD4";

[0129] The second diagonal phase signal, i.e., the diagonal 135° phase signal = the digital signal corresponding to the sum electrical signal output by "PD2 + PD3".

[0130] It can be understood that the horizontal phase signal and the vertical phase signal can also be obtained according to the fifth digital signal, the sixth digital signal, the seventh digital signal, and the eighth digital signal.

[0131] Among them, the first horizontal phase signal is the sum of the fifth digital signal and the sixth digital signal, i.e., the digital signal corresponding to the sum electrical signal output by "PD1 + PD2";

[0132] The second horizontal phase signal is the sum of the seventh digital signal and the eighth digital signal, i.e., the digital signal corresponding to the sum electrical signal output by "PD3 + PD4";

[0133] The first vertical phase signal is the sum of the fifth digital signal and the seventh digital signal, i.e., the digital signal corresponding to the sum electrical signal output by "PD1 + PD3";

[0134] The second vertical phase signal is the sum of the sixth digital signal and the eighth digital signal, i.e., the digital signal corresponding to the sum electrical signal output by "PD2 + PD4".

[0135] As can be seen from the above, based on Figure 2 the example shown, through one exposure and controlling the on / off of the first switch module 11 and the second switch module 21, the image signal, the first vertical phase signal, the second vertical phase signal, the first horizontal phase signal, the second horizontal phase signal, the diagonal 45° phase signal, and the diagonal 135° phase signal can be obtained. In this way, the same group of pixels can support cross focusing and double cross focusing, greatly improving the focusing ability of the camera.

[0136] The embodiment of the present application further provides an imaging module, including the pixel circuit as described above, or the image sensor as described above.

[0137] As Figure 9 shown in, it shows a cross-sectional schematic diagram of an imaging module. Figure 9 In, the lens module 91 is used for light collection and focusing. The lens module 91 is fixed by being wrapped by the voice coil motor 92. The upper and lower ends of the voice coil motor 92 are connected to the elastic pieces on the base 93. During focusing, by energizing, the voice coil motor 92 generates an electromagnetic force, and this force finally balances with the elastic force of the elastic piece. The position of the voice coil motor 92 can be controlled by the magnitude of the energization. Based on this principle, after determining the appropriate focus point according to the phase signal, by pushing the lens module 91 to the appropriate focusing position through the voice coil motor 92, the focusing action can be completed.

[0138] It should be noted that the scene light converging into the camera module is projected onto the IR filter. The function of the IR filter is to filter out unnecessary light projected onto the image sensor 94, prevent the image sensor 94 from generating false colors / ripples, and improve its effective resolution and color reproducibility. The light passing through the IR filter can then be sensed by the image sensor 93; after the light reaches the image sensor 94, it enters the pixel area through the microlens and color filter 95. Among them, the camera module also includes electronic components 96.

[0139] An embodiment of the present application further provides an electronic device, including the camera module as described above.

[0140] By setting a camera module with a pixel circuit as Figures 1 to 2 shown, the pixel circuit can output two types of photoelectric signals, positive and negative. The image sensor only needs to be exposed once, and through this pixel circuit, the required positive and negative pixel signals can be output. Through these pixel signals, both the image signal and the phase information in the mixed direction can be obtained, enabling the electronic device to support both cross-phase focusing and double-cross-phase focusing simultaneously, improving the shooting performance of the electronic device, significantly enhancing the phase focusing ability of the camera module, and enhancing the user's experience of focusing and capturing.

[0141] An embodiment of the present application further provides a phase focusing method, which is executed by the above-mentioned electronic device. The method includes:

[0142] After the image sensor is exposed, by controlling the working state of the first switch module, at least one electrical signal read by the first signal output module is obtained;

[0143] By controlling the working state of the second switch module, at least one electrical signal read by the second signal output module is obtained;

[0144] According to at least one electrical signal read by the first signal output module and at least one electrical signal read by the second signal output module, a phase signal is obtained. The types of the phase signal include at least one of the following: horizontal phase signal, vertical phase signal, and oblique phase signal;

[0145] According to the phase signal, the focusing state of the camera module is determined, and the focusing state includes in-focus and out-of-focus.

[0146] Among them, when the first switch module is in different working states, it is respectively used to transfer the holes in different photosensitive elements to the first electric energy storage module 12. When the second switch module is in different working states, it is respectively used to transfer the electrons in different photosensitive elements to the second electric energy storage module 22.

[0147] It should be noted that in a photography and imaging system, the exposure process of an image sensor is to let light shine on the sensor surface so that the image information carried by the light is captured by the photosensitive element. Controlling the exposure of the image sensor can precisely control how much light and for how long it shines on the image sensor, and the photosensitive element converts the optical signal into an electrical signal.

[0148] In the above embodiment, after the image sensor is exposed and after conduction between the photosensitive element and the electrical energy storage module, by activating the signal amplification transistor SF in the signal output module, multiple electrical signals provided by the signal output module can be obtained; further, the electrical signals will be respectively converted into digital signals by the ADC; the converted digital signals are transmitted to the signal processing circuit, and the signal processing circuit can use various digital algorithms to analyze and calculate them to determine the image signal and the phase signal. The phase signal is transmitted to the ISP through the MIPI interface for PDAF algorithm processing, and the focusing state of the camera module is judged according to the phase signal; if the focusing state of the camera module is in focus, an image is generated; if the focusing state of the camera module is out of focus, the best focus point is determined according to the phase signal and output to the camera module, and the movement of the lens is controlled by the motor in the camera module to achieve accurate focusing.

[0149] It should be noted that the above digital signals are also transmitted to the back-end main control chip AP through MIPI for processing such as demosaicing, noise reduction, and color enhancement, and finally compressed into JPG format pictures and stored in the picture library.

[0150] In some embodiments, each of the pixel circuits includes 2 rows and 2 columns of the photosensitive elements, and the first switch module includes two first switch transistors;

[0151] Obtaining at least one electrical signal read by the first signal output module by controlling the working state of the first switch module includes:

[0152] When controlling one of the two first switch transistors to be conductive and the other to be non-conductive, obtaining the first electrical signal read by the first signal output module;

[0153] When controlling both of the two first switch transistors to be conductive, obtaining the second electrical signal read by the first signal output module; wherein, when the first of the first switch transistors is in the conductive state, the first poles of the two photosensitive elements in the first column are respectively conducted with the input end of the first electrical energy storage module;

[0154] When the second of the first switch transistors is in the conductive state, the first pole of one photosensitive element in the second column is conducted with the input end of the first electrical energy storage module.

[0155] ToFigure 2 Taking the pixel circuit shown as an example, the pixel circuit includes photodiodes PD1 to PD4 arranged in 2 rows and 2 columns. The first switch module 11 includes two first switch transistors TG3 and TG4. TG3 is located in the first column and TG4 is located in the second column. TG1p to TG4p remain open. First, close TG3 to completely transfer the holes in the photosensitive elements PD1 and PD3 to FD_p for reading. At this time, the voltage of FD_p increases due to the injection of holes from PD1 and PD3. Then, activate SF_p to transmit the electrical signal of FD_p to the SF_p amplifier and output it to ADC2 through the SEL_p selector. ADC2 obtains the sum signal of PD1 and PD3, that is, the first electrical signal.

[0156] Then, close TG4 to completely transfer the holes in the photosensitive element PD4 to FD_p. At this time, FD_p contains all the optical electrical signals of PD1, PD3, and PD4. Then, activate SF_p to transmit the electrical signal of FD_p to the SF_p amplifier and output it to ADC2 through the SEL_p selector. ADC2 obtains the sum signal of PD1, PD3, and PD4, that is, the second electrical signal.

[0157] In some embodiments, each of the pixel circuits includes the photosensitive elements arranged in 2 rows and 2 columns, and the second switch module includes two second switch transistors;

[0158] Obtaining at least one electrical signal read by the second signal output module by controlling the working state of the second switch module includes: obtaining a third electrical signal read by the second signal output module when one of the two second switch transistors is turned on and the other is turned off;

[0159] Obtaining a fourth electrical signal read by the second signal output module when both of the two second switch transistors are turned on;

[0160] Wherein, when the first second switch transistor is in the on state, the second poles of the two photosensitive elements in the first row are respectively conducted with the input end of the second electrical energy storage module;

[0161] When the second second switch transistor is in the on state, the second poles of the two photosensitive elements in the second row are respectively conducted with the input end of the second electrical energy storage module.

[0162] Exemplarily, as Figure 2Among them, the pixel circuit includes a first photodiode PD1, a second photodiode PD2, a third photodiode PD3, and a fourth photodiode PD4 arranged in 2 rows and 2 columns. The second switch module 21 includes a first second switch transistor TG1 and a second second switch transistor TG2. TG1 is located in the first row, and TG2 is located in the second row. First, close TG1 to completely transfer the electrons from PD1 and PD2 to FD_n for reading. The mechanism here is similar to the charge transfer in a CCD. At this time, the voltage of FD_n drops due to the charge injection from PD1 and PD2. Then activate SF_n to follow the voltage signal of FD_n to the SF_n amplifier. At this time, the charge in FD_n still exists and is output to ADC1 through the selector SEL_n. ADC1 obtains the sum signal of PD1 and PD2, that is, the third electrical signal.

[0163] Then close TG2 to completely transfer the electrons from the photosensitive elements PD3 and PD4 to FD_n. At this time, FD_n contains all the optical electrical signals of PD1 to PD4. Then activate SF_n to follow the electrical signal of FD_n to the SF_n amplifier and output it to the ADC through the SEL_n selector. ADC obtains the sum signal of PD1 to PD4, that is, the fourth electrical signal.

[0164] In some embodiments, obtaining a phase signal according to at least one electrical signal read by the first signal output module and at least one electrical signal read by the second signal output module includes:

[0165] Converting the first electrical signal, the second electrical signal, the third electrical signal, and the fourth electrical signal into a first digital signal, a second digital signal, a third digital signal, and a fourth digital signal respectively;

[0166] Performing a calculation on the first digital signal, the second digital signal, the third digital signal, and the fourth digital signal to obtain a fifth digital signal, a sixth digital signal, a seventh digital signal, and an eighth digital signal;

[0167] Performing a summation process on the fifth digital signal and the sixth digital signal to obtain a first horizontal phase signal. The first horizontal phase signal is obtained by performing an analog-to-digital conversion on the sum of the pixel signals obtained from the first photosensitive element and the second photosensitive element. The first photosensitive element and the second photosensitive element are located in the same row of the 2-row 2-column photosensitive elements;

[0168] Sum the seventh digital signal and the eighth digital signal to obtain a second horizontal phase signal, which is obtained by performing analog-to-digital conversion on the sum of the pixel signals acquired by the third photosensitive element and the fourth photosensitive element. The third photosensitive element and the fourth photosensitive element are in the same row of the 2×2 photosensitive elements;

[0169] Sum the fifth digital signal and the seventh digital signal to obtain a first vertical phase signal, which is obtained by performing analog-to-digital conversion on the sum of the pixel signals acquired by the first photosensitive element and the third photosensitive element. The first photosensitive element and the third photosensitive element are in the same column of the 2×2 photosensitive elements;

[0170] Sum the sixth digital signal and the eighth digital signal to obtain a second vertical phase signal, which is obtained by performing analog-to-digital conversion on the sum of the pixel signals acquired by the second photosensitive element and the fourth photosensitive element. The second photosensitive element and the fourth photosensitive element are in the same column of the 2×2 photosensitive elements;

[0171] Sum the fifth digital signal and the eighth digital signal to obtain a first diagonal phase signal, which is obtained by performing analog-to-digital conversion on the sum of the pixel signals acquired by the first photosensitive element and the fourth photosensitive element. The first photosensitive element and the fourth photosensitive element are in different rows and different columns of the 2×2 photosensitive elements;

[0172] The sixth digital signal and the seventh digital signal are summed to obtain a second oblique phase signal. The second oblique phase signal is obtained by performing analog-to-digital conversion on the sum of the pixel signals acquired by the second photosensitive element and the third photosensitive element. The second photosensitive element and the third photosensitive element are located in different rows and different columns of the 2×2 photosensitive elements. In the above embodiments, after obtaining the first electrical signal, the second electrical signal, the third electrical signal, and the fourth electrical signal, the first digital signal, the second digital signal, the third digital signal, and the fourth digital signal corresponding to the first electrical signal, the second electrical signal, the third electrical signal, and the fourth electrical signal are respectively obtained through analog-to-digital conversion; based on the first digital signal, the second digital signal, the third digital signal, and the fourth digital signal, operations are performed to obtain the digital signals corresponding to the electrical signals in a single photosensitive element, namely the fifth digital signal, the sixth digital signal, the seventh digital signal, and the eighth digital signal; wherein, the fifth digital signal is the digital value corresponding to the optoelectronic signal output by the first photosensitive element located in the first row and the first column, the sixth digital signal is the digital value corresponding to the optoelectronic signal output by the second photosensitive element located in the first row and the second column, the seventh digital signal is the digital value corresponding to the optoelectronic signal output by the third photosensitive element located in the second row and the first column, and the eighth digital signal is the digital value corresponding to the optoelectronic signal output by the fourth photosensitive element located in the second row and the second column; further, according to the fifth digital signal, the sixth digital signal, the seventh digital signal, and the eighth digital signal, a first vertical phase signal, a second vertical phase signal, a first horizontal phase signal, a second horizontal phase signal, a first oblique phase signal, and a second oblique phase signal are obtained to achieve simultaneous support for phase focusing in the cross direction and phase focusing in the double cross direction.

[0173] In some embodiments, before controlling the image sensor to perform exposure, the method further includes:

[0174] Controlling the first switch module, the second switch module, the switching element between the first pole of the photosensitive element and the third voltage terminal, the first reset circuit, and the second reset circuit to be all closed;

[0175] After clearing the residual electrons in the photosensitive element, the first electrical energy storage module, and the second electrical energy storage module, controlling the first switch module, the second switch module, the switching element, the first reset circuit, and the second reset circuit to remain open, and controlling the image sensor to perform exposure.

[0176] Exemplarily, Figure 2Taking the pixel circuit shown as an example, before the image sensor starts to expose, the first reset circuit 14, the second reset circuit 24, the first switch module, the second switch module, and TG1_p to TG4_p need to be closed to clear the residual electrons in PD1 to PD4, the first electrical energy storage module 12, and the second electrical energy storage module 22. After clearing, the first reset circuit 14, the second reset circuit 24, the first switch module, the second switch module, and TG1_p to TG4_p need to remain open. When the image sensor starts to expose, the electron-hole pairs generated by light irradiation will be separated due to the existence of the PD electric field. Electrons move towards the n region, that is, the negative electrode side of the PD, and holes move towards the p region, that is, the positive electrode side of the PD.

[0177] It should be noted that in this article, the term "including", "comprising" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or further includes elements inherent to such process, method, article or device. Without more limitations, the element defined by the statement "including one..." does not exclude the existence of additional identical elements in the process, method, article or device including the element. In addition, it should be pointed out that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in the reverse order according to the functions involved. For example, the described method may be performed in a different order than described, and various steps may also be added, omitted, or combined. Additionally, the features described with reference to certain examples may be combined in other examples.

[0178] Through the description of the above embodiments, those skilled in the art can clearly understand that the above-described example methods can be implemented by means of software plus a necessary general hardware platform. Of course, it can also be implemented by hardware, but in many cases the former is a better implementation. Based on such an understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to enable a terminal (which can be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in the various embodiments of the present application.

[0179] The embodiments of the present application have been described above in conjunction with the accompanying drawings. However, the present application is not limited to the above specific embodiments. The above specific embodiments are merely illustrative and not restrictive. Those of ordinary skill in the art, under the inspiration of the present application and without departing from the purpose of the present application and the scope protected by the claims, can also make many forms, all of which fall within the protection scope of the present application.

Claims

1. A pixel circuit, characterized in that, Comprising: At least four photosensitive elements, a first switch module, a first electrical energy storage module, a first signal output module, a second switch module, a second electrical energy storage module, and a second signal output module; The first poles of at least three of the at least four photosensitive elements are electrically connected to the first end of the first electrical energy storage module through the first switch module, and the first switch module is used to control the connection or disconnection between the first poles of the at least three photosensitive elements and the first end of the first electrical energy storage module; The second end of the first electrical energy storage module is electrically connected to a first voltage terminal, and the first electrical energy storage module is used to store electrical energy; The first signal output module is electrically connected to a first signal output terminal and the first end of the first electrical energy storage module, and is used to amplify the voltage signal output from the first end of the first electrical energy storage module, and obtain and output at least one output signal through the first signal output terminal; The second poles of the photosensitive elements are electrically connected to the first end of the second electrical energy storage module through the second switch module, and the second switch module is used to control the connection or disconnection between the second poles of the photosensitive elements and the first end of the second electrical energy storage module; The second end of the second electrical energy storage module is electrically connected to a second voltage terminal, and the second electrical energy storage module is used to store electrical energy; The second signal output module is electrically connected to a second signal output terminal and the first end of the second electrical energy storage module, and is used to amplify the voltage signal output from the first end of the second electrical energy storage module, and obtain and output at least one output signal through the second signal output terminal.

2. The pixel circuit according to claim 1, wherein The pixel circuit includes N rows and M columns of the photosensitive elements and N rows and M columns of switch elements; N and M are positive integers; The first pole of the photosensitive element in the nth row and the mth column is electrically connected to a third voltage terminal through the switch element in the nth row and the mth column; The control terminal of the switch element in the nth row and the mth column is electrically connected to the control terminal in the nth row and the mth column, and is used to control the connection or disconnection between the first pole of the photosensitive element in the nth row and the mth column and the third voltage terminal under the control of the control signal in the nth row and the mth column output from the control terminal in the nth row and the mth column.

3. The pixel circuit according to claim 1 or 2, wherein The first switch module includes M first switch transistors; M is an integer greater than 1; The gate of the mth first switch transistor is electrically connected to the mth first switch control terminal, the first pole of the mth first switch transistor is electrically connected to the first poles of at least one photosensitive element located in the mth column, and the second pole of the mth first switch transistor is electrically connected to the first end of the first electrical energy storage module; m is a positive integer less than or equal to M.

4. The pixel circuit according to claim 1 or 2, characterized in that, The second switch module includes N second switch transistors; N is an integer greater than 1; The gate of the nth second switch transistor is electrically connected to the nth second switch control terminal, the first pole of the nth second switch transistor is electrically connected to the second poles of the photosensitive elements located in the nth row, and the second pole of the nth second switch transistor is electrically connected to the first end of the second electrical energy storage module; n is a positive integer less than or equal to N.

5. The pixel circuit according to claim 1, characterized in that, It further includes a first reset circuit and a second reset circuit; The first reset circuit is electrically connected to the first reset control terminal, the first power supply voltage terminal, and the first end of the first electrical energy storage module respectively, and is configured to control the connection between the first power supply voltage terminal and the first end of the first electrical energy storage module under the control of a first reset control signal output by the first reset control terminal. The second reset circuit is electrically connected to the second reset control terminal, the second power supply voltage terminal, and the first end of the second electrical energy storage module respectively, and is configured to control the connection between the second power supply voltage terminal and the first end of the second electrical energy storage module under the control of a second reset control signal output by the second reset control terminal.

6. The pixel circuit according to claim 1, wherein The first signal output module includes a first signal amplification transistor and a first output transistor. The control electrode of the first signal amplification transistor is electrically connected to the first end of the first electrical energy storage module, the first electrode of the first signal amplification transistor is electrically connected to the third power supply voltage terminal, and the second electrode of the first signal amplification transistor is electrically connected to the first electrode of the first output transistor. The control electrode of the first output transistor is electrically connected to the first output control terminal, and the second electrode of the first output transistor is electrically connected to the first signal output terminal. The second signal output module includes a second signal amplification transistor and a second output transistor. The control electrode of the second signal amplification transistor is electrically connected to the first end of the second electrical energy storage module, the first electrode of the second signal amplification transistor is electrically connected to the fourth power supply voltage terminal, and the second electrode of the second signal amplification transistor is electrically connected to the first electrode of the second output transistor. The control electrode of the second output transistor is electrically connected to the second output control terminal, and the second electrode of the second output transistor is electrically connected to the second signal output terminal.

7. The pixel circuit according to claim 5, wherein The first reset circuit includes a first reset transistor. The control electrode of the first reset transistor is electrically connected to the first reset control terminal, the first electrode of the first reset transistor is electrically connected to the first power supply voltage terminal, and the second electrode of the first reset transistor is electrically connected to the first end of the first electrical energy storage module. The second reset circuit includes a second reset transistor. The control electrode of the second reset transistor is electrically connected to the second reset control terminal, the first electrode of the second reset transistor is electrically connected to the second power supply voltage terminal, and the second electrode of the second reset transistor is electrically connected to the first end of the second electrical energy storage module.

8. An image sensor, characterized in that, Including the pixel circuit according to any one of claims 1 to 7.

9. The image sensor according to claim 8, wherein The image sensor further includes a first analog-to-digital conversion circuit, a second analog-to-digital conversion circuit, and a signal processing circuit. The first analog-to-digital conversion circuit is electrically connected to the first signal output terminal, and is configured to perform analog-to-digital conversion on at least one electrical signal output by the first signal output terminal to obtain at least one digital signal, and transmit the at least one digital signal to the signal processing circuit. The second analog-to-digital conversion circuit is electrically connected to the second signal output terminal, and is configured to perform analog-to-digital conversion on at least one electrical signal output by the second signal output terminal to obtain at least one digital signal, and transmit the at least one digital signal to the signal processing circuit. The signal processing circuit is configured to obtain a phase signal according to the digital signal; The types of the phase signal include at least one of the following: a horizontal phase signal, a vertical phase signal, and an oblique phase signal.

10. An imaging module, characterized in that, Comprising the pixel circuit according to any one of claims 1 to 8, or the image sensor according to claim 8.

11. An electronic device, characterized in that, Comprising the imaging module according to claim 10.

12. A phase focusing method, performed by the electronic device according to claim 11, characterized in that, The method includes: After the image sensor is exposed, by controlling the working state of the first switch module, obtaining at least one electrical signal read by the first signal output module; By controlling the working state of the second switch module, obtaining at least one electrical signal read by the second signal output module; According to at least one electrical signal read by the first signal output module and at least one electrical signal read by the second signal output module, obtaining a phase signal, the types of the phase signal including at least one of the following: a horizontal phase signal, a vertical phase signal, and an oblique phase signal; According to the phase signal, determining the focusing state of the imaging module, the focusing state including in-focus and out-of-focus.

13. The phase focusing method according to claim 12, wherein Each pixel circuit includes photosensitive elements arranged in 2 rows and 2 columns, and the first switch module includes two first switch transistors; The obtaining at least one electrical signal read by the first signal output module by controlling the working state of the first switch module includes: When controlling one of the two first switch transistors to be turned on and the other to be turned off, obtaining a first electrical signal read by the first signal output module; When controlling both of the two first switch transistors to be turned on, obtaining a second electrical signal read by the first signal output module; Wherein, when the first of the first switch transistors is in the on state, the first poles of the two photosensitive elements in the first column are respectively electrically connected to the input end of the first electrical energy storage module; When the second of the first switch transistors is in the on state, the first pole of one photosensitive element in the second column is electrically connected to the input end of the first electrical energy storage module.

14. The phase focusing method according to claim 13, wherein Each pixel circuit includes photosensitive elements arranged in 2 rows and 2 columns, and the second switch module includes two second switch transistors; The obtaining at least one electrical signal read by the second signal output module by controlling the working state of the second switch module includes: when controlling one of the two second switch transistors to be turned on and the other to be turned off, obtaining a third electrical signal read by the second signal output module; When controlling both of the two second switch transistors to be turned on, obtaining a fourth electrical signal read by the second signal output module; Wherein, when the first of the second switch transistors is in the on state, the second poles of the two photosensitive elements in the first row are respectively electrically connected to the input end of the second electrical energy storage module; When the second of the second switch transistors is in the on state, the second poles of the two photosensitive elements in the second row are respectively electrically connected to the input end of the second electrical energy storage module.

15. The phase focusing method according to claim 14, wherein The obtaining a phase signal according to at least one electrical signal read by the first signal output module and at least one electrical signal read by the second signal output module includes: Convert the first electrical signal, the second electrical signal, the third electrical signal, and the fourth electrical signal into a first digital signal, a second digital signal, a third digital signal, and a fourth digital signal respectively; Perform calculations on the first digital signal, the second digital signal, the third digital signal, and the fourth digital signal to obtain a fifth digital signal, a sixth digital signal, a seventh digital signal, and an eighth digital signal; Perform a summation process on the fifth digital signal and the sixth digital signal to obtain a first horizontal phase signal. The first horizontal phase signal is obtained by performing analog-to-digital conversion on the sum of the pixel signals acquired by the first photosensitive element and the second photosensitive element. The first photosensitive element and the second photosensitive element are in the same row of the 2x2 photosensitive elements; Perform a summation process on the seventh digital signal and the eighth digital signal to obtain a second horizontal phase signal. The second horizontal phase signal is obtained by performing analog-to-digital conversion on the sum of the pixel signals acquired by the third photosensitive element and the fourth photosensitive element. The third photosensitive element and the fourth photosensitive element are in the same row of the 2x2 photosensitive elements; Perform a summation process on the fifth digital signal and the seventh digital signal to obtain a first vertical phase signal. The first vertical phase signal is obtained by performing analog-to-digital conversion on the sum of the pixel signals acquired by the first photosensitive element and the third photosensitive element. The first photosensitive element and the third photosensitive element are in the same column of the 2x2 photosensitive elements; Perform a summation process on the sixth digital signal and the eighth digital signal to obtain a second vertical phase signal. The second vertical phase signal is obtained by performing analog-to-digital conversion on the sum of the pixel signals acquired by the second photosensitive element and the fourth photosensitive element. The second photosensitive element and the fourth photosensitive element are in the same column of the 2x2 photosensitive elements; Perform a summation process on the fifth digital signal and the eighth digital signal to obtain a first oblique phase signal. The first oblique phase signal is obtained by performing analog-to-digital conversion on the sum of the pixel signals acquired by the first photosensitive element and the fourth photosensitive element. The first photosensitive element and the fourth photosensitive element are in different rows and different columns of the 2x2 photosensitive elements; Perform a summation process on the sixth digital signal and the seventh digital signal to obtain a second oblique phase signal. The second oblique phase signal is obtained by performing analog-to-digital conversion on the sum of the pixel signals acquired by the second photosensitive element and the third photosensitive element. The second photosensitive element and the third photosensitive element are in different rows and different columns of the 2x2 photosensitive elements.

16. The phase focusing method according to claim 12, wherein Before controlling the image sensor to perform exposure, the method further includes: Control the first switch module, the second switch module, the switching element between the first pole of the photosensitive element and the third voltage terminal, the first reset circuit, and the second reset circuit to be all closed; After clearing the residual electrons in the photosensitive element, the first electrical energy storage module, and the second electrical energy storage module, control the first switch module, the second switch module, the switching element, the first reset circuit, and the second reset circuit to remain off, and control the image sensor to perform exposure.

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