Display apparatus and method of manufacturing same

Abstract

The invention relates to a display device and a method of manufacturing the same. A display device according to an embodiment of the present disclosure may include a substrate, a display element layer on the substrate, an encapsulation layer on the display element layer to seal the display element layer, a polarization layer on the encapsulation layer, a first protective layer on the substrate and spaced apart from the polarization layer, and a second protective layer on the substrate and spaced apart from the polarization layer. And a second protective layer on the substrate and covering a portion of the first protective layer, in which the first protective layer has a thickness greater than a thickness of the second protective layer.

Description

[0001] Cross - reference to related applications

[0002] This application claims priority and the benefit of Korean Patent Application No. 10 - 2019 - 0028574, filed on March 13, 2019, the entire contents of which are incorporated herein by reference. Background Art

[0003] The present disclosure herein relates to a display device having improved display quality and improved product reliability, and a method of manufacturing the display device.

[0004] Display devices are classified into liquid crystal display (LCD) devices, organic light - emitting diode display (OLED display) devices, plasma display panel (PDP) devices, electrophoretic display devices, etc.

[0005] In recent years, flexible display devices have been developed. Since flexible display devices can be used when folded or bent, flexible display devices can be used in various fields. In a flexible display device, display elements may be located on a flexible substrate.

[0006] The flexible display device can achieve a narrow bezel by bending at least one side end of the display device. Here, cracks may often occur in the metal wires located in the bent region or in the flexible substrate. Cracks generated in the flexible substrate or the metal wires may cause defects in the flexible display device. Summary of the Invention

[0007] The present disclosure provides a display device having improved display quality and improved product reliability, and a method of manufacturing the same.

[0008] Embodiments of the present disclosure provide a display device including: a substrate, a display element layer, a encapsulation layer, a polarization layer, a first protective layer, and a second protective layer. The display element layer is on the substrate, the encapsulation layer is on the display element layer to seal the display element layer, the polarization layer is on the encapsulation layer, the first protective layer is on the substrate and spaced apart from the polarization layer, and the second protective layer is on the substrate and covers a part of the first protective layer, wherein the first protective layer has a greater thickness than the second protective layer.

[0009] The substrate may include a first region and a second region bent from the first region, wherein the polarization layer is at the first region, and wherein the second protective layer is at the second region.

[0010] The first protective layer may overlap the boundary between the first region and the second region in a plane.

[0011] The display device may further include a support layer under the first region.

[0012] A part of the support layer may overlap at least a part of the first protective layer on a plane, wherein the overlapping area between the support layer and the first protective layer has a width of about 140 μm.

[0013] The second protective layer may be spaced apart from the polarization layer, and the first protective layer is located between the second protective layer and the polarization layer.

[0014] The first protective layer may be spaced apart from the display element layer and the encapsulation layer.

[0015] Embodiments of the present disclosure provide a method of manufacturing a display device, the method including: forming a display element layer on a substrate; forming an encapsulation layer on the display element layer; forming a polarization layer on the encapsulation layer; forming a first protective layer on the substrate, the first protective layer being spaced apart from the polarization layer and having a first thickness; and forming a second protective layer, the second protective layer being spaced apart from the polarization layer and having a second thickness less than the first thickness, the first protective layer being located between the second protective layer and the polarization layer.

[0016] The substrate may include a first region and a second region, wherein the display element layer is located at the first region, and the first protective layer and the second protective layer are located at the second region, wherein the method further includes bending the second region.

[0017] Forming the first protective layer may include forming a first preliminary protective layer and curing the first preliminary protective layer to form the first protective layer, and forming the second protective layer may include: forming a second preliminary protective layer configured to cover at least a part of the first protective layer; and curing the second preliminary protective layer to form the second protective layer, and curing the first preliminary protective layer may occur before curing the second preliminary protective layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The drawings are included to provide a further understanding of the present disclosure, and are incorporated into and constitute a part of this specification. The drawings illustrate embodiments of the present disclosure and, together with the description, are used to explain aspects of the present disclosure. In the drawings:

[0019] Figure 1 is a perspective view showing a display device according to an embodiment of the present disclosure;

[0020] Figure 2 is a perspective view showing the display device folded with respect to the folding axis according to an embodiment of the present disclosure;

[0021] Figure 3 is a perspective view showing the display device folded with respect to the folding axis according to an embodiment of the present disclosure;

[0022] Figure 4 is a plan view showing a display device according to an embodiment of the present disclosure;

[0023] Figure 5 is an equivalent circuit diagram of one pixel among a plurality of pixels according to an embodiment of the present disclosure;

[0024] Figure 6 is a cross-sectional view of a display module according to an embodiment of the present disclosure;

[0025] Figure 7A is a cross-sectional view of a display device taken along line I-I' in Figure 4 according to an embodiment of the present disclosure;

[0026] Figure 7B is a cross-sectional view showing Figure 7A the state in which the display device in

[0027] Figure 8 is bent with respect to the bending axis according to an embodiment of the present disclosure; Figure 4 is a cross-sectional view of a display device taken along line I-I' in

[0028] Figure 9 is a cross-sectional view of a display device taken along line I-I' in Figure 4 according to an embodiment of the present disclosure;

[0029] Figure 10 and Figure 11 is a cross-sectional view of a method of manufacturing a display device according to an embodiment of the present disclosure;

[0030] Figures 12 to 15 is a cross-sectional view of a method of manufacturing a display device according to an embodiment of the present disclosure; and

[0031] Figure 16 is an enlarged cross-sectional view of a part of a display device according to an embodiment of the present disclosure. Detailed Description

[0032] In this specification, it will also be understood that when one component (or region, layer, part) is referred to as being on, "connected to" or "coupled to" another component, it can be directly on, directly connected to or directly coupled to the component, or there can also be an intervening third component.

[0033] Throughout the text, the same reference numerals refer to the same elements. Additionally, in the drawings, for clarity of illustration, the thickness, ratio, and dimensions of the components are exaggerated.

[0034] The term "and / or" includes any and all combinations of one or more of the related listed items.

[0035] It will be understood that although terms such as "first" and "second" are used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one component from other components. For example, in one embodiment, a first element referred to as the first element may be referred to as the second element in another embodiment without departing from the scope of the appended claims. Unless otherwise indicated, terms in the singular form may include the plural form.

[0036] In addition, terms such as "beneath", "below", "above", "on" etc. are used to illustrate the relational associations of components shown in the drawings. These terms may be relative concepts and may be described based on the directions represented in the drawings.

[0037] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art. Terms defined in commonly used dictionaries should be interpreted as having the same meaning as their meaning in the context of the relevant technology, and unless explicitly defined in the description, these terms are not idealized or overly interpreted as having a formalized meaning.

[0038] The meaning of "include" or "comprise" specifies a property, a fixed quantity, steps, operations, elements, components, or a combination thereof, but does not exclude other properties, fixed quantities, steps, operations, elements, components, or a combination thereof.

[0039] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings.

[0040] Figure 1 is a perspective view showing a display device according to an embodiment of the present disclosure.

[0041] Reference Figure 1 , the display device DD may include a plurality of regions distinguishable on the display surface. The display surface is distinguished by a display region DA and a non-display region NDA determined according to whether an image IM is displayed. The display region DA is a region on which the image IM is displayed, and the non-display region NDA is a region on which the image IM is not displayed. For example, Figure 1 the display device DD in

[0042] The display surface may be parallel to the surface defined by the first direction DR1 and the second direction DR2. The normal direction of the display surface may correspond to the third direction DR3 and may also correspond to the thickness direction of the display device DD. The front surface and the rear surface of each component may be distinguished by referring to the third direction DR3.

[0043] However, the directions indicated by the first direction DR1, the second direction DR2, and the third direction DR3 may be relative concepts and may be convertible relative to each other. Hereinafter, the first direction, the second direction, and the third direction may be indicated by the first direction DR1, the second direction DR2, and the third direction DR3, respectively, and may be designated by the same reference numerals. Additionally, in this specification, the surface defined by the first direction DR1 and the second direction DR2 may be defined as a plane, and the expression "observed on the plane" may be defined by the state observed in the third direction DR3 (e.g., a plan view).

[0044] The third direction DR3 may intersect each of the first direction DR1 and the second direction DR2. The first direction DR1, the second direction DR2, and the third direction DR3 may be perpendicular to each other.

[0045] The display device DD may include a folding region FA that can be folded relative to a folding axis FX, and may include a first non-folding region NFA1 and a second non-folding region NFA2 that are spaced apart from each other, with the folding region FA located between the first non-folding region NFA1 and the second non-folding region NFA2. The folding axis FX may extend in the second direction DR2. The first non-folding region NFA1 may extend in the first direction DR1 (e.g., in the direction opposite to the first direction DR1) from one end of the folding region FA. The second non-folding region NFA2 may extend in the first direction DR1 from the other end of the folding region FA.

[0046] The top surface DD-US of the display device DD may include a first display surface PA1 that overlaps the folding region FA, a second display surface PA2 that overlaps the first non-folding region NFA1, and a third display surface PA3 that overlaps the second non-folding region NFA2. The bottom surface DD-DS of the display device DD may be opposite to the top surface DD-US. Each of the first display surface PA1, the second display surface PA2, and the third display surface PA3 may display an image.

[0047] In an embodiment of the present disclosure, although the display device DD is shown as a foldable display device, by way of example, the present disclosure is not limited thereto. For example, the display device DD may include various display devices such as a flexible display device, a bendable display device, a rollable display device, and / or a stretchable display device. Additionally, the display device DD according to an embodiment of the present disclosure may be used in large-sized electronic devices such as a television or an outdoor billboard and / or medium and small-sized electronic devices such as a personal computer, a notebook computer, a personal digital terminal, a vehicle navigation unit, a game console, a portable electronic device, a wristwatch-type electronic device, and a camera.

[0048] Figure 2 is a perspective view showing a display device folded with respect to a folding axis according to an embodiment of the present disclosure.

[0049] Reference Figure 1 and Figure 2 , the folding region FA may be folded with respect to the folding axis FX such that the second display surface PA2 and the third display surface PA3 face each other. The folding region FA may be folded with respect to the first rotation direction RT1. When the display device DD is folded along the folding axis FX in the manner shown in Figure 2 , the bottom surface DD-DS of the display device DD may remain exposed to the outside, which may be defined as an inner fold.

[0050] Figure 3 is a perspective view showing a display device folded with respect to a folding axis according to an embodiment of the present disclosure.

[0051] Reference Figure 1 and Figure 3 , the folding region FA may be folded with respect to the folding axis FX such that the second display surface PA2 and the third display surface PA3 are exposed to the outside. The folding region FA may be folded along the second rotation direction RT2, and the top surface DD-US of the display device DD may remain exposed to the outside.

[0052] The display device DD may be folded along the folding axis FX such that each of the second display surface PA2 of the first non-folding region NFA1 and the third display surface PA3 of the second non-folding region NFA2 faces the outside, and this may be defined as an outer fold.

[0053] Figure 4 is a plan view showing a display device according to an embodiment of the present disclosure.

[0054] Reference Figure 4 , the display device DD (reference Figure 1 ) may include a display module DM, a circuit board FP, and a driving element IC.

[0055] Although the display module DM according to an embodiment of the present disclosure may be a light-emitting display module, the present disclosure is not particularly limited thereto. For example, the display module DM may be an organic light-emitting display module or a quantum dot light-emitting display module. The organic light-emitting display module may include a light-emitting layer containing an organic light-emitting material. The quantum dot light-emitting display module may include a light-emitting layer containing quantum dots and quantum rods. Hereinafter, the display module DM will be described as an organic light-emitting display module.

[0056] The display module DM may include a scan driving circuit DCV, signal lines SGL, and pixels PX. The area where the pixels PX are located may be defined as a display area DA.

[0057] The scan driving circuit DCV may be at a non-display area NDA. The scan driving circuit DCV may generate scan signals. The scan signals may be sequentially output to the gate lines GL. The scan driving circuit DCV may further output other control signals to the driving circuit of the pixel PX.

[0058] The scan driving circuit DCV may include thin film transistors formed by the same process as the driving circuit for forming the pixels PX. For example, the process may include a low-temperature polycrystalline silicon (LTPS) process or a low-temperature polycrystalline oxide (LTPO) process.

[0059] The signal lines SGL may include a conductive material. The signal lines SGL may include a flexible metal material to reduce or minimize damage caused when the substrate SUB (refer to Figure 6 ) is bent. For example, each of the signal lines SGL may be made of a conductive material with excellent ductility, such as gold (Au), silver (Ag), aluminum (Al), and copper (Cu). However, the present disclosure is not limited to the material of the signal lines SGL. For example, each of the signal lines SGL may be made of one of various conductive materials used to manufacture the display device DD (refer to Figure 1 ).

[0060] The signal lines SGL may include data lines DL, power lines PL, control signal lines CSL, gate lines GL, and light emission control lines LCL.

[0061] Each of the data lines DL may be connected to one or more corresponding pixels in the pixels PX. Each of the pixels PX may be connected to the corresponding data line in the data lines DL.

[0062] The power lines PL may be connected to the pixels PX. The control signal lines CSL may provide control signals to the scan driving circuit DCV.

[0063] Each of the gate lines GL may extend in a second direction DR2. Each of the gate lines GL may be connected to one or more corresponding pixels in the pixel PX. The gate lines GL may be connected to the scan driving circuit DCV.

[0064] Each of the light emission control lines LCL may extend in a second direction DR2. Each of the light emission control lines LCL may be connected to one or more corresponding pixels in the pixel PX. The light emission control lines LCL may be connected to the scan driving circuit DCV.

[0065] Some of the data lines DL, power lines PL, control signal lines CSL, and gate lines GL may be located at the same layer as each other, and some of them may be located at different layers from each other.

[0066] The display module DM may include a first non-bending area NBA1, a bending area BA, and a third non-bending area NBA2. The bending axis BX may be substantially parallel to the second direction DR2. The bending area BA may be bent with respect to the bending axis BX. The first non-bending area NBA1 and the third non-bending area NBA2 may be spaced apart from each other, and the bending area BA may be located between the first non-bending area NBA1 and the third non-bending area NBA2.

[0067] As an area for displaying an image, the first non-bending area NBA1 may include the folding area FA, the first non-folding area NFA1, and the second non-folding area NFA2 described for Figure 1 the folding area FA, the first non-folding area NFA1, and the second non-folding area NFA2.

[0068] A part of the circuit board FP may be at the third non-bending area NBA2. The circuit board FP may be electrically connected to the display module DM through a plurality of signal lines SGL. For example, the circuit board FP may be electrically connected to a circuit element layer DP-CL including the signal lines SGL (refer to Figure 6 ).

[0069] The driving element IC may be at the circuit board FP. The driving element IC may output a driving signal and an image signal for displaying an image. The driving element IC may be electrically connected to a conductive pattern at an area of the circuit board FP. The image signal and the driving signal output from the driving element IC may be transmitted to the display module DM through the circuit board FP (refer to Figure 1 ). Although one driving element IC is at the circuit board FP in Figure 4 , the present disclosure is not limited thereto. A plurality of driving elements for displaying an image may be at the circuit board FP.

[0070] Figure 5 is an equivalent circuit diagram showing one pixel among a plurality of pixels according to an embodiment of the present disclosure.

[0071] In Figure 5Here, the pixel PX connected to the i-th gate line GLi and the i-th light emission control line LCLi is taken as an example for description. However, the present disclosure is not limited to the configuration of the pixel PX of the present embodiment. For example, the configuration of the pixel PX can be variously changed.

[0072] Reference Figure 5 , the pixel PX may include a light emitting element OLED and a pixel circuit CC. The pixel circuit CC may include a plurality of transistors T1 to T7 and a capacitor CP. The pixel circuit CC controls the amount of current flowing through the light emitting element OLED corresponding to the data signal.

[0073] The light emitting element OLED can emit light corresponding to the amount of current provided from the pixel circuit CC (for example, light having a predetermined brightness). The first power supply ELVDD may have a voltage or power level greater than that of the second power supply ELVSS.

[0074] Each of the plurality of transistors T1 to T7 may include an input electrode (or source electrode), an output electrode (or drain electrode), and a control electrode (or gate electrode). In the present disclosure, for convenience, one of the input electrode and the output electrode may be referred to as the first electrode, and the other may be referred to as the second electrode.

[0075] The first electrode of the first transistor T1 may be connected to the fifth transistor T5 to be electrically connected to the first power supply ELVDD. The second electrode of the first transistor T1 may be connected to the sixth transistor T6 to be electrically connected to the anode of the light emitting element OLED. In this specification, the first transistor T1 may be referred to as a driving transistor.

[0076] The first transistor T1 can control the amount of current flowing to the light emitting element OLED corresponding to the voltage applied to the control electrode of the first transistor T1.

[0077] The second transistor T2 may be connected between the data line DL and the first electrode of the first transistor T1. The control electrode of the second transistor T2 may be connected to the i-th gate line GLi. When the i-th gate signal is provided to the i-th gate line GLi, the second transistor T2 may be turned on to electrically connect the data line DL and the first electrode of the first transistor T1.

[0078] The third transistor T3 may be connected between the second electrode of the first transistor T1 and the control electrode of the first transistor T1. The control electrode of the third transistor T3 may be connected to the i-th gate line GLi. When the i-th gate signal is provided to the i-th gate line GLi, the third transistor T3 may be turned on to electrically connect the second electrode of the first transistor T1 and the control electrode of the first transistor T1. When the third transistor T3 is turned on, the first transistor T1 may be diode-connected / connected in the form of a diode.

[0079] The fourth transistor T4 may be connected between the node ND and an initialization power generation unit that provides an initialization voltage Vint. The control electrode of the fourth transistor T4 may be connected to the (i-1)-th gate line GLi-1. When the (i-1)-th gate signal is provided to the (i-1)-th gate line GLi-1, the fourth transistor T4 may be turned on and the initialization voltage Vint may be provided to the node ND.

[0080] The fifth transistor T5 may be connected between the power supply line PL and the first electrode of the first transistor T1. The control electrode of the fifth transistor T5 may be connected to the (i)-th light emission control line LCLi.

[0081] The sixth transistor T6 may be connected between the second electrode of the first transistor T1 and the anode of the light emitting element OLED. The control electrode of the sixth transistor T6 may be connected to the (i)-th light emission control line LCLi.

[0082] The seventh transistor T7 may be connected between the initialization power generation unit and the anode of the light emitting element OLED. The control electrode of the seventh transistor T7 may be connected to the (i+1)-th gate line GLi+1. When the (i+1)-th gate signal is provided to the (i+1)-th gate line GLi+1, the seventh transistor T7 may be turned on, and the initialization voltage Vint may be provided to the anode of the light emitting element OLED.

[0083] The seventh transistor T7 may improve the black display ability of the pixel PX. When the seventh transistor T7 is turned on, the parasitic capacitor of the light emitting element OLED may be discharged. When realizing black luminance, due to the leakage current from the first transistor T1, the light emitting element OLED may not emit light, and thus the black display ability may be improved.

[0084] Although in Figure 5 the control electrode of the seventh transistor T7 is connected to the (i+1)-th gate line GLi+1, the present disclosure is not limited thereto. In another embodiment of the present disclosure, the control electrode of the seventh transistor T7 may be connected to the (i)-th gate line GLi or the (i-1)-th gate line GLi-1.

[0085] Although Figure 5 is shown based on the use of PMOS transistors, the present disclosure is not limited thereto. In another embodiment of the present disclosure, NMOS transistors may be used to configure the pixel circuit CC. In another embodiment of the present disclosure, the pixel PX may be configured by a combination of NMOS transistors and PMOS transistors.

[0086] The capacitor CP may be located between the power line PL and the node ND. The capacitor CP may store a voltage corresponding to the data signal. Based on the voltage stored in the capacitor CP, the amount of current flowing through the first transistor T1 when the fifth transistor T5 and the sixth transistor T6 are turned on can be determined. The present disclosure is not limited to Figure 5 the equivalent circuit diagram in. In another embodiment of the present disclosure, the pixel PX may be implemented in various forms that allow the light-emitting element OLED to emit light.

[0087] Figure 6 is a cross-sectional view of a display module according to an embodiment of the present disclosure.

[0088] Referring to Figure 6 , the substrate SUB may be made of a malleable material. For example, the substrate SUB may have a film shape including one selected from the group consisting of polyester-based polymers, silicon-based polymers, acrylic-based polymers, polyolefin-based polymers, and copolymers thereof. However, the present disclosure is not limited to the material of the substrate SUB. For example, the substrate SUB may be made of a glass material.

[0089] On the substrate SUB, a display element layer DP and a packaging layer ENC may be sequentially positioned.

[0090] The display element layer DP may include a circuit element layer DP-CL and a light-emitting element layer DP-OLED.

[0091] The circuit element layer DP-CL may include signal lines SGL (refer to Figure 4 ). The circuit element layer DP-CL may include a buffer layer BFL, a first intermediate inorganic layer 10 and a second intermediate inorganic layer 20 as inorganic layers, and an intermediate organic layer 30 as an organic layer. However, the present disclosure is not particularly limited to the materials of each of the inorganic layer and the organic layer.

[0092] The buffer layer BFL may provide a flat surface on the substrate SUB and may block impurity elements from being introduced into the substrate SUB. In an embodiment of the present disclosure, the buffer layer BFL may be optionally provided or omitted.

[0093] On the buffer layer BFL, a first semiconductor pattern OSP1 of the first transistor T1 and a second semiconductor pattern OSP2 of the second transistor T2 may be positioned. Each of the first semiconductor pattern OSP1 and the second semiconductor pattern OSP2 may include polysilicon or amorphous silicon. Each of the first semiconductor pattern OSP1 and the second semiconductor pattern OSP2 may include a metal oxide semiconductor.

[0094] The first intermediate inorganic layer 10 may be on the first semiconductor pattern OSP1 and the second semiconductor pattern OSP2. The first control electrode GE1 of the first transistor T1 and the second control electrode GE2 of the second transistor T2 may be located on the first intermediate inorganic layer 10.

[0095] The second intermediate inorganic layer 20 covering the first control electrode GE1 and the second control electrode GE2 may be located on the first intermediate inorganic layer 10. The first input electrode DE1 and the first output electrode SE1 of the first transistor T1 and the second input electrode DE2 and the second output electrode SE2 of the second transistor T2 may be located on the second intermediate inorganic layer 20.

[0096] The second input electrode DE2 and the second output electrode SE2 may be connected to the second semiconductor pattern OSP2 through a first through hole CH1 and a second through hole CH2 passing through the first intermediate inorganic layer 10 and the second intermediate inorganic layer 20, respectively. The first input electrode DE1 and the first output electrode SE1 may be connected to the first semiconductor pattern OSP1 through a third through hole CH3 and a fourth through hole CH4 passing through the first intermediate inorganic layer 10 and the second intermediate inorganic layer 20, respectively. For example, in another embodiment of the present disclosure, one of the first transistor T1 and the second transistor T2 may have a bottom gate structure.

[0097] The intermediate organic layer 30 covering the first input electrode DE1, the second input electrode DE2, the first output electrode SE1, and the second output electrode SE2 may be located on the second intermediate inorganic layer 20. The intermediate organic layer 30 may provide a flat surface.

[0098] The light-emitting element layer DP-OLED may be located on the intermediate organic layer 30. The light-emitting element layer DP-OLED may include a pixel defining layer PDL and a light-emitting element OLED. For example, the light-emitting element OLED may include an organic light-emitting diode. The pixel defining layer PDL may include an organic material.

[0099] The first electrode AE may be on the intermediate organic layer 30. The first electrode AE may be electrically connected to the first output electrode SE1 through a fifth through hole CH5 passing through the intermediate organic layer 30. Although in Figure 6 the first electrode AE is directly connected to the first output electrode SE1, the first electrode AE may be electrically connected to the first output electrode SE1 through a sixth transistor T6 (refer to Figure 5 ).

[0100] An opening OM may be defined in the pixel defining layer PDL. The opening OM of the pixel defining layer PDL may expose at least a part of the first electrode AE.

[0101] In an embodiment of the present disclosure, the light-emitting region OPA may overlap with at least one of the first transistor Tl and the second transistor T2. In other embodiments, the opening OM may increase in area / size, and the first electrode AE and the light-emitting layer EML may also increase in area / size.

[0102] The hole control layer HCL may be commonly located in the light-emitting region OPA and the non-light-emitting region NPA. The light-emitting layer EML may be on the hole control layer HCL. The light-emitting layer EML may be located in a region corresponding to the opening OM. The light-emitting layer EML may include an organic material and / or an inorganic material. The light-emitting layer EML may generate colored light (e.g., colored light having a predetermined color).

[0103] The electron control layer TCL may be on the light-emitting layer EML. The second electrode CE is located on the electron control layer TCL.

[0104] The encapsulation layer ENC may be on the second electrode CE. The encapsulation layer ENC may cover the second electrode CE. In other embodiments, a cover layer covering the second electrode CE may be located between the encapsulation layer ENC and the second electrode CE. Here, the encapsulation layer ENC may directly cover the cover layer. The encapsulation layer ENC may be provided as a single encapsulation layer or multiple thin films.

[0105] Figure 7A is a cross-sectional view of a display device taken along line I-I' in Figure 4 according to an embodiment of the present disclosure, and Figure 7B is a cross-sectional view showing a state in which the display device in Figure 7A is bent with respect to the bending axis.

[0106] Referring to Figure 7A and Figure 7B , the display device DD (refer to Figure 1 ) may include a substrate SUB, a light-emitting element layer DP-OLED, an encapsulation layer ENC, a polarization layer POL, a protection layer BPL, a circuit element layer DP-CL, a circuit board FP, a first support layer PF1, and a second support layer PF2.

[0107] The substrate SUB may include a first region NBA1, a second region BA bent from the first region NBA1, and a third region NBA2 extending from the second region BA.

[0108] The light-emitting element layer DP-OLED may be on the substrate SUB. The light-emitting element layer DP-OLED may be at the first region NBA1.

[0109] The encapsulation layer ENC can be on the light-emitting element layer DP-OLED. The encapsulation layer ENC can be at the first region NBA1. The encapsulation layer ENC can reduce or prevent external air such as moisture and oxygen from being introduced into the light-emitting element layer DP-OLED. Additionally, in other embodiments, a barrier film for protecting the light-emitting element layer DP-OLED can be further laminated on the encapsulation layer ENC.

[0110] The polarization layer POL can be on the encapsulation layer ENC. The polarization layer POL can cover the entire top surface of the encapsulation layer ENC. The polarization layer POL can be at the first region NBA1. The polarization layer POL can compensate for the optical characteristics of the display device DD (refer to Figure 1 ). For example, the polarization layer POL can reduce the reflectance of external light incident from the outside. In some embodiments, among the light transmitted from the outside, the polarization layer POL can transmit only specific polarized light, and can absorb or block the remaining light transmitted from the outside. Additionally, the polarization layer POL can reduce or prevent external light reflection.

[0111] The protective layer BPL can be on the substrate SUB. The protective layer BPL can be at at least a part of the first region NBA1, at at least a part of the third region NBA2, and at the second region BA. The protective layer BPL can reduce or prevent damage to the circuit element layer DP-CL at the second region BA of the substrate SUB.

[0112] The protective layer BPL can be spaced apart from the encapsulation layer ENC and the display element layer DP in the first direction DR1. The protective layer BPL can be spaced apart from the polarization layer POL in the first direction DR1. For example, the width WT1 between the protective layer BPL and the polarization layer POL can be about 10 μm or greater.

[0113] According to an embodiment of the present disclosure, a protective film POL-P (refer to Figure 10 ) for protecting the polarization layer POL can be on the top surface POL-U of the polarization layer POL. The polarization layer POL and the protective film POL-P (refer to Figure 10 ) can be spaced apart from the protective layer BPL. Thus, it is possible to prevent the protective layer BPL from protruding more than the polarization layer POL due to contact with the protective film POL-P (refer to Figure 10 ) and the polarization layer POL through the surface tension of the protective film POL-P (refer to Figure 10 ). Thus, it is possible to prevent the window at the polarization layer POL from bending / deforming due to the protruding protective layer BPL, and to improve the product reliability of the display device DD (refer to Figure 1 ).

[0114] The thickness HT1 between the top surface SUB-U of the substrate SUB and the top surface POL-U of the polarization layer POL may be the same as the thickness HT2 between the top surface SUB-U of the substrate SUB and the top surface BPL-U of the protective layer BPL.

[0115] The circuit element layer DP-CL may be on the substrate SUB. The circuit element layer DP-CL may electrically connect the light-emitting element layer DP-OLED in the first region NBA1 and the circuit board FP in the third region NBA2.

[0116] The circuit board FP may be on the substrate SUB. The circuit board FP may be at the third region NBA2. The circuit board FP may transmit the driving signal received from the driving element IC (refer to Figure 4 ) to the display element layer DP through the signal line SGL. The circuit board FP may include a printed circuit board (PCB) or a flexible printed circuit board (FPCB). The circuit board FP may be spaced apart from the protective layer BPL in the first direction DR1.

[0117] In a plane, at least a part of the first region NBA1 may overlap with at least a part of the protective layer BPL. For example, the width WT2 of the overlapping region where the first region NBA1 overlaps with the protective layer BPL may be in the range from about 140 μm to about 550 μm.

[0118] For example, when the width WT2 of the overlapping region where the first region NBA1 overlaps with the protective layer BPL is less than about 140 μm, different from this embodiment, the protective layer BPL may be separated from the substrate SUB due to the force applied when the substrate SUB is bent. However, according to this embodiment, when the width WT2 is about 140 μm or more, the protective layer BPL may adhere to the first region NBA1. Therefore, the protective layer BPL may adhere sufficiently to the substrate SUB such that the portion of the protective layer BPL at the first region NBA1 does not bend. When the substrate SUB is bent, the protective layer BPL may allow a neutral surface to be provided at the circuit element layer DP-CL. The protective layer BPL may prevent cracks from being generated in the circuit element layer DP-CL. Therefore, the display device DD (refer to Figure 1 ) may have improved reliability and improved display quality.

[0119] For example, different from this embodiment, when the width WT2 of the overlapping region between the first region NBA1 and the protective layer BPL in a plane exceeds about 550 μm, the protective layer BPL may contact the polarization layer POL. The protective film POL-P (refer to Figure 10 ) for protecting the polarization layer POL may be on the top surface POL-U of the polarization layer POL. When the width WT2 exceeds about 550 μm, the protective layer BPL may contact the protective film POL-P (refer to Figure 10)。 And the protective layer BPL may protrude more than the polarizing layer POL due to the surface tension with the protective film POL-P (refer to Figure 10 )). Thus, the window at the polarizing layer POL may be bent / deformed due to the protruding protective layer BPL. However, according to an embodiment of the present disclosure, since the polarizing layer POL and the protective layer BPL are spaced apart from each other, it is possible to prevent the protective layer BPL from protruding more than the polarizing layer POL due to the surface tension with the protective film POL-P (refer to Figure 10 ). In addition, it is possible to prevent the window at the polarizing layer POL from being bent / deformed due to the protruding protective layer BPL. Therefore, the product reliability of the display device DD (refer to Figure 1 ) can be improved.

[0120] The first support layer PF1 may be on the rear surface of the substrate SUB. The first support layer PF1 may be at a portion corresponding to the first region NBA1. In a plane, at least a part of the first support layer PF1 may overlap with the polarizing layer POL. In addition, the first support layer PF1 may overlap with a part of the protective layer BPL at the first region NBA1. For example, the width of the overlapping region where the first support layer PF1 overlaps with the protective layer BPL may be in the range from about 140 μm to about 550 μm. The first support layer PF1 may support the first region NBA1 such that a part of the first region NBA1 does not bend when the substrate SUB bends. The first support layer PF1 may include a PET film.

[0121] The second support layer PF2 may be located below the substrate SUB. The second support layer PF2 may be at a portion corresponding to the third region NBA2. In a plane, at least a part of the second support layer PF2 may overlap with a part of the circuit board FP. In a plane, a part of the second support layer PF2 may overlap with a part of the protective layer BPL. The second support layer PF2 may support the substrate SUB such that the part of the substrate SUB in the third region NBA2 does not bend when the substrate SUB bends. The second support layer PF2 may include a PET film.

[0122] The substrate SUB may bend with respect to the bending axis BX. The bending axis BX may extend in the second direction DR2. When the substrate SUB bends, the first support layer PF1 and the second support layer PF2 may face each other.

[0123] Since the third region NBA2 where the driving element IC (refer to Figure 4 ) is located is arranged on the rear surface of the first region NBA1, the display device DD (refer to Figure 1 ) according to an embodiment of the present disclosure can achieve a narrow border.

[0124] Figure 8 shows along an embodiment of the present disclosure Figure 4A cross-sectional view of the display device taken along line I-I'. In Figure 7A and Figure 7B the components described will be referred to by the same reference numerals respectively, and repeated descriptions of these components will be omitted.

[0125] Referring to Figure 8 , the display device DD (refer to Figure 1 ) may further include a first polarizing layer POL-1. The first polarizing layer POL-1 may be on the side surface of the encapsulation layer ENC. The first polarizing layer POL-1 may cover the entire side surface of the encapsulation layer ENC. The first polarizing layer POL-1 may be integral with the polarizing layer POL. The polarizing layer POL and the first polarizing layer POL-1 may cover the encapsulation layer ENC.

[0126] Figure 9 is a cross-sectional view of the display device taken along line I-I' according to an embodiment of the present disclosure. In Figure 4 the components described in Figure 7A and Figure 7B will be referred to by the same reference numerals respectively, and repeated descriptions of these components will be omitted.

[0127] Referring to Figure 9 , the first protective layer BPL-1 may be on the substrate SUB. The first protective layer BPL-1 may be spaced from the polarizing layer POL in the first direction DR1. The first protective layer BPL-1 may be spaced from the encapsulation layer ENC and the light-emitting element layer DP-OLED in the first direction DR1.

[0128] The second protective layer BPL-2 may be on the substrate SUB. The second protective layer BPL-2 may be at least a part of the third region NBA2 and at the second region BA.

[0129] The first protective layer BPL-1 may be located between the polarizing layer POL and the second protective layer BPL-2. The second protective layer BPL-2 may cover a part of the first protective layer BPL-1.

[0130] The first protective layer BPL-1 may have a thickness HT-1 in a third direction DR3, and the thickness HT-1 is greater than the thickness HT-2 of the second protective layer BPL-2 in the third direction DR3. Thus, the second protective layer BPL-2 may not pass through the first protective layer BPL-1 due to the thickness HT-1 of the first protective layer BPL-1, and may not be located between the polarization layer POL and the first protective layer BPL-1. The first protective layer BPL-1 may allow the second protective layer BPL-2 to be separated from the polarization layer POL. The first protective layer BPL-1 and the second protective layer BPL-2 may be separated from the polarization layer POL in a first direction DR1. For example, the width WT1 between the first protective layer BPL-1 and the polarization layer POL may be about 10 μm or greater.

[0131] According to an embodiment of the present disclosure, the first protective layer BPL-1 and the second protective layer BPL-2 may be separated from the polarization layer POL. A protective film POL-P (refer to Figure 10 ) may be on the top surface POL-U of the polarization layer POL. The first protective layer BPL-1 may be separated from the protective film POL-P (refer to Figure 10 ). Thus, it is possible to prevent the first protective layer BPL-1 from protruding more than the polarization layer POL due to contact with the protective film POL-P (refer to Figure 10 ) and the polarization layer POL through the surface tension of the protective film POL-P (refer to Figure 10 ). In addition, it is possible to prevent the window at the polarization layer POL from being bent / deformed due to the protruding first protective layer BPL-1, and the product reliability of the display device DD (refer to Figure 1 ) can be improved.

[0132] On a plane, at least a part of the first region NBA1 may overlap with at least a part of the first protective layer BPL-1. For example, the width WT2 of the overlapping region where the first region NBA1 overlaps with the first protective layer BPL-1 may be in the range from about 140 μm to about 550 μm.

[0133] For example, different from the present embodiment, when the width WT2 of the overlapping region where the first region NBA1 overlaps with the first protective layer BPL-1 is less than about 140 μm, the first protective layer BPL-1 may not adhere sufficiently to the substrate SUB, and the first protective layer BPL-1 may be separated from the substrate SUB due to the force applied when the substrate SUB is bent. However, according to the present embodiment, when the width WT2 is about 140 μm or more, the first protective layer BPL-1 can adhere sufficiently to the substrate SUB in the first region NBA1. When the substrate SUB is bent, the first protective layer BPL-1 and the second protective layer BPL-2 can allow a neutral surface to be provided at the circuit element layer DP-CL. The first protective layer BPL-1 and the second protective layer BPL-2 can prevent cracks from being generated in the circuit element layer DP-CL. Therefore, the display device DD (refer to Figure 1 ) can have improved reliability and improved display quality.

[0134] As an example, and different from the present embodiment, when the width WT2 of the overlapping region between the first region NBA1 and the first protective layer BPL-1 on a plane exceeds about 550 μm, the first protective layer BPL-1 may contact the polarizing layer POL. The protective film POL-P (refer to Figure 10 ) for protecting the polarizing layer POL can be on the top surface POL-U of the polarizing layer POL. The first protective layer BPL-1 may contact the protective film POL-P (refer to Figure 10 ). And the first protective layer BPL-1 may protrude more than the polarizing layer POL due to the surface tension with the protective film POL-P (refer to Figure 10 ). Therefore, the window at the polarizing layer POL may be bent / deformed due to the protruding first protective layer BPL-1. However, according to the present disclosure, since the polarizing layer POL and the first protective layer BPL-1 are separated from each other, it is possible to prevent the first protective layer BPL-1 from protruding more than the polarizing layer POL due to the surface tension with the protective film POL-P (refer to Figure 10 ). That is, it is possible to prevent the window at the polarizing layer POL from being bent / deformed due to the protruding first protective layer BPL-1. Therefore, the product reliability of the display device DD (refer to Figure 1 ) can be improved.

[0135] A part of the first protective layer BPL-1 can be at the first region NBA1 and can overlap with the first support layer PF1. The first protective layer BPL-1 can ensure an overlapping region with the first support layer PF1. For example, the width WT2 of the overlapping region can be in the range from about 140 μm to about 550 μm.

[0136] Figure 10 is a cross-sectional view showing a part of the process of forming a preliminary protective layer according to an embodiment of the present disclosure. In Figure 7Aand Figure 8 The components described in

[0137] will be denoted by the same reference numerals respectively, and repeated descriptions of these components will be omitted. Figure 10 Referring to

[0138] a light-emitting element layer DP-OLED can be formed on a substrate SUB. An encapsulation layer ENC can be formed on the light-emitting element layer DP-OLED. A polarization layer POL can be formed on the encapsulation layer ENC. A protective film POL-P for protecting the top surface POL-U of the polarization layer POL can be formed on the polarization layer POL.

[0139] A preliminary protective layer BPLa can be formed on the substrate SUB. The preliminary protective layer BPLa can include a resin. For example, the preliminary protective layer BPLa can include an organic resin such as an acrylic resin. However, the present disclosure is not limited thereto.

[0140] The preliminary protective layer BPLa can be applied on the substrate SUB by a spraying device JT. The spraying device JT can spray a resin RS. The spraying device JT can apply the resin RS in a first direction DR1 and in a second direction DR2.

[0141] The spraying device JT can apply the resin RS such that the preliminary protective layer BPLa is at at least a part of a first region NBA1, at at least a part of a third region NBA2, and at a second region BA.

[0142] The spraying device JT can apply the resin RS such that the thickness HT1 between the top surface SUB-U of the substrate SUB and the top surface POL-U of the polarization layer POL is the same as the thickness HT2-1 between the top surface SUB-U of the substrate SUB and the top surface BPLa-U of the preliminary protective layer BPLa.

[0143] The spraying device JT can apply the resin RS such that the polarization layer POL is spaced apart from the preliminary protective layer BPLa.

[0144] Figure 11 is a cross-sectional view showing a part of a process of forming a protective layer according to an embodiment of the present disclosure. In Figures 7A to 8 and Figure 10 The components described in

[0145] will be denoted by the same reference numerals respectively, and repeated descriptions of these components will be omitted. Figure 10 and Figure 11, the preliminary protective layer BPLa can be cured by irradiating the preliminary protective layer BPLa with light UV. As the preliminary protective layer BPLa is cured, the protective layer BPL can be formed.

[0146] The preliminary protective layer BPLa can include a UV-curable resin, a heat-curable resin, or an electron beam-curable resin.

[0147] For example, when the preliminary protective layer BPLa is a UV-curable resin, the light UV can be ultraviolet rays, when the preliminary protective layer BPLa is an electron beam-curable resin, the light UV can be an electron beam, and when the preliminary protective layer BPLa is a heat-curable resin, heat can be applied to cure the preliminary protective layer BPLa.

[0148] The protective layer BPL can be spaced apart from the polarization layer POL in the first direction DR1. For example, the width WT1 between the protective layer BPL and the polarization layer POL can be about 10 μm or greater.

[0149] According to an embodiment of the present disclosure, the protective layer BPL can be spaced apart from the polarization layer POL. The protective layer BPL can be spaced apart from the protective film POL-P. It is possible to prevent the protective layer BPL from protruding more than the polarization layer POL due to contact with the protective film POL-P and the polarization layer POL through surface tension. Therefore, it is possible to prevent the window at the polarization layer POL from bending / deforming due to the protruding protective layer BPL, and the product reliability of the display device DD (refer to Figure 1 ) can be improved.

[0150] The protective film POL-P can be removed before forming the window.

[0151] The preliminary protective layer BPLa can be cured to overlap the first region NBA1 in a plane. The protective layer BPL can ensure an overlapping region with the first region NBA1. For example, the width WT2 of the overlapping region can be in the range from about 140 μm to about 550 μm. The protective layer BPL can overlap the first support layer PF1 in a plane.

[0152] According to an embodiment of the present disclosure, the protective layer BPL can adhere sufficiently to the substrate SUB. The protective layer BPL can allow a neutral surface to be formed in the circuit element layer DP-CL, thereby preventing cracks from being generated in the circuit element layer DP-CL. Therefore, the reliability of the display device DD (refer to Figure 1 ) can be improved.

[0153] Figure 12 is a cross-sectional view showing a part of the process of forming the first preliminary protective layer according to an embodiment of the present disclosure. The components described in Figure 9 will be referred to by the same reference numerals respectively, and repeated descriptions of these components will be omitted.

[0154] Reference Figure 12 , a first preliminary protective layer BPL-1a can be formed on a substrate SUB. The first preliminary protective layer BPL-1a can include a resin. For example, the first preliminary protective layer BPL-1a can include an organic resin such as an acrylic resin. However, the present disclosure is not limited thereto.

[0155] The first preliminary protective layer BPL-1a can be applied on the substrate SUB by a spraying device JT. The spraying device JT can spray a resin RS. The spraying device JT can apply the resin RS in a first direction DR1 and a second direction DR2.

[0156] The spraying device JT can apply the resin RS such that the polarization layer POL and the first preliminary protective layer BPL-1a are spaced apart from each other.

[0157] Figure 13 is a cross-sectional view showing a part of a process of forming a first preliminary protective layer according to an embodiment of the present disclosure. The components described in Figure 9 and Figure 12 will be respectively denoted by the same reference numerals, and repeated descriptions of these components will be omitted.

[0158] Reference Figure 12 and Figure 13 , the first preliminary protective layer BPL-1a can be cured by irradiating the first preliminary protective layer BPL-1a with light UV. As the first preliminary protective layer BPL-1a is cured, a first protective layer BPL-1 can be formed.

[0159] The first preliminary protective layer BPL-1a can include a UV-curable resin, a heat-curable resin, or an electron beam-curable resin.

[0160] For example, when the first preliminary protective layer BPL-1a is a UV-curable resin, the light UV can be ultraviolet rays, when the first preliminary protective layer BPL-1a is an electron beam-curable resin, the light UV can be an electron beam, and when the first preliminary protective layer BPL-1a is a heat-curable resin, heat can be applied to cure the first preliminary protective layer BPL-1a.

[0161] The first protective layer BPL-1 can be spaced apart from the polarization layer POL in the first direction DR1.

[0162] Figure 14 is a cross-sectional view showing a part of a process of forming a second preliminary protective layer according to an embodiment of the present disclosure. The components described in Figure 9 , Figure 12 and Figure 13 will be respectively denoted by the same reference numerals, and repeated descriptions of these components will be omitted.

[0163] Reference Figure 14 A second preliminary protective layer BPL-2a can be formed on the substrate SUB. The second preliminary protective layer BPL-2a can include substantially the same material as the first preliminary protective layer BPL-1a.

[0164] The second preliminary protective layer BPL-2a can be applied on the substrate SUB by a spraying device JT.

[0165] The spraying device JT can apply a resin RS such that the first protective layer BPL-1 is located between the polarization layer POL and the second preliminary protective layer BPL-2a.

[0166] The spraying device JT can apply a resin RS such that the second preliminary protective layer BPL-2a is at the second region BA and at least a part of the third region NBA2.

[0167] The second preliminary protective layer BPL-2a can have a thickness HT-2a in the third direction DR3, and this thickness HT-2a is less than the thickness HT-1 of the first protective layer BPL-1 in the third direction DR3. Due to the thickness HT-1 of the first protective layer BPL-1, the second preliminary protective layer BPL-2a can bypass the first protective layer BPL-1 and can not be applied between the first protective layer BPL-1 and the polarization layer POL. The first protective layer BPL-1 can prevent the second preliminary protective layer BPL-2a from contacting the polarization layer POL. The spraying device JT can apply a resin RS such that the polarization layer POL and the second preliminary protective layer BPL-2a are separated from each other. The spraying device JT can apply a resin RS such that the circuit board FP and the second preliminary protective layer BPL-2a are separated from each other.

[0168] Figure 15 is a cross-sectional view showing a part of the process of forming the second preliminary protective layer according to an embodiment of the present disclosure. The components described in Figure 9 and Figures 12 to 14 will be respectively referred to by the same reference numerals, and the repeated description of these components will be omitted.

[0169] Reference Figure 14 and Figure 15 , the second preliminary protective layer BPL-2a can be cured by irradiating the second preliminary protective layer BPL-2a with light UV. As the second preliminary protective layer BPL-2a is cured, a second protective layer BPL-2 can be formed.

[0170] The first protective layer BPL-1 can be hardened by irradiating the first protective layer BPL-1 with light UV.

[0171] The first protective layer BPL-1 and the second protective layer BPL-2 can be spaced apart from the polarizing layer POL in the first direction DR1.

[0172] According to an embodiment of the present disclosure, the first protective layer BPL-1 can be spaced apart from the polarizing layer POL. The second protective layer BPL-2 can be spaced apart from the protective film POL-P. Therefore, it is possible to prevent the second protective layer BPL-2 from protruding more than the polarizing layer POL due to surface tension contact with the protective film POL-P and the polarizing layer POL through the protective film POL-P. It is possible to prevent the window at the polarizing layer POL from bending / deforming due to the protruding second protective layer BPL-2. Therefore, the product reliability of the display device DD (refer to Figure 1 ) can be improved.

[0173] The protective film POL-P can be removed before forming the window.

[0174] In a plane, a part of the first protective layer BPL-1 can overlap with the first region NBA1. In a plane, a part of the first protective layer BPL-1 can overlap with the first support layer PF1.

[0175] According to an embodiment of the present disclosure, the first protective layer BPL-1 and the second protective layer BPL-2 can allow a neutral surface to be formed at the circuit element layer DP-CL. The first protective layer BPL-1 and the second protective layer BPL-2 can prevent cracks from being generated in the circuit element layer DP-CL. Therefore, the reliability of the display device DD (refer to Figure 1 ) can be improved.

[0176] Figure 16 is an enlarged cross-sectional view showing a part of a display device according to an embodiment of the present disclosure.

[0177] Refer to Figure 16 , the display device DD (refer to Figure 1 ) can include a protective layer BPL. The protective layer BPL can include a first protective layer BPL-1 and a second protective layer BPL-2. The first protective layer BPL-1 and the second protective layer BPL-2 can be integrally formed with each other. The first protective layer BPL-1 and the second protective layer BPL-2 can be made of substantially the same material as each other.

[0178] Each of the first thickness HT1 to the fifth thickness HT5 can be measured in the second region BA. The first thickness HT1 can be measured at the thickest position of the protective layer BPL (e.g., at the first position). The first position can be a position of the first protective layer BPL-1. The second position to the fifth position can be spaced apart from the first position in a direction away from the polarization layer POL in the first direction DR1 (e.g., at a predetermined distance), where the second thickness HT2 to the fifth thickness HT5 are measured at the second position to the fifth position, respectively. The first position can be closer to the first region NBA1 than each of the second position to the fifth position. The first thickness HT1 can be greater than each of the second thickness HT2, the third thickness HT3, the fourth thickness HT4, and the fifth thickness HT5.

[0179] Table 1 shows the first thickness HT1 to the fifth thickness HT5 of each of the plurality of protective layers TT1 to TT9 formed by using Figures 12 to 15 the process.

[0180] [Table 1]

[0181]

[0182] Referring to Table 1, the first thickness HT1 of each of the plurality of protective layers TT1 to TT9 can be greater than each of the second thickness HT2 to the fifth thickness HT5 of each of the plurality of protective layers TT1 to TT9. The average thickness of the plurality of protective layers TT1 to TT9 can be about 88 μm. Here, the minimum thickness can be about 82 μm. The maximum thickness can be about 99 μm. The maximum thickness can be the first thickness HT1.

[0183] According to an embodiment of the present disclosure, a display device can include a polarization layer and a protective layer on a substrate. A protective film for protecting the polarization layer can be on the top surface of the polarization layer. The polarization layer and the protective film can be spaced apart from the protective layer. Thus, it can be prevented that the protective layer protrudes more than the polarization layer due to contact with the protective film and the polarization layer through the surface tension of the protective film. Therefore, it can be prevented that the window at the polarization layer is bent / deformed due to the protruding protective layer, and the product reliability of the display device can be improved.

[0184] Although embodiments of the present invention have been described, it should be understood that the present invention should not be limited to these embodiments, but various changes and modifications can be made by those of ordinary skill in the art within the spirit and scope of the claimed present invention. Therefore, the actual protection scope of the present disclosure should be determined by the technical scope of the appended claims and their functional equivalents included therein.

Claims

1. A display device, comprising: a substrate including a first region and a second region bent from the first region; a display element layer on the first region; a encapsulation layer on the display element layer to encapsulate the display element layer; a polarization layer on the encapsulation layer; a support layer under the first region; a first protective layer on the first region and the second region; and a second protective layer on the second region and in contact with the first protective layer.

2. The display device according to claim 1, wherein, The maximum thickness of the first protective layer is greater than the maximum thickness of the second protective layer.

3. The display device according to claim 1, Among them, wherein the first protective layer is formed by a first curing process, and wherein the second protective layer is formed by a second curing process different from the first curing process.

4. The display device according to claim 3, wherein, The second curing process is performed after the first curing process.

5. The display device according to claim 1, wherein, The first protective layer and the second protective layer include the same material.

6. The display device according to claim 1, Among them, wherein the substrate further includes a third region spaced apart from the first region, and the second region is between the first region and the third region, and wherein the first protective layer is not provided on the third region, and the second protective layer is provided on the third region.

7. The display device according to claim 1, wherein, The first protective layer is spaced apart from the polarization layer.

8. The display device according to claim 1, wherein, The width of the overlapping region of the first region and the first protective layer in a first direction is about 140 μm or greater.

9. The display device according to claim 1, wherein, When observed in a plan view, the support layer does not overlap with the second protective layer.

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