Class-F-based dual-frequency power amplifier, signal transmitter and radar system

Abstract

The invention discloses a class-F-based dual-frequency power amplifier, a signal transmitter and a radar system. The dual-frequency power amplifier comprises a dual-frequency input matching circuit, a dual-frequency grid direct current bias circuit, a stabilizing circuit, a transistor, a dual-frequency harmonic control-direct current bias composite circuit and a dual-frequency output matching circuit. The stabilizing circuit is connected with the double-frequency input matching circuit and a transistor grid, and the double-frequency grid direct current biasing circuit is connected in the double-frequency input matching circuit in parallel; the double-frequency harmonic control-direct current bias composite circuit comprises a fourth microstrip line and a double-frequency drain electrode direct current bias circuit, the fourth microstrip line is connected with the drain electrode of the transistor and the double-frequency output matching circuit, and the double-frequency drain electrode direct current bias circuit adopts a T-shaped structure and is connected between the fourth microstrip line and the double-frequency output matching circuit in parallel. According to the invention, the circuit structure is simplified, the miniaturization of the power amplifier is facilitated, and the cost is reduced.

Description

Technical Field

[0001] The present invention belongs to the technical field of radar systems, and relates to a class-F based dual-frequency power amplifier, a signal transmitter, and a radar system. Background Art

[0002] In the existing class-F power amplifier, the dual-frequency harmonic control circuit and the dual-frequency drain DC bias circuit are designed separately, and the circuit structure is relatively complex, which is not conducive to the miniaturization of the power amplifier and has a high cost. Summary of the Invention

[0003] Object of the Invention: The first object of the present invention is to provide a class-F based dual-frequency power amplifier with a simple circuit structure and low cost; the second object of the present invention is to provide a signal transmitter including the dual-frequency power amplifier; the third object of the present invention is to provide a radar system including the signal transmitter.

[0004] Technical Solution: A class-F based dual-frequency power amplifier of the present invention includes a dual-frequency input matching circuit A, a dual-frequency gate DC bias circuit, a stabilization circuit D, a transistor, a dual-frequency harmonic control-DC bias composite circuit C, and a dual-frequency output matching circuit B; the stabilization circuit D is connected to the dual-frequency input matching circuit A and the transistor gate, and the dual-frequency gate DC bias circuit is connected in parallel in the dual-frequency input matching circuit A; the dual-frequency harmonic control-DC bias composite circuit C includes a fourth microstrip line TL4 and a dual-frequency drain DC bias circuit, the fourth microstrip line TL4 is connected to the transistor drain and the dual-frequency output matching circuit B, and the dual-frequency drain DC bias circuit adopts a T-shaped structure and is connected in parallel between the fourth microstrip line TL4 and the dual-frequency output matching circuit B.

[0005] Further, the dual-frequency drain DC bias circuit includes a ninth microstrip line TL9, a tenth microstrip line TL10, and a second open stub TL11. The ninth microstrip line TL9 is connected in parallel between the fourth microstrip line TL4 and the dual-frequency output matching circuit B. The tenth microstrip line TL10 and the second open stub TL11 are respectively connected to the other end of the ninth microstrip line TL9, and the other end of the tenth microstrip line TL10 is grounded through a first decoupling capacitor.

[0006] Further, the dual-frequency gate DC bias circuit has the same structure as the dual-frequency drain DC bias circuit; the dual-frequency input matching circuit A includes a first DC blocking capacitor, a third microstrip line TL3, a second microstrip line TL2, and a first microstrip line TL1 connected in sequence. The first microstrip line TL1 is connected to the stabilization circuit D; the ninth microstrip line TL9 of the dual-frequency gate DC bias circuit is connected in parallel between the second microstrip line TL2 and the first microstrip line TL1.

[0007] Further, the stabilization circuit D includes a large resistor and a second decoupling capacitor connected in series, where the large resistor is connected to the first microstrip line TL1 and the transistor gate respectively, and the second decoupling capacitor is grounded; the resistance value of the large resistor is 10 to 25 ohms.

[0008] Further, the dual-frequency output matching circuit B includes a first open stub TL8, and a fifth microstrip line TL5, a sixth microstrip line TL6, a seventh microstrip line TL7, and a second DC-blocking capacitor connected in sequence; the first open stub TL8 is connected in parallel between the sixth microstrip line TL6 and the seventh microstrip line TL7; the fifth microstrip line TL5 is connected to the fourth microstrip line TL4.

[0009] Further, the first microstrip line TL1, the fourth microstrip line TL4, the sixth microstrip line TL6, the seventh microstrip line TL7, the first open stub TL8, the ninth microstrip line TL9, the tenth microstrip line TL10, and the second open stub TL11 are loaded on an alumina ceramic substrate with a dielectric constant of 9.9.

[0010] Further, the second microstrip line TL2, the third microstrip line TL3, and the fifth microstrip line TL5 are loaded on a ceramic substrate with a dielectric constant of 85.

[0011] Further, at the high-frequency point f h let the electrical lengths of the ninth microstrip line TL9 and the second open stub TL11 be 90°;

[0012] θ a @f h =θ c @f h =90°(1)

[0013] where θ a is the electrical length of the ninth microstrip line TL9; θ c is the electrical length of the second open stub TL11;

[0014] Further, Z DC and Z0 are:

[0015] Z0@f l =j(Z b Z c tan nθ b ) / (Z c -Z b tan nθ b tan nθ c ) (2)

[0016] Z DC @f l =Z a (Z0@f l +jZa tan nθ a ) / (Z a +jZ0@f l tan nθ a ) (3)

[0017] Wherein, f l is the low-frequency point; Z a , Z b , Z c are the characteristic impedances of the ninth microstrip line TL9, the tenth microstrip line TL10, and the second open stub TL11 in sequence; n = f l / f h ;

[0018] By (2) and (3), making Z DC @f l = 90°, the electrical length θ b of the tenth microstrip line TL10 can be obtained.

[0019] A signal transmitter according to the present invention includes the class-F based dual-band power amplifier described above.

[0020] A radar system according to the present invention includes the signal transmitter described above.

[0021] Beneficial effects: Compared with the prior art, the present invention has the following remarkable advantages: The present invention uses the fourth microstrip line TL4 to replace the original dual-band harmonic control circuit, and combines it with the dual-band drain DC bias circuit of the T-type structure for composite design, which simplifies the circuit structure, is beneficial to realizing the miniaturization of the power amplifier, and reduces the cost at the same time. Brief Description of the Drawings

[0022] Figure 1 is the circuit topology of the class-F based dual-band power amplifier provided by the embodiment of the present invention;

[0023] Figure 2 is the load impedance diagram of the entire output matching circuit (including the dual-band output matching circuit B and the dual-band harmonic control-DC bias composite circuit C) in the gold wire bonding plane in the embodiment of the present invention;

[0024] Figure 3 is the output power and drain efficiency diagram of the dual-band power amplifier in the embodiment of the present invention. Detailed Embodiments

[0025] The present invention will be further described below with reference to the drawings.

[0026] As Figure 1As shown in the figure, an embodiment of the present invention provides a class-F based dual-band power amplifier, which includes a dual-band input matching circuit A, a dual-band gate DC bias circuit, a stabilization circuit D, a transistor, a dual-band harmonic control-DC bias composite circuit C, and a dual-band output matching circuit B.

[0027] The dual-band input matching circuit A includes a first DC blocking capacitor, a third microstrip line TL3, a second microstrip line TL2, and a first microstrip line TL1 connected in sequence. Gold wires are used for bonding between each component and the microstrip line.

[0028] The stabilization circuit D includes a large resistor and a second decoupling capacitor connected to each other. The large resistor is respectively connected to the first microstrip line TL1 and the gate of the transistor, and the second decoupling capacitor is grounded. The resistance value of the large resistor is 10 to 25 ohms.

[0029] The dual-band harmonic control-DC bias composite circuit C includes a fourth microstrip line TL4 and a dual-band drain DC bias circuit. The dual-band drain DC bias circuit includes a ninth microstrip line TL9, a tenth microstrip line TL10, and a second open stub TL11. One end of the fourth microstrip line TL4 is connected to the drain of the transistor, the other end of the fourth microstrip line TL4 is connected to the ninth microstrip line TL9, the tenth microstrip line TL10 and the second open stub TL11 are respectively connected to the other end of the ninth microstrip line TL9, and the other end of the tenth microstrip line TL10 is grounded through a first decoupling capacitor.

[0030] The structure of the dual-band gate DC bias circuit is the same as that of the dual-band drain DC bias circuit. The ninth microstrip line TL9 of the dual-band gate DC bias circuit is connected in parallel between the second microstrip line TL2 and the first microstrip line TL1.

[0031] The dual-band output matching circuit B includes a first open stub TL8, and a fifth microstrip line TL5, a sixth microstrip line TL6, a seventh microstrip line TL7, and a second DC blocking capacitor connected in sequence; the first open stub TL8 is connected in parallel between the sixth microstrip line TL6 and the seventh microstrip line TL7; the fifth microstrip line TL5 is connected to the other end of the fourth microstrip line TL4. Gold wires are used for bonding between each component and the microstrip line.

[0032] In this embodiment, the first microstrip line TL1, the fourth microstrip line TL4, the sixth microstrip line TL6, the seventh microstrip line TL7, the first open stub TL8, the ninth microstrip line TL9, the tenth microstrip line TL10, and the second open stub TL11 are loaded on an alumina ceramic substrate with a dielectric constant of 9.9. The second microstrip line TL2, the third microstrip line TL3, and the fifth microstrip line TL5 are loaded on a ceramic substrate with a dielectric constant of 85.

[0033] At the high-frequency point f h Let the electrical lengths of the ninth microstrip line TL9 and the second open stub TL11 be 90°;

[0034] θ a @f h = θ c @f h = 90°(1)

[0035] Among them, θ a is the electrical length of the ninth microstrip line TL9; θ c is the electrical length of the second open stub TL11;

[0036] Furthermore, Z DC and Z0 are:

[0037] Z0@f l = j(Z b Z c tan nθ b ) / (Z c - Z b tan nθ b tan nθ c ) (2)

[0038] Z DC @f l = Z a (Z0@f l + jZ a tan nθ a ) / (Z a + jZ0@f l tan nθ a ) (3)

[0039] Among them, f l is the low-frequency point; Z a , Z b , Z c are the characteristic impedances of the ninth microstrip line TL9, the tenth microstrip line TL10, and the second open stub TL11 in sequence; n = f l / f h ;

[0040] By (2) and (3), making Z DC @f l = 90°, the electrical length θ b of the tenth microstrip line TL10 can be obtained.

[0041] The present invention is adapted to GaN die with a large gate width of 7.2 - 10 mm.

[0042] The working principle of the present invention is specifically introduced as follows:

[0043] The second harmonics of two fundamental frequencies are controlled by a T-shaped structure composed of the ninth microstrip line TL9, the tenth microstrip line TL10, and the second open stub TL11, and the corresponding two frequency points are matched to provide a suitable bias voltage for the normal operation of the power amplifier and suppress the radio frequency signals in the circuit from entering the bias power supply. Through the tuning of the fourth microstrip line TL4, the short circuits of the second harmonics of the low frequency and the high frequency are finally realized, and the impedance conditions of the class-F power amplifier are satisfied at the low frequency point and the high frequency point respectively.

[0044] Assume that the impedances at two frequencies after harmonic regulation are Z S1 = R1 + jX1 and Z S2 = R2 + jX2. The fifth microstrip line TL5 can convert the complex impedances of the two frequencies into a pair of conjugate complex impedances. The characteristic impedance Z5 and the electrical length l5 of the fifth microstrip line TL5 need to satisfy:

[0045]

[0046] where m is any positive integer, n = f l / f h , β l is the propagation constant of the low-end frequency f l .

[0047] The sixth microstrip line TL6, the seventh microstrip line TL7, and the first open stub TL8 transform the output impedances of the two frequencies to 50 ohms.

[0048] As Figure 2 shown, the second harmonics of the low frequency and the high frequency are close to the short-circuit point and respectively meet the impedance conditions of the class-F power amplifier.

[0049] As Figure 3 shown, the test results of the broadband high-power amplifier in the specific implementation of the present invention are shown. The test results show that at 3.2 - 3.6 GHz and 7.1 - 7.3 GHz, the output powers are greater than 6.1 dBm and 45.7 dBm respectively, the gain flatness is 0.7 dB and 0.4 dB respectively, and the drain efficiencies are 50% and 56% respectively.

[0050] In summary, the circuit structure of the dual-frequency power amplifier is relatively simple, and wire bonding is used between circuits, which is convenient to implement and easy to produce in large quantities at low cost.

[0051] The embodiment of the present invention also provides a signal transmitter, including the class-F based dual-frequency power amplifier described in the embodiment of the present invention.

[0052] The embodiment of the present invention also provides a radar system, including the signal transmitter described in the embodiment of the present invention.

Claims

1. A class-F based dual-band power amplifier, characterized in that, It includes a dual-frequency input matching circuit A, a dual-frequency gate DC bias circuit, a stabilization circuit D, a transistor, a dual-frequency harmonic control-DC bias composite circuit C, and a dual-frequency output matching circuit B; the stabilization circuit D is connected to the dual-frequency input matching circuit A and the transistor gate, and the dual-frequency gate DC bias circuit is connected in parallel in the dual-frequency input matching circuit A; the dual-frequency harmonic control-DC bias composite circuit C includes a fourth microstrip line TL4 and a dual-frequency drain DC bias circuit, the fourth microstrip line TL4 is connected to the transistor drain and the dual-frequency output matching circuit B, and the dual-frequency drain DC bias circuit adopts a T-shaped structure and is connected in parallel between the fourth microstrip line TL4 and the dual-frequency output matching circuit B.

2. The class-F based dual-band power amplifier according to claim 1, wherein The dual-frequency drain DC bias circuit includes a ninth microstrip line TL9, a tenth microstrip line TL10, and a second open stub TL11. The ninth microstrip line TL9 is connected in parallel between the fourth microstrip line TL4 and the dual-frequency output matching circuit B. The tenth microstrip line TL10 and the second open stub TL11 are respectively connected to the other end of the ninth microstrip line TL9, and the other end of the tenth microstrip line TL10 is grounded through a first decoupling capacitor.

3. The class-F based dual-band power amplifier according to claim 2, wherein The structure of the dual-frequency gate DC bias circuit is the same as that of the dual-frequency drain DC bias circuit; the dual-frequency input matching circuit A includes a first DC-blocking capacitor, a third microstrip line TL3, a second microstrip line TL2, and a first microstrip line TL1 connected in sequence. The first microstrip line TL1 is connected to the stabilization circuit D; the ninth microstrip line TL9 of the dual-frequency gate DC bias circuit is connected in parallel between the second microstrip line TL2 and the first microstrip line TL1.

4. The class-F based dual-band power amplifier according to claim 3, characterized in that, The stabilization circuit D includes a large resistor and a second decoupling capacitor connected in series. The large resistor is respectively connected to the first microstrip line TL1 and the transistor gate, and the second decoupling capacitor is grounded; the resistance value of the large resistor is 10 to 25 ohms.

5. The class-F based dual-band power amplifier according to claim 3, characterized in that, The dual-frequency output matching circuit B includes a first open stub TL8, and a fifth microstrip line TL5, a sixth microstrip line TL6, a seventh microstrip line TL7, and a second DC-blocking capacitor connected in sequence; the first open stub TL8 is connected in parallel between the sixth microstrip line TL6 and the seventh microstrip line TL7; The fifth microstrip line TL5 is connected to the fourth microstrip line TL4.

6. The class-F based dual-band power amplifier according to claim 5, wherein The first microstrip line TL1, the fourth microstrip line TL4, the sixth microstrip line TL6, the seventh microstrip line TL7, the first open stub TL8, the ninth microstrip line TL9, the tenth microstrip line TL10, and the second open stub TL11 are loaded on an alumina ceramic substrate with a dielectric constant of 9.

9.

7. The class-F based dual-band power amplifier according to claim 5, wherein The second microstrip line TL2, the third microstrip line TL3, and the fifth microstrip line TL5 are loaded on a ceramic substrate with a dielectric constant of 85.

8. The class-F based dual-band power amplifier according to claim 2, characterized in that, At the high-frequency point f h make the electrical lengths of the ninth microstrip line TL9 and the second open stub TL11 be 90°; θ a @f h = θ c @f h = 90°(1) where, θ a is the electrical length of the ninth microstrip line TL9; θ c is the electrical length of the second open stub TL11; Further, Z DC and Z0 are: Z0@f l = j(Z b Z c tan nθ b ) / (Z c - Z b tan nθ b tan nθ c ) (2) Z DC @f l = Z a (Z0@f l + jZ a tan nθ a ) / (Z a + jZ0@f l tan nθ a ) (3) Among them, f l is the low-frequency point; Z a , Z b , Z c are the characteristic impedances of the ninth microstrip line TL9, the tenth microstrip line TL10, and the second open stub TL11, respectively; n = f l / f h ; By (2) and (3), Z DC @f l = 90°, the electrical length θ of the tenth microstrip line TL10 can be obtained b .

9. A signal transmitter, characterized in that, It includes the F-class based dual-frequency power amplifier according to any one of claims 1 to 8.

10. A radar system, characterized in that, It includes the signal transmitter according to claim 9.

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