Low-delay transmission method and system for ultra-high bandwidth OLED (Organic Light Emitting Diode) display drive

Abstract

The invention relates to the technical field of OLED display driving, and discloses a low-delay transmission method and system for ultra-high bandwidth OLED display driving. The method comprises the following steps: carrying out multi-channel wavelength division multiplexing processing on an input optical signal by adopting a bimodal integrated photoelectric conversion array to obtain a plurality of paths of parallel photoelectric signal data streams; performing routing configuration on the multiple paths of parallel photoelectric signal data streams to obtain a photoelectric hybrid data path network; performing real-time temperature monitoring and adaptive impedance matching on the photoelectric hybrid data path network to obtain a target data transmission path; executing multi-region concurrent driving and pixel state prediction based on the target data transmission path to obtain preloaded display data; and performing current modulation and response time optimization on the preloaded display data, and generating an OLED driving signal sequence. According to the requirements of different display contents and application scenes, the optimal transmission mode can be dynamically switched, and the power consumption and heat management are optimized while the display performance is ensured.

Description

Technical Field

[0001] The present invention relates to the technical field of OLED display driving, and particularly to a low-latency transmission method and system for ultra-high bandwidth OLED display driving. Background Art

[0002] Traditional OLED driving chips mainly adopt a pure electrical signal transmission method, and have encountered serious bottlenecks in terms of data bandwidth. Currently, OLED driving chips on the market usually only support a total transmission bandwidth of 2 - 3 Tb / s, which can no longer meet the signal transmission requirements of the new generation of 4K / 8K resolution, 120 Hz and above refresh rate display panels, especially in scenarios such as VR / AR that require ultra-low latency.

[0003] Another key problem faced by traditional OLED driving technology is the challenges of signal delay and signal integrity. The row scanning driving method commonly used in the prior art cannot achieve multi-region concurrent driving, resulting in a pixel response time generally above 10 μs, and serious dynamic image blurring in high-speed content switching scenarios, seriously affecting the user experience. At the same time, traditional driving chips will generate a large amount of heat under high-bandwidth transmission conditions, forming local hotspots, which not only reduces the reliability of signal transmission, but also accelerates the aging process of the OLED display panel and reduces the service life of the device. Summary of the Invention

[0004] The present invention provides a low-latency transmission method and system for ultra-high bandwidth OLED display driving. The present invention can dynamically switch the optimal transmission mode according to the requirements of different display contents and application scenarios, and optimize power consumption and heat management while ensuring display performance.

[0005] In the first aspect, the present invention provides a low-latency transmission method for ultra-high bandwidth OLED display driving, and the low-latency transmission method for ultra-high bandwidth OLED display driving includes: Using a dual-mode integrated optoelectronic conversion array to perform multi-channel wavelength division multiplexing processing on the input optical signal to obtain multiple parallel optoelectronic signal data streams; Performing routing configuration on the multiple parallel optoelectronic signal data streams through a reconfigurable optoelectronic hybrid switching matrix to obtain an optoelectronic hybrid data path network; Performing real-time temperature monitoring and adaptive impedance matching on the optoelectronic hybrid data path network to obtain a target data transmission path; Performing multi-region concurrent driving and pixel state prediction based on the target data transmission path to obtain pre-loaded display data; Performing current modulation and response time optimization on the pre-loaded display data to generate an OLED driving signal sequence.

[0006] In combination with the first aspect, in the first implementation manner of the first aspect of the present invention, the dual-mode integrated optoelectronic conversion array is used to perform multi-channel wavelength division multiplexing processing on the input optical signal to obtain multiple parallel optoelectronic signal data streams, including: The input optical signal is input into a wavelength division multiplexer of the dual-mode integrated optoelectronic conversion array for wavelength separation to obtain M independent optical signal channels; Channel separation is performed on the M independent optical signal channels to obtain multi-wavelength optical signals; The multi-wavelength optical signals are subjected to optoelectronic conversion through PIN structure nano-optical detectors in the dual-mode integrated optoelectronic conversion array to obtain multiple parallel electrical signals; The multiple parallel electrical signals are subjected to electrical signal modulation to obtain modulated electrical signals; The modulated electrical signals are input into a digital signal processing unit for fast Fourier transform and quadrature amplitude modulation signal demodulation to obtain multiple parallel optoelectronic signal data streams.

[0007] In combination with the first aspect, in the second implementation manner of the first aspect of the present invention, the reconfigurable optoelectronic hybrid switching matrix is used to perform routing configuration on the multiple parallel optoelectronic signal data streams to obtain an optoelectronic hybrid data path network, including: A programmable cross-switch is used to perform signal distribution on the multiple parallel optoelectronic signal data streams to obtain partitioned signal data; According to the reconfigurable optoelectronic hybrid switching matrix, a transmission architecture and configuration data supporting all-optical mode, hybrid mode, and all-electrical mode are configured; In combination with the transmission architecture and the configuration data, state setting is performed through an SRAM memory to obtain switching matrix control parameters; Based on the switching matrix control parameters, routing channel allocation is performed on the partitioned signal data to obtain an initial data transmission path, and an optoelectronic hybrid data path network is constructed based on the initial data transmission path.

[0008] In combination with the first aspect, in the third implementation manner of the first aspect of the present invention, real-time temperature monitoring and adaptive impedance matching are performed on the optoelectronic hybrid data path network to obtain a target data transmission path, including: Temperature data of each area in the display driving chip is collected through a digital temperature sensor array distributed around the optoelectronic hybrid data path network to obtain real-time temperature mapping data; Based on the real-time temperature mapping data, adaptive impedance matching is performed on the signal channels of the optoelectronic hybrid data path network to obtain temperature-compensated signal channels; Hot spot area identification is performed on the real-time temperature mapping data to obtain high-temperature area coordinate information; Based on the high-temperature area coordinate information, route adjustment is performed on the temperature-compensated signal channels to obtain a signal transmission path that bypasses the hot spot; Perform channel bit rate statistics and regional power consumption density calculation on the signal transmission path that bypasses the hot spot to obtain a target data transmission path.

[0009] Combined with the first aspect, in the fourth implementation manner of the first aspect of the present invention, the adaptive impedance matching of the signal channels of the optoelectronic hybrid data path network based on the real-time temperature mapping data to obtain temperature-compensated signal channels includes: Calculate the heat flux density distribution data of each area in the display driver chip according to the real-time temperature mapping data; Extract parameters from the heat flux density distribution data and the signal frequency data of the optoelectronic hybrid data path network to obtain impedance input parameters; Perform impedance matching calculation based on the impedance input parameters to obtain the target impedance value of each signal channel; Dynamically adjust the optoelectronic hybrid data path network according to the target impedance value to obtain impedance-matched signal channels, and perform signal integrity measurement on the impedance-matched signal channels to obtain temperature-compensated signal channels.

[0010] Combined with the first aspect, in the fifth implementation manner of the first aspect of the present invention, the multi-region concurrent driving and pixel state prediction based on the target data transmission path to obtain pre-loaded display data includes: Divide the OLED display panel into N pixel driving units based on the target data transmission path; Perform multi-frame acquisition and storage on the historical frame data in the N pixel driving units to obtain a historical pixel state tensor; Input the historical pixel state tensor into a sub-pixel prediction engine including 8 GPU computing units and 128 processing elements for non-linear activation function calculation to obtain the next-frame pixel change prediction data; Perform correlation calculation on adjacent regions in the N pixel driving units based on the next-frame pixel change prediction data to obtain a region correlation matrix; Perform data pre-loading priority allocation according to the region correlation matrix to obtain pre-loaded display data.

[0011] Combined with the first aspect, in the sixth implementation manner of the first aspect of the present invention, the performing current modulation and response time optimization on the pre-loaded display data to generate an OLED driving signal sequence includes: Perform digital-to-analog conversion on the pre-loaded display data to obtain an initial driving current value; Extract historical brightness, spatial position, and cumulative working time parameters for each pixel based on the initial drive current value to obtain a sub-pixel compensation factor; Perform non-linear compensation on the initial drive current value according to the sub-pixel compensation factor to obtain an accurately compensated pixel drive current; Perform adaptive control on the signal rise time based on the accurately compensated pixel drive current to obtain a drive signal waveform with optimized response time; Select pre-drive and fast discharge paths for the drive signal waveform with optimized response time according to the bright-dark change type to generate an OLED drive signal sequence.

[0012] In a second aspect, the present invention provides a low-latency transmission system for ultra-high bandwidth OLED display driving. The low-latency transmission system for ultra-high bandwidth OLED display driving includes: A wavelength division module for performing multi-channel wavelength division multiplexing processing on an input optical signal using a dual-mode integrated optoelectronic conversion array to obtain a multi-channel parallel optoelectronic signal data stream; A routing configuration module for performing routing configuration on the multi-channel parallel optoelectronic signal data stream through a reconfigurable optoelectronic hybrid switching matrix to obtain an optoelectronic hybrid data path network; An impedance matching module for performing real-time temperature monitoring and adaptive impedance matching on the optoelectronic hybrid data path network to obtain a target data transmission path; A state prediction module for performing multi-region concurrent driving and pixel state prediction based on the target data transmission path to obtain pre-loaded display data; A response time optimization module for performing current modulation and response time optimization on the pre-loaded display data to generate an OLED drive signal sequence.

[0013] In the technical solution provided by the present invention, through the dual-mode integrated optoelectronic conversion array and multi-channel wavelength division multiplexing technology, a higher data transmission bandwidth than traditional purely electrically driven chips is achieved, effectively meeting the data transmission requirements of high-resolution and high-refresh-rate OLED display panels. By adopting a reconfigurable optoelectronic hybrid switching matrix and multi-region concurrent driving technology, the simultaneous driving of pixels in multiple discontinuous regions is realized, significantly reducing the pixel response time, reducing dynamic image blurring, and improving the display effect in application scenarios such as VR / AR and high-frame-rate games. Through real-time temperature monitoring, adaptive impedance matching, and hot spot avoidance routing algorithms, the thermal management problem under ultra-high bandwidth transmission is effectively solved, the chip temperature is reduced, and the service life of the OLED display panel is extended. Based on the sub-pixel prediction engine and precise current control technology, dynamic compensation for the historical brightness, spatial position, and cumulative working time of each pixel is realized, effectively eliminating screen aging and brightness unevenness problems, and improving the accuracy and consistency of the displayed content. Combining the region-aware concurrent driving strategy and sub-pixel prediction technology, intelligent preloading and cache management of display data are realized, optimizing the data transmission path and storage resource utilization, and reducing the overall system power consumption. Through a three-mode transmission architecture that supports all-optical mode, hybrid mode, and all-electric mode, it is possible to dynamically switch the optimal transmission mode according to the requirements of different display contents and application scenarios, optimizing power consumption and heat management while ensuring display performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0015] Figure 1 It is a schematic flowchart of a low-latency transmission method for ultra-high bandwidth OLED display driving provided by an embodiment of the present application; Figure 2 It is a schematic block diagram of the structure of a low-latency transmission system for ultra-high bandwidth OLED display driving provided by an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0016] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, rather than all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts fall within the scope of protection of the present invention.

[0017] The flowcharts shown in the accompanying drawings are only illustrative examples and do not necessarily include all content and operations / steps, nor do they have to be executed in the order described. For example, some operations / steps can be decomposed, combined, or partially merged, so the actual execution order may change based on the actual situation.

[0018] It should also be understood that the terms used in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. As used in the specification of this application and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an", and "the" are intended to include the plural forms.

[0019] It should be further understood that the term "and / or" used in the specification of this application and the appended claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0020] The following will describe in detail some embodiments of this application with reference to the accompanying drawings. Without conflict, the following embodiments and the features in the embodiments can be combined with each other.

[0021] Please refer to Figure 1 , Figure 1 which is a schematic flowchart of a low-latency transmission method for ultra-high bandwidth OLED display driving provided by an embodiment of this application. As Figure 1 shown, the low-latency transmission method for ultra-high bandwidth OLED display driving provided by the embodiment of this application includes steps S100 to S500.

[0022] Step S100: Use a dual-mode integrated optoelectronic conversion array to perform multi-channel wavelength division multiplexing processing on the input optical signal to obtain multiple parallel optoelectronic signal data streams; It can be understood that the execution subject of the present invention can be a low-latency transmission system for ultra-high bandwidth OLED display driving, or a terminal or a server. Specifically, it is not limited here. The embodiment of the present invention takes the server as the execution subject as an example for illustration.

[0023] Specifically, the broadband input optical signal from the master control module or the upstream transport layer is coupled into the dual-mode integrated optoelectronic conversion array. A wavelength division multiplexer is integrated in the array. The multiplexer adopts an asymmetric interferometer structure based on the gradient refractive index structure. By designing the length difference between the two interference arms, optical signals of different wavelengths are separated after interference respectively, realizing the output of multiple independent optical signal channels. The interval between adjacent channels is strictly controlled to ensure the demultiplexing accuracy. The multiple independent optical signal channels are introduced into the corresponding optical detection unit through the coupling waveguide with gradient refractive index to achieve channel-level separation, and each multi-wavelength optical signal is guided to different nanoscale photodetectors respectively. In the optoelectronic conversion stage, each photodetector is composed of multiple regions formed by precise doping. The thickness of the middle intrinsic region is controlled to ensure high sensitivity to a specific wavelength. At the same time, through the precise formulation of the material composition, the response rate and quantum efficiency of the device are effectively improved, enabling each detection unit to convert the multi-wavelength optical signal into a multi-channel parallel electrical signal output with extremely high efficiency. At the output end after optoelectronic conversion, an electrical signal modulation operation is performed on the multi-channel parallel electrical signals. This process relies on the high-speed electro-optic modulator integrated in the optoelectronic array. By using the electro-optic effect, the modulation signal generated by the subsequent system controller is loaded onto each electrical signal carrier, resulting in a large modulation depth and a high modulation bandwidth, ensuring that the system has the ability to process high-density data streams. The modulated electrical signals are input into the digital signal processing unit arranged in the circuit layer. The unit adopts a high-frequency processor supporting multi-point fast transform operations. Through parallel computing, the time-domain electrical signals are accurately mapped to the frequency domain, and the amplitude modulation signal demodulation is performed, so that the encoded information originally carried at different frequencies is efficiently restored to the digital data stream available for display control, obtaining a multi-channel parallel optoelectronic signal data stream.

[0024] Step S200: Route and configure the multi-channel parallel optoelectronic signal data stream through the reconfigurable optoelectronic hybrid switching matrix to obtain an optoelectronic hybrid data path network; Specifically, a crossbar switch structure with programmable capabilities is built in the core area of the chip. By integrating high-density complementary metal oxide semiconductor cells, this structure forms a three-dimensional reconfigurable matrix framework, enabling multi-channel parallel optoelectronic signal data to be quickly and flexibly distributed according to preset rules after entering the switching matrix. This process realizes the partition processing of the signal domain through the combination of multiple sub-matrices, divides the original data stream into multiple independent partition signal data based on channel load, target pixel area, or display content priority, and constructs an input-output mapping relationship with directionality and independence. Set the transmission mode structure according to the reconfigurable architecture of the switching matrix, and generate configuration data through the controller to define the working state of the current matrix. This transmission architecture supports three working modes: the all-optical mode, in which signals are directly forwarded through optical waveguides at the cross nodes, suitable for long-distance high-bandwidth channels; the hybrid mode, in which some signals are first transmitted in the optical domain and then locally converted to electrical signals at the nodes to support complex re-modulation or path adjustment, and then converted back to optical signals; the all-electrical mode, in which all channels are scheduled, driven, and synchronized in the electrical domain, suitable for low-speed channels or temporary obstacle avoidance requirements. Among the three modes, dynamically retrieve the previously calculated configuration data, select the optimal transmission method according to different channel states, transmission priorities, temperature loads, etc., to achieve the coordinated optimization of signal quality and system energy consumption. Based on the above configuration structure, perform state setting operations through the static random access memory arranged in the control layer. As a low-latency addressable storage module, SRAM is used to write and update the current working parameters of the switching matrix, and to feedback the control register values required by the switching matrix controller in real time, obtaining stable switching matrix control parameters with a synchronous timing reference. Based on the switching matrix control parameters, perform routing channel allocation operations on the partition signal data, dynamically map the input signals to the target output channels, and form a data path map covering the entire chip. This routing channel allocation not only considers the connection relationship of the channels themselves, but also comprehensively considers the path transmission distance, congestion of the cross nodes, and power consumption and heat distribution characteristics to generate an initial data transmission path. On this basis, all paths are assembled into a stable-running optoelectronic hybrid data path network, which has ultra-low latency, high-bandwidth tolerance, and dynamic configuration capabilities, and can be quickly reconfigured according to changes in the display content and the working state of the system.

[0025] Step S300: Perform real-time temperature monitoring and adaptive impedance matching on the optoelectronic hybrid data path network to obtain the target data transmission path; Specifically, a high-precision thermal sensing system is established inside the display driver chip. This system relies on a distributed digital temperature sensor array. These sensors are evenly arranged around the optoelectronic hybrid data path network and adopt a high-sensitivity bandgap reference source structure to monitor the thermal states of various local areas of the chip in real time. The outputs of the sensor array are uniformly collected via an analog-to-digital converter, and the temperature data is input into the temperature mapping buffer of the system at a fixed frequency to form a temperature distribution map with spatial resolution ability. This temperature mapping data reflects the current thermal field state of the chip. An adaptive impedance matching operation based on temperature parameters is performed on the signal channels of the optoelectronic hybrid data path network based on the real-time temperature mapping data. This operation is based on a preset non-linear impedance adjustment model, which dynamically adjusts the matching resistance, capacitance, and signal drive level of each channel under different temperature conditions, so that the signal can still maintain a transmission state with a complete waveform and minimum reflection in different temperature regions. This adjustment mechanism performs differential regulation for the local temperature rise of each signal path to ensure that during high-speed data transmission, no channel will have signal attenuation or error code problems due to sudden temperature changes, and a set of signal channels after temperature compensation is obtained. An operation for identifying hot spot regions is performed on the real-time temperature mapping data. By setting a temperature threshold, scanning the temperature distribution map in each monitoring cycle, and performing clustering and boundary fitting calculations on the regions exceeding the threshold, the contour of the high-temperature region and its spatial coordinate information are extracted. Each high-temperature region is defined as a region with potential transmission risks, and this information is input as a constraint into the next routing adjustment process. According to the spatial position and coverage of the high-temperature region, combined with the current signal path planning map, the path originally passing through the hot spot region is dynamically adjusted, so as to re-allocate new detour paths for the affected signals. After obtaining the signal transmission paths bypassing the hot spot, bit rate statistics and power consumption density evaluation are performed on these new paths. By accumulating the bit rate index of each signal channel and the energy consumption parameter required per bit, the total power consumption of this path in its corresponding physical region is calculated, and the power consumption density value is deduced according to the regional area to identify whether there is a new trend of heat accumulation. On this basis, comparing the thermal balance and transmission stability of all candidate paths, the path with low latency, low interference, high stability and meeting the thermal balance condition is preferentially selected as the final target data transmission path.

[0026] According to the real-time temperature mapping data, an integrated thermal analysis engine is called to perform multi-region heat flow modeling on the entire display driver chip. This thermal analysis model uses a two-dimensional heat conduction simulation method based on a finite element mesh to estimate the heat flux density in the regions where each functional unit and signal channel in the chip is located. By comparing the regional temperature gradient, thermal conductivity, and package structure parameters, the direction and intensity of the heat energy flow in each region are calculated, and a heat flux density distribution map is constructed. The heat flux density distribution data is extracted in a parameter-linked manner with the signal frequency data in the current operating optoelectronic hybrid data path network. During this process, the heat flux density values are mapped according to the position of each channel, and combined with the dominant frequency during the actual operation of the channel, the key input parameters for impedance matching calculation are extracted. These parameters include the local heat perturbation intensity, frequency coupling characteristics, high-frequency loss factor of the material, and parasitic characteristics caused by the wiring topology. These physical properties together constitute an impedance input set that reflects the thermal-frequency composite behavior of the channel. Based on the extracted impedance input parameters, a dynamic impedance matching module is called to perform channel-level impedance adjustment calculation. This calculation aims to set the impedance value for each signal channel in the optimal operating state, so as to minimize the reflection coefficient and improve the signal transmission stability under the current temperature conditions. By comparing the transmission efficiency and waveform integrity indicators of the channel under different impedance settings, while ensuring low-loss transmission, the impact of impedance deviation caused by temperature increase is minimized as much as possible, and an independent target impedance value is generated for each channel. For the target impedance value, by adjusting the matching network circuit structure inside the channel and dynamically loading the precision resistors and variable capacitor units in the adjustable matching module, the electrical characteristics of the channel body are reconstructed, so that the adjusted channel has new impedance characteristics. After completing the impedance dynamic adjustment for all channels, signal integrity measurement is performed on each updated channel. The high-speed sampling module and the bit error rate detection mechanism are used to comprehensively evaluate parameters such as the signal eye diagram, amplitude jitter, and edge response to ensure that the adjustment operation does not introduce new waveform distortion or spectrum expansion problems. For channels that meet the integrity requirements, they are marked as effective signal channels after temperature compensation and are preferentially selected to participate in data transmission during the subsequent display driving process.

[0027] Step S400: Based on the target data transmission path, perform multi-region concurrent driving and pixel state prediction to obtain pre-loaded display data; Specifically, on the system architecture, the OLED display panel is structurally divided into regions according to the determined target data transmission path. This division is based on multi-dimensional factors such as physical wiring, transmission delay, load balancing, and thermal distribution, and divides the entire panel into N pixel driving units with independent control capabilities. Each unit consists of a corresponding driving control logic, a power supply scheduling module, and a local cache unit to achieve parallel driving capabilities at the hardware level. Within each pixel driving unit, the brightness states of pixel points in recent frames are continuously collected, and multi-frame data is uniformly stored in the on-chip storage module to form a structured historical pixel state tensor. The above historical pixel state tensor is input into the internally integrated sub-pixel prediction engine. This engine uses a heterogeneous processing cluster composed of 8 GPU computing units, and each GPU unit contains 128 parallel processing elements for performing non-linear function fitting operations on high-dimensional spatio-temporal sequences. In the specific calculation process, the prediction engine performs multi-scale convolution processing on the historical tensor through the embedded neural network model, and uses non-linear activation functions to dynamically enhance the pixel change trend, so that the prediction result can more accurately reflect the possible pixel state transitions after the current frame, and outputs the pixel change prediction data for the next frame. This data structure contains both the change trend at the pixel point level and identifies the activity level and content complexity of each region, thus having a high reference value. After obtaining the pixel change prediction data for the next frame, based on the data connectivity between regions, correlation calculations are performed on all N pixel driving units to analyze the state consistency and synchronous change probability between regions in the past frames and future predictions, and a correlation matrix between regions is constructed. This matrix describes the content coupling degree between each sub-region. The higher the correlation value, the higher the pixel update coordination between regions. This matrix will be input into the cache controller and prefetch scheduling module as the core basis for the preloading scheduling strategy. According to the weight levels calculated in the region correlation matrix, data preloading priorities are assigned to each pixel driving unit, and more bandwidth and cache space are preferentially allocated to high-correlation regions or regions with expected high changes to complete the loading preparation for the next frame of data in advance, and structured, partition-level preloaded display data is obtained.

[0028] Step S500: Perform current modulation and response time optimization on the preloaded display data to generate an OLED driving signal sequence.

[0029] Specifically, the pre-loaded display data is subjected to digital-to-analog conversion to generate an initial current signal that can be used to drive the actual pixels to emit light. This digital-to-analog conversion operation is completed by a high-precision digital-to-analog converter array integrated at the chip output. Adopting a current source matrix structure, it achieves multi-channel parallel conversion with extremely low latency while ensuring a microamp-level output resolution, and outputs continuous and highly linearly accurate initial drive current values. Based on the initial drive current values, personalized parameter extraction operations are performed for each OLED pixel, respectively extracting the historical brightness change records related to the pixel, its spatial position coordinates on the panel, and its cumulative working time since its initial use. These three types of parameters together constitute the basic elements for evaluating pixel aging, response non-linearity, and brightness balance. These parameters are analyzed in parallel by a built-in compensation processor, and a sub-pixel compensation factor for the pixel is generated in combination with empirical weights. This factor reflects the degree of response offset and brightness attenuation of the pixel due to long-term use, edge heat accumulation at the position, or high-frequency flicker, thus endowing each pixel with dynamic adjustment capabilities. The sub-pixel compensation factor is applied to the initial drive current value to perform non-linear current compensation calculations. Based on the response model established in the processor, this model models and corrects the deviation between the pixel emission current and the actual brightness response, so that the output current not only matches the logical brightness requirements but also maintains consistency at the physical response level, forming a compensated pixel drive current. To improve the dynamic efficiency of pixel response, an adaptive control mechanism for the signal rise time is introduced in the drive waveform generation stage. According to the target brightness value of the current pixel, the rise time of the drive pulse is automatically adjusted to implement a dynamic adaptation strategy of quickly exciting high-brightness pixels and smoothly transitioning low-brightness pixels. This mechanism dynamically selects an appropriate rise gradient through a look-up table method or a formula algorithm to construct a drive signal waveform with optimized response time. The drive strategy is refined based on the current pixel brightness change trend. If the pixel brightness changes from low to high, the pre-drive mechanism is preferentially selected to boost the response speed by short-time excitation with excess current at the initial stage of driving; while if the pixel brightness changes from high to low, a fast discharge path is triggered to release the residual charge through a parallel channel, shortening the turn-off time and avoiding image ghosting. These two types of strategies are switched and executed within the unified waveform framework, combined with the previously generated response-optimized signal waveform, to jointly form the final OLED drive signal sequence.

[0030] In the embodiments of the present invention, through the dual - mode integrated optoelectronic conversion array and the multi - channel wavelength division multiplexing technology, a higher data transmission bandwidth than traditional purely electrically driven chips is achieved, effectively meeting the data transmission requirements of high - resolution and high - refresh - rate OLED display panels. By adopting a reconfigurable optoelectronic hybrid switching matrix and a multi - region concurrent driving technology, the simultaneous driving of pixels in multiple discontinuous regions is realized, significantly reducing the pixel response time, reducing dynamic image blurring, and improving the display effect in application scenarios such as VR / AR and high - frame - rate games. Through real - time temperature monitoring, adaptive impedance matching, and hot - spot avoidance routing algorithms, the thermal management problem under ultra - high - bandwidth transmission is effectively solved, reducing the chip temperature and extending the service life of the OLED display panel. Based on the sub - pixel prediction engine and precise current control technology, dynamic compensation for the historical brightness, spatial position, and cumulative working time of each pixel is achieved, effectively eliminating screen aging and brightness unevenness problems, and improving the accuracy and consistency of the displayed content. Combining the region - aware concurrent driving strategy and sub - pixel prediction technology, intelligent pre - loading and cache management of display data are realized, optimizing the data transmission path and storage resource utilization, and reducing the overall system power consumption. Through a three - mode transmission architecture that supports all - optical mode, hybrid mode, and all - electrical mode, the best transmission mode can be dynamically switched according to the requirements of different display contents and application scenarios, optimizing power consumption and heat management while ensuring display performance.

[0031] In a specific embodiment, the process of executing step S100 may specifically include the following steps: Input the input optical signal into the wavelength division multiplexer of the dual - mode integrated optoelectronic conversion array for wavelength separation to obtain M independent optical signal channels; Perform channel separation on the M independent optical signal channels to obtain multi - wavelength optical signals; Through the PIN - structured nano - optical detector in the dual - mode integrated optoelectronic conversion array, perform optoelectronic conversion on the multi - wavelength optical signals to obtain multiple parallel electrical signals; Perform electrical signal modulation on the multiple parallel electrical signals to obtain modulated electrical signals; Input the modulated electrical signals into the digital signal processing unit for fast Fourier transform and quadrature amplitude modulation signal demodulation to obtain multiple parallel optoelectronic signal data streams.

[0032] Specifically, the system receives a broadband input optical signal transmitted by an upstream processing module or a high-speed optical communication link. This optical signal carries a large amount of multimode information, with a spectral width covering multiple nanometer bands, and channel division is performed through a precise wavelength separation structure. The input optical signal is coupled into a wavelength division multiplexer integrated at the front end of a dual-mode optoelectronic conversion array. This device is constructed using a micro-nano structure and internally integrates an optical interference unit based on an asymmetric interference path and a grating diffraction unit with high-precision etching. The optical signal is interferentially separated in this structure at a preset wavelength interval and output to multiple ports through different optical paths, generating M independent optical signal channels. Each channel represents an optical frequency signal corresponding to a center wavelength, and there is extremely high isolation and low crosstalk between channels, ensuring signal independence for subsequent processing. The actual optical wave in each channel is conducted to the channel separation sub-module. During the channel separation stage, sub-wavelength-level optical carrier information that may exist in each independent signal channel is refined and directed to ensure that the composite signal with multiple modes and multiple wavelengths in the optical field is accurately extracted and regularized according to spectral characteristics, thus forming a structured multi-wavelength optical signal stream. The structured optical signal is coupled to multiple photoelectric detection units preset inside the dual-mode integrated optoelectronic conversion array. Each detection unit is internally equipped with a nano-scale optical detector with a high-sensitivity PIN structure. This optical detector is constructed using III-V group materials and is made to have a high response speed and a wide spectral band ability through adjusting the doping region depth and the material bandgap. During the optoelectronic conversion process, when the multi-wavelength optical signal irradiates the intrinsic region, an excitation effect occurs under the condition that the photon energy is greater than the bandgap threshold, generating electron-hole pairs. These carriers are quickly accelerated to the corresponding electrodes under the action of an external electric field, thus generating a stable and low-noise multi-channel parallel electrical signal output. After obtaining the preliminary electrical signal, an integrated electrical signal modulation module is introduced in the subsequent channels of the array. This module relies on an electro-optic coupling mechanism to superimpose the control signal on the basic electrical signal, realizing the real-time injection of the modulation signal. This electrical signal modulation process can enhance the signal expression ability and preprocess the information content to make it more suitable for subsequent frequency domain processing mechanisms. Through a modulation unit with a bandwidth in the tens of GHz range, the multi-channel electrical signals on different channels are deeply modulated to form a modulated composite electrical signal stream, which has a high frequency carrying capacity and anti-interference stability. The modulated electrical signal is input to a high-speed digital signal processing unit integrated in the display chip for decoding and recognition processing. This unit internally integrates multiple high-frequency operation cores and has the ability to perform fast Fourier transform in parallel. During this process, the composite form of the original electrical signal in the time domain is converted to a frequency domain representation through the fast Fourier transform algorithm, thereby extracting the spectral structure in each channel. Combining the frequency domain data, the demodulation operation of quadrature amplitude modulation is performed to identify the digital information units carried by different amplitude states.Since the system adopts a multi-level modulation depth design, it often uses 64-QAM as the standard. Each symbol carries 6 bits of valid data. Through parallel decoding, the data information on all data channels can be restored in a very short time. This demodulation process is completed by integrating a hardware acceleration module and a neural network error checking model to ensure the data accuracy and integrity during high-speed transmission. Through the above steps, a multi-channel parallel optoelectronic signal data stream is obtained, and each channel corresponds to specific pixel or display control information.

[0033] In a specific embodiment, the process of executing step S200 may specifically include the following steps: Use a programmable crossbar switch to allocate signals for the multi-channel parallel optoelectronic signal data stream to obtain partitioned signal data; Configure a transmission architecture and configuration data that support all-optical mode, hybrid mode, and all-electric mode according to the reconfigurable optoelectronic hybrid switching matrix; Combined with the transmission architecture and configuration data, perform status setting through the SRAM memory to obtain switching matrix control parameters; Based on the switching matrix control parameters, allocate routing channels for the partitioned signal data to obtain an initial data transmission path, and construct an optoelectronic hybrid data path network based on the initial data transmission path.

[0034] Specifically, a crossbar switch matrix structure with high programmability is introduced in the core area of the chip. As the hardware basis for switching control, this matrix dynamically reorganizes and logically partitions the multi-channel parallel optoelectronic signal data streams output by the upstream module. During this process, each input optoelectronic signal is mapped to the matrix input port. In the internal structure of the matrix, high-density cross nodes are preset, and each node is connected to the control logic unit through a configurable interconnection mechanism, allowing users to dynamically configure the on-off state according to real-time service requirements or hardware load conditions. Through the programmable crossbar switch, the multi-channel parallel optoelectronic signals are logically allocated according to predefined data path or area division rules, so that each group of data streams is mapped to different processing areas, forming partitioned signal data with clear channel ownership and boundary division. According to the transmission requirements of the current display task and the physical constraint conditions of the signal path, the optimal mode is selected from three optional transmission architectures, and the configuration data is generated accordingly. These three architectures are the all-optical mode, the hybrid mode, and the all-electric mode. Among them, the all-optical mode is suitable for large-bandwidth, low-loss transmission scenarios, and the signal is completely forwarded and cross-connected in the form of light inside the entire matrix, realizing zero electromagnetic interference transmission of high-speed signals through the internally constructed optical waveguide path; the hybrid mode is suitable for situations where some signals need to be frequently converted between optoelectronic, and the system performs optoelectronic conversion at specific nodes, relays and amplifies the signals, and then returns to the optical domain or continues to enter the electrical signal path to balance signal integrity and routing flexibility; while the all-electric mode is suitable for local high-interference or temporary reconstruction requirement scenarios, and the system directly completes matrix switching and channel allocation in the form of electrical signals. Based on these three modes, according to parameters such as the complexity of the current OLED driving task, the data density distribution of the display content, and the matrix temperature thermal load status, the optimal mode is automatically selected, and a complete set of transmission configuration data is generated in combination with the logical path information, which includes multiple key control fields such as path identifiers, channel mapping tables, and mode switching masks. The generated transmission configuration data is input into the SRAM static memory in the control layer. SRAM has ultra-low latency access characteristics and can complete data reading and writing operations in nanoseconds, thereby realizing rapid update of the crossbar switch matrix state. During the state setting process, the working state, the path number to which it belongs, and the transmission mode identifier of each cross node are written into the predefined address unit in SRAM, and a configuration loading signal is triggered through the matrix controller, so that all the internal interconnection logics of the matrix complete self-reconfiguration according to the new configuration instructions. With the completion of the state data loading, a set of switching matrix control parameters including the control logic of each cross node is generated. These control parameters are used to guide how the entire cross matrix maps the input signals to the specified output channels during the current task cycle, and at the same time control the transmission medium attributes and processing logics of the signals in the channels.Based on the switching matrix control parameters, route channel allocation is performed on the partitioned signal data. This operation is dynamically planned according to the connection graph and path weight table stored in the matrix controller. The optimal transmission channel is allocated to each group of signals through the path calculation engine, giving priority to factors such as low latency, low congestion, and thermal balance to ensure high reliability and stability of signal transmission. When performing route channel allocation, the delay difference between matrix nodes is sensed in real time, and candidate paths with high delay or high insertion loss risk are eliminated through the structured path screening algorithm, retaining the set of initial data transmission paths with the optimal performance. Based on the initial data transmission paths, all routing structures are summarized into a unified transmission topology structure to construct an optical and electrical hybrid data path network. In this network, all signal paths have clear medium attributes, transmission directions, path priorities, and mode identifiers, and at the same time maintain an optimal load distribution and controllable redundancy mechanism at the physical structure level.

[0035] In a specific embodiment, the process of executing step S300 may specifically include the following steps: Temperature data of each area in the display driving chip is collected through a digital temperature sensor array distributed around the optical and electrical hybrid data path network to obtain real-time temperature mapping data; Based on the real-time temperature mapping data, adaptive impedance matching is performed on the signal channels of the optical and electrical hybrid data path network to obtain signal channels after temperature compensation; Hot spot area identification is performed on the real-time temperature mapping data to obtain high-temperature area coordinate information; Based on the high-temperature area coordinate information, route adjustment is performed on the signal channels after temperature compensation to obtain signal transmission paths bypassing the hot spots; Channel bit rate statistics and regional power consumption density calculation are performed on the signal transmission paths bypassing the hot spots to obtain target data transmission paths.

[0036] Specifically, a digital temperature monitoring system with a distributed structure, real-time sampling ability, and high temperature sensitivity is constructed. This system is deployed along the structural boundary of the entire optoelectronic hybrid data path network and uses a high-density embedded digital temperature sensor array to form the sensing layer. These sensors are designed based on the principle of low power consumption, micro-packaging, and bandgap reference source. Without interfering with the channel signal transmission, they can real-time sense the temperature states of the chip surface and each micro-region inside, and output a stable temperature data stream through high-frequency sampling and parallel analog-to-digital conversion mechanisms. All the collected data is uniformly transmitted to the central temperature management unit and written into the temperature mapping buffer. After spatial interpolation and filtering processing, a real-time temperature mapping graph covering the entire data path network structure is generated. Based on the real-time temperature mapping data, an adaptive impedance matching is performed on the signal channels of the optoelectronic hybrid data path network. Using the correlation parameters between the temperature information and the signal frequency, the impedance state of each channel is dynamically corrected through look-up tables, fitting, or simulation models. During this process, the average temperature of the region where the channel is located is analyzed, and its temperature change rate, neighborhood temperature gradient, and heat diffusion direction are considered to dynamically adjust the configuration states of the controllable matching units such as resistors, capacitors, and inductors in the channel, so that it can still maintain a working state as close as possible to the standard impedance value in high-temperature or transition regions, thereby reducing the occurrence of problems such as reflection, impedance mismatch, and waveform distortion, and ensuring high integrity and stability of data transmission under the background of thermal interference. After completing the temperature compensation operation for all channels, a hot spot area identification task is performed on the temperature mapping graph. This process is jointly processed based on temperature threshold judgment and region clustering algorithms. The system traverses all grid points in the temperature map. When it detects that a certain region continuously exceeds the preset critical temperature and this region shows an aggregation trend in space, it will be marked as a hot spot area; the boundary coordinates and the central position of this high-temperature area are determined through boundary scanning and geometric contour fitting algorithms to obtain the coordinate information of the high-temperature area. Based on the coordinate information of the high-temperature area, a detour routing reconstruction process is initiated. At this stage, according to the current channel topology after temperature compensation and the positions of the thermal obstacle points, the passability of each channel is re-evaluated. All signal paths that cross or are adjacent to the high-temperature area will be set to a restricted state. The system calls a routing algorithm based on the shortest path but with a thermal weight factor to optimize and adjust the original path, so that the signal can bypass the hot spot area as much as possible in the physical space while keeping the overall path length within a controllable range. During the path selection process, parameters such as node connection strength, transmission delay, signal integrity, and the utilization rate of existing channels are given priority consideration. Finally, a detour channel with excellent performance and avoiding high thermal risks is planned for each signal flow, forming an updated signal transmission path that bypasses the hot spot. After obtaining the new transmission paths of all signals, the channel information on each path is statistically analyzed, bit rate sampling and calculation are performed for each path, and the data carrying capacity of each channel during the current period is obtained.Meanwhile, by combining the physical length of the path, the characteristics of the transmission medium, and the unit-bit energy consumption parameter, the power consumption density of the area corresponding to the path within a unit time is calculated. The power consumption density of all paths is mapped into the spatial distribution model, and the system evaluates the further impact of the paths on the local thermal environment based on this. To ensure the global optimality of the final path in terms of performance and thermal distribution, among multiple candidate paths, a path with both high bit rate, high signal integrity, low power consumption density, and low temperature impact is selected as the final target data transmission path. This path set is loaded into the switching matrix configuration module as a new working scheme for the optoelectronic hybrid path network and is continuously used in subsequent operating cycles.

[0037] In a specific embodiment, the process of performing step of adaptively impedance-matching the signal channels of the optoelectronic hybrid data path network based on real-time temperature mapping data to obtain the signal channels after temperature compensation may specifically include the following steps: Calculate the heat flux density distribution data of each area in the display driving chip according to the real-time temperature mapping data; Extract parameters from the heat flux density distribution data and the signal frequency data of the optoelectronic hybrid data path network to obtain the impedance input parameters; Perform impedance matching calculation based on the impedance input parameters to obtain the target impedance value of each signal channel; Dynamically adjust the optoelectronic hybrid data path network according to the target impedance value to obtain the signal channels after impedance matching, and perform signal integrity measurement on the signal channels after impedance matching to obtain the signal channels after temperature compensation.

[0038] Specifically, based on real-time temperature mapping data, thermal flow modeling is performed on all unit blocks with physical area identifiers in the display driver chip. This modeling process uses multi-point difference and finite element methods to divide the chip into multiple thermal grid units. The temperature gradient direction and spatial thermal conductivity parameters of each node are combined to calculate the heat energy flow through each unit per unit time, thereby forming a heat flux density distribution map, revealing the actual flow trend of heat within the chip. The heat flux density data is combined with the operating parameters of each signal channel in the optoelectronic hybrid data path network to perform parameter extraction. For each signal channel's spatial position, the corresponding grid area in the heat flux density map is retrieved, and the signal frequency range carried by the current channel is simultaneously extracted. This information is integrated into the input parameter set required for impedance calculation. The parameter set includes the channel's current thermal load intensity, heat flux gradient direction, signal frequency, and its spectral change rate within the working cycle. Because high-frequency signals are extremely sensitive to thermal fluctuations, especially in frequencies above GHz, reflection problems caused by internal material parasitics, electromagnetic propagation velocity, and impedance mismatch are exacerbated by temperature fluctuations. Therefore, parameter extraction at this stage is not simply a simple superposition of geometry and power consumption, but rather a dynamic characteristic extraction based on thermoelectric coupling mechanisms. The impedance input parameters are fed into the dynamic impedance matching calculation engine, initiating the impedance reconstruction task for each signal channel. This calculation engine uses an established model lookup mechanism and a high-order fitting algorithm to perform impedance calculations based on the changing trends of the material dielectric constant and conductivity under different frequency conditions and the structural response characteristics of the transmission line. Each channel is assigned a target impedance value, which is a matching reference value that minimizes reflection loss and maximizes signal transmission integrity based on its thermal environment and signal operating conditions. Based on this target impedance value, the channel is adjusted at both the structural and electrical levels to achieve impedance matching. At the structural level, variable matching elements distributed throughout the channel paths, including controllable resistor arrays, adjustable capacitor networks, and phase delay elements, are deployed. By adjusting the parameters of these components, the channel's transmission line characteristics are modified. At the electrical level, signal drive levels, rise times, and on-currents are fine-tuned to ensure that the actual transmission of electrical signals more closely matches the propagation characteristics of the ideal model. All adjustments are coordinated by a central control unit, with precise loading achieved in microsecond increments, ensuring high real-time performance and synchronization even with multiple channels running in parallel. After impedance matching is completed, signal integrity measurements are initiated to verify the effectiveness of the adjustments. This process uses a high-speed waveform sampler and error detection engine to assess the signal transmission status of each channel. The system analyzes the signal eye opening, edge jitter amplitude, signal amplitude consistency, and intersymbol crosstalk on each channel. A comprehensive set of signal integrity metrics is constructed by combining the sampled bit error rate and jitter spectrum.If an abnormality still exists after a certain channel is matched, the system will return to the previous stage to re-correct the target impedance value or call an alternative matching path for replacement to ensure that the finally output channel meets the system-level transmission requirements in all indicators. All channels verified through integrity measurement are marked as signal channels after temperature compensation and are put into use as effective paths during the subsequent display data transmission process.

[0039] In a specific embodiment, the process of executing step S400 may specifically include the following steps: Based on the target data transmission path, the OLED display panel is divided into regions to obtain N pixel driving units; Perform multi-frame acquisition and storage of the historical frame data in the N pixel driving units to obtain a historical pixel state tensor; Input the historical pixel state tensor into a sub-pixel prediction engine including 8 GPU computing units and 128 processing elements to perform non-linear activation function calculations to obtain the predicted data of the next-frame pixel change; Based on the predicted data of the next-frame pixel change, perform correlation calculations on adjacent regions in the N pixel driving units to obtain a region correlation matrix; Execute data preloading priority allocation according to the region correlation matrix to obtain preloaded display data.

[0040] Specifically, a regional reconstruction operation at the spatial level is performed on the OLED display panel based on the target data transmission path. Based on the actual signal distribution of the transmission path, combined with multi-dimensional parameters such as channel transmission load, path delay, thermal distribution, and power consumption density, the entire display panel is adaptively divided into regions to form N pixel driving units with independent signal receiving and driving capabilities. Each pixel driving unit is bound to a specific signal channel and is configured with a local buffer storage area, a microcontroller, a pixel address mapping table, and a low-power refresh interface, and has the capabilities of regional autonomous scheduling and asynchronous update, facilitating the independent execution of subsequent parallel driving and local prediction processing. After the regional division is completed, image state sampling is performed on each pixel driving unit in the time dimension. Taking the frame period as the time unit, continuously collect the brightness values, gray scale levels, color components, and driving response times of each pixel point in the previous several frames within this region, and write them into the local historical cache after unified coding and compression. All the collected results are organized into a structured multi-dimensional array to form a historical pixel state tensor. This tensor corresponds to the regional division in space, covers the complete frame sequence in time, and represents the change trend of pixel states in the form of floating-point or fixed-point format at the data level, constituting the core input data for future prediction operations. Input the historical pixel state tensor into the sub-pixel prediction engine integrated inside the display driving main control chip. This engine consists of 8 GPU computing units, and each GPU unit has 128 processing elements embedded. It is designed with a parallel computing structure and a deep pipeline mechanism, supporting parallel analysis and non-linear transformation processing of large-scale tensors. After receiving the historical tensor, the prediction engine performs joint normalization processing in the space-time domain, and then performs per-channel calculations based on the trained deep neural network model. A non-linear activation function structure is introduced inside this model to enhance the response ability to pixel brightness mutations, edge drifts, and motion blurs. Under the action of the activation function, the system can identify the behavior trends and change boundaries of each pixel in the current frame, thereby generating prediction data for pixel changes in the next frame. Based on this prediction result, perform correlation analysis on adjacent regions among the N pixel driving units to judge the spatio-temporal coupling strength between regions. According to the change pattern, boundary evolution direction, and content update frequency of each region in the next frame prediction, construct a similarity scoring mechanism between regions. This scoring mechanism uses convolution matching, change boundary overlap rate, and frequency domain phase consistency as measurement indicators, and outputs a region correlation matrix. Each element in this matrix represents the strength of the coordination of content changes between two regions in the predicted frame. The higher the value, the more synchronized the future content of the two regions, and there is a preloading coordination scheduling value in the update scheduling. Perform data preloading priority allocation according to the region correlation matrix. The allocation strategy is executed by the cache controller. The controller reads the correlation values and content change intensities in the matrix, constructs a priority ranking table, and allocates preloading resources to high-priority regions according to the display frame time window.Regions with high change trends and high correlation degrees are preferentially transferred into the display buffer. The system pre-loads the data of its next frame in advance and constructs a dual-channel output logic, completing the data preparation before the display pipeline is refreshed, greatly reducing the response latency. Regions with slow changes and low correlation degrees are loaded later or transferred on demand, saving bandwidth and energy consumption. Generate pre-loaded display data with a logical structure.

[0041] In a specific embodiment, the process of executing step S500 may specifically include the following steps: Perform digital-to-analog conversion on the pre-loaded display data to obtain an initial drive current value; Extract historical brightness, spatial position, and cumulative working time parameters for each pixel point based on the initial drive current value to obtain a sub-pixel compensation factor; Perform non-linear compensation on the initial drive current value according to the sub-pixel compensation factor to obtain a precisely compensated pixel drive current; Perform adaptive control on the signal rise time based on the precisely compensated pixel drive current to obtain a drive signal waveform with optimized response time; Select pre-driving and fast discharge paths for the drive signal waveform with optimized response time according to the bright-dark change type to generate an OLED drive signal sequence.

[0042] Specifically, digital-to-analog conversion is performed on the pre-loaded display data. Using the target brightness value or gray-scale level of each pixel as the input, a high-resolution current-mode digital-to-analog converter integrated in the output channel of the OLED display driver chip is called to complete the output of the analog current signal. Each conversion unit adopts a multi-current source matrix parallel connection method to achieve sub-microampere-level current output control. The digital-to-analog converter has a resolution of at least 14 bits, enabling fine control of pixel brightness changes within a very small step. The digital-to-analog conversion result is the initial drive current value. A multi-source parameter extraction operation is performed on each pixel, reading three key influencing factors: its historical brightness record, spatial physical location, and cumulative working time. The historical brightness parameter reflects the light-emitting intensity and change trend of the pixel in multiple cycles, and is used to judge its aging degree and response degradation behavior; the spatial position parameter is used to identify whether it is in the edge area or the heat load dense area, because the process deviation and heat distribution conditions in different areas have a significant impact on the drive current demand; the cumulative working time directly corresponds to the attenuation degree of the organic layer inside the device. The above parameters are input into the sub-pixel compensation factor generation module, and a pixel non-linear characteristic mapping relationship is constructed using a set of empirical regression models or neural network functions, calculating the sub-pixel compensation factor of each pixel in the current cycle. This factor is used to adjust the initial drive current to compensate for the light output offset caused by the change in the physical state of the device, thereby ensuring the consistency of display brightness and color accuracy. The compensation factor is applied to the initial drive current value to perform non-linear current regulation. Through a precision current modulator, the initial current is scaled, offset, or curve-corrected according to the size of the compensation factor to obtain an accurately compensated pixel drive current that adapts to the true physical state of the pixel. This drive current directly determines the current drive intensity of the OLED light-emitting unit, and its adjustment mechanism considers the non-linear distribution characteristics of the current density on the response curve of the organic light-emitting material, and performs multi-dimensional correction in combination with parameters such as the brightness response saturation point and the color shift critical value. To optimize the dynamic response speed of the pixel and prevent image ghosting, an adaptive control mechanism for the signal rise time is introduced in the drive current waveform generation stage. This mechanism sets an appropriate rise time parameter under a certain empirical function or look-up table strategy based on the current target brightness value and the compensated drive current of each pixel, so that the curvature of the rising edge of the drive current can be adjusted according to the demand. The rise time of pixels with higher brightness values is shortened to achieve rapid excitation, while the rise time of pixels with lower brightness values is relatively lengthened to avoid current impact and visual unevenness. The adaptive rise time control also refers to the refresh density and temperature status of the local area, and actively slows down the rise rate in areas where heat accumulation or drive congestion may occur, thereby avoiding peak interference and bright spot flickering, and ensuring the stability and balance of the overall panel response. The finally generated drive current waveform meets the current brightness control requirements and reflects the optimal response behavior under dynamic conditions.On this basis, to reduce the response delay and adapt to different pixel brightness change patterns, the optimized driving signal waveform is analyzed for change types, and based on this, the selection logic of the pre-driving mechanism and the fast discharge path is introduced. When the system detects that the current pixel changes from dark to bright and the brightness change amplitude is large, the pre-driving operation is executed, that is, a pulse current slightly higher than the target current is applied to the pixel for a short time at the initial stage of driving to quickly establish the pixel charge balance state, improve the light emission response speed, and then switch back to the normal driving current to maintain the brightness stability; when the pixel is in the state of changing from bright to dark, the system triggers the fast discharge path, and quickly removes the residual charge by increasing the parallel discharge branch or guiding the current to the bypass channel, avoiding the generation of afterimages or brightness trailing during the dark conversion process, thereby compressing the pixel turn-off time and improving the clarity and sharpness of the inter-frame dynamic switching. All the above control mechanisms are finally converged into a set of structured, precisely timed, and response-adaptive OLED driving signal sequences. This signal sequence is loaded frame by frame into the display control interface and sent to the pixel array to achieve a closed-loop current drive execution with content change as the core, physical state as the constraint, and dynamic performance as the goal.

[0043] Please refer to Figure 2 , Figure 2 which is a schematic block diagram of the structure of the low-latency transmission system 200 for ultra-high bandwidth OLED display driving provided by the embodiment of the present application. As Figure 2 shown, the low-latency transmission system 200 for ultra-high bandwidth OLED display driving includes: A wavelength division module 210, which is used to perform multi-channel wavelength division multiplexing processing on the input optical signal by using a dual-mode integrated optoelectronic conversion array to obtain a plurality of parallel optoelectronic signal data streams; A routing configuration module 220, which is used to perform routing configuration on the plurality of parallel optoelectronic signal data streams through a reconfigurable optoelectronic hybrid switching matrix to obtain an optoelectronic hybrid data path network; An impedance matching module 230, which is used to perform real-time temperature monitoring and adaptive impedance matching on the optoelectronic hybrid data path network to obtain a target data transmission path; A state prediction module 240, which is used to perform multi-region concurrent driving and pixel state prediction based on the target data transmission path to obtain pre-loaded display data; A response time optimization module 250, which is used to perform current modulation and response time optimization on the pre-loaded display data to generate an OLED driving signal sequence.

[0044] Through the collaborative cooperation of the above-mentioned various components, by means of the dual-mode integrated optoelectronic conversion array and multi-channel wavelength division multiplexing technology, a higher data transmission bandwidth than traditional purely electrically driven chips is achieved, effectively meeting the data transmission requirements of high-resolution and high-refresh-rate OLED display panels. By adopting a reconfigurable optoelectronic hybrid switching matrix and multi-region concurrent driving technology, the simultaneous driving of pixels in multiple discontinuous regions is realized, significantly reducing the pixel response time, reducing dynamic image blurring, and enhancing the display effect in application scenarios such as VR / AR and high-frame-rate games. Through real-time temperature monitoring, adaptive impedance matching, and hot spot avoidance routing algorithms, the thermal management problem under ultra-high bandwidth transmission is effectively solved, the chip temperature is reduced, and the service life of the OLED display panel is extended. Based on the sub-pixel prediction engine and precise current control technology, dynamic compensation for the historical brightness, spatial position, and cumulative working time of each pixel is achieved, effectively eliminating screen aging and brightness unevenness problems, and improving the accuracy and consistency of the displayed content. Combining the region-aware concurrent driving strategy and sub-pixel prediction technology, intelligent preloading and cache management of display data are realized, optimizing the data transmission path and storage resource utilization, and reducing the overall system power consumption. Through a three-mode transmission architecture that supports all-optical mode, hybrid mode, and all-electric mode, it is possible to dynamically switch the optimal transmission mode according to the requirements of different display contents and application scenarios, optimizing power consumption and heat management while ensuring display performance.

[0045] Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working processes of the above-described systems, systems, and units can refer to the corresponding processes in the foregoing method embodiments and will not be elaborated herein.

[0046] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The foregoing storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical discs that can store program codes.

[0047] As described above, the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A low-latency transmission method for ultra-high bandwidth OLED display driving, characterized in that, Comprising: Adopting a dual-mode integrated optoelectronic conversion array to perform multi-channel wavelength division multiplexing processing on the input optical signal to obtain a plurality of parallel optoelectronic signal data streams; Performing routing configuration on the plurality of parallel optoelectronic signal data streams through a reconfigurable optoelectronic hybrid switching matrix to obtain an optoelectronic hybrid data path network; Performing real-time temperature monitoring and adaptive impedance matching on the optoelectronic hybrid data path network to obtain a target data transmission path; Performing multi-region concurrent driving and pixel state prediction based on the target data transmission path to obtain pre-loaded display data; Performing current modulation and response time optimization on the pre-loaded display data to generate an OLED driving signal sequence.

2. The low-latency transmission method for ultra-high bandwidth OLED display driving according to claim 1, wherein, The step of adopting a dual-mode integrated optoelectronic conversion array to perform multi-channel wavelength division multiplexing processing on the input optical signal to obtain a plurality of parallel optoelectronic signal data streams includes: Inputting the input optical signal into a wavelength division multiplexer of the dual-mode integrated optoelectronic conversion array for wavelength separation to obtain M independent optical signal channels; Performing channel separation on the M independent optical signal channels to obtain a multi-wavelength optical signal; Performing optoelectronic conversion on the multi-wavelength optical signal through a PIN-structured nano-optical detector in the dual-mode integrated optoelectronic conversion array to obtain a plurality of parallel electrical signals; Performing electrical signal modulation on the plurality of parallel electrical signals to obtain modulated electrical signals; Inputting the modulated electrical signals into a digital signal processing unit for fast Fourier transform and quadrature amplitude modulation signal demodulation to obtain a plurality of parallel optoelectronic signal data streams.

3. The low-latency transmission method for ultra-high bandwidth OLED display driving according to claim 1, characterized in that, The step of performing routing configuration on the plurality of parallel optoelectronic signal data streams through a reconfigurable optoelectronic hybrid switching matrix to obtain an optoelectronic hybrid data path network includes: Adopting a programmable crossbar switch to perform signal distribution on the plurality of parallel optoelectronic signal data streams to obtain partitioned signal data; Configuring a transmission architecture and configuration data that support all-optical mode, hybrid mode, and all-electrical mode according to the reconfigurable optoelectronic hybrid switching matrix; Combining the transmission architecture and the configuration data to perform state setting through an SRAM memory to obtain switching matrix control parameters; Performing routing channel allocation on the partitioned signal data based on the switching matrix control parameters to obtain an initial data transmission path, and constructing an optoelectronic hybrid data path network based on the initial data transmission path.

4. The low-latency transmission method for ultra-high bandwidth OLED display driving according to claim 1, characterized in that The step of performing real-time temperature monitoring and adaptive impedance matching on the optoelectronic hybrid data path network to obtain a target data transmission path includes: Collecting temperature data of each region in the display driving chip through a digital temperature sensor array distributed around the optoelectronic hybrid data path network to obtain real-time temperature mapping data; Performing adaptive impedance matching on the signal channels of the optoelectronic hybrid data path network based on the real-time temperature mapping data to obtain temperature-compensated signal channels; Identifying hot spot regions in the real-time temperature mapping data to obtain high-temperature region coordinate information; Performing routing adjustment on the temperature-compensated signal channels based on the high-temperature region coordinate information to obtain a signal transmission path bypassing the hot spots; Perform channel bit rate statistics and regional power consumption density calculation on the signal transmission path bypassing the hot spot to obtain the target data transmission path.

5. The low-latency transmission method for ultra-high bandwidth OLED display driving according to claim 4, wherein The adaptive impedance matching of the signal channels of the optoelectronic hybrid data path network based on the real-time temperature mapping data to obtain the signal channels after temperature compensation includes: Calculate the heat flux density distribution data of each region in the display driver chip according to the real-time temperature mapping data; Extract parameters from the heat flux density distribution data and the signal frequency data of the optoelectronic hybrid data path network to obtain impedance input parameters; Perform impedance matching calculation based on the impedance input parameters to obtain the target impedance value of each signal channel; Dynamically adjust the optoelectronic hybrid data path network according to the target impedance value to obtain the signal channels after impedance matching, and perform signal integrity measurement on the signal channels after impedance matching to obtain the signal channels after temperature compensation.

6. The low-latency transmission method for ultra-high bandwidth OLED display driving according to claim 1, characterized in that, The multi-region concurrent driving and pixel state prediction based on the target data transmission path to obtain the pre-loaded display data includes: Divide the OLED display panel into N pixel driving units based on the target data transmission path; Collect and store multi-frame historical frame data in the N pixel driving units to obtain a historical pixel state tensor; Input the historical pixel state tensor into a sub-pixel prediction engine including 8 GPU computing units and 128 processing elements for non-linear activation function calculation to obtain the next-frame pixel change prediction data; Perform correlation calculation on adjacent regions in the N pixel driving units based on the next-frame pixel change prediction data to obtain a regional correlation matrix; Perform data pre-loading priority allocation according to the regional correlation matrix to obtain the pre-loaded display data.

7. The low-latency transmission method for ultra-high bandwidth OLED display driving according to claim 1, wherein The current modulation and response time optimization of the pre-loaded display data to generate an OLED driving signal sequence includes: Perform digital-to-analog conversion on the pre-loaded display data to obtain an initial driving current value; Extract historical brightness, spatial position, and cumulative working time parameters for each pixel point based on the initial driving current value to obtain a sub-pixel compensation factor; Perform non-linear compensation on the initial driving current value according to the sub-pixel compensation factor to obtain the pixel driving current after precise compensation; Perform adaptive control on the signal rise time based on the pixel driving current after precise compensation to obtain a driving signal waveform with optimized response time; Select a pre-driving and fast discharge path for the driving signal waveform with optimized response time according to the bright-dark change type to generate an OLED driving signal sequence.

8. A low-latency transmission system for ultra-high bandwidth OLED display driving, characterized in that, A low-latency transmission method for performing the ultra-high bandwidth OLED display driving as described in any one of claims 1-7, including: A wavelength division module for performing multi-channel wavelength division multiplexing processing on an input optical signal using a dual-mode integrated optoelectronic conversion array to obtain a multi-channel parallel optoelectronic signal data stream; A routing configuration module for routing and configuring the multi-channel parallel optoelectronic signal data stream through a reconfigurable optoelectronic hybrid switching matrix to obtain an optoelectronic hybrid data path network; An impedance matching module, which is used to perform real-time temperature monitoring and adaptive impedance matching on the optoelectronic hybrid data path network to obtain a target data transmission path; A state prediction module, which is used to perform multi-region concurrent driving and pixel state prediction based on the target data transmission path to obtain pre-loaded display data; A response time optimization module, which is used to perform current modulation and response time optimization on the pre-loaded display data to generate an OLED driving signal sequence.

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