Automatic detection circuit for serial port fault between instrument and controller

Abstract

The present application provides a circuit for automatically detecting serial port faults between an instrument and a controller, belonging to the field of fault detection technology. The circuit for automatically detecting serial port faults between an instrument and a controller comprises: a signal communication circuit, a signal receiving detection circuit, a signal sending detection circuit, a signal analysis circuit, and a controller; the first transmitting end of the signal communication circuit is connected to the receiving end of the controller, the first receiving end of the signal communication circuit is connected to the transmitting end of the controller, the second receiving end of the signal communication circuit is used to receive signals sent by the instrument, and the second sending end of the signal communication circuit is used to send signals to the instrument; the input end of the signal receiving detection circuit is connected to the second receiving end of the signal communication circuit, and the output end of the signal receiving detection circuit is connected to the first input end of the controller. The present application can solve the problem of automatically detecting and locating the party responsible for communication faults.

Description

Technical Field

[0001] The present application relates to the technical field of fault detection, and in particular to an automatic detection circuit for serial port faults between an instrument and a controller. Background Art

[0002] In the field of industrial automation, data exchange between instruments and controllers via serial communication is extremely common. The stability of serial communication directly impacts system reliability. Existing technologies often fail serial communication links between instruments and controllers due to factors such as aging cables, poor interface contact, or environmental electromagnetic interference. Traditional detection methods rely on manual inspections or simple signal level testing, making it difficult to accurately locate faults in real time. Furthermore, they cannot effectively distinguish between useful signals and interference signals, which can easily lead to false triggering of the controller. Summary of the Invention

[0003] The embodiment of the present application provides a serial port fault automatic detection circuit between an instrument and a controller to solve the problem of automatically detecting and locating the party responsible for a communication fault.

[0004] The embodiment of the present application provides a serial port fault automatic detection circuit between an instrument and a controller, comprising:

[0005] Signal communication circuit, signal reception detection circuit, signal transmission detection circuit, signal analysis circuit and controller;

[0006] The first transmitting end of the signal communication circuit is connected to the receiving end of the controller, the first receiving end of the signal communication circuit is connected to the transmitting end of the controller, the second receiving end of the signal communication circuit is used to receive the signal sent by the instrument, and the second transmitting end of the signal communication circuit is used to send a signal to the instrument;

[0007] The input end of the signal receiving detection circuit is connected to the second receiving end of the signal communication circuit, and the output end of the signal receiving detection circuit is connected to the first input end of the controller;

[0008] The input end of the signal transmission detection circuit is connected to the second transmission end of the signal communication circuit, and the output end of the signal transmission detection circuit is connected to the second input end of the controller;

[0009] The input end of the signal analysis circuit is connected to the output end of the signal receiving detection circuit, and the output end of the signal analysis circuit is connected to the third input end of the controller. The signal analysis circuit is used to analyze whether the instrument signal received by the controller is an interference signal.

[0010] In an exemplary embodiment of the present application, the signal receiving detection circuit includes: a resistor R8, a diode D2, a capacitor C2 and a resistor R10;

[0011] The first end of the resistor R8 is connected to the second receiving end of the signal communication circuit, the second end of the resistor R8 is connected to the anode of the diode D2, the cathode of the diode D2 is connected to the first input end of the controller through the resistor R10, and the cathode of the diode D2 is grounded through the capacitor C2.

[0012] In an exemplary embodiment of the present application, the signal receiving detection circuit further includes: a resistor R9;

[0013] A first end of the resistor R9 is connected to a 3.3V power supply, and a second end of the resistor R9 is connected to a second end of the resistor R8.

[0014] In an exemplary embodiment of the present application, the signal transmission detection circuit includes: a diode D1, a resistor R2, a resistor R4, a resistor R7, a capacitor C1, a transistor Q3, a resistor R6 and a resistor R5;

[0015] The anode of the diode D1 is connected to a 5V power supply, the cathode of the diode D1 is connected to a first end of the resistor R4 via the resistor R2, the second end of the resistor R4 is connected to the collector of the transistor Q3, the base of the transistor Q3 is connected to a 3.3V power supply via the resistor R5, the base of the transistor Q3 is grounded via the resistor R6, and the emitter of the transistor Q3 is grounded;

[0016] The first end of the resistor R7 is connected to the first end of the resistor R4, the second end of the resistor R7 is grounded through the capacitor C1, the second end of the resistor R7 is connected to the second input end of the controller, and the first end of the resistor R7 is connected to the second sending end of the signal communication circuit.

[0017] In an exemplary embodiment of the present application, the signal transmission detection circuit further includes: a resistor R1, a resistor R3, a transistor Q1 and a transistor Q2;

[0018] The first end of the resistor R1 is connected to the second transmitting end of the signal communication circuit, the second end of the resistor R1 is connected to the base of the transistor Q1, the collector of the transistor Q1 is connected to the 5V power supply through the resistor R3, the emitter of the transistor Q1 is grounded, the collector of the transistor Q1 is connected to the base of the transistor Q2, the emitter of the transistor Q2 is grounded, and the collector of the transistor Q2 is connected to the first end of the resistor R7.

[0019] In an exemplary embodiment of the present application, the signal analysis circuit includes: a resistor R13, a diode D5, a diode D6, a resistor R12, an operational amplifier U2, an operational amplifier U3, and an AND gate U4;

[0020] The first end of the resistor R13 is connected to the VCC power supply, the second end of the resistor R13 is connected to the non-inverting input of the operational amplifier U2, the second end of the resistor R13 is connected to the anode of the diode D5, the cathode of the diode D5 is connected to the anode of the diode D6, the cathode of the diode D6 is connected to the inverting input of the operational amplifier U3, the cathode of the diode D6 is grounded through the resistor R12, the cathode of the diode D5 is connected to the output of the signal receiving detection circuit, the cathode of the diode D5 is connected to the inverting input of the operational amplifier U2, the inverting input of the operational amplifier U2 is connected to the non-inverting input of the operational amplifier U3, the output of the operational amplifier U2 is connected to the first input of the AND gate U4, the output of the operational amplifier U3 is connected to the second input of the AND gate U4, and the output of the AND gate U4 is connected to the third input of the controller.

[0021] In an exemplary embodiment of the present application, the signal analysis circuit further includes: a variable resistor RP1 and an operational amplifier U1;

[0022] The sliding end of the variable resistor RP1 is connected to the output end of the signal receiving detection circuit, the first end of the variable resistor RP1 is connected to the non-inverting input end of the operational amplifier U1, the second end of the variable resistor RP1 is grounded, the output end of the operational amplifier U1 is connected to the inverting input end of the operational amplifier U1, and the output end of the operational amplifier U1 is connected to the cathode of the diode D5.

[0023] In an exemplary embodiment of the present application, the signal analysis circuit further includes: a voltage regulator tube D3 and a voltage regulator tube D4;

[0024] The anode of the voltage regulator tube D3 is connected to the non-inverting input terminal of the operational amplifier U1 , the cathode of the voltage regulator tube D3 is connected to the cathode of the voltage regulator tube D4 , and the anode of the voltage regulator tube D4 is grounded.

[0025] In an exemplary embodiment of the present application, the signal analysis circuit further includes: a resistor R11 and a capacitor C3;

[0026] A first end of the resistor R11 is connected to the output end of the operational amplifier U1 , a second end of the resistor R11 is grounded via the capacitor C3 , and a second end of the resistor R11 is connected to the cathode of the diode D5 .

[0027] In an exemplary embodiment of the present application, it further includes: an alarm circuit;

[0028] The alarm circuit is connected to the controller.

[0029] The beneficial effect of the automatic detection circuit for serial port faults between the instrument and the controller provided in the embodiment of the present application is that the automatic detection circuit for serial port faults can realize automatic fault detection and interference filtering of serial port communication between the instrument and the controller through the collaborative work of multiple circuits. The signal communication circuit builds a communication bridge, and the signal receiving and sending detection circuits respectively monitor the normality of the instrument sending signal and the controller response signal to ensure two-way detection of the communication link. The signal analysis circuit can accurately determine whether the received signal is an interference signal to avoid false triggering of the controller. The controller combines multi-terminal input signals and judges the communication status based on the heartbeat mechanism. If a normal signal is not received within a certain period of time, it will report a fault, which not only ensures the reliability of communication, but also improves the system's anti-interference ability and reduces misjudgment. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the embodiments or descriptions of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0031] Figure 1 This is a schematic diagram of the structure of a serial port fault automatic detection circuit between an instrument and a controller provided in an embodiment of the present application;

[0032] Figure 2 is a circuit diagram of a signal receiving detection circuit provided in an embodiment of the present application;

[0033] Figure 3 is a circuit diagram of a signal transmission detection circuit provided in an embodiment of the present application;

[0034] Figure 4 is a circuit diagram of a signal analysis circuit provided in an embodiment of the present application;

[0035] Figure 5 A circuit diagram for automatically detecting and locating the party responsible for a communication fault provided in an embodiment of the present application. DETAILED DESCRIPTION

[0036] To help those skilled in the art better understand this solution, the following will clearly describe the technical solutions in the embodiments of this solution in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of this solution, not all of it. Based on the embodiments of this solution, all other embodiments obtained by those skilled in the art without creative work should fall within the scope of protection of this solution.

[0037] Throughout the specification, claims, and accompanying figures of this solution, the term "including" and any variations thereof mean "including, but not limited to," and are intended to cover non-exclusive inclusions and are not limited to the examples listed herein. Furthermore, the terms "first" and "second," etc., are used to distinguish between different objects, not to describe a specific order.

[0038] The following is a detailed description of the implementation of this application with reference to the accompanying drawings:

[0039] like Figure 2-Figure 4 In the code, DRV_TO_HMI, RXDI, HMI_TO_DRV, TXDI, _CHANGE, VCC and IO_1.1 all indicate the connection numbers that are connected to the microcontroller.

[0040] Figure 1 This is a schematic diagram of a circuit for automatically detecting serial port faults between an instrument and a controller provided in an embodiment of the present application. Figure 1 The serial port fault automatic detection circuit between the instrument and the controller includes:

[0041] Signal communication circuit, signal reception detection circuit, signal transmission detection circuit, signal analysis circuit and controller;

[0042] The first transmitting end of the signal communication circuit is connected to the receiving end of the controller, the first receiving end of the signal communication circuit is connected to the transmitting end of the controller, the second receiving end of the signal communication circuit is used to receive the signal sent by the instrument, and the second transmitting end of the signal communication circuit is used to send the signal to the instrument;

[0043] The input end of the signal receiving detection circuit is connected to the second receiving end of the signal communication circuit, and the output end of the signal receiving detection circuit is connected to the first input end of the controller;

[0044] The input end of the signal transmission detection circuit is connected to the second transmission end of the signal communication circuit, and the output end of the signal transmission detection circuit is connected to the second input end of the controller;

[0045] The input end of the signal analysis circuit is connected to the output end of the signal receiving detection circuit, and the output end of the signal analysis circuit is connected to the third input end of the controller. The signal analysis circuit is used to analyze whether the instrument signal received by the controller is an interference signal.

[0046] In this embodiment, the meter and controller exchange data via a serial port. Normally, the meter sends a heartbeat message to the controller, which immediately responds with a response, completing the data exchange. If the meter receives the controller's message within a specified timeframe, there's no communication failure; otherwise, a communication failure is reported.

[0047] When the instrument sends a signal to the controller, the signal receiving detection circuit is used to detect the signal sent by the instrument and convert the detected signal into a corresponding level signal and send it to the input end of the controller to determine whether the signal transmission of the instrument is normal.

[0048] When the controller sends a response signal to the instrument, the signal sending detection circuit is used to detect whether the controller sends the response signal normally.

[0049] The signal communication circuit is used to provide a communication bridge between the instrument and the controller.

[0050] However, in the actual working process, there will be some interference signals in the signal communication environment, which may cause the signal communication circuit to mistake the interference signal for the signal sent by the instrument, thereby causing the controller to be falsely triggered. Therefore, this application adds a signal analysis circuit to determine whether the signal received by the second receiving end of the signal communication circuit is an interference signal or a useful signal, and sends the corresponding judgment result to the third input end of the controller. The controller decides whether to send a response signal based on the judgment result (if it is an interference signal, there is no need to send a response signal).

[0051] Therefore, this automatic serial port fault detection circuit, through the coordinated operation of multiple circuits, enables automatic fault detection and interference filtering for serial port communications between the instrument and controller. The signal communication circuit builds a communication bridge, while the signal reception and transmission detection circuits respectively monitor the normality of the instrument's transmitted signals and the controller's response signals, ensuring bidirectional detection of the communication link. The signal analysis circuit accurately determines whether the received signal is an interference signal, preventing false triggering of the controller. The controller combines multiple input signals and uses a heartbeat mechanism to determine the communication status. If a normal signal is not received within a certain period of time, a fault is reported. This ensures communication reliability, improves the system's anti-interference capabilities, and reduces false positives.

[0052] like Figure 2 As shown, in this embodiment, the signal receiving detection circuit includes: a resistor R8, a diode D2, a capacitor C2 and a resistor R10;

[0053] The first end of the resistor R8 is connected to the second receiving end of the signal communication circuit, the second end of the resistor R8 is connected to the anode of the diode D2, the cathode of the diode D2 is connected to the first input end of the controller through the resistor R10, and the cathode of the diode D2 is grounded through the capacitor C2.

[0054] In this embodiment, resistor R8 is connected between the second receiving terminal of the signal communication circuit and the anode of diode D2. Its function is to limit the current of the input signal to prevent excessive current from damaging subsequent components. Diode D2 realizes unidirectional conduction of the signal, ensuring that only positive signals (the valid signal sent by the instrument is usually a positive pulse) can pass through, and reverse interference signals or negative pulses are blocked, providing a preliminary filtering effect. Capacitor C2 connected to the cathode of diode D2 and resistor R10 form an RC filter circuit. Capacitor C2 smoothes the signal, filtering out high-frequency interference and clutter, making the signal output to the first input terminal of the controller more stable. Resistor R10 acts as a current limiter and voltage divider to protect the controller input port.

[0055] The rectified and filtered signal is converted by resistor R10 to a level suitable for the controller. When the instrument is transmitting normally, the circuit outputs a high-level pulse. When there is no signal or interference, it outputs a low-level or very small fluctuation signal. The controller uses this to determine whether the instrument signal is transmitting normally.

[0056] like Figure 2 As shown, in this embodiment, the signal receiving detection circuit further includes: a resistor R9;

[0057] A first end of the resistor R9 is connected to a 3.3V power supply, and a second end of the resistor R9 is connected to a second end of the resistor R8.

[0058] In this embodiment, resistor R9 connects a 3.3V power supply to the back end of resistor R8. When there's no input signal, diode D2 turns off, and resistor R9 pulls the voltage level up to 3.3V, providing a stable reference level for the circuit. When the meter sends a low-level signal, resistors R8 and R9 divide the voltage, bringing the voltage level below the conduction threshold of diode D2. Diode D2 turns off, and OUT outputs a low level. When the meter sends a high-level signal (above 3.3V), diode D2 turns on, and the signal is filtered by capacitor C2 and outputs a high level.

[0059] The pull-up design makes the circuit immune to negative interference signals. When the interference signal is lower than 3.3V, it is still pulled high by resistor R9 to avoid false triggering.

[0060] like Figure 3 As shown, in this embodiment, the signal transmission detection circuit includes: a diode D1, a resistor R2, a resistor R4, a resistor R7, a capacitor C1, a transistor Q3, a resistor R6 and a resistor R5;

[0061] The anode of the diode D1 is connected to a 5V power supply, the cathode of the diode D1 is connected to a first end of a resistor R4 via a resistor R2, the second end of the resistor R4 is connected to the collector of the transistor Q3, the base of the transistor Q3 is connected to a 3.3V power supply via a resistor R5, the base of the transistor Q3 is grounded via a resistor R6, and the emitter of the transistor Q3 is grounded;

[0062] The first end of resistor R7 is connected to the first end of resistor R4, the second end of resistor R7 is grounded through capacitor C1, the second end of resistor R7 is connected to the second input end of the controller, and the first end of resistor R7 is connected to the second sending end of the signal communication circuit.

[0063] In this embodiment, transistor Q3 operates in a switching state and is always on. When the controller transmits a high-level signal (e.g., 5V) through the second transmitting terminal of the signal communication circuit, the signal is divided by resistor R7 and then forms a low-pass filter with capacitor C1 to filter out high-frequency noise. Since transistor Q3 is on, the collector potential is clamped to a low level. At this time, diode D1 is cut off (anode 5V, cathode close to 0V), and the signal is transmitted only to the second input terminal of the controller through resistor R7. When transmitting a low-level signal, resistor R7 and capacitor C1 work together to maintain the output terminal at a low level, ensuring correct signal transmission. Diode D1 prevents reverse voltage surges. When negative interference occurs at the transmitting terminal, diode D1 turns on and clamps the voltage to approximately 0.7V, protecting the back-end circuit. Capacitor C1 further filters out high-frequency interference, making the signal input to the controller smoother and reducing false triggering.

[0064] The controller monitors the level changes at the second input to determine whether the transmitted signal is normal. If a low level is detected during a high level transmission, a communication failure (such as a broken line or a faulty transistor Q3) may exist. The continuous conduction of transistor Q3 ensures that the detection circuit's response to the transmitted signal depends solely on the external input, rather than its own state switching, improving detection stability.

[0065] This circuit establishes a signal path through the normally open state of transistor Q3, combined with the protection of diode D1 and the filtering of resistor R7 and capacitor C1, to achieve real-time monitoring of the signal sent by the controller and ensure communication reliability.

[0066] like Figure 3 As shown, in this embodiment, the signal transmission detection circuit further includes: a resistor R1, a resistor R3, a transistor Q1 and a transistor Q2;

[0067] The first end of the resistor R1 is connected to the second transmitting end of the signal communication circuit, the second end of the resistor R1 is connected to the base of the transistor Q1, the collector of the transistor Q1 is connected to the 5V power supply through the resistor R3, the emitter of the transistor Q1 is grounded, the collector of the transistor Q1 is connected to the base of the transistor Q2, the emitter of the transistor Q2 is grounded, and the collector of the transistor Q2 is connected to the first end of the resistor R7.

[0068] In this embodiment, the response signal output by the controller is relatively weak, and the signal may be further weakened after passing through the signal communication circuit. In order to ensure the reliability of the circuit, the transistor Q1 and the transistor Q2 amplify the detection signal.

[0069] The weak response signal output from the second transmitting terminal of the signal communication circuit is input to the base of transistor Q1 through resistor R1. When the transmitting terminal is at a high level, the base of transistor Q1 receives a forward bias voltage, turning on transistor Q1; when the level is low, transistor Q1 is turned off. The signal output from the collector of transistor Q1 directly drives the base of transistor Q2. When transistor Q1 is on (collector low level), transistor Q2 is turned off; when Q1 is off (collector high level), transistor Q2 is turned on. The collector of transistor Q2 is connected to the first end of resistor R7. When transistor Q2 is on, it pulls the potential of the first end of resistor R7 down to near ground level. When it is off, the first end of resistor R7 is connected to 5V (after rectification by diode D1) through resistor R4, achieving further signal amplification and level conversion.

[0070] Through cascade amplification by transistors Q1 and Q2, the weak response signal is converted to a standard TTL level close to 5V, ensuring reliable recognition at the controller's second input. The emitters of transistors Q1 and Q2 are both grounded, forming a common ground structure to prevent signal interference. Furthermore, the collector of transistor Q2 is isolated from the original detection circuit by resistor R7 to prevent any impact on the subsequent filtering circuit (resistor R7 - capacitor C1). This two-stage amplification increases the circuit's current drive capability, ensuring signal integrity even over long transmission distances or in interference-prone environments.

[0071] When the controller sends a response signal, the amplified signals from transistors Q1 and Q2 interact with the original detection circuit (with transistor Q3 turned on). If transistor Q2 turns on, the first terminal of resistor R7 is pulled low, resulting in a low output. If transistor Q2 turns off, the first terminal of resistor R7 connects to 5V through resistor R4, resulting in a high output. The controller compares the transmitted signal with the signal detected at its second input terminal to determine whether the communication link is functioning properly. For example, if a high signal is transmitted but a low signal is detected, this could indicate a fault in transistors Q1 or Q2 or a broken circuit.

[0072] like Figure 4 As shown, in this embodiment, the signal analysis circuit includes: a resistor R13, a diode D5, a diode D6, a resistor R12, an operational amplifier U2, an operational amplifier U3 and an AND gate U4;

[0073] A first end of resistor R13 is connected to the VCC power supply, a second end of resistor R13 is connected to the non-inverting input of op amp U2, a second end of resistor R13 is connected to the anode of diode D5, a cathode of diode D5 is connected to the anode of diode D6, a cathode of diode D6 is connected to the inverting input of op amp U3, a cathode of diode D6 is grounded through resistor R12, a cathode of diode D5 is connected to the output of the signal receiving detection circuit, a cathode of diode D5 is connected to the inverting input of op amp U2, the inverting input of op amp U2 is connected to the non-inverting input of op amp U3, the output of op amp U2 is connected to the first input of AND gate U4, the output of op amp U3 is connected to the second input of AND gate U4, and the output of AND gate U4 is connected to the third input of the controller.

[0074] In this embodiment, the operational amplifier U2 and the operational amplifier U3 constitute a comparator. When there is no interference signal, the voltage at the non-inverting input terminal of the operational amplifier U2 is greater than the voltage at the inverting input terminal of the operational amplifier U2, and the voltage at the non-inverting input terminal of the operational amplifier U3 is greater than the voltage at the inverting input terminal of the operational amplifier U3. Therefore, the operational amplifier U2 and the operational amplifier U3 both output a high level. After passing through the AND gate U4, the AND gate U4 outputs a high level to the third input terminal of the controller.

[0075] When there is an interference signal around the circuit, the voltage at the inverting input of op amp U2 will be greater than the voltage at the non-inverting input of op amp U2, or the voltage at the inverting input of op amp U3 will be greater than the voltage at the non-inverting input of op amp U3. Therefore, at least one of op amp U2 or op amp U3 outputs a low level, which then passes through AND gate U4 and outputs a low level to the third input of the controller.

[0076] Therefore, this signal analysis circuit utilizes a dual comparator and AND gate structure to effectively identify interference signals, significantly improving the anti-interference capability and reliability of serial communication. The dual comparators (op amps U2 and U3) perform comparisons on the positive and negative thresholds of the signal, respectively. When the signal is normal, both comparators output a high level, and the AND gate outputs a high level, indicating a valid signal. When interference is present, abnormal amplitude or polarity of the interfering signal triggers at least one comparator to flip, causing the AND gate to output a low level, signaling the controller to ignore the invalid signal. This redundant comparison mechanism not only filters out-of-limit spike interference but also identifies pulse interference with abnormal polarity, preventing the controller from misinterpreting interference signals and generating erroneous responses. The AND gate's logical AND operation further enhances judgment accuracy, reduces the probability of false triggering, and ensures that the system responds only to valid instrument signals that fall within the specified threshold range, effectively improving the stability of the industrial control system in complex electromagnetic environments.

[0077] like Figure 4 As shown, in this embodiment, the signal analysis circuit further includes: a variable resistor RP1 and an operational amplifier U1;

[0078] The sliding end of the variable resistor RP1 is connected to the output end of the signal receiving detection circuit, the first end of the variable resistor RP1 is connected to the non-inverting input end of the operational amplifier U1, the second end of the variable resistor RP1 is grounded, the output end of the operational amplifier U1 is connected to the inverting input end of the operational amplifier U1, and the output end of the operational amplifier U1 is connected to the cathode of the diode D5.

[0079] In this embodiment, op amp U1 forms a follower, providing signal isolation. The output signal of the signal receiving and detection circuit (after voltage division by variable resistor RP1) enters the non-inverting terminal of op amp U1. The output terminal of op amp U1 accurately replicates this voltage value while being electrically isolated from the input terminal. This prevents the loading effect of the subsequent comparator circuit (op amps U2 and U3) from affecting the operating point of the preceding signal detection circuit, ensuring signal integrity.

[0080] The variable resistor RP1 divides the output signal of the signal receiving detection circuit. The position of the sliding end determines the amplitude of the signal input to the non-inverting terminal of the operational amplifier U1, thereby achieving proportional scaling of the input signal.

[0081] By adjusting the position of the sliding end of the variable resistor RP1, the signal strength entering the comparator circuit can be changed, thereby calibrating the sensitivity of the entire signal analysis circuit to adapt to instrument signals of different strengths or different interference environments.

[0082] This improvement not only protects the stability of the front-stage signal detection circuit through voltage follower isolation and voltage divider adjustment, but also realizes flexible adjustment of the input signal, enabling the signal analysis circuit to more accurately distinguish useful signals from interference signals, and improving the system's anti-interference ability and reliability in complex environments.

[0083] In this embodiment, the signal analysis circuit further includes: a voltage regulator diode D3 and a voltage regulator diode D4;

[0084] The anode of the voltage regulator tube D3 is connected to the non-inverting input terminal of the operational amplifier U1, the cathode of the voltage regulator tube D3 is connected to the cathode of the voltage regulator tube D4, and the anode of the voltage regulator tube D4 is grounded.

[0085] like Figure 4 As shown, in this embodiment, when the voltage V+ at the non-inverting input of op amp U1 exceeds the breakdown voltage of Zener diode D4 (e.g., 5.1V), Zener diode D4 breaks down in the reverse direction and conducts. Current flows through Zener diode D4 to ground, clamping V+ at +5.1V and preventing damage to op amp U1 from excessive forward voltage.

[0086] When V+ reaches a negative voltage that is lower than the forward voltage of Zener diode D3 (approximately -0.7V), Zener diode D3 conducts forward. Current flows from ground through Zener diode D3 into V+, clamping V+ at -0.7V and preventing the op amp input stage from breaking down due to the negative voltage.

[0087] Zener diodes D3 and D4 ensure that the signal entering the voltage follower (op amp U1) is within a safe range through bidirectional limiting, which not only protects the op amp but also filters out excessive interference, thereby improving the stability and impact resistance of the signal analysis circuit.

[0088] like Figure 4 As shown, in this embodiment, the signal analysis circuit further includes: a resistor R11 and a capacitor C3;

[0089] A first end of the resistor R11 is connected to the output end of the operational amplifier U1 , a second end of the resistor R11 is grounded via the capacitor C3 , and a second end of the resistor R11 is connected to the cathode of the diode D5 .

[0090] In this embodiment, the resistor R11 and the capacitor C3 form a low-pass filter, which filters out high-frequency interference and smoothes the signal waveform through low-pass filtering, thereby enhancing the robustness of the signal analysis circuit to interference and ensuring accurate detection of the real instrument signal.

[0091] In this embodiment, it also includes: an alarm circuit;

[0092] The alarm circuit is connected to the controller.

[0093] In this embodiment, the controller determines whether to trigger an alarm based on input signals (such as interference detection results from the signal analysis circuit, signal transmission / reception status, etc.). When an abnormality is detected (such as the presence of an interference signal, communication failure, or voltage anomaly), the controller outputs a high-level or low-level control signal to the alarm circuit. This alarm circuit typically includes audio and visual alarm components (such as a buzzer or LED light), which are driven by the controller's level signal:

[0094] If the alarm circuit is a buzzer driven by a transistor, the controller outputs a high level to turn on the transistor, and the buzzer is powered and sounds;

[0095] If it is an LED alarm, the controller signal can drive the LED to light up directly or through a resistor to achieve a visual warning.

[0096] The alarm circuit converts electrical signals into perceptible sound and light signals by linking with the controller, promptly reminding users of system abnormalities and improving the safety and reliability of the circuit.

[0097] like Figure 5 As shown, due to the long chain of board production process, cable interface, controller circuit, etc., it is impossible to accurately locate whether the communication failure is caused by the instrument or the controller failing to send data.

[0098] The automatic serial port fault detection circuit exchanges data between the meter and the controller via the serial port. Under normal circumstances, the meter sends a heartbeat message to the controller, and the controller immediately responds with a response upon receiving the message, completing the data exchange. If the meter can receive the controller's message within a certain period of time, there is no communication failure; otherwise, a communication failure is reported. The meter has a self-test circuit to troubleshoot hardware issues on the board. An IO is added to each of the Tx and RX terminals to detect whether data is reaching the board's output port normally. When a fault occurs, the microcontroller switches the Tx and RX pins to normal IO functions. When the Tx pin sends a high level, the Tx' reads a level of 1. When it sends a low level, the Tx' reads a level of 0, indicating that the loop is OK; otherwise, the Tx circuit is disconnected. The RX pin performs the same test.

[0099] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A serial port fault automatic detection circuit between an instrument and a controller, characterized in that: include: Signal communication circuit, signal reception detection circuit, signal transmission detection circuit, signal analysis circuit and controller; The first transmitting end of the signal communication circuit is connected to the receiving end of the controller, the first receiving end of the signal communication circuit is connected to the transmitting end of the controller, the second receiving end of the signal communication circuit is used to receive the signal sent by the instrument, and the second transmitting end of the signal communication circuit is used to send a signal to the instrument; The input end of the signal receiving detection circuit is connected to the second receiving end of the signal communication circuit, and the output end of the signal receiving detection circuit is connected to the first input end of the controller; The input end of the signal transmission detection circuit is connected to the second transmission end of the signal communication circuit, and the output end of the signal transmission detection circuit is connected to the second input end of the controller; The input end of the signal analysis circuit is connected to the output end of the signal receiving detection circuit, and the output end of the signal analysis circuit is connected to the third input end of the controller. The signal analysis circuit is used to analyze whether the instrument signal received by the controller is an interference signal; The signal analysis circuit includes: a resistor R13, a diode D5, a diode D6, a resistor R12, an operational amplifier U2, an operational amplifier U3 and an AND gate U4; The first end of the resistor R13 is connected to the VCC power supply, the second end of the resistor R13 is connected to the non-inverting input of the operational amplifier U2, the second end of the resistor R13 is connected to the anode of the diode D5, the cathode of the diode D5 is connected to the anode of the diode D6, the cathode of the diode D6 is connected to the inverting input of the operational amplifier U3, the cathode of the diode D6 is grounded through the resistor R12, the cathode of the diode D5 is connected to the output of the signal receiving detection circuit, the cathode of the diode D5 is connected to the inverting input of the operational amplifier U2, the inverting input of the operational amplifier U2 is connected to the non-inverting input of the operational amplifier U3, the output of the operational amplifier U2 is connected to the first input of the AND gate U4, the output of the operational amplifier U3 is connected to the second input of the AND gate U4, and the output of the AND gate U4 is connected to the third input of the controller.

2. The automatic detection circuit for serial port faults between an instrument and a controller as claimed in claim 1, characterized in that: The signal receiving detection circuit includes: a resistor R8, a diode D2, a capacitor C2 and a resistor R10; The first end of the resistor R8 is connected to the second receiving end of the signal communication circuit, the second end of the resistor R8 is connected to the anode of the diode D2, the cathode of the diode D2 is connected to the first input end of the controller through the resistor R10, and the cathode of the diode D2 is grounded through the capacitor C2.

3. The automatic detection circuit for serial port faults between the instrument and the controller as claimed in claim 2, characterized in that: The signal receiving detection circuit further includes: a resistor R9; A first end of the resistor R9 is connected to a 3.3V power supply, and a second end of the resistor R9 is connected to a second end of the resistor R8.

4. The automatic detection circuit for serial port faults between an instrument and a controller as claimed in claim 1, characterized in that: The signal transmission detection circuit includes: a diode D1, a resistor R2, a resistor R4, a resistor R7, a capacitor C1, a transistor Q3, a resistor R6 and a resistor R5; The anode of the diode D1 is connected to a 5V power supply, the cathode of the diode D1 is connected to a first end of the resistor R4 via the resistor R2, the second end of the resistor R4 is connected to the collector of the transistor Q3, the base of the transistor Q3 is connected to a 3.3V power supply via the resistor R5, the base of the transistor Q3 is grounded via the resistor R6, and the emitter of the transistor Q3 is grounded; The first end of the resistor R7 is connected to the first end of the resistor R4, the second end of the resistor R7 is grounded through the capacitor C1, the second end of the resistor R7 is connected to the second input end of the controller, and the first end of the resistor R7 is connected to the second sending end of the signal communication circuit.

5. The automatic detection circuit for serial port faults between the instrument and the controller as claimed in claim 4, characterized in that: The signal transmission detection circuit further includes: a resistor R1, a resistor R3, a transistor Q1 and a transistor Q2; The first end of the resistor R1 is connected to the second transmitting end of the signal communication circuit, the second end of the resistor R1 is connected to the base of the transistor Q1, the collector of the transistor Q1 is connected to the 5V power supply through the resistor R3, the emitter of the transistor Q1 is grounded, the collector of the transistor Q1 is connected to the base of the transistor Q2, the emitter of the transistor Q2 is grounded, and the collector of the transistor Q2 is connected to the first end of the resistor R7.

6. The automatic detection circuit for serial port faults between an instrument and a controller as claimed in claim 1, characterized in that: The signal analysis circuit further includes: a variable resistor RP1 and an operational amplifier U1; The sliding end of the variable resistor RP1 is connected to the output end of the signal receiving detection circuit, the first end of the variable resistor RP1 is connected to the non-inverting input end of the operational amplifier U1, the second end of the variable resistor RP1 is grounded, the output end of the operational amplifier U1 is connected to the inverting input end of the operational amplifier U1, and the output end of the operational amplifier U1 is connected to the cathode of the diode D5.

7. The automatic detection circuit for serial port faults between an instrument and a controller as claimed in claim 6, characterized in that: The signal analysis circuit further includes: a voltage regulator tube D3 and a voltage regulator tube D4; The anode of the voltage regulator tube D3 is connected to the non-inverting input terminal of the operational amplifier U1 , the cathode of the voltage regulator tube D3 is connected to the cathode of the voltage regulator tube D4 , and the anode of the voltage regulator tube D4 is grounded.

8. The automatic detection circuit for serial port faults between an instrument and a controller as claimed in claim 6, characterized in that: The signal analysis circuit further includes: a resistor R11 and a capacitor C3; A first end of the resistor R11 is connected to the output end of the operational amplifier U1 , a second end of the resistor R11 is grounded via the capacitor C3 , and a second end of the resistor R11 is connected to the cathode of the diode D5 .

9. The automatic detection circuit for serial port faults between an instrument and a controller as claimed in claim 1, characterized in that: Also includes: Alarm circuit; The alarm circuit is connected to the controller.

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