Image processing method and device, readable storage medium and program product

Abstract

The invention discloses an image processing method and device, a readable storage medium and a program product, and the method comprises the steps: configuring a seed parameter of a last pixel of a previous slice to a next slice, and enabling the seed parameter to serve as a seed parameter of a first pixel of the next slice, and generating random noise so as to carry out noise reduction processing on the first pixel of the next slice. According to the invention, the quantization noise of the image can be reduced, and the consistency of the noise reduction effect of each slice is improved.

Description

Technical Field

[0001] The present invention relates to the field of image processing technology, and in particular to an image processing method and device, a readable storage medium, and a program product. Background Art

[0002] In the field of image processing technology, image noise is the interference part in the image. On the one hand, it affects the subjective visual perception of the human eye to the image, and on the other hand, it affects the subsequent research and application of the image.

[0003] Image noise can originate from various processes, including image acquisition, transmission, and processing. During image acquisition, image noise is generated by the image sensor's inherent performance and environmental conditions, degrading image quality. During image transmission, interference within the transmission channel is a major contributor to image noise. During image processing, flaws in processing methods can also contribute to image noise.

[0004] Image quantization noise primarily originates from the analog-to-digital conversion process. Due to the limitations of the quantization level, errors occur when converting continuously varying analog signals into discrete digital signals. These errors manifest as quantization noise in the image. Quantization noise causes apparent layering or banding in areas of color that should otherwise transition smoothly, disrupting the continuity and smoothness of the image's colors and making the image appear less natural and realistic.

[0005] Image quantization is an important step in digital image processing, which is directly related to the quality of the image and the accuracy of subsequent processing. In order to reduce the influence of quantization noise, it is necessary to study an image processing method that can suppress quantization noise. Summary of the Invention

[0006] The technical problem solved by the present invention is to provide an image processing method and device, a readable storage medium, and a program product, which can reduce the quantization noise of the image and improve the consistency of the noise reduction effect of each slice.

[0007] To solve the above technical problem, an embodiment of the present invention provides an image processing method, wherein an image to be processed is divided into multiple slices, each slice including a number of pixels. The method includes: configuring the seed parameter of the last pixel of the previous slice to the next slice as the seed parameter of the first pixel of the next slice, so as to generate random noise to perform noise reduction processing on the first pixel of the next slice.

[0008] Optionally, configuring the seed parameter of the last pixel of the previous slice to the next slice as the seed parameter of the first pixel of the next slice is achieved through an addressing and transporting module.

[0009] Optionally, the method further includes: randomly generating a seed parameter of the first pixel of the first slice.

[0010] Optionally, the method further includes: starting from the second pixel of the slice, generating seed parameters of subsequent pixels through a random number generator based on the seed parameters of the previous pixel.

[0011] Optionally, the method further includes: determining the chrominance component of each pixel in the slice; generating random noise for each pixel based on the seed parameters of each pixel in the slice, and adding the random noise of each pixel to the chrominance component of each pixel.

[0012] Optionally, the method further includes: a step of performing quantization processing.

[0013] Optionally, the image to be processed includes multiple camera images, each frame of the multiple camera images contains multiple same-frame images from multiple image sensors, and each of the same-frame images is divided into multiple same-frame slices; the denoising processing order of all the same-frame slices belonging to one same-frame image is better than the denoising processing order of all the same-frame slices belonging to another same-frame image.

[0014] Optionally, the width of the slice is smaller than the upper limit of the width of a line buffer (Line Buffer), and the height of the slice is smaller than the upper limit of the height of the line buffer.

[0015] Optionally, the method further includes: turning on the addressing and transporting module; turning on the register transport function of the addressing and transporting module, the register transport function being called through a register transport instruction; adding a buffer, the buffer being used to store the seed parameters of the last pixel of a slice; and adding a read / write channel for reading / writing the buffer.

[0016] Optionally, the register transfer function is suitable for writing data at one address in a register to another address.

[0017] Optionally, the format of the register transfer instruction includes one or more of the following parameters: cmd base address, register transfer flag, start address, destination address; wherein the data of the start address is written into the destination address.

[0018] Optionally, the method further includes: adding a register transfer instruction and an interrupt instruction in the addressing transfer module, wherein the interrupt instruction is used to indicate that the register transfer instruction can be executed.

[0019] Optionally, the method further includes: the addressing and transfer module executes the register transfer instruction in response to receiving the interrupt instruction, and writes the data of the register of the seed parameter of the last pixel of the previous slice into the register of the seed parameter of the first pixel of the next slice.

[0020] Optionally, writing the data of the register of the seed parameter of the last pixel of the previous slice into the register of the seed parameter of the first pixel of the next slice includes: writing the data of the register of the seed parameter of the last pixel of the previous slice into the buffer; and writing the data in the buffer into the register of the seed parameter of the first pixel of the next slice.

[0021] To solve the above technical problems, an embodiment of the present invention provides an image processing device suitable for performing noise reduction processing on an image to be processed, wherein the image to be processed is divided into multiple slices, each of which includes a number of pixels, and the device includes: a register suitable for storing seed parameters; an addressing and transporting module, wherein the addressing and transporting module is suitable for writing the data of the register of the seed parameters of the last pixel of the previous slice into the register of the seed parameters of the first pixel of the next slice.

[0022] Optionally, the image processing device further includes: a noise reduction module, which is adapted to generate random noise for each pixel according to the seed parameters of each pixel in the slice, and add the random noise of each pixel to the chrominance component of each pixel.

[0023] Optionally, the image processing device further includes: a buffer, adapted to store the seed parameter of the last pixel of a slice; and a read / write channel, adapted to perform read / write operations on the buffer.

[0024] Optionally, the image processing apparatus further includes: a line buffer, wherein an upper limit of the width of the line buffer is greater than the width of the slice, and an upper limit of the height of the line buffer is greater than the height of the slice.

[0025] Optionally, the image to be processed includes multiple camera images, each frame of the multiple camera images contains multiple same-frame images from multiple image sensors, and each of the same-frame images is divided into multiple same-frame slices; the image processing device is also suitable for configuring the noise reduction processing order of all the same-frame slices belonging to one of the same-frame images to take precedence over the noise reduction processing order of all the same-frame slices belonging to another of the same-frame images.

[0026] To solve the above technical problem, an embodiment of the present invention provides a readable storage medium having a computer program stored thereon, which implements the steps of the above image processing method when executed by a processor.

[0027] To solve the above technical problem, an embodiment of the present invention provides a program product, including a computer program, which implements the steps of the above image processing method when executed by a processor.

[0028] Compared with the prior art, the technical solution of the embodiment of the present invention has the following beneficial effects:

[0029] In an embodiment of the present invention, dithering technology is used to add random noise to the chrominance component of each pixel of the image to be processed. By introducing slight color variations to simulate colors that cannot be accurately displayed, color bands are eliminated, making the image appear smoother. In the process of generating random noise, the seed parameter of the last pixel of the previous slice is assigned to the next slice as the seed parameter of the first pixel of the next slice, so as to generate random noise to perform noise reduction processing on the first pixel of the next slice. The seed parameter can be transferred between different slices, ensuring that the seed parameters of all pixels are calculated based on the same initial seed parameter. Compared with the practice of regenerating seed parameters for each slice processed in existing dithering technology, the noise reduction effect of each slice in the embodiment of the present invention is more consistent, improving the visual continuity of the entire image after noise reduction.

[0030] Furthermore, an addressing and handling module specifically for seed parameter transfer is designed in the image signal processor. The seed parameter transfer is achieved by directly interacting with the register through the register handling function of the addressing and handling module, avoiding the complex software and hardware interaction of seed parameter transfer using the image signal processor and reducing software complexity.

[0031] Furthermore, the image to be processed includes multi-camera images, each frame of the multi-camera images includes multiple same-frame images from multiple image sensors, and each of the same-frame images is divided into multiple same-frame slices. The image processing method of the embodiment of the present invention can ensure that the seed parameters are transferred between different same-frame images, avoiding the difference in noise reduction effects of the same-frame images due to inconsistent seed parameters, and facilitating the debugging of the noise reduction effects of the multi-camera images. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 is a flowchart of an image processing method according to an embodiment of the present invention;

[0033] Figure 2 yes Figure 1 A schematic flow chart of a specific implementation method of the preprocessing in;

[0034] Figure 3 yes Figure 1 A flowchart of a specific implementation method of generating seed parameters and noise reduction processing in FIG;

[0035] Figure 4 This is a schematic diagram of the instruction sequence of an addressing and handling module for a single-shot scenario in an embodiment of the present invention;

[0036] Figure 5 This is a schematic diagram of the instruction sequence of an addressing and handling module for a multi-camera scenario according to an embodiment of the present invention;

[0037] Figure 6 It is a structural diagram of an image processing device in an embodiment of the present invention. DETAILED DESCRIPTION

[0038] In order to eliminate the influence of quantization noise, dithering technology can be used to process the image. It simulates more color levels by introducing slight color changes. Such changes usually appear as random noise at the pixel level. This random noise is intended to make the human eye perceive a smoother color transition overall.

[0039] However, in the existing dithering technology, the seed parameters of the random noise are reset each time a slice is processed. Although the color bands in the slice can be eliminated, the consistency of the seed parameters of each slice is poor, which affects the visual continuity and consistency between the slices.

[0040] Based on the above findings, the above problem can be solved by introducing a seed parameter transfer mechanism into existing dithering technology. Specifically, starting from the second slice of the image to be processed, the seed parameter used for the last pixel of the previous slice is used as the seed parameter for the first pixel of the next slice. This method ensures that the noise reduction process for each slice is based on a coherent seed sequence derived from the initial seed parameter. Through this continuous transfer of seed parameters, the difference in noise reduction effect between slices is reduced, improving the visual continuity and overall quality of the image.

[0041] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0042] Reference Figure 1 , Figure 1 FIG. 1 is a flow chart of an image processing method according to an embodiment of the present invention. The image processing method may include steps S11 to S12:

[0043] Step S11: providing an original image, wherein the original image is divided into a plurality of slices, each of which includes a plurality of pixels; converting the original image into a YUV format image; and preprocessing the YUV format image to obtain the image to be processed;

[0044] Step S12: generating a seed parameter for each pixel of the image to be processed, and generating random noise according to the seed parameter to perform noise reduction processing on each pixel.

[0045] It is understandable that, in a specific implementation, the image processing method can be implemented in the form of a software program, and the software program runs in a processor integrated inside a chip or a chip module.

[0046] In the specific implementation of step S11, the original image can be directly collected by an image sensor, or selected from existing image resources.

[0047] It is understood that in an image signal processor, a line buffer is used to store row or column data in an image. Since the size of a line buffer is limited, it cannot store all the row or column data for an entire high-definition image at once. Therefore, in order to process a high-definition image, the entire image needs to be divided into multiple slices with lower resolutions. The size of each slice must be adapted to the capacity of the line buffer, that is, the width of the slice is less than the upper limit of the width of the image signal processor's line buffer, and the height of the slice is less than the upper limit of the height of the image signal processor's line buffer. By processing the slices one by one, the image signal processor can complete the processing of the entire image within the limited line buffer resources. All processed slices are then merged to form the processed entire image.

[0048] In an embodiment of the present invention, if the original image is a YUV format image, the U value and V value of the original image can be directly obtained; if the original image is an image in other formats, such as an RGB format image, the RGB data can be first converted to YUV data, and then the U value and V value of the original image can be determined.

[0049] Among them, YUV is used to indicate the type of color space used to compile true-color images. "Y" represents luminance (Luminance or Luma), which is the grayscale value. "U" and "V" represent chrominance (Chrominance or Chroma), which is used to describe the color and saturation of the image and is used to specify the color of the pixel.

[0050] Reference Figure 2 , Figure 2 yes Figure 1 The preprocessing steps may include steps S21 to S26, and each step is described below.

[0051] In step S21, the original image is subjected to a Laplacian pyramid decomposition, wherein the Laplacian pyramid decomposition includes the steps of constructing a Gaussian pyramid and constructing a Laplacian pyramid.

[0052] Constructing the Gaussian pyramid includes applying a Gaussian filter to the original image to obtain a smoothed original image. The Gaussian filter is a low-pass filter used to reduce high-frequency noise in the original image. Downsampling the smoothed original image to obtain a lower-resolution image. The Gaussian filtering and downsampling process is repeated on the downsampled original image until a preset resolution level is reached. Each downsampled image is called a pyramid layer.

[0053] Constructing the Laplacian pyramid includes upsampling each layer of the Gaussian pyramid to obtain a higher-resolution image. Subtracting the upsampled image from the image of the corresponding layer in the Gaussian pyramid creates a difference image, which is the Laplacian pyramid image of that layer. The difference image contains high-frequency detail information of the original image at different resolution scales.

[0054] In some embodiments of the present invention, the Gaussian pyramid has five layers, the width and height of the original image are halved after downsampling, and the width and height of each layer of the Gaussian pyramid are doubled after upsampling.

[0055] Furthermore, the downsampling processing method includes but is not limited to adjacent point downsampling, mean downsampling and other methods, and the upsampling processing method includes but is not limited to bilinear interpolation upsampling method.

[0056] In step S22, the ratio of the noise reduction intensity for each pixel is calculated based on the distance from the center of the Laplacian pyramid image to each pixel. Because the noise at the image edges is amplified after shading correction of the original image, a function is designed to map the Euclidean distance from each pixel to the image center to a noise reduction intensity ratio. The farther the pixel is from the image center, the greater the noise reduction intensity ratio, which allows for more effective removal of image edge noise in subsequent noise reduction processing. The specific form of the function can be determined based on actual needs. For example, a simple linear function or a more complex nonlinear function can be used to achieve better results.

[0057] In step S23, based on the luminance component of the Laplacian pyramid image, the Laplacian pyramid image is divided into three luminance regions: high, medium, and low. A noise reduction intensity is then determined for each luminance region. This includes determining a high luminance threshold and a low luminance threshold, traversing each pixel in the Laplacian pyramid image, and classifying pixels with luminance components above the high luminance threshold as high luminance regions, pixels with luminance components below the low luminance threshold as low luminance regions, and pixels between the high and low luminance thresholds as medium luminance regions. An appropriate noise reduction intensity is set for each luminance region, wherein a stronger noise reduction intensity is required to suppress noise in low luminance regions, while excessive noise reduction is required to avoid loss of detail in high luminance regions. A moderate noise reduction intensity is set for medium luminance regions.

[0058] In step S24, the Laplacian pyramid image is quantized. To facilitate subsequent digital processing of the Laplacian pyramid image, quantization is required. During the quantization process, because the amplitude of the image signal cannot be accurately matched to the nearest quantization level, quantization error is inevitably introduced, thereby generating quantization noise, which has a certain impact on the quality of the quantized Laplacian pyramid image.

[0059] In step S25, a trilateral filter is used to perform low-frequency filtering on the quantized Laplacian pyramid image, and the filter gain value of each pixel is adjusted by controlling the noise reduction intensity ratio and the noise reduction intensity. The trilateral filter combines spatial, value, and frequency domain characteristics to smooth the image while preserving edges and details, effectively reducing low-frequency color noise.

[0060] In step S26, the filtered image is reconstructed using a Laplacian of Gaussian pyramid to obtain an image to be processed. This includes: starting with the top layer (the lowest resolution layer) of the Gaussian pyramid image and using it as the initial reconstructed image; upsampling the initial reconstructed image to match the size of the next layer (the higher resolution layer); and adding the upsampled image to the image of the corresponding Laplacian pyramid layer to obtain a higher resolution reconstructed image. These steps are repeated until the resolution of the original image is reconstructed to obtain the image to be processed.

[0061] Using a Laplacian of Gaussian pyramid to pre-process the original image for noise reduction, multi-scale noise reduction is more effective in removing noise of varying magnitudes. Using a trilateral filter for low-frequency filtering utilizes all Y, U, and V component information in the image, further addressing issues such as residual color noise and blurred color edges. However, quantization prior to low-frequency filtering introduces quantization noise into the Laplacian pyramid image, which cannot be effectively removed by low-frequency filtering. Therefore, further image processing is required to reduce quantization noise.

[0062] In image processing, dithering introduces subtle color variations by adding random noise to pixel values. These subtle color variations visually create a blending effect, allowing otherwise unseen color transitions to appear. In computer programs, a random number generator is typically used to generate a set of seed parameters based on an initial seed parameter. These seed parameters are pseudo-random numbers with statistical characteristics similar to true random numbers. Random noise is then generated based on these seed parameters.

[0063] Reference Figure 3 , Figure 3 yes Figure 1The flowchart of a specific implementation method of generating seed parameters and noise reduction processing is shown in FIG. , wherein the steps of generating seed parameters and noise reduction processing include steps S31 to S37, and each step is described below.

[0064] In step S31, a seed parameter is randomly generated for the first pixel of the first slice. This seed parameter is the initial seed parameter of the random number generator and determines the starting point of the generated seed parameter sequence. In some embodiments of the present invention, to achieve higher randomness, the initial seed parameter may not be a fixed value, for example, using the system time as the initial seed parameter.

[0065] In step S32, starting from the second pixel of the first slice, seed parameters of subsequent pixels of the first slice are generated by a random number generator based on the seed parameter of the previous pixel.

[0066] In some embodiments of the present invention, the random number generator may adopt a pseudo-random number generation algorithm, for example, and when generating the next seed parameter, it uses the previous seed parameter as input and calculates the next seed parameter through a recursive relationship.

[0067] In step S33, the chrominance component of each pixel in the first slice is determined; random noise is generated for each pixel in the first slice based on the seed parameter of each pixel in the first slice, and the random noise for each pixel in the first slice is added to the chrominance component of each pixel in the first slice. After the random noise is added to each pixel in the first slice, the noise reduction process for the first slice is completed, and the noise reduction process for the second slice can then be performed.

[0068] In step S34, the seed parameter of the last pixel of the first slice is assigned to the second slice as the seed parameter of the first pixel of the second slice. This enables the seed parameter to be transferred from the first slice to the second slice, so as to generate random noise to perform noise reduction processing on the first pixel of the second slice.

[0069] In this embodiment of the present invention, the seed parameter of the last pixel of the previous slice is assigned to the next slice as the seed parameter of the first pixel of the next slice, wherein the first pixel may be the first pixel in the pixel arrangement sequence of the slice in which the pixel is located, or the first pixel in the pixel noise reduction processing sequence of the slice in which the pixel is located. Similarly, the last pixel may be the last pixel in the pixel arrangement sequence of the slice in which the pixel is located, or the last pixel in the pixel noise reduction processing sequence of the slice in which the pixel is located.

[0070] Before allocating the seed parameter of the last pixel of the first slice to the second slice as the seed parameter of the first pixel of the second slice, the method further includes: enabling an addressing and transfer module; enabling a register transfer function of the addressing and transfer module, the register transfer function being invoked via a register transfer instruction; adding a buffer for storing the seed parameter of the last pixel of a slice; and adding a read / write channel for reading and writing the buffer. The addressing and transfer module is a hardware module in the image signal processor, configured to allocate the seed parameter of the last pixel of the previous slice to the next slice as the seed parameter of the first pixel of the next slice.

[0071] Specifically, the register transfer function is suitable for writing data at one address in a register into another address, so as to complete the transfer of seed parameters between different slices.

[0072] The format of the register transfer instruction includes one or more of the following parameters: cmd base address, register transfer flag, start address, and destination address, wherein the data of the start address is written into the destination address.

[0073] In a specific implementation, it is necessary to add a register transfer instruction and an interrupt instruction in the addressing transfer module to determine the timing of seed parameter transfer, wherein the interrupt instruction is used to indicate that the register transfer instruction can be executed.

[0074] In an embodiment of the present invention, writing the data of the register of the seed parameter of the last pixel of the previous slice into the register of the seed parameter of the first pixel of the next slice includes: writing the data of the register of the seed parameter of the last pixel of the previous slice into the buffer; and writing the data in the buffer into the register of the seed parameter of the first pixel of the next slice.

[0075] In step S35, starting from the second pixel of the second slice, seed parameters for subsequent pixels of the second slice are generated by a random number generator based on the seed parameter of the previous pixel, thereby completing the generation of seed parameters for the pixels of the second slice.

[0076] In step S36, the chrominance component of each pixel in the second slice is determined; random noise is generated for each pixel in the second slice based on the seed parameter of each pixel in the second slice, and the random noise for each pixel in the second slice is added to the chrominance component of each pixel in the second slice. After the noise reduction process for the second slice is completed, the noise reduction process for the third slice can be performed.

[0077] In step S37, the seed parameter of the last pixel of the second slice is assigned to the third slice as the seed parameter of the first pixel of the third slice. This enables the seed parameter to be transferred from the second slice to the third slice, so as to generate random noise to perform noise reduction processing on the first pixel of the third slice.

[0078] The noise reduction process of the pixels in the subsequent slices is completed in the same manner.

[0079] In an embodiment of the present invention, by transferring seed parameters between different slices instead of regenerating a new seed parameter for each slice, it is ensured that the noise reduction effects between adjacent slices maintain a certain correlation. Since the randomness of all the slices is based on the same initial seed parameter, the effect after noise reduction processing is more consistent between the slices, reducing the visual discontinuity caused by the difference in randomness of the seed parameter. In particular, when processing large images or high-resolution images, the embodiment of the present invention can reduce visible seams or color differences between the slices.

[0080] In practical applications, the source scene of the image to be processed may come from a single image sensor or from multiple image sensors. For different scenarios, the addressing and handling module has different instruction processing methods, which are explained below.

[0081] Reference Figure 4 , Figure 4This is a schematic diagram of the instruction sequence of the addressing and handling module for a single-shot scenario in an embodiment of the present invention. The image to be processed includes at least two frames, frame1 and frame2 represent the first and second frames, slice1 and slice2 represent the first and second slices, frame1 (slice1) represents the first slice of the first frame, cmd111-cmd113 represent the first to third instructions for noise reduction processing of the first slice of the first frame, wait interrupt represents an interrupt instruction, and reg_move() represents a register handling instruction. Before executing the noise reduction processing instruction for the first slice of the first frame, a register handling instruction and an interrupt instruction are added to the addressing and handling module. The interrupt instruction is used to indicate that the register handling instruction can be executed.

[0082] After executing the noise reduction processing instruction for the first slice of the first frame image, it is necessary to wait for the interrupt instruction wait interrupt for the first slice of the first frame image. In response to receiving the interrupt instruction wait interrupt, the addressing and transfer module executes the register transfer instruction reg_move(A, B) to write the data of register A, which holds the seed parameter of the last pixel of the previous slice, into register B, which holds the seed parameter of the first pixel of the next slice. Then, the noise reduction processing instruction for the next slice is executed. The above steps are repeated until the noise reduction processing instruction for one frame of image is completed.

[0083] After executing the noise reduction processing instruction for one frame of image, the noise reduction processing instruction for the next frame of image is executed. In response to receiving the interrupt instruction for the last slice of the previous frame of image, the addressing and transfer module executes the register transfer instruction to write the data of the register of the seed parameter of the last pixel of the last slice of the previous frame of image into the register of the seed parameter of the first pixel of the first slice of the next frame of image. Then, the noise reduction processing instruction for the next frame of image can be executed. The above steps are repeated until the noise reduction processing instructions for all frames of image are executed.

[0084] In an embodiment of the present invention, the image to be processed may include multiple images, each frame of the multiple images includes multiple same-frame images from multiple image sensors, and each of the same-frame images is divided into multiple same-frame slices.

[0085] Reference Figure 5 , Figure 5This is a schematic diagram of the instruction sequence of an addressing and handling module for a multi-camera scenario according to an embodiment of the present invention. The images to be processed include at least two frames, each of which contains at least two images in the same frame. frame1 and frame2 represent the first and second frames, p1 and p2 represent the first and second images in the same frame, slice1 and slice2 represent the first and second slices in the same frame, p1_frame1 (slice1) represents the first slice in the first frame, cmd1111-cmd1113 represent the first to third instructions for noise reduction processing of the first slice in the first frame, wait interrupt represents an interrupt instruction, and reg_move() represents a register move instruction. Before executing the noise reduction processing instruction for the first slice in the first frame, a register move instruction and an interrupt instruction are added to the instruction execution queue of the addressing and handling module. The interrupt instruction is used to indicate that the register move instruction can be executed.

[0086] After executing the noise reduction processing instruction for the first slice of the first image in the same frame of the first frame, it is necessary to wait for the interrupt instruction wait interrupt of the first slice of the first image in the same frame of the first frame. In response to receiving the interrupt instruction wait interrupt, the addressing and transporting module executes the register transport instruction reg_move(A, B) to write the data of register A of the seed parameter of the last pixel of the previous slice in the same frame into register B of the seed parameter of the first pixel of the next slice in the same frame, and then execute the noise reduction processing instruction of the next slice in the same frame. Repeat the above steps until the noise reduction processing instruction of one slice in the same frame is executed.

[0087] After executing the noise reduction processing instruction for one image in the same frame, the noise reduction processing instruction for the next image in the same frame is executed. In response to receiving the interrupt instruction for the last slice of the previous image in the same frame, the addressing and transfer module executes the register transfer instruction to write the data of the register of the seed parameter of the last pixel of the last slice of the previous image in the same frame into the register of the seed parameter of the first pixel of the first slice of the next image in the same frame. Then, noise reduction processing can be performed on the slice of the next image in the same frame. The above steps are repeated until the noise reduction processing instruction for one frame of image is completed.

[0088] In this embodiment of the present invention, the order of noise reduction processing for all slices of a same-frame image is prioritized over the order of noise reduction processing for all slices of another same-frame image. The image processing method of this embodiment of the present invention ensures that seed parameters are transferred between different same-frame images, ensuring consistency and predictability in noise reduction processing across multiple same-frame images. This helps avoid image quality fluctuations due to parameter inconsistencies and facilitates debugging of noise reduction effects across multiple cameras.

[0089] After executing the noise reduction processing instruction for one frame of image, the noise reduction processing instruction for the next frame of image is executed. In response to receiving the interrupt instruction for the last slice of the last image in the previous frame of image, the addressing and transfer module executes the register transfer instruction to write the data of the register of the seed parameter of the last pixel of the last slice of the last image in the previous frame of image into the register of the seed parameter of the first pixel of the first slice of the first image in the next frame of image. Then, the noise reduction processing instruction for the next frame of image can be executed. The above steps are repeated until the noise reduction processing instructions for all frames of image are executed.

[0090] In an embodiment of the present invention, a hardware addressing and handling module is provided in the image signal processor to meet the requirement of seed parameter transfer. Since hardware operations are parallel and not restricted by the software execution cycle, seed parameter transfer implemented through the hardware module is faster than software implementation. At the same time, there is no need to call the image signal processor to handle the complex hardware and software interactions required for seed parameter transfer, which helps to improve the overall processing performance of the image signal processor.

[0091] The embodiment of the present invention further provides an image processing device for performing the above image processing. Figure 6 , Figure 6 1 is a schematic diagram of the structure of an image processing device according to an embodiment of the present invention. The image processing device is suitable for performing noise reduction on an image to be processed, and includes: a register 61 suitable for storing a seed parameter; and an addressing and transfer module 62 suitable for writing data in register 61 of the seed parameter of the last pixel of the previous slice into register 61 of the seed parameter of the first pixel of the next slice.

[0092] Specifically, the image processing device is suitable for dividing the image to be processed into multiple slices so as to meet the processing requirements of the line buffer, wherein each slice includes a number of pixels; dividing the original image into multiple slices so as to meet the processing requirements of the line buffer; converting the original image into a YUV format image so as to perform noise reduction processing on the chrominance component of the original image; preprocessing the original image to achieve preliminary noise reduction; generating the initial seed parameters and generating seed parameters of subsequent pixels based on the initial seed parameters.

[0093] In some embodiments, the image processing apparatus further comprises:

[0094] The noise reduction module 63 is adapted to generate random noise for each pixel in the slice according to the seed parameter of each pixel, and add the random noise for each pixel to the chrominance component of each pixel to achieve further noise reduction.

[0095] In some embodiments, the image processing apparatus further comprises:

[0096] a buffer 64, adapted to store the seed parameter of the last pixel of a slice;

[0097] A read / write channel is suitable for performing read / write operations on the seed buffer 64.

[0098] In some embodiments, the image processing apparatus further comprises:

[0099] The line buffer 66 has an upper limit on its width that is greater than the width of the slice, and an upper limit on its height that is greater than the height of the slice.

[0100] In an embodiment of the present invention, the image to be processed includes multiple images captured by multiple cameras, each frame of the multiple images includes multiple images captured in the same frame from multiple image sensors, and each image captured in the same frame is divided into multiple slices of the same frame. The image processing apparatus is further configured to prioritize the noise reduction processing order of all slices of the same frame belonging to one image captured in the same frame over the noise reduction processing order of all slices of the same frame belonging to another image captured in the same frame.

[0101] It should be understood that in the embodiments of the present invention, the image processing device may be an image signal processor (ISP) or a central processing unit (CPU). The image processing device may also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor.

[0102] It should also be understood that the register 61 and the buffer 64 in the embodiment of the present invention can be a random access memory (RAM), such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM) and direct rambus RAM (DR RAM).

[0103] For more information about the working principle, working method, beneficial effects, etc. of the image processing device in the embodiment of the present invention, please refer to the above description of the image processing method, which will not be repeated here.

[0104] An embodiment of the present invention further provides a computer-readable storage medium storing a computer program. When executed by a processor, the computer-readable storage medium implements the steps of the above-described image processing method. The computer-readable storage medium may include read-only memory, random access memory, a magnetic disk, or an optical disk. The computer-readable storage medium may also include non-volatile memory or non-transitory memory.

[0105] An embodiment of the present invention further provides a program product, including a computer program, which implements the steps of the above-mentioned image processing method when executed by a processor.

[0106] The above embodiments can be implemented in whole or in part by software, hardware, firmware or any other combination. When implemented using software, the above embodiments can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer program are loaded or executed on a computer, the process or function described in accordance with the embodiment of the present invention is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer program can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer program can be transmitted from one website, computer, server or data center to another website, computer, server or data center via wired or wireless means.

[0107] It should be understood that in various embodiments of the present invention, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0108] In the several embodiments provided by the present invention, it should be understood that the disclosed methods, devices, and systems can be implemented in other ways. For example, the device embodiments described above are merely illustrative; for example, the division of the units is merely a logical function division, and there may be other division methods in actual implementation; for example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed may be through some interface, indirect coupling or communication connection of devices or units, which may be electrical, mechanical or other forms.

[0109] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0110] In addition, the functional units in the various embodiments of the present invention may be integrated into one processing unit, or each unit may be physically included separately, or two or more units may be integrated into one unit. The above-mentioned integrated units may be implemented in the form of hardware or in the form of hardware plus software functional units. For example, for various devices and products applied to or integrated into a chip, the various modules / units contained therein may all be implemented in the form of hardware such as circuits, or at least some of the modules / units may be implemented in the form of software programs, which run on the processor integrated inside the chip, and the remaining (if any) modules / units may be implemented in the form of hardware such as circuits; for various devices and products applied to or integrated into a chip module, the various modules / units contained therein may all be implemented in the form of hardware such as circuits, and different modules / units may be located in the same component (such as a chip, circuit module, etc.) or different components of the chip module, or at least some of the modules / units may be implemented in the form of software programs. The element can be implemented in the form of a software program, which runs on the processor integrated inside the chip module, and the remaining (if any) modules / units can be implemented in the form of hardware such as circuits; for various devices and products applied to or integrated in the terminal, the various modules / units contained therein can all be implemented in the form of hardware such as circuits, and different modules / units can be located in the same component (for example, chip, circuit module, etc.) or different components in the terminal, or, at least some modules / units can be implemented in the form of a software program, which runs on the processor integrated inside the terminal, and the remaining (if any) modules / units can be implemented in the form of hardware such as circuits.

[0111] The above-mentioned integrated unit implemented in the form of a software functional unit can be stored in a computer-readable storage medium. The above-mentioned software functional unit is stored in a storage medium and includes a number of instructions for causing a computer device (which can be a personal computer, server, or network device, etc.) to perform some of the steps of the method described in various embodiments of this application. The aforementioned storage medium includes: a USB flash drive, a mobile hard drive, a read-only memory, a random access memory, a magnetic disk, or an optical disk, etc., various media capable of storing program code.

[0112] It should be understood that the term "and / or" herein is merely a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B may represent three situations: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " herein indicates that the objects associated before and after are in an "or" relationship. As used herein, unless otherwise expressly stated, the term "or" covers all possible combinations unless not feasible. For example, if a component is stated to include A or B, then unless otherwise expressly stated or not feasible, the component may include A, or B, or A and B. As a second example, if a component is stated to include A, B, or C, then unless otherwise expressly stated or not feasible, the component may include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C.

[0113] The term “plurality” used in the embodiments of the present invention refers to two or more than two.

[0114] Relational terms such as first, second, etc. that appear in the embodiments of the present invention are only used to distinguish an entity or operation from another entity or operation, and do not require or imply any actual relationship or order between these entities or operations. In addition, the words "include", "have", "include" and other similar forms are intended to be equivalent in meaning and are open-ended. One or more items following any of these words do not mean an exhaustive list of such one or more items, or are limited to the one or more items listed.

[0115] It should be noted that the serial numbers of the steps in the embodiments of the present invention do not limit the execution order of the steps.

[0116] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be based on the scope defined by the claims.

Claims

1. A method for image processing, wherein an image to be processed is divided into a plurality of slices, each of which comprises a plurality of pixels, characterized in that: The method comprises: The seed parameter of the last pixel of the previous slice is configured to the next slice as the seed parameter of the first pixel of the next slice, so as to generate random noise to perform noise reduction processing on the first pixel of the next slice.

2. The image processing method according to claim 1, characterized in that The configuration of the seed parameter of the last pixel of the previous slice to the next slice as the seed parameter of the first pixel of the next slice is achieved through an addressing and transporting module.

3. The image processing method according to claim 1, wherein: Also includes: A seed parameter for the first pixel of the first slice is randomly generated.

4. The image processing method according to claim 3, characterized in that: Also includes: Starting from the second pixel of the slice, seed parameters of subsequent pixels are generated by a random number generator based on the seed parameter of the previous pixel.

5. The image processing method according to any one of claims 1 to 4, characterized in that: Also includes: determining a chroma component for each of the pixels in the slice; Based on the seed parameters of the pixels in the slice, random noise of each pixel is generated, and the random noise of each pixel is added to the chrominance component of each pixel.

6. The image processing method according to claim 1, characterized in that: Also includes: Steps for quantification.

7. The image processing method according to claim 1, characterized in that: The image to be processed includes multiple images, each frame of the multiple images includes multiple same-frame images from multiple image sensors, and each of the same-frame images is divided into multiple same-frame slices; The order of noise reduction processing of all the slices in the same frame belonging to one image in the same frame is superior to the order of noise reduction processing of all the slices in the same frame belonging to another image in the same frame.

8. The image processing method according to claim 1, characterized in that: The width of the slice is smaller than the upper limit of the width of the line buffer, and the height of the slice is smaller than the upper limit of the height of the line buffer.

9. The image processing method according to any one of claims 2 to 3, characterized in that: Also includes: Turn on the addressing and handling module; Enabling a register transfer function of the addressing transfer module, wherein the register transfer function is called by a register transfer instruction; Adding a buffer, wherein the buffer is used to store the seed parameter of the last pixel of the slice; as well as A read / write channel is added for reading / writing the buffer.

10. The image processing method according to claim 9, characterized in that: The register transfer function is suitable for writing data from one address in a register to another address.

11. The image processing method according to claim 9, characterized in that: The format of the register transfer instruction includes one or more of the following parameters: cmd base address, register transfer flag, start address, destination address; The data at the starting address is written into the destination address.

12. The image processing method according to claim 9, characterized in that: Also includes: A register transfer instruction and an interrupt instruction are added to the addressing transfer module, wherein the interrupt instruction is used to indicate that the register transfer instruction can be executed.

13. The image processing method according to claim 12, characterized in that: Also includes: In response to receiving the interrupt instruction, the addressing and transfer module executes the register transfer instruction to write the data of the register of the seed parameter of the last pixel of the previous slice into the register of the seed parameter of the first pixel of the next slice.

14. The image processing method according to claim 13, characterized in that: Writing the data of the register of the seed parameter of the last pixel of the previous slice into the register of the seed parameter of the first pixel of the next slice comprises: Writing data of the register of the seed parameter of the last pixel of the previous slice into the buffer; The data in the buffer is written into the register of the seed parameter of the first pixel of the next slice.

15. An image processing device, adapted to perform noise reduction on an image to be processed, wherein the image to be processed is divided into a plurality of slices, each of which comprises a plurality of pixels, and wherein: The device comprises: registers, suitable for storing seed parameters; An addressing and transporting module is adapted to write data of a register of seed parameters of the last pixel of the previous slice into a register of seed parameters of the first pixel of the next slice.

16. The image processing device according to claim 15, characterized in that: The image processing device further includes: A noise reduction module is configured to generate random noise for each pixel in the slice according to a seed parameter of each pixel, and add the random noise for each pixel to a chrominance component of each pixel.

17. The image processing device according to claim 15, characterized in that: The image processing device further includes: a buffer, adapted to store a seed parameter of a last pixel of a slice; A read / write channel is suitable for performing read / write operations on the buffer.

18. The image processing device according to claim 15, characterized in that: The image processing device further includes: A line buffer, wherein an upper limit of a width of the line buffer is greater than a width of the slice, and an upper limit of a height of the line buffer is greater than a height of the slice.

19. The image processing device according to claim 15, characterized in that The image to be processed includes multiple images, each frame of the multiple images includes multiple same-frame images from multiple image sensors, and each of the same-frame images is divided into multiple same-frame slices; The image processing device is further adapted to configure a noise reduction processing order of all the slices in the same frame belonging to one image in the same frame to take precedence over a noise reduction processing order of all the slices in the same frame belonging to another image in the same frame.

20. A readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 14 are implemented.

21. A program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 14 are implemented.

Images