FPGA test result file processing method and device

Abstract

The invention relates to the field of computers, in particular to an FPGA test result file processing method and device. The method comprises the steps of obtaining a target file; determining a target analysis rule corresponding to the target FPGA development tool from a preset rule base; wherein the target FPGA development tool is an FPGA development tool corresponding to the target file; the preset rule base comprises a plurality of analysis rules; the multiple analysis rules are respectively used for analyzing FPGA test result files output by different FPGA development tools; analyzing the target file according to the target analysis rule to obtain m test results included in the target file; m is a positive integer.

Description

Technical Field

[0001] The present application relates to the field of computers, and in particular to a method and device for processing FPGA test result files. Background Art

[0002] Field-Programmable Gate Array (FPGA) is a commonly used programmable logic device.

[0003] Currently, during FPGA development, numerous tests are performed and numerous FPGA measurement result files are generated. Furthermore, the FPGA test result files generated by different FPGA development tools often have unique file formats and data organization methods. In the prior art, extracting information from different FPGA measurement result files requires testers to manually browse and extract the information from each file. This not only requires testers to be familiar with the file formats and data organization methods of various FPGA test result files, but also makes it difficult to ensure the accuracy of the information. This severely impacts FPGA testing efficiency.

[0004] Therefore, how to more efficiently extract the information recorded in different FPGA measurement result files is a problem that needs to be solved. Summary of the Invention

[0005] In order to solve the above technical problems, the present application provides a method and device for processing FPGA test result files.

[0006] In a first aspect, the present application provides a method for processing an FPGA test result file, which is applied to an FPGA test management device, and includes: obtaining a target file; determining a target parsing rule corresponding to a target FPGA development tool from a preset rule library; wherein the target FPGA development tool is the FPGA development tool corresponding to the target file; the preset rule library includes: multiple parsing rules; the multiple parsing rules are respectively used to parse FPGA test result files output by different FPGA development tools; parsing the target file according to the target parsing rule to obtain m test results included in the target file; m is a positive integer.

[0007] In some implementations, parsing the target file according to the target parsing rules to obtain m test results included in the target file includes: using the m regular expressions included in the target parsing rules to extract m test results that conform to the m regular expressions from the target file.

[0008] In some implementations, the method further includes: storing the m test results included in the target file in a preset database according to a preset data structure; the preset database is used to store the test results in FPGA test result files output by multiple FPGA development tools according to the preset data structure.

[0009] In some implementations, the method also includes: obtaining the test round corresponding to the target file in the project under test; storing the m test results included in the target file in a preset database according to a preset data structure, including: according to the test round corresponding to the target file, storing the m test results included in the target file in a preset database according to a preset data structure.

[0010] In some implementations, obtaining the target file includes: obtaining the target file from the target FPGA development tool through a RESTful API between the FPGA test management device and the target FPGA development tool.

[0011] In some implementations, the method further includes: displaying a preset interface; the preset interface includes a first interactive area for inputting an FPGA test result file; and obtaining a target file, including: obtaining the target file according to a first user operation on the first interactive area.

[0012] In some implementations, the preset interface also includes: a second interactive area for determining the test type and the test case used; the method also includes: obtaining the test type and the test case used corresponding to the target file based on a second user operation on the second interactive area; based on the test type and the test case used corresponding to the target file, storing the m test results included in the target file in a preset database according to a preset data structure.

[0013] In some implementations, the method further includes: generating a test report conforming to a preset document template based on the m test results included in the target file.

[0014] In a second aspect, the present application provides an FPGA test management device, comprising: an acquisition unit for acquiring a target file; a processing unit for determining a target parsing rule corresponding to a target FPGA development tool from a preset rule library; wherein the target FPGA development tool is the FPGA development tool corresponding to the target file; the preset rule library includes: multiple parsing rules; the multiple parsing rules are respectively used to parse FPGA test result files output by different FPGA development tools; the processing unit is also used to parse the target file according to the target parsing rule to obtain m test results included in the target file; m is a positive integer.

[0015] In some implementations, the processing unit is further used to parse the target file according to the target parsing rules to obtain m test results included in the target file, including: the processing unit is further used to use the m regular expressions included in the target parsing rules to extract m test results that conform to the m regular expressions from the target file.

[0016] In some implementations, the processing unit is further used to store the m test results included in the target file in a preset database according to a preset data structure; the preset database is used to store the test results in the FPGA test result files output by multiple FPGA development tools according to the preset data structure.

[0017] In some implementations, the processing unit is also used to obtain the test round corresponding to the target file in the project under test; the processing unit is also used to store the m test results included in the target file in a preset database according to a preset data structure, including: the processing unit is also used to store the m test results included in the target file in a preset database according to the preset data structure based on the test round corresponding to the target file.

[0018] In some implementations, the acquiring unit, configured to acquire the target file, includes: an acquiring unit, configured to acquire the target file from the target FPGA development tool via a RESTful API between the FPGA test management device and the target FPGA development tool.

[0019] In some implementations, the processing unit is further used to display a preset interface; the preset interface includes a first interactive area for inputting an FPGA test result file; the acquisition unit is used to obtain a target file, including: an acquisition unit is used to obtain the target file based on a first user operation on the first interactive area.

[0020] In some implementations, the preset interface also includes: a second interactive area for determining the test type and the test case used; a processing unit for obtaining the test type and the test case used corresponding to the target file based on a second user operation on the second interactive area; the processing unit for storing the m test results included in the target file in a preset database according to a preset data structure based on the test type and the test case used corresponding to the target file.

[0021] In some implementations, the processing unit is further configured to generate a test report conforming to a preset document template based on the m test results included in the target file.

[0022] In a third aspect, an FPGA test management device is provided, comprising: a memory and a processor, wherein the memory is used to store a computer program, and the processor is used to enable the FPGA test management device to implement the method of the first aspect or any implementation method of the first aspect when executing the computer program.

[0023] In a fourth aspect, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a computing device, the computing device implements the method as in the first aspect or any implementation method in the first aspect.

[0024] In a fifth aspect, a computer program product is provided. When the computer program product is run on a computer, the computer implements the method as in the first aspect or any implementation manner of the first aspect.

[0025] The technical solution provided by this application has the following advantages compared with the existing technology:

[0026] In the present application, it is considered that: a preset rule library can be pre-constructed, and the preset rule library may include parsing rules corresponding to various FPGA development tools, wherein each parsing rule is used to parse the FPGA test result files output by different FPGA development tools. In this way, when it is necessary to extract information from a certain FPGA test result file (hereinafter referred to as the target file), after obtaining the target file, the parsing rules (hereinafter referred to as the target parsing rules) corresponding to the FPGA development tool (hereinafter referred to as the target FPGA development tool) corresponding to the target file can be first determined from the preset rule library. Then, the target file is parsed according to the target parsing rules to obtain the test results included in the target file. In this way, the effect of more efficiently extracting the information recorded in different FPGA measurement result files can be achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0028] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0029] Figure 1 One of the methods for processing FPGA test result files provided in the embodiments of the present application;

[0030] Figure 2A second method for processing an FPGA test result file provided in an embodiment of the present application;

[0031] Figure 3 A third method for processing an FPGA test result file provided in an embodiment of the present application;

[0032] Figure 4 A fourth method for processing an FPGA test result file provided in an embodiment of the present application;

[0033] Figure 5 A fifth method for processing an FPGA test result file provided in an embodiment of the present application;

[0034] Figure 6 A sixth method for processing an FPGA test result file provided in an embodiment of the present application;

[0035] Figure 7 A schematic diagram of an interface provided in an embodiment of the present application;

[0036] Figure 8 A seventh method for processing an FPGA test result file provided in an embodiment of the present application;

[0037] Figure 9 An eighth method for processing an FPGA test result file provided in an embodiment of the present application;

[0038] Figure 10 This is one of the structural diagrams of an FPGA test management device provided in an embodiment of the present application;

[0039] Figure 11 This is a second structural diagram of an FPGA test management device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0040] In order to more clearly understand the above-mentioned objectives, features and advantages of the present application, the scheme of the present application will be further described below. It should be noted that, in the absence of conflict, the embodiments of the present application and the features therein can be combined with each other.

[0041] In the following description, many specific details are set forth to facilitate a full understanding of the present application, but the present application can also be implemented in other ways different from those described herein; it is obvious that the embodiments in the specification are only part of the embodiments of the present application, not all of the embodiments.

[0042] The following is an introduction to the technical solutions provided by the embodiments of the present application with reference to examples:

[0043] Currently, during the FPGA development process, a large number of tests are performed and a large number of FPGA measurement result files are generated. For example, during the FPGA development process, different test types such as power consumption testing, static timing testing, and margin testing will generate different FPGA measurement result files.

[0044] In addition, FPGA test result files generated by different FPGA development tools often have unique file formats and data organization methods. For example, common FPGA development tools include Libero, ISE, Vivado, and Quastusll, and these FPGA development tools generate FPGA test result files with different file formats and data organization methods.

[0045] Therefore, if testers manually browse and extract information from various FPGA test result files, not only do they need to be familiar with the file formats and data organization of various FPGA test result files, but the manual operation also makes it difficult to ensure the accuracy of the information, which seriously affects the efficiency of FPGA testing.

[0046] In response to the above technical problems, in an embodiment of the present application, it is considered that: a preset rule library can be pre-constructed, and the preset rule library may include parsing rules corresponding to various FPGA development tools, wherein each parsing rule is used to parse the FPGA test result files output by different FPGA development tools. In this way, when it is necessary to extract information from a certain FPGA test result file (hereinafter referred to as the target file), after obtaining the target file, the parsing rules (hereinafter referred to as the target parsing rules) corresponding to the FPGA development tool (hereinafter referred to as the target FPGA development tool) corresponding to the target file can be first determined from the preset rule library. Then, the target file is parsed according to the target parsing rules to obtain the test results included in the target file. In this way, the effect of more efficiently extracting the information recorded in different FPGA measurement result files can be achieved.

[0047] The technical solution provided by the embodiment of the present application is described in detail below with reference to examples. Specifically, the embodiment of the present application provides a method for processing an FPGA test result file. Among them, the execution subject of the method for processing the FPGA test result file can be an FPGA test management device. When the FPGA test management device is running, it can be used to execute all or part of the steps in the method for processing the FPGA test result file provided by the embodiment of the present application. Among them, in actual application, the functions of the FPGA test management device can be implemented by a personal computer (including desktop computers, laptop computers, handheld computers and notebook computers, etc.), or electronic devices such as smart phones and servers; or, the functions of the above-mentioned FPGA test management device can also be implemented by some hardware / software devices in the above-mentioned electronic devices. The embodiment of the present application does not impose any special restrictions on the specific form of the FPGA test management device.

[0048] like Figure 1 As shown, the method for processing the FPGA test result file provided in the embodiment of the present application may include:

[0049] S101. The FPGA test management device obtains a target file.

[0050] For example, the target file can be an FPGA test result file output by an FPGA development tool such as Libero, ISE, Vivado, or Quastus II. Another example is an FPGA test result file for different test types, such as power consumption test, static timing test, or margin test.

[0051] S102: The FPGA test management device determines a target parsing rule corresponding to the target FPGA development tool from a preset rule library.

[0052] The target FPGA development tool is the FPGA development tool corresponding to the target file.

[0053] In addition, the preset rule library includes: multiple parsing rules. The multiple parsing rules are used to parse FPGA test result files output by different FPGA development tools.

[0054] For example, the preset rule library may include parsing rules corresponding to Libero, which can be used to parse the FPGA test result file output by Libero; in addition, the preset rule library may also include parsing rules corresponding to ISE, which can be used to parse the FPGA test result file output by ISE. Similarly, the preset rule library may also include parsing rules corresponding to other FPGA development tools.

[0055] S103: The FPGA test management device parses the target file according to the target parsing rule to obtain m test results included in the target file, where m is a positive integer.

[0056] For example, the FPGA development tool Libero typically outputs FPGA test result files in the .rpt format, which include multiple test results organized according to Libero's data organization scheme. Therefore, when the target file is an FPGA test result file output by the FPGA development tool Libero, the FPGA test management device can, on the one hand, open the .rpt target file using the file opening method specified in the target parsing rules; and, on the other hand, read the contents of the target file using the data organization method specified in the target parsing rules, thereby obtaining the m test results included in the target file.

[0057] In some implementations, such as Figure 2 As shown, S103 may specifically include:

[0058] S1031. The FPGA test management device uses the m regular expressions included in the target parsing rules to extract m test results that comply with the m regular expressions from the target file.

[0059] For example, if the target file is an FPGA test result file output by Libero, and a specific string is used to represent the test result corresponding to static power in the FPGA test result file output by Libero, the target parsing rule can include a specific regular expression corresponding to this specific string. By extracting information that matches this specific regular expression from the target file, the test result corresponding to static power in the target file can be obtained. The specific regular expression can be understood as one of m types of regular expressions, and the test result corresponding to static power obtained from the target file can be understood as one of m test results.

[0060] In some implementations, such as Figure 3 As shown, the method may further include:

[0061] S104 , the FPGA test management device stores the m test results included in the target file into a preset database according to a preset data structure.

[0062] The preset database is specifically used to store test results in FPGA test result files output by various FPGA development tools according to a preset data structure.

[0063] For example, after obtaining FPGA test result files output by different FPGA development tools, the FPGA test management device can, on the one hand, obtain the test results included in each FPGA test result file according to the above-mentioned process S101-S103 from these FPGA test result files, and on the other hand, store the test results included in these FPGA test result files in a preset database according to the above-mentioned preset data structure. This unifies the data structure of the FPGA test results output by the FPGA development tools, facilitating data management.

[0064] Furthermore, in some designs, such as Figure 4 As shown, the method may further include:

[0065] S105. The FPGA test management device obtains the test round corresponding to the target file in the project under test.

[0066] For example, if the target file is a test result file obtained from the xth round of testing of a certain FPGA software (ie, the project under test), the test round corresponding to the target file may be x.

[0067] Furthermore, the above S104 may specifically include:

[0068] S104a. The FPGA test management device stores the m test results included in the target file into a preset database according to a preset data structure based on the test round corresponding to the target file.

[0069] For example, the FPGA test management device can, on the one hand, pre-determine different storage areas for test results corresponding to different test rounds in a preset database, and on the other hand, store the m test results included in the target file in the storage area corresponding to the test round corresponding to the target file. This facilitates data management.

[0070] For another example, the FPGA test management device can set corresponding indexes for the m test results included in the target file according to the test round corresponding to the target file, so that the m test results included in the target file can be found from the preset database according to the test round corresponding to the target file.

[0071] In some implementations, the embodiments of the present application take into account that a Representational State Transfer Application Programming Interface (RESTful API) can be designed between the FPGA test management device and various FPGA development tools, so that the FPGA test management device can transmit information with various FPGA development tools through the RESTful API. Figure 5 As shown, S101 may specifically include:

[0072] S101a. The FPGA test management device obtains a target file from the target FPGA development tool through a RESTful API between the FPGA test management device and the target FPGA development tool.

[0073] For example, in actual application, on the one hand, the target FPGA development tool can be used to test the FPGA software and generate the corresponding FPGA test result file; on the other hand, after the target FPGA development tool generates the FPGA test result file, the FPGA test management device can directly obtain the corresponding FPGA test result file through the RESTful API.

[0074] Additionally, in some implementations, such as Figure 6 As shown, the method may further include:

[0075] S106. The FPGA test management device displays a preset interface.

[0076] The preset interface includes a first interactive area for inputting FPGA test result files.

[0077] In addition, the preset interface may further include prompt information, wherein the prompt information is used to prompt the user to input the FPGA test result file into the FPGA test management device by performing a user operation on the first interactive area.

[0078] For example, Figure 7 As shown, the preset interface 20 includes a first interactive area 201. The user can click on the "File Upload" control in the first interactive area 201 to input the FPGA test result file into the FPGA test management device.

[0079] Furthermore, S101 may specifically include:

[0080] S101b. The FPGA test management device obtains a target file according to a first user operation on the first interactive area.

[0081] For example, in Figure 7 In the preset interface 20 shown, the first user operation may include: clicking on the "file upload" control in the first interactive area 201, thereby inputting the target file into the FPGA test management device.

[0082] Through the above implementation, when information in a target file needs to be extracted, the target file can be input into the FPGA test management device through the first user operation in the first interactive area. In this way, the tester only needs to follow the above operation to input the target file into the FPGA test management device, reducing the difficulty of use.

[0083] Furthermore, in some designs, on the one hand, the preset interface in S106 may further include: a second interactive area for determining the test type and the test case to be used. Figure 8 As shown, the method may further include:

[0084] S107 : The FPGA test management device obtains the test type and the used test case corresponding to the target file according to the second user operation on the second interactive area.

[0085] For example, Figure 7 As shown in the preset interface 20, the preset interface 20 includes an area 202, wherein the area 202 includes a variety of test types (i.e., code review, file review, logic test, etc.), each test type can also specifically include subtypes (for example, "margin test" includes subtypes "clock margin test" and "resource margin test"), and each test type specifically corresponds to different test cases (for example, "clock margin test" corresponds to "test case A", "test case B", "test case C"; "resource margin test" corresponds to "test case D", "test case E", "test case F"). The user can determine the test type and the test case used by clicking. Among them, the area 202 in the preset interface 20 can be understood as the above-mentioned second interactive area, and the operation of the user clicking the corresponding test type and subtype can be understood as part of the above-mentioned second user operation (i.e., the operation for determining the test type corresponding to the target file), and the operation of the user clicking the corresponding test case can be understood as part of the above-mentioned second user operation (i.e., the operation for determining the test case).

[0086] Furthermore, after parsing the target file according to the target parsing rule to obtain m test results included in the target file (ie, S103), the method may further include:

[0087] S108. The FPGA test management device stores the m test results included in the target file into a preset database according to a preset data structure based on the test type corresponding to the target file and the test case used.

[0088] For example, the FPGA test management device can pre-allocate different storage areas in a preset database for different test types and test cases, and can also store the m test results included in the target file in the storage area corresponding to the test round corresponding to the target file. This makes data management easier.

[0089] For another example, the FPGA test management device can set corresponding indexes for the m test results included in the target file based on the test type corresponding to the target file and the test case used, so that the m test results included in the target file can be subsequently found from the preset database based on the test type corresponding to the target file and the test case used.

[0090] In some implementations, such as Figure 9 As shown, the method may further include:

[0091] S109. The FPGA test management device generates a test report that complies with a preset document template based on the m test results included in the target file.

[0092] Specifically, a standardized preset document template can be pre-set in the FPGA test management device. This allows the FPGA test management device to generate test reports that conform to the preset document template. Furthermore, the FPGA test management device can generate test reports that conform to the preset document template for different FPGA software tests, ensuring that all generated test reports have a consistent structure and style, making them easier to read and manage.

[0093] It should be noted that, for ease of description in the embodiments of this application, the document used to describe the test results of the FPGA software test is referred to as a "test report." Specifically, the test report may include the test results of each test step during the test process, as well as the test results of the entire FPGA software test.

[0094] In actual applications, a "test report" can be referred to as a "test conclusion," "test minutes," etc. In other words, in the embodiments of this application, there is no restriction on the name of the test report. In actual applications, any document describing the test results of an FPGA software test can be considered a "test report" in the embodiments of this application.

[0095] Based on the same inventive concept, as an implementation of the above method, an embodiment of the present application further provides an FPGA test management device, which corresponds to the above method embodiment. For ease of reading, this embodiment will no longer repeat the details of the above method embodiment one by one, but it should be clear that the FPGA test management device in this embodiment can correspond to and implement all the contents of the above method embodiment.

[0096] The present invention provides an FPGA test management device. Figure 9 A structural diagram of the FPGA test management device is shown in FIG. Figure 10 As shown, the FPGA test management device 30 includes:

[0097] An acquisition unit 301 is used to acquire a target file;

[0098] The processing unit 302 is configured to determine a target parsing rule corresponding to the target FPGA development tool from a preset rule library;

[0099] The target FPGA development tool is an FPGA development tool corresponding to the target file; the preset rule library includes: multiple parsing rules; the multiple parsing rules are respectively used to parse FPGA test result files output by different FPGA development tools;

[0100] The processing unit 302 is further configured to parse the target file according to the target parsing rule to obtain m test results included in the target file; m is a positive integer.

[0101] In some implementations, the processing unit 302 is further configured to parse the target file according to the target parsing rule to obtain m test results included in the target file, including:

[0102] The processing unit 302 is further configured to extract m test results that comply with the m regular expressions from the target file using the m regular expressions included in the target parsing rules.

[0103] In some implementations, the processing unit 302 is further used to store the m test results included in the target file in a preset database according to a preset data structure; the preset database is used to store the test results in the FPGA test result files output by multiple FPGA development tools according to the preset data structure.

[0104] In some implementations, the processing unit 302 is further configured to obtain a test round corresponding to a target file in the project under test;

[0105] The processing unit 302 is further configured to store the m test results included in the target file into a preset database according to a preset data structure, including:

[0106] The processing unit 302 is further configured to store the m test results included in the target file into a preset database according to a preset data structure based on the test round corresponding to the target file.

[0107] In some implementations, the acquiring unit 301 is configured to acquire a target file from a target FPGA development tool via a RESTful API between the FPGA test management device and the target FPGA development tool.

[0108] In some implementations, the processing unit 302 is further configured to display a preset interface; the preset interface includes a first interactive area for inputting an FPGA test result file;

[0109] The acquiring unit 301 is configured to acquire a target file according to a first user operation on a first interactive area.

[0110] In some implementations, the preset interface further includes: a second interactive area for determining the test type and the test case to be used;

[0111] The processing unit 302 is further configured to obtain a test type and a used test case corresponding to the target file according to a second user operation on the second interactive area;

[0112] The processing unit 302 is further configured to store the m test results included in the target file into a preset database according to a preset data structure based on the test type corresponding to the target file and the test case used.

[0113] In some implementations, the processing unit 302 is further configured to generate a test report conforming to a preset document template based on the m test results included in the target file.

[0114] The FPGA test management device 30 provided in the embodiment of the present application can execute the method provided in any of the above embodiments. Its implementation principles and technical effects are similar and will not be repeated here.

[0115] Based on the same inventive concept, an embodiment of the present application also provides an FPGA test management device. Figure 11 A schematic diagram of the structure of the FPGA test management device provided in the embodiment of the present application is shown as follows: Figure 11 As shown, the FPGA test management device provided by this embodiment includes: a memory 401 and a processor 402, the memory 401 is used to store computer programs, and the processor 402 is used to execute the method provided by the above embodiment when executing the computer program.

[0116] Based on the same inventive concept, an embodiment of the present application further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the computing device implements the method provided in the above embodiment.

[0117] Based on the same inventive concept, an embodiment of the present application further provides a computer program product, which, when executed on a computer, enables the computing device to implement the method provided in the above embodiment.

[0118] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Furthermore, the present application may take the form of a computer program product implemented on one or more computer-usable storage media containing computer-usable program code.

[0119] The processor may be a central processing unit (CPU), other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc.

[0120] The memory may include non-permanent memory in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. The memory is an example of a computer-readable medium.

[0121] Computer-readable media includes both permanent and non-permanent, removable and non-removable storage media. Storage media can implement any method or technology for storing information, which can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical storage, magnetic cassettes, magnetic disk storage or other magnetic storage devices, or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer-readable media does not include transitory computer-readable media, such as modulated data signals and carrier waves.

[0122] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or make equivalent replacements for some or all of the technical features therein, and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A method for processing FPGA test result files, characterized in that: The method is applied to an FPGA test management device, and the method includes: Get the target file; Determine the target parsing rules corresponding to the target FPGA development tool from the preset rule library; The target FPGA development tool is the FPGA development tool corresponding to the target file; the preset rule library includes: a plurality of parsing rules; the plurality of parsing rules are respectively used to parse FPGA test result files output by different FPGA development tools; The target file is parsed according to the target parsing rule to obtain m test results included in the target file; m is a positive integer.

2. The method according to claim 1, characterized in that The step of parsing the target file according to the target parsing rule to obtain m test results included in the target file includes: Utilizing the m types of regular expressions included in the target parsing rules, m test results that conform to the m types of regular expressions are extracted from the target file.

3. The method according to claim 1, characterized in that The method further comprises: The m test results included in the target file are stored in a preset database according to a preset data structure; the preset database is used to store the test results in FPGA test result files output by multiple FPGA development tools according to the preset data structure.

4. The method according to claim 3, characterized in that The method further comprises: Obtain the test round corresponding to the target file in the project under test; The step of storing the m test results included in the target file in a preset database according to a preset data structure includes: According to the test round corresponding to the target file, the m test results included in the target file are stored in a preset database according to a preset data structure.

5. The method according to any one of claims 1 to 4, characterized in that The obtaining of the target file includes: The target file from the target FPGA development tool is obtained through a RESTful API between the FPGA test management device and the target FPGA development tool.

6. The method according to any one of claims 1 to 4, characterized in that The method further comprises: Display a preset interface; the preset interface includes a first interactive area for inputting an FPGA test result file; The acquiring the target file includes: acquiring the target file according to a first user operation on the first interactive area.

7. The method according to claim 6, characterized in that The preset interface further includes: a second interactive area for determining the test type and the test case to be used; the method further includes: acquiring, according to a second user operation on the second interactive area, a test type corresponding to the target file and a used test case; According to the test type corresponding to the target file and the test case used, the m test results included in the target file are stored in a preset database according to a preset data structure.

8. The method according to any one of claims 1 to 4, characterized in that The method further comprises: Generate a test report that conforms to a preset document template based on the m test results included in the target file.

9. An FPGA test management device, characterized in that: include: An acquisition unit, used to acquire a target file; A processing unit, configured to determine a target parsing rule corresponding to a target FPGA development tool from a preset rule library; The target FPGA development tool is the FPGA development tool corresponding to the target file; the preset rule library includes: a plurality of parsing rules; the plurality of parsing rules are respectively used to parse FPGA test result files output by different FPGA development tools; The processing unit is further configured to parse the target file according to the target parsing rule to obtain m test results included in the target file; m is a positive integer.

10. An FPGA test management device, characterized in that: include: A memory and a processor, wherein the memory is used to store a computer program, and the processor is used to enable the FPGA test management device to implement the method according to any one of claims 1 to 8 when executing the computer program.

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