Pixel circuit, display panel and display device

Abstract

The invention discloses a pixel circuit, a display panel and a display device. The pixel circuit comprises a light emitting unit and two pixel sub-circuits. The two pixel sub-circuits are connected with the light-emitting unit and are configured to alternately drive the light-emitting unit.

Description

Technical Field

[0001] The present application belongs to the field of display technology, and specifically relates to a pixel circuit, a display panel, and a display device. Background Art

[0002] With the development of OLED (Organic Light-Emitting Diode) technology, OLED display products are gaining a larger share of the market, with increasingly stringent requirements for applications such as wearables, foldable displays, and automotive displays. However, when the brightness difference between adjacent pixels reaches 2% to 3%, OLED displays can cause noticeable image retention. This is particularly true for large-size products, such as automotive displays and laptops. Summary of the Invention

[0003] The present application provides a pixel circuit, a display panel, and a display device, which aim to solve the problem of afterimage in display products to at least a certain extent.

[0004] In a first aspect of the present application, a pixel circuit is provided, comprising: Light-emitting unit; The two pixel sub-circuits are both connected to the light-emitting unit and are configured to alternately drive the light-emitting unit.

[0005] In some embodiments, the two pixel sub-circuits include: A first pixel sub-circuit is connected to the light-emitting unit and is configured to drive the light-emitting unit to display an odd-numbered frame image; The second pixel sub-circuit is connected to the light-emitting unit and is configured to drive the light-emitting unit to display an even-numbered frame image.

[0006] In some embodiments, the first pixel sub-circuit is configured to write a control signal of the odd-numbered frame image when displaying the odd-numbered frame image, so as to drive the light-emitting unit to display the odd-numbered frame image; The second pixel sub-circuit is configured to write a control signal of the even-numbered frame image when displaying the even-numbered frame image, so as to drive the light-emitting unit to display the even-numbered frame image.

[0007] In some embodiments, the control signal is a data signal.

[0008] In some embodiments, the pixel circuit further includes: a data signal line, connected to the two pixel sub-circuits respectively, and configured to write a first data signal of an image to be displayed, wherein the image to be displayed includes the odd-numbered frame image and the even-numbered frame image; The black signal line is connected to the two pixel sub-circuits respectively and is configured to write a second data signal of a black image. The pixel sub-circuit to which the first data signal is not written writes the second data signal.

[0009] In some embodiments, the pixel circuit further includes: A multiplexer is connected in series between the data signal line and the two pixel sub-circuits, and between the black signal line and the two pixel sub-circuits, and is configured to write the first data signal into the first pixel sub-circuit and the second data signal into the second pixel sub-circuit when displaying an odd frame image, and to write the first data signal into the second pixel sub-circuit and the second data signal into the first pixel sub-circuit when displaying an even frame image.

[0010] In some embodiments, the multiplexer includes: a first switching transistor, wherein a first end of the first switching transistor is connected to the black signal line, a second end of the first switching transistor is connected to the first pixel sub-circuit, and a control end of the first switching transistor is configured to control the first end and the second end of the first switching transistor to be connected when displaying an even-numbered frame image; a second switching transistor, wherein a first end of the second switching transistor is connected to the first pixel sub-circuit, a second end of the second switching transistor is connected to the data signal line, and a control end of the second switching transistor is configured to control the first end and the second end of the second switching transistor to be connected when displaying an odd-numbered frame image; a third switching transistor, wherein a first end of the third switching transistor is connected to the data signal line, a second end of the third switching transistor is connected to the second pixel sub-circuit, and a control end of the third switching transistor is configured to control the first end and the second end of the third switching transistor to be connected when displaying an even-numbered frame image; a fourth switch tube, wherein a first end of the fourth switch tube is connected to the second pixel sub-circuit, a second end of the fourth switch tube is connected to the black signal line, and a control end of the fourth switch tube is configured to control the first end and the second end of the fourth switch tube to be connected when displaying an odd-numbered frame image.

[0011] In some embodiments, the control signal is a scan signal.

[0012] In some embodiments, the pixel circuit further includes: a first scanning signal line connected to the first pixel sub-circuit, configured to write the scanning signal when displaying the odd-numbered frame image, and not write the scanning signal when displaying the even-numbered frame image; The second scanning signal line is connected to the second pixel sub-circuit and is configured to write the scanning signal when displaying the even-numbered frame image, and not write the scanning signal when displaying the odd-numbered frame image.

[0013] In a second aspect of the present application, a display panel is provided, comprising a pixel circuit as provided in any embodiment of the first aspect.

[0014] In a third aspect of the present application, a display device is provided, comprising a display panel provided in any embodiment of the second aspect.

[0015] According to the pixel circuit, display panel and display device provided by one or more embodiments of the present application, the pixel circuit includes a light-emitting unit and two pixel sub-circuits. The two pixel sub-circuits are both connected to the light-emitting unit and alternately drive the light-emitting unit. In this way, when each pixel sub-circuit drives the light-emitting unit, it switches from a black screen to a display screen, thereby improving the afterimage problem. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0017] Figure 1 A schematic diagram showing an afterimage test is shown.

[0018] Figure 2 Shown Figure 1 Schematic diagram of the ideal state of afterimage test.

[0019] Figure 3 Shown Figure 2 A graph showing how pixel brightness changes over time.

[0020] Figure 4 Shown Figure 1 Schematic diagram of the actual state of the afterimage test.

[0021] Figure 5 Shown Figure 4 A graph showing how pixel brightness changes over time.

[0022] Figure 6 Shown Figure 4 A curve diagram of the voltage and current of the TFT in the driving circuit corresponding to the pixel.

[0023] Figure 7 A schematic diagram showing the improvement of afterimage in the related art is shown.

[0024] Figure 8 A schematic structural diagram of a pixel circuit in one or more embodiments of the present application is shown.

[0025] Figure 9 Shown Figure 8 A schematic diagram of the pixel arrangement corresponding to the pixel circuit.

[0026] Figure 10 Shown Figure 9 Schematic diagram of the working status of each pixel sub-circuit.

[0027] Figure 11 Shown Figure 8 Another schematic diagram of a pixel arrangement corresponding to the pixel circuit.

[0028] Figure 12 Shown Figure 11 Schematic diagram of the working status of each pixel sub-circuit.

[0029] Figure 13 Shown Figure 11 Schematic diagram of the structure of the multiplexer.

[0030] Figure 14 Shown Figure 13 Schematic diagram of a working state of a multiplexer.

[0031] Figure 15 Shown Figure 13 Schematic diagram of another working state of the multiplexer.

[0032] Explanation of reference numerals: 10 - light-emitting unit, 20 - pixel sub-circuit, 31 - first scanning signal line, 32 - second scanning signal line, 41 - data signal line, 42 - black signal line, 50 - multiplexer. DETAILED DESCRIPTION

[0033] In order to enable those skilled in the art to understand the present application more clearly, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of this application.

[0034] Figure 1 For a diagram of the afterimage test, see Figure 1Currently, the afterimage test of display products adopts the black and white grid test. First, a black and white picture consisting of alternating white squares of L255 and black squares of L0 is displayed, and then it is uniformly switched to a gray picture of L48. The duration of the black and white grid is used to represent the afterimage level of the display product.

[0035] Figure 2 for Figure 1 For a diagram of the ideal afterimage test, see Figure 2 , the white squares of L255 and the black squares of L0 are transformed into gray squares of L48, forming the entire gray screen. Figure 3 for Figure 2 For a graph of pixel brightness changing over time, see Figure 3 As time goes by, the pixel brightness of the white square of L255 and the black square of L0 becomes consistent, so the overall picture is uniformly gray.

[0036] Figure 4 for Figure 1 For a diagram of the actual state of the afterimage test, see Figure 4 , the white square of L255 and the black square of L0 become gray squares of different shades, indicating that there is a difference in brightness. Figure 5 for Figure 4 For a graph of pixel brightness changing over time, see Figure 5 As time goes by, there is always a difference in pixel brightness between the white square of L255 and the black square of L0, resulting in gray squares of different shades.

[0037] Figure 6 for Figure 4 For a graph of the voltage and current of the TFT in the driving circuit corresponding to the pixel, please refer to Figure 6 The hysteresis effect of the TFT (Thin Film Transistor) in the pixel circuit will cause the round-trip loop of the drain current-voltage curve Id-Vg to not overlap, which will lead to different source-drain currents Ids of the driving transistor for the same grayscale pattern, resulting in different display brightness. During normal display, if the grayscale value is switched from a low grayscale value to an intermediate grayscale value, the threshold voltage Vth of the TFT will shift positively, the turn-on time of the TFT will be advanced, and the source-drain current Ids will increase. When switching from a high grayscale value to an intermediate grayscale value, the threshold voltage Vth of the TFT will shift negatively, the turn-on time of the TFT will be delayed, and the source-drain current Ids will decrease. In this way, under the same gate voltage, the display brightness of the intermediate grayscale value is inconsistent, resulting in afterimage phenomenon.

[0038] Figure 7 For a schematic diagram of improving afterimages in related technologies, please refer to Figure 7, two adjacent frames of images are displayed alternately by adjacent pixels. For example, the 1st pixel and the 3rd pixel display the nth frame of image, and the 2nd pixel and the 4th pixel display the n+1th frame of image. Moreover, when the 1st pixel and the 3rd pixel display the nth frame of image, the brightness of the 2nd pixel and the 4th pixel is L0; when the 2nd pixel and the 4th pixel display the n+1th frame of image, the brightness of the 1st pixel and the 3rd pixel is L0. In this way, all pixels are evenly divided into two groups, and each frame of image is displayed alternately. One frame of image is displayed by one group of pixels, while the brightness of the other group of pixels is L0. When the screen of the afterimage test is switched, the brightness of the pixel is switched from L0 to L48 or from the display brightness to L0. The drain current-voltage curve Id-Vg will not switch from high and low grayscale values without overlapping, which can improve the afterimage problem.

[0039] However, the number of pixels used to display an image is only half the original number, which results in a reduction in display brightness. Doubling the brightness would also have a certain impact on the lifespan of the display product. Furthermore, this would also halve the PPI (Pixels Per Inch) of the display product, significantly impacting the display quality.

[0040] Figure 8 For a schematic diagram of the structure of a pixel circuit in one or more embodiments of the present application, please refer to Figure 8 In a first aspect of the present application, an embodiment provides a pixel circuit, which includes a light-emitting unit 10 and two pixel sub-circuits 20. The two pixel sub-circuits 20 are both connected to the light-emitting unit 10 and configured to alternately drive the light-emitting unit 10.

[0041] In this embodiment, the light emitting unit 10 is a light emitting unit of any color. For example, the light emitting unit 10 can be a red light emitting unit, a green light emitting unit, or a blue light emitting unit.

[0042] The pixel sub-circuit 20 is a driving circuit for the light emitting unit 10. For example, when the pixel sub-circuit 20 receives a scan signal, it can drive the light emitting unit 10 based on the received data signal.

[0043] The pixel circuit comprises a light-emitting unit 10 and two pixel sub-circuits 20. Both pixel sub-circuits 20 are connected to the light-emitting unit 10 and alternately drive the unit 10. This allows each pixel sub-circuit 20 to switch from a black screen to a displayed screen when driving the light-emitting unit 10, thereby improving image retention. Furthermore, this circuit does not affect the display product's PPI and can be applied to any pixel circuit, significantly improving the product's display quality. In particular, for medium- and large-sized display products, a lower PPI allows for more space to accommodate additional pixel sub-circuits.

[0044] In some embodiments, the two pixel sub-circuits 20 may include a first pixel sub-circuit and a second pixel sub-circuit. The first pixel sub-circuit is connected to the light-emitting unit 10 and is configured to drive the light-emitting unit 10 to display odd-numbered frame images. The second pixel sub-circuit is connected to the light-emitting unit 10 and is configured to drive the light-emitting unit 10 to display even-numbered frame images.

[0045] In this embodiment, the first pixel sub-circuit drives the light-emitting unit 10 to display the first frame of image, the second pixel sub-circuit drives the light-emitting unit to display the second frame of image, the first pixel sub-circuit drives the light-emitting unit 10 to display the third frame of image, the second pixel sub-circuit drives the light-emitting unit to display the fourth frame of image... and so on. The two pixel sub-circuits 20 alternately drive the light-emitting unit 10 to display images.

[0046] In the above embodiment, by configuring the first pixel sub-circuit to drive the light-emitting unit 10 to display odd-numbered frame images and the second pixel sub-circuit to drive the light-emitting unit 10 to display even-numbered frame images, the two pixel sub-circuits 20 can alternately drive the light-emitting unit 10 to display images. In this way, when each pixel sub-circuit 20 drives the light-emitting unit 10, it switches from a black screen to a display screen, which can improve the afterimage problem.

[0047] Exemplarily, the first pixel sub-circuit may be configured to write a control signal of an odd-numbered frame image when displaying an odd-numbered frame image, so as to drive the light emitting unit 10 to display the odd-numbered frame image.

[0048] Accordingly, the second pixel sub-circuit may be configured to write a control signal of an even-numbered frame image when displaying an even-numbered frame image, so as to drive the light emitting unit 10 to display the even-numbered frame image.

[0049] In this embodiment, the control signal for the first frame of image is first written into the first pixel subcircuit, and the first pixel subcircuit drives the light-emitting unit 10 to display the first frame of image. The control signal for the second frame of image is then written into the second pixel subcircuit, and the second pixel subcircuit drives the light-emitting unit 10 to display the second frame of image. The control signal for the third frame of image is then written into the first pixel subcircuit, and the first pixel subcircuit drives the light-emitting unit 10 to display the third frame of image. The control signal for the fourth frame of image is then written into the second pixel subcircuit, and the second pixel subcircuit drives the light-emitting unit 10 to display the fourth frame of image… and so on. The control signal for each frame of image is alternately written into the two pixel subcircuits 20, and the pixel subcircuit 20 to which the control signal is written drives the light-emitting unit 10 to display the image.

[0050] In the above embodiment, by alternately writing control signals into the two pixel sub-circuits 20 , the two pixel sub-circuits 20 alternately drive the light-emitting unit 10 to display an image.

[0051] In a possible embodiment, the control signal may be a scan signal.

[0052] In actual applications, pixels are arranged in multiple rows and columns, and scanning signals are written row by row to the driver circuits (i.e., pixel circuits) corresponding to each pixel in the same row. Each pixel circuit written with the scanning signal drives the corresponding pixel (i.e., light-emitting unit) according to the written data signal to display the image.

[0053] Figure 9 for Figure 8 A schematic diagram of the pixel arrangement corresponding to the pixel circuit of Figure 9 , multiple pixel circuits are arranged in multiple rows and columns, and each pixel circuit includes a light emitting unit 10 and two pixel sub-circuits 20. The two pixel sub-circuits 20 of the same pixel circuit are connected to different scan signal lines and can be connected to the same data signal line.

[0054] Figure 10 for Figure 9 For a schematic diagram of the working status of each pixel sub-circuit, please refer to Figure 10 When displaying the nth frame image, the first pixel sub-circuit of each pixel circuit writes a scan signal to drive the light-emitting unit 10 to display the nth frame image, e.g., the red light-emitting unit 10 emits red light, the green light-emitting unit 10 emits green light, and the blue light-emitting unit 10 emits blue light. At the same time, the second pixel sub-circuit of each pixel circuit does not write a scan signal and does not drive the light-emitting unit 10 to display an image, which is equivalent to driving the light-emitting unit 10 to display a black image. When displaying the n+1th frame image, the second pixel sub-circuit of each pixel circuit writes a scan signal to drive the light-emitting unit 10 to display the n+1th frame image, e.g., the red light-emitting unit 10 emits red light, the green light-emitting unit 10 emits green light, and the blue light-emitting unit 10 emits blue light. At the same time, the first pixel sub-circuit of each pixel circuit does not write a scan signal and does not drive the light-emitting unit 10 to display an image, which is equivalent to driving the light-emitting unit 10 to display a black image. Where n is an odd number.

[0055] In the above embodiment, by alternately writing the scanning signals into the two pixel sub-circuits 20 , the two pixel sub-circuits 20 can alternately drive the light-emitting unit 10 to display an image.

[0056] For example, see Figure 9 The pixel circuit may further include a first scanning signal line 31 and a second scanning signal line 32. The first scanning signal line 31 is connected to the first pixel sub-circuit and is configured to write a scanning signal when displaying an odd-numbered frame image, and not write a scanning signal when displaying an even-numbered frame image. The second scanning signal line 32 is connected to the second pixel sub-circuit and is configured to write a scanning signal when displaying an even-numbered frame image, and not write a scanning signal when displaying an odd-numbered frame image.

[0057] In this embodiment, when displaying the nth frame image, a scan signal is written into the first pixel sub-circuit via the first scan signal line 31, and the first pixel sub-circuit drives the light-emitting unit 10 to display the nth frame image. Simultaneously, no scan signal is written into the second scan signal line 32, nor is a scan signal written into the second pixel sub-circuit, and the light-emitting unit 10 is not driven to display an image. When displaying the n+1th frame image, a scan signal is written into the second pixel sub-circuit via the second scan signal line 32, and the second pixel sub-circuit drives the light-emitting unit 10 to display the n+1th frame image. Simultaneously, no scan signal is written into the first scan signal line 31, nor is a scan signal written into the first pixel sub-circuit, and the light-emitting unit 10 is not driven to display an image. Here, n is an odd number.

[0058] In the above embodiment, the first scan signal line 31 is connected to the first pixel sub-circuit, and a scan signal is written to it when displaying odd-numbered frames, and no scan signal is written to it when displaying even-numbered frames. This causes the first pixel sub-circuit to write a scan signal to drive the light-emitting unit 10 to display an image when displaying odd-numbered frames, and no scan signal is written to it when displaying even-numbered frames. The second scan signal line 32 is connected to the second pixel sub-circuit, and a scan signal is written to it when displaying even-numbered frames, and no scan signal is written to it when displaying odd-numbered frames. This causes the second pixel sub-circuit to write a scan signal to drive the light-emitting unit 10 when displaying even-numbered frames, and no scan signal is written to it when displaying odd-numbered frames. Consequently, the light-emitting unit 10 is driven by the first pixel sub-circuit to display odd-numbered frames, and by the second pixel sub-circuit to display even-numbered frames. The two pixel sub-circuits 20 alternately drive the light-emitting unit 10 to display an image.

[0059] Exemplarily, the two pixel sub-circuits 20 may share a data signal line, that is, the first pixel sub-circuit and the second pixel sub-circuit are connected to the same data signal line.

[0060] In another possible embodiment, the control signal may be a data signal.

[0061] In actual applications, pixels are arranged in multiple rows and columns, and data signals are simultaneously written into the driver circuits (i.e., pixel circuits) corresponding to the pixels in each column. Under the control of a scan signal, the data signals are written into the pixel circuits in the same row. The pixel circuits in each column then drive the corresponding pixels (i.e., light-emitting units) according to the written data signals to display an image.

[0062] Figure 11 for Figure 8 For another schematic diagram of the pixel circuit corresponding to the pixel arrangement, please refer to Figure 11, multiple pixel circuits are arranged in multiple rows and columns, and each pixel circuit includes a light emitting unit 10 and two pixel sub-circuits 20. The two pixel sub-circuits 20 of the same pixel circuit are connected to different data signal lines and can be connected to the same scan signal line.

[0063] For example, see Figure 11 The pixel circuit may further include a data signal line 41 and a black signal line 42. The data signal line 41 is connected to the two pixel sub-circuits 20 respectively and is configured to write a first data signal of an image to be displayed, where the image to be displayed includes an odd-numbered frame image and an even-numbered frame image. The black signal line 42 is connected to the two pixel sub-circuits 20 respectively and is configured to write a second data signal of a black image. The pixel sub-circuit 20 to which the first data signal is not written is written with the second data signal.

[0064] Figure 12 for Figure 11 For a schematic diagram of the working status of each pixel sub-circuit, please refer to Figure 12 When displaying the nth frame image, the first pixel sub-circuit of each pixel circuit writes a first data signal to drive the light-emitting unit 10 to display the nth frame image, e.g., the red light-emitting unit 10 emits red light, the green light-emitting unit 10 emits green light, and the blue light-emitting unit 10 emits blue light. Simultaneously, the second pixel sub-circuit of each pixel circuit writes a second data signal to drive the light-emitting unit 10 to display a black image, which is equivalent to not driving the light-emitting unit 10 to display an image. When displaying the n+1th frame image, the second pixel sub-circuit of each pixel circuit writes a first data signal to drive the light-emitting unit 10 to display the n+1th frame image, e.g., the red light-emitting unit 10 emits red light, the green light-emitting unit 10 emits green light, and the blue light-emitting unit 10 emits blue light. Simultaneously, the first pixel sub-circuit of each pixel circuit writes a second data signal to drive the light-emitting unit 10 to display a black image, which is equivalent to not driving the light-emitting unit 10 to display an image. Where n is an odd number.

[0065] Exemplarily, the two pixel sub-circuits 20 may share a scanning signal line, that is, the first pixel sub-circuit and the second pixel sub-circuit are connected to the same scanning signal line.

[0066] In the above embodiment, the data signal line 41 is connected to the two pixel sub-circuits 20, respectively, and is written with the first data signal of the image to be displayed. The image to be displayed includes odd-numbered frame images and even-numbered frame images. The first data signal of the image to be displayed can be written alternately to the two pixel sub-circuits 20, so that the two pixel sub-circuits 20 alternately drive the light-emitting unit 10 to display the image. Furthermore, since both the pixel sub-circuits 20 to which the first data signal is written and the pixel sub-circuits 20 to which the first data signal is not written will have scan signals written to them, the black signal line 42 is also connected to the two pixel sub-circuits 20, respectively, and is written with the second data signal of the black image. The pixel sub-circuits 20 to which the first data signal is not written are written with the second data signal, which is equivalent to not driving the light-emitting unit 10 to display the image, thereby avoiding affecting the pixel sub-circuits 20 to which the first data signal is written.

[0067] In some embodiments, see Figure 11 The pixel circuit may further include a multiplexer 50 connected in series between the data signal line 41 and the two pixel sub-circuits 20, and between the black signal line 42 and the two pixel sub-circuits 20. The multiplexer 50 is configured to write the first data signal into the first pixel sub-circuit and the second data signal into the second pixel sub-circuit when displaying an odd-numbered frame image; and to write the first data signal into the second pixel sub-circuit and the second data signal into the first pixel sub-circuit when displaying an even-numbered frame image.

[0068] In this embodiment, when displaying the nth frame image, the multiplexer 50 writes the first data signal of the nth frame image into the first pixel subcircuit, and the first pixel subcircuit drives the light-emitting unit 10 to display the nth frame image. At the same time, the multiplexer 50 writes the second data signal into the second pixel subcircuit, and the second pixel subcircuit drives the light-emitting unit 10 to display a black image, which is equivalent to not driving the light-emitting unit 10 to display an image. When displaying the n+1th frame image, the multiplexer 50 writes the first data signal of the n+1th frame image into the second pixel subcircuit, and the second pixel subcircuit drives the light-emitting unit 10 to display the n+1th frame image. At the same time, the multiplexer 50 writes the second data signal into the first pixel subcircuit, and the first pixel subcircuit drives the light-emitting unit 10 to display a black image, which is equivalent to not driving the light-emitting unit 10 to display an image. Wherein, n is an odd number.

[0069] In the above embodiment, by adding a multiplexer 50 between the data signal line 41 and the two pixel sub-circuits 20, and between the black signal line 42 and the two pixel sub-circuits 20, the multiplexer 50 can be used to play the role of line switching, so that when displaying odd frame images, the first data signal is written into the first pixel sub-circuit and the second data signal is written into the second pixel sub-circuit, and when displaying even frame images, the first data signal is written into the second pixel sub-circuit and the second data signal is written into the first pixel sub-circuit.

[0070] Figure 13 for Figure 11 For a schematic diagram of the multiplexer structure, see Figure 13 By way of example, the multiplexer 50 may include a first switch transistor T1, a second switch transistor T2, a third switch transistor T3, and a fourth switch transistor T4. A first end of the first switch transistor T1 is connected to the black signal line 42, a second end of the first switch transistor T1 is connected to the first pixel sub-circuit, and a control end of the first switch transistor T1 is configured to control the first and second ends of the first switch transistor T1 to be connected when displaying an even-numbered frame image. A first end of the second switch transistor T2 is connected to the first pixel sub-circuit, a second end of the second switch transistor T2 is connected to the data signal line 41, and a control end of the second switch transistor T2 is configured to control the first and second ends of the second switch transistor T2 to be connected when displaying an odd-numbered frame image. A first end of the third switch transistor T3 is connected to the data signal line 41, a second end of the third switch transistor T3 is connected to the second pixel sub-circuit, and a control end of the third switch transistor T3 is configured to control the first and second ends of the third switch transistor T3 to be connected when displaying an even-numbered frame image. The first end of the fourth switch tube T4 is connected to the second pixel sub-circuit, the second end of the fourth switch tube T4 is connected to the black signal line 42, and the control end of the fourth switch tube T4 is configured to control the first end and the second end of the fourth switch tube T4 to be connected when displaying odd frame images.

[0071] Figure 14 for Figure 13 For a schematic diagram of a working state of a multiplexer, see Figure 14 When displaying the nth image frame, the first and third switches T1 and T3 are off, while the second and fourth switches T2 and T4 are on. The first pixel sub-circuit is connected to the data signal line 41, and the first data signal is written to the first pixel sub-circuit. The first pixel sub-circuit drives the light-emitting unit 10 to display the nth image frame. Simultaneously, the second pixel sub-circuit is connected to the black signal line 42, and the second data signal is written to the second pixel sub-circuit. The second pixel sub-circuit does not drive the light-emitting unit 10 to display the image.

[0072] Figure 15 for Figure 13 For a diagram of another working state of the multiplexer, see Figure 15When displaying the (n+1)th frame image, the first and third switches T1 and T3 are turned on, while the second and fourth switches T2 and T4 are turned off. The second pixel sub-circuit is connected to the data signal line 41, the first data signal is written to the second pixel sub-circuit, and the second pixel sub-circuit drives the light-emitting unit 10 to display the (n+1)th frame image. Simultaneously, the first pixel sub-circuit is connected to the black signal line 42, the second data signal is written to the first pixel sub-circuit, and the first pixel sub-circuit does not drive the light-emitting unit 10 to display the image.

[0073] In the above embodiment, the first switching transistor T1 and the second switching transistor T2 are connected to the data signal line 41 and the black signal line 42, respectively, and are both connected to the first pixel sub-circuit. The first data signal of the image to be displayed and the second data signal of the black image can be alternately written into the first pixel sub-circuit, causing the first pixel sub-circuit to drive the light-emitting unit 10 to display odd-numbered frames and not drive the light-emitting unit 10 when displaying even-numbered frames. The third switching transistor T3 and the fourth switching transistor T4 are connected to the data signal line 41 and the black signal line 42, respectively, and are both connected to the second pixel sub-circuit. The first data signal of the image to be displayed and the second data signal of the black image can be alternately written into the second pixel sub-circuit, causing the second pixel sub-circuit to drive the light-emitting unit 10 to display even-numbered frames and not drive the light-emitting unit when displaying odd-numbered frames. Therefore, through the coordination of the first switching transistor T1, the second switching transistor T2, the third switching transistor T3, and the fourth switching transistor T4, the first data signal of the image to be displayed can be alternately written into the two pixel sub-circuits 20, causing the two pixel sub-circuits 20 to alternately drive the light-emitting unit 10 to display an image.

[0074] According to a second aspect of the present application, a display panel is provided. The display panel may include a pixel circuit as provided in any embodiment of the first aspect.

[0075] According to a third aspect of the present application, a display device is provided. The display device may include a display panel as provided in any embodiment of the second aspect.

[0076] In this application, unless otherwise expressly specified or limited, a first feature being "above" or "below" a second feature may include the first and second features being in direct contact, or may include the first and second features being in contact not directly but through another feature between them. Moreover, a first feature being "above," "above," and "above" a second feature may include the first feature being directly above or obliquely above the second feature, or may simply mean that the first feature is higher in level than the second feature. A first feature being "below," "below," and "below" a second feature may include the first feature being directly below or obliquely below the second feature, or may simply mean that the first feature is lower in level than the second feature.

[0077] In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise" and "counterclockwise" indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0078] In this application, unless otherwise specified or limited, the terms "connect," "fix," etc. should be understood broadly. For example, "fix" can mean fixed connection, detachable connection, or integration; it can mean mechanical connection or electrical connection; it can mean direct connection or indirect connection through an intermediate medium; it can mean internal communication between two elements or interaction between two elements. Those skilled in the art will understand the specific meanings of the above terms in this application based on specific circumstances.

[0079] In addition, the terms "first," "second," and so on, used in this application are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, features specified as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, "plurality" means two or more, unless otherwise specifically defined.

[0080] Although the embodiments of the present application have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions, and variations may be made to the embodiments without departing from the principles and intent of the present application, and that the scope of the present application is defined by the claims and their equivalents.

Claims

1. A pixel circuit, characterized in that: The pixel circuit comprises: Light-emitting unit; The two pixel sub-circuits are both connected to the light-emitting unit and are configured to alternately drive the light-emitting unit.

2. The pixel circuit according to claim 1, wherein: The two pixel sub-circuits include: A first pixel sub-circuit is connected to the light-emitting unit and is configured to drive the light-emitting unit to display an odd-numbered frame image; The second pixel sub-circuit is connected to the light-emitting unit and is configured to drive the light-emitting unit to display an even-numbered frame image.

3. The pixel circuit according to claim 2, wherein: The first pixel sub-circuit is configured to write a control signal of the odd-numbered frame image when displaying the odd-numbered frame image, so as to drive the light-emitting unit to display the odd-numbered frame image; The second pixel sub-circuit is configured to write a control signal of the even-numbered frame image when displaying the even-numbered frame image, so as to drive the light-emitting unit to display the even-numbered frame image.

4. The pixel circuit according to claim 3, wherein: The control signal is a data signal.

5. The pixel circuit according to claim 4, wherein: The pixel circuit further includes: a data signal line, connected to the two pixel sub-circuits respectively, and configured to write a first data signal of an image to be displayed, wherein the image to be displayed includes the odd-numbered frame image and the even-numbered frame image; The black signal line is connected to the two pixel sub-circuits respectively and is configured to write a second data signal of a black image. The pixel sub-circuit to which the first data signal is not written writes the second data signal.

6. The pixel circuit according to claim 5, wherein: The pixel circuit further includes: A multiplexer is connected in series between the data signal line and the two pixel sub-circuits, and between the black signal line and the two pixel sub-circuits, and is configured to write the first data signal into the first pixel sub-circuit and the second data signal into the second pixel sub-circuit when displaying an odd frame image, and to write the first data signal into the second pixel sub-circuit and the second data signal into the first pixel sub-circuit when displaying an even frame image.

7. The pixel circuit according to claim 6, wherein: The multiplexer comprises: a first switching transistor, wherein a first end of the first switching transistor is connected to the black signal line, a second end of the first switching transistor is connected to the first pixel sub-circuit, and a control end of the first switching transistor is configured to control the first end and the second end of the first switching transistor to be connected when displaying an even-numbered frame image; a second switching transistor, wherein a first end of the second switching transistor is connected to the first pixel sub-circuit, a second end of the second switching transistor is connected to the data signal line, and a control end of the second switching transistor is configured to control the first end and the second end of the second switching transistor to be connected when displaying an odd-numbered frame image; a third switching transistor, wherein a first end of the third switching transistor is connected to the data signal line, a second end of the third switching transistor is connected to the second pixel sub-circuit, and a control end of the third switching transistor is configured to control the first end and the second end of the third switching transistor to be connected when displaying an even-numbered frame image; a fourth switch tube, wherein a first end of the fourth switch tube is connected to the second pixel sub-circuit, a second end of the fourth switch tube is connected to the black signal line, and a control end of the fourth switch tube is configured to control the first end and the second end of the fourth switch tube to be connected when displaying an odd-numbered frame image.

8. The pixel circuit according to claim 3, wherein: The control signal is a scanning signal.

9. The pixel circuit according to claim 8, wherein: The pixel circuit further includes: a first scanning signal line connected to the first pixel sub-circuit, configured to write the scanning signal when displaying the odd-numbered frame image, and not write the scanning signal when displaying the even-numbered frame image; The second scanning signal line is connected to the second pixel sub-circuit and is configured to write the scanning signal when displaying the even-numbered frame image, and not write the scanning signal when displaying the odd-numbered frame image.

10. A display panel, characterized in that: The display panel includes the pixel circuit according to any one of claims 1 to 9.

11. A display device, characterized in that: The display device includes the display panel according to claim 10 .

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