Display panel, driving method thereof and display device

Abstract

The invention provides a display panel, a driving method thereof and a display device, the display panel comprises a plurality of pixel columns, a plurality of data lines and a driving chip unit, the driving chip unit comprises a first driving output end and a second driving output end, the second driving output end is used for providing data signals for at least one data line, and the first driving output end is used for providing data signals for at least one data line. The first driving output end can be used for providing data signals for at least one data line together with the second driving output end. According to the invention, by deploying the first driving output end and the second driving output end and coordinating the surplus charging capacity in the plane, the display requirements of different areas are met, the problem of insufficient charging rate of partial areas or pixels in the display panel is improved, the charging capacities of different areas are balanced, and the display effect is improved.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display panel, a driving method thereof, and a display device. Background Art

[0002] With the development of display technology, various industries have increasingly higher requirements for display products. In some display products, especially medium and large-sized ones, due to their relatively high resolution, the impedance of data signals during transmission is relatively high, resulting in low signal charging efficiency within the display panel, which in turn leads to low pixel charging rate, affecting the display effect. Summary of the Invention

[0003] In order to solve the above technical problems, the present invention provides a display panel and a driving method thereof, and a display device, so as to balance the charging capacity of different areas and improve the display effect.

[0004] In a first aspect, the present invention provides a display panel, comprising:

[0005] a plurality of pixel columns, each pixel column including a plurality of pixels;

[0006] a plurality of data lines, the data lines being used to provide data signals to pixels in the pixel columns;

[0007] The driver chip unit includes a first driver output terminal and a second driver output terminal. The second driver output terminal is used to provide a data signal to at least one data line. The first driver output terminal can be used together with the second driver output terminal to provide a data signal to at least one data line.

[0008] In a second aspect, based on the same inventive concept, the present invention provides a method for driving a display panel, the display panel comprising: a plurality of data lines and a driving chip unit; the driving chip unit comprising a first driving output terminal and a second driving output terminal, the first driving output terminal and the second driving output terminal being used to provide data signals to the data lines;

[0009] The driving method includes:

[0010] During at least one frame of operation time, the first driving output terminal and the second driving output terminal jointly provide a data signal to the same data line.

[0011] In a third aspect, based on the same inventive concept, the present invention provides a display device comprising the display panel of the present invention.

[0012] Compared with the prior art, the display panel, driving method thereof, and display device provided by the present invention achieve at least the following beneficial effects:

[0013] The display panel provided by the present invention includes multiple pixel columns, multiple data lines, and a driver chip unit. The driver chip unit includes a first driver output terminal and a second driver output terminal. The second driver output terminal is used to provide a data signal to at least one data line. The first driver output terminal can be used together with the second driver output terminal to provide a data signal to at least one data line. When some areas within the display panel have insufficient charging capacity for pixels, the present invention coordinates the excess charging capacity within the surface by allocating the first driver output terminal and the second driver output terminal to meet the display requirements of different areas. This helps to improve the problem of insufficient charging rate of some areas or pixels in the display panel, balances the charging capacity of different areas, and thus helps to improve the display effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0015] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0016] Figure 1 FIG2 is a schematic plan view of a display panel provided by the present invention;

[0017] Figure 2 FIG2 is a schematic diagram of a film layer of a display panel provided by the present invention;

[0018] Figure 3 FIG2 is a schematic plan view of another display panel provided by the present invention;

[0019] Figure 4 FIG2 is a schematic plan view of another display panel provided by the present invention;

[0020] Figure 5 FIG2 is a schematic plan view of another display panel provided by the present invention;

[0021] Figure 6 FIG2 is a schematic plan view of another display panel provided by the present invention;

[0022] Figure 7 FIG2 is a schematic plan view of another display panel provided by the present invention;

[0023] Figure 8 FIG2 is a schematic plan view of another display panel provided by the present invention;

[0024] Figure 9Shown is a planar schematic diagram of a display device provided by the present invention. DETAILED DESCRIPTION

[0025] In order to more clearly understand the above-mentioned objectives, features and advantages of the embodiments of the present invention, the solutions of the embodiments of the present invention will be further described below. It should be noted that the embodiments of the present invention and the features therein can be combined with each other without conflict.

[0026] In the following description, many specific details are set forth to facilitate a full understanding of the embodiments of the present invention, but the embodiments of the present invention may also be implemented in other ways different from those described herein; it is obvious that the embodiments in the specification are only part of the embodiments of the present invention, not all of them.

[0027] The inventors discovered in their research that in some display products, signal transmission paths vary across different areas. In areas with longer transmission paths, the impedance is higher, which can lead to insufficient charging rates in some areas or pixels, impacting the display quality. Some medium- and large-sized display products typically include multiple driver chips. When the charging capabilities of pixels in different areas corresponding to the same driver chip vary, this can lead to uneven display brightness. Different driver chips can also cause the display panel to exhibit split brightness, which also impacts the display quality.

[0028] In view of this, the present invention provides a display panel and a driving method thereof, as well as a display device, to balance the charging capabilities of different areas and improve the display effect.

[0029] Figure 1 The figure shows a schematic plan view of a display panel provided by the present invention. Figure 1 The present invention provides a display panel 100, comprising:

[0030] A plurality of pixel columns 10, each pixel column 10 including a plurality of pixels;

[0031] a plurality of data lines 20 , the data lines 20 being used to provide data signals to pixels in the pixel column 10 ;

[0032] The driving chip unit 30 includes a first driving output terminal 31 and a second driving output terminal 32. The second driving output terminal 32 is used to provide a data signal to at least one data line 20. The first driving output terminal 31 can be used together with the second driving output terminal 32 to provide a data signal to at least one data line 20.

[0033] It should be noted that the drawings of the present invention are for illustration only and do not represent the actual structure of the display panel 100. Figure 1The dotted lines in the figure only indicate that the second driving output terminal 32 can be used to provide a data signal to the data line 20, and the first driving output terminal 31 can be used together with the second driving output terminal 32 to provide a data signal to a data line 20. This does not mean that the first driving output terminal 31 and the data line 20 are connected only by a connecting line, nor does it mean that the second driving output terminal 32 and the data line 20 are connected only by a connecting line. For another example, the number of pixels 101 shown in the drawings of the present invention does not represent the actual number of pixels 101 in the display panel 100. For another example, the present invention Figure 1 The rectangular display panel 100 is used as an example for illustration, but the invention is not limited thereto. The display panel 100 may also be any feasible shape such as a circle or a rounded rectangle. Optionally, the display panel 100 may be an LCD (Liquid Crystal Display) panel. Figure 2 The figure shows a film layer diagram of a display panel provided by the present invention, please refer to Figure 1 Combined with Figure 2 The present invention is described using the example of a liquid crystal display panel as the display panel 100, but is not limited thereto. The display panel 100 includes an array substrate 01 and a color filter substrate 02, which are arranged relative to each other, and liquid crystal molecules 03 located between the array substrate 01 and the color filter substrate 02. A backlight module 04 is also included on the side of the array substrate 01 away from the color filter substrate 02. The backlight module 04 provides light for the display panel 100. The array substrate 01 controls the voltage corresponding to each pixel 101 to drive the deflection of the liquid crystal molecules 03, causing the light emitted by the backlight module 04 to be emitted to the color filter substrate 02. The light is mixed on the color filter substrate 02 to achieve color display. When the charge rate of the pixel 101 is insufficient, the liquid crystal deflection angle is small, the emitted light is reduced, and the display brightness is dimmed.

[0034] Specifically, the display panel 100 includes a plurality of pixel columns 10, a plurality of data lines 20, and a driver chip unit 30. The pixel columns 10 include a plurality of pixels 101. The present invention only illustrates the plurality of pixels 101 with rectangles, which does not represent their actual structure and actual size. The plurality of data lines 20 are used to provide data signals to the pixels 101 in the plurality of pixel columns 10. The driver chip unit 30 includes a first driver output terminal 31 and a second driver output terminal 32 for providing data signals to the data lines 20. The data signals are output by the first driver output terminal 31 and the second driver output terminal 32 of the driver chip unit 30, and are transmitted to the pixels 101 in the pixel columns 10 through the data lines 20. In some display panels 100, especially large-size display panels 100, when the driver chip unit 30 transmits data signals to the pixels in the pixel columns 10 through the data lines 20, due to the large size and the long transmission path, the impedance in the transmission path is large, and there may be a risk of insufficient pixel charging rate in some areas, affecting the display effect. The present invention provides a second driver output terminal 32 to provide a data signal to at least one data line 20, and the first driver output terminal 31 and the second driver output terminal 32 jointly provide a data signal to at least one data line 20. When some areas within the display panel 100 have insufficient charging capacity for the pixels 101, the present invention coordinates the excess charging capacity within the surface by allocating the first driver output terminal 31 and the second driver output terminal 32 to meet the display requirements of different areas. This helps to improve the problem of insufficient charging rate in some areas or pixels of the display panel 100, balances the charging capacity of different areas, and thus improves the display effect. In addition, for some large-scale display panels 100 that include multiple driver chip units 30, by rationally allocating the first driver output terminal 31 and the second driver output terminal 32 in each driver chip unit 30, the display effect of the display area corresponding to each driver chip unit 30 is improved, which helps to alleviate the problem of display brightness differences between driver chip units 30 due to insufficient pixel charging rate, thereby reducing the risk of split screen caused by the difference in display brightness, and further improves the display effect of the display panel 100.

[0035] The present invention provides an optional implementation method. For a highlighted area that needs to be highlighted, when providing data signals to the pixels 101 in the highlighted area through the second driving output terminal 32, there may be a problem of insufficient pixel charging rate. Therefore, by deploying the first driving output terminal 31 and the second driving output terminal 32 to jointly provide data signals to the data line 20 in the highlighted area, the charging capacity of the pixels 101 in the highlighted area is improved, and the pixel charging rate is increased to achieve highlighted display.

[0036] Please continue to refer to Figure 1In an optional embodiment of the present invention, the plurality of data lines 20 include at least one first data line 21 and at least one second data line 22, the first driving output end 31 is used to provide a data signal to the first data line 21 or the second data line 22, and the second driving output end 32 is used to provide a data signal to the second data line 22.

[0037] Specifically, the display panel 100 includes multiple data lines 20, including a first data line 21 and a second data line 22. The driving chip unit 30 includes a first driving output terminal 31 and a second driving output terminal 32. The first driving output terminal 31 provides a data signal to the corresponding first data line 21, and the second driving output terminal 32 provides a data signal to the corresponding second data line 22. It should be noted that the present invention does not specifically limit the positions of the first data line 21, the second data line 22, the first drive output terminal 31 and the second drive output terminal 32. In some optional embodiments, the first data line 21 and the first drive output terminal 31 are located in the edge area of the display panel 100, and the second data line 22 and the second drive output terminal 32 are located in the middle area of the display panel 100; in other optional embodiments, the first data line 21 and the first drive output terminal 31 can be located in the middle area of the display panel 100, and the second data line 22 and the second drive output terminal 32 can be located in the edge area of the display panel 100; in some other optional embodiments, the first data line 21 and the second data line 22 are located in the area with different display requirements. For example, the first data line 21 is located in a low-brightness area, and the second data line 22 is located in a high-brightness area.

[0038] Figure 3 FIG2 is a schematic plan view of another display panel provided by the present invention, please refer to FIG2 Figure 3 In some optional embodiments, the display panel 100 further includes a first switching unit 41, the first switching unit 41 includes a first module 411 and a second module 412, the first driving output end 31 is connected to the first data line 21 through the first module 411, and the first driving output end 31 is connected to the second data line 22 through the second module 412; when the first module 411 is turned on, the first driving output end 31 is used to provide a data signal to the first data line 21, and when the second module 412 is turned on, the first driving output end 31 is used to provide a data signal to the second data line 22.

[0039] The present invention provides a first switching unit 41 to control the manner in which the first driver output terminal 31 provides data signals to the data line 20. Specifically, a first module 411 is provided between the first driver output terminal 31 and the first data line 21, and a second module 412 is provided between the first driver output terminal 31 and the second data line 22. By controlling the conduction and cutoff of the first module 411 and the second module 412, control is achieved over the transmission of data signals between the first driver output terminal 31 and the first data line 21 and the second data line 22. With this arrangement, the conduction states of the first module 411 and the second module 412 in the first switching unit 41 can be controlled according to display requirements, thereby controlling the first driver output terminal 31 to provide data signals to the first data line 21 or the second data line 22. This helps to balance the charging capacity of the pixels 101 within the display panel 100 and improve the display effect. The present invention provides an optional embodiment in which, when the picture is displayed normally, the first module 411 is turned on, the second module 412 is turned off, and the first drive output terminal 31 provides a data signal to the first data line 21; the present invention provides another optional embodiment in which, when the area where the second data line 22 is located needs to improve the charging capacity (for example, the area where the second data line 22 is located needs to be highlighted), the first module 411 is turned off, the second module 412 is turned on, and the first drive output terminal 31 and the second drive output terminal 32 jointly provide a data signal to the second data line 22 to improve the charging capacity of the area corresponding to the second data line 22, and improve the charging rate of the pixels 101 in the area to meet the display requirements, which is conducive to improving the display effect.

[0040] Please continue to refer to Figure 3 Furthermore, in an optional embodiment of the present invention, the first module 411 includes a first transistor T1, the gate of the first transistor T1 is connected to the first switch control signal terminal gate1, the first electrode of the first transistor T1 is connected to the first drive output terminal 31, and the second electrode of the first transistor T1 is connected to the first data line 21; the second module 412 includes a second transistor T2, the gate of the second transistor T2 is connected to the first switch control signal terminal gate1, the first electrode of the second transistor T2 is connected to the first drive output terminal 31, and the second electrode of the second transistor T2 is connected to the second data line 22.

[0041] Specifically, this embodiment provides an implementation of a first module 411 and a second module 412, wherein the first module 411 includes a first transistor T1, and the second module 412 includes a second transistor T2. The gates of the first transistor T1 and the second transistor T2 are both connected to the first switch control signal terminal gate1. The first electrode of the first transistor T1 and the first electrode of the second transistor T2 are both connected to the first driver output terminal 31. The second electrodes of the first transistor T1 and the second transistor T2 are respectively connected to the first data line 21 and the second data line 22. Optionally, the first transistor T1 and the second transistor T2 are different types of transistors, and their turn-on signals are opposite. The first transistor T1 and the second transistor T2 are turned on or off under the control of the first switch control signal terminal gate1. When the first transistor T1 is turned on, the second transistor T2 is turned off. The first data line 21 receives the data signal transmitted by the first driver output terminal 31, and the second data line 22 receives the data signal transmitted by the second driver output terminal 32. When the first transistor T1 is turned off, the second transistor T2 is turned on, and the second data line 22 receives the data signal transmitted by both the first driver output terminal 31 and the first driver output terminal 31. The present invention provides a first transistor T1 and a second transistor T2. When the charging capacity of the area where the second data line 22 is located needs to be improved, the first transistor T1 is controlled to be cut off and the second transistor T2 is turned on. The first drive output terminal 31 and the second drive output terminal 32 jointly provide a data signal to the second data line 22 to improve the charging capacity of the area corresponding to the second data line 22, thereby improving the charging rate of the pixels 101 in the area to meet display requirements and improve the display effect.

[0042] It should be noted that, in the above-mentioned embodiment, the turn-on signals of the first transistor T1 and the second transistor T2 are opposite. The accompanying drawings of the present invention are only illustrated by taking the first transistor T1 as an N-type transistor and the second transistor T2 as a P-type transistor as an example, and are not limited to this. In some other optional embodiments, the first transistor T1 can be a P-type transistor, and the second transistor T2 can be an N-type transistor. The N-type transistor is turned on at a high level, and the P-type transistor is turned on at a low level. In this way, the gate of the first transistor T1 and the gate of the second transistor T2 can be connected to the same control signal terminal (the first switch control signal terminal gate1). With this arrangement, it is beneficial to reduce the number of control signals transmitted within the display panel 100, to simplify the structure of the display panel 100, and to reduce the risk of crosstalk between signals, thereby improving the reliability of the display panel 100.

[0043] In some other optional embodiments, the first transistor T1 and the second transistor T2 may also be transistors of the same type, and the first transistor T1 and the second transistor T2 are turned on or off under the control of different control signals, respectively. The specific settings can be made according to actual conditions and requirements, and the present invention does not make specific limitations.

[0044] Figure 4 FIG2 is a plan view of another display panel provided by the present invention, please refer to FIG2 Figure 4 In an optional embodiment of the present invention, the display panel 100 further includes a second switching unit 42, the second switching unit 42 includes a first unit 421 and a second unit 422, the second driving output end 32 is connected to the second data line 22 through the first unit 421, and the second driving output end 32 is connected to the first data line 21 through the second unit 422; when the first unit 421 is turned on, the second driving output end 32 is used to provide a data signal to the second data line 22, and when the second unit 422 is turned on, the second driving output end 32 is used to provide a data signal to the first data line 21.

[0045] The present invention provides a second switching unit 42 to control the manner in which the second driver output terminal 32 provides data signals to the data line 20. Specifically, a first unit 421 is provided between the second driver output terminal 32 and the second data line 22, and a second unit 422 is provided between the second driver output terminal 32 and the first data line 21. By controlling the conduction and cutoff of the first unit 421 and the second unit 422, the transmission of data signals between the second driver output terminal 32 and the first data line 21 and the second data line 22 is controlled. With this arrangement, the conduction states of the first unit 421 and the second unit 422 in the second switching unit 42 can be controlled according to display requirements, thereby controlling the second driver output terminal 32 to provide data signals to the first data line 21 or the second data line 22, which helps to balance the charging capacity within the display panel 100 and improve the display effect. The present invention provides an optional embodiment in which, when a picture is normally displayed, the first unit 421 and the first module 411 are turned on, the second unit 422 and the second module 412 are turned off, the first driver output terminal 31 provides a data signal to the first data line 21, and the second driver output terminal 32 provides a data signal to the second data line 22. The present invention provides another optional embodiment in which, when the charging capacity of the area where the second data line 22 is located needs to be improved, the first unit 421 and the second module 412 are turned on, the second unit 422 and the first module 411 are turned off, and the first driver output terminal 31 and the second driver output terminal 32 jointly provide a data signal to the second data line 22 to improve the charging capacity of the area corresponding to the second data line 22, thereby improving the charging rate of the pixels 101 in this area to meet display requirements and improve the display effect. The present invention provides another optional embodiment, that is, when the charging capacity of the area where the first data line 21 is located needs to be improved, the first module 411 and the second unit 422 are turned on, the second module 412 and the first unit 421 are turned off, and the first drive output terminal 31 and the second drive output terminal 32 jointly provide a data signal to the first data line 21 to improve the charging capacity of the area corresponding to the first data line 21, and improve the charging rate of the pixels 101 in the area to meet the display requirements, which is conducive to improving the display effect.

[0046] Please continue to refer to Figure 4 In an optional embodiment of the present invention, the first unit 421 includes a third transistor T3, the gate of the third transistor T3 is connected to the second switch control signal terminal gate2, the first electrode of the third transistor T3 is connected to the second drive output terminal 32, and the second electrode of the third transistor T3 is connected to the second data line 22; the second unit 422 includes a fourth transistor T4, the gate of the fourth transistor T4 is connected to the second switch control signal terminal gate2, the first electrode of the fourth transistor T4 is connected to the first electrode of the third transistor T3, and the second electrode of the fourth transistor T4 is connected to the first drive output terminal 31.

[0047] Specifically, this embodiment provides an implementation of a first unit 421 and a second unit 422, wherein the first unit 421 includes a third transistor T3, and the second unit 422 includes a fourth transistor T4. The gates of the third transistor T3 and the fourth transistor T4 are both connected to the second switch control signal terminal gate2. The first electrode of the third transistor T3 and the first electrode of the fourth transistor T4 are both connected to the second drive output terminal 32. The second electrode of the third transistor T3 and the second electrode of the fourth transistor T4 are respectively connected to the second data line 22 and the first data line 21. Optionally, the third transistor T3 and the fourth transistor T4 are different types of transistors, and their turn-on signals are opposite. The third transistor T3 and the fourth transistor T4 are turned on or off under the control of the second switch control signal terminal gate2. When the third transistor T3 is turned on, the fourth transistor T4 is turned off, and the second data line 22 receives the data signal transmitted by the second drive output terminal 32. When the third transistor T3 is turned off, the fourth transistor T4 is turned on, and the first data line 21 receives the data signal transmitted by both the first drive output terminal 31 and the second drive output terminal 32. The present invention provides a third transistor T3 and a fourth transistor T4. When the charging capacity of the area where the first data line 21 is located needs to be improved, the third transistor T3 is controlled to be cut off and the fourth transistor T4 is turned on. The first driving output terminal 31 and the second driving output terminal 32 jointly provide a data signal to the first data line 21 to improve the charging capacity of the area corresponding to the first data line 21, thereby improving the charging rate of the pixels 101 in the area, which is conducive to meeting display requirements and improving display effects.

[0048] It should be noted that, in the above-mentioned embodiment, the turn-on signals of the third transistor T3 and the fourth transistor T4 are opposite. The drawings of the present invention are only illustrated by taking the third transistor T3 as an N-type transistor and the fourth transistor T4 as a P-type transistor as an example, and are not limited to this. In some other optional embodiments, the third transistor T3 can be a P-type transistor, and the fourth transistor T4 can be an N-type transistor. The N-type transistor is turned on at a high level, and the P-type transistor is turned on at a low level. In this way, the gate of the third transistor T3 and the gate of the fourth transistor T4 can be connected to the same control signal terminal (the second switch control signal terminal gate2). With this arrangement, it is beneficial to reduce the number of control signals transmitted within the display panel 100, to simplify the structure of the display panel 100, and to reduce the risk of crosstalk between signals.

[0049] In some other optional embodiments, the third transistor T3 and the fourth transistor T4 may also be transistors of the same type. The third transistor T3 and the fourth transistor T4 are turned on or off under the control of different control signals, respectively. The specific settings can be made according to actual conditions and requirements, and the present invention does not make specific limitations.

[0050] Please continue to refer to Figure 4The present invention provides an optional embodiment in which a first module 411 includes a first transistor T1, a second module 412 includes a second transistor T2, a first unit 421 includes a third transistor T3, and a second unit 422 includes a fourth transistor T4. The first transistor T1 and the third transistor T3 are N-type transistors, and the second transistor T2 and the fourth transistor T4 are P-type transistors. The first transistor T1 and the second transistor T2 are turned on or off under the control of a first switch control signal transmitted by a first switch control signal terminal gate1, and the third transistor T3 and the fourth transistor T4 are turned on or off under the control of a second switch control signal transmitted by a second switch control signal terminal gate2. When the display panel 100 is displaying normally, the first switch control signal terminal gate1 and the second switch control signal terminal gate2 provide high-level signals, turning on the first transistor T1 and the third transistor T3, turning off the second transistor T2 and the fourth transistor T4, and transmitting a data signal to the first data line 21 and the second drive output terminal 32. When the area where the first data line 21 is located needs to be highlighted, the first switch control signal terminal gate1 provides a high-level signal, the second switch control signal terminal gate2 provides a low-level signal, the first transistor T1 and the fourth transistor T4 are turned on, the second transistor T2 and the third transistor T3 are turned off, and the first driver output terminal 31 and the second driver output terminal 32 jointly transmit the data signal to the first data line 21. When the area where the second data line 22 is located needs to be highlighted, the first switch control signal terminal gate1 provides a low-level signal, the second switch control signal terminal gate2 provides a high-level signal, the second transistor T2 and the third transistor T3 are turned on, the first transistor T1 and the fourth transistor T4 are turned off, and the first driver output terminal 31 and the second driver output terminal 32 jointly transmit the data signal to the second data line 22.

[0051] By setting the first switch unit 41 and the second switch unit 42, the present invention can realize that the first drive output terminal 31 and the second drive output terminal 32 jointly provide data signals to the same data line 20 according to display requirements, which is beneficial to balancing the in-plane charging capacity and improving the display effect.

[0052] Figure 5 FIG2 is a plan view of another display panel provided by the present invention, please refer to FIG2 Figure 4 and Figure 5In an optional embodiment of the present invention, the display panel 100 further includes a fan-out area 50, a first area 51, and a second area 52, the fan-out area 50 includes a plurality of fan-out lines 501; along a first direction F1, the first area 51 is located on both sides of the fan-out area 50, and the first direction F1 is the arrangement direction of the fan-out lines 501; the orthographic projection of the second area 52 on the display panel 100 overlaps with the orthographic projection of the fan-out area 50 on the display panel 100; the driving chip unit 30 includes a plurality of connecting pins 300; the first end of the fan-out line 501 is coupled to the connecting pin 300, and the second end is coupled to the data line 20; the first switch unit 41 is located in the first area 51, and the second switch unit 42 is located in the second area 52.

[0053] It should be noted that the drawings of the present invention only illustrate the approximate positions of the fan-out area 50 , the first area 51 and the second area 52 , and do not represent the actual positions and sizes of the fan-out area 50 , the first area 51 and the second area 52 .

[0054] Specifically, the present invention adjusts the charging capacity in the display panel 100 by adding a first switch unit 41 and a second switch unit 42, thereby increasing the charging rate of the corresponding pixel 101 and improving the display effect. This embodiment provides a position setting method for the first switch unit 41 and the second switch unit 42. The display panel 100 includes a display area AA and a non-display area NA located on the display side. The non-display area NA includes a fan-out area 50. The fan-out area 50 includes a plurality of fan-out lines 501. The fan-out line 501 is located between the data line 20 and the driver chip unit 30 and is used to transmit data signals. In the related art, traditional wiring requires a large number of wirings to be arranged in parallel in the non-display area NA, which occupies a large space. The fan-out line 501 is arranged in a fan-shaped divergent manner to output the dense signal pins of the driver chip unit 30 in a divergent shape, which is beneficial to reduce the space occupied by the frame, and thus is beneficial to achieve a narrow frame design of the display panel 100. The present invention also sets up a first area 51 and a second area 52, and sets the first switch unit 41 and the second switch unit 42 in the first area 51 and the second area 52 respectively. The connecting line between the first switch unit 41 and the second switch unit 42 is set on the side of the fan-out area 50 close to the driving chip unit 30. Such a setting is conducive to the reasonable arrangement of the first switch unit 41 and the second switch unit 42 in the display panel 100, thereby saving space in the non-display area NA, which is conducive to realizing the narrow frame design of the display panel 100.

[0055] It should be noted that the present invention sets the second switch unit 42 in the fan-out area 50. When the routing of the second switch unit 42 intersects with the routing of the fan-out line 501 in the fan-out area 50, the routing crossing can be avoided by using a different-layer jumper method, for example, by setting vias between different metal layers, setting metal pads in adjacent layers, etc.

[0056] Figure 6 FIG2 is a plan view of another display panel provided by the present invention, please refer to FIG2 Figure 6 In an optional embodiment of the present invention, the display panel 100 further includes a multiplexing unit 60, which includes N data input terminals 61 and M data output terminals 62, where M>N, and M and N are both positive integers; one data input terminal 61 is used to provide a data signal to at least two data output terminals 62, and the data output terminals 62 are connected one-to-one with the data lines 20; the second driving output terminal 32 of the driving chip unit 30 is used to provide a data signal to one data input terminal 61, and the first driving output terminal 31 can be used to provide a data signal to one data input terminal 61 together with the second driving output terminal 32.

[0057] Specifically, the display panel 100 also includes a multiplexing unit 60. The multiplexing unit 60 realizes the expansion of N data input terminals to M data output terminals (M>N), that is, the N data input terminals 61 of the driver chip unit 30 can drive M data lines 20. If the multiplexing unit 60 is not provided, the driver chip unit 30 needs to be provided with M input terminals, which increases the volume of the driver chip unit 30. The provision of the multiplexing unit 60 in the present disclosure is beneficial to reducing the number of input terminals that need to be provided for the driver chip unit 30. The reduction in the number of input terminals is beneficial to reducing the size of the driver chip unit 30 and reducing manufacturing costs. At the same time, it also reduces the wiring between the driver chip unit 30 and the multiplexing unit 60, which is beneficial to simplifying the wiring structure and wiring complexity of the non-display area NA of the display panel 100, thereby improving the production yield and reducing manufacturing costs.

[0058] It should be noted that the drawings of the present invention only illustrate the number N of data input terminals 61 as M / 2, and are not limited to this. In some other optional implementations, the number N of data input terminals 61 can also be M / 3, M / 4, etc., and can be designed according to actual conditions during specific implementation.

[0059] Figure 7 FIG. 1 is a plan view of another display panel provided by the present invention. Figure 8 FIG2 is a plan view of another display panel provided by the present invention, please refer to FIG2 Figure 7 and Figure 8In an optional embodiment of the present invention, the driver chip unit 30 includes a plurality of connection pins 300, including first pins 301 and second pins 302 arranged along a first direction F1. The first direction F1 is parallel to the plane of the driver chip unit 30. The first pins 301 are connected to the first driver output terminal 31 and the second driver output terminal 32. The second pins 302 are arranged along the first direction F1 at the edge regions of the driver chip unit 30. Optionally, at least one first pin 301 and at least one second pin 302 are connected to the same data input terminal 61; or, at least one first pin 301 and at least one second pin 302 are electrically connected to the same data input terminal 61.

[0060] Specifically, the multiple connecting pins 300 of the driver chip unit 30 are used to transmit data signals to the display panel 100. The connecting pins 300 include a first pin 301 located in the middle area and a second pin 302 located in the edge areas on both sides. In the related art, the second pin 302 is usually idle, and only the first pin 301 outputs the data signal. The embodiment of the present invention uses the second pin 302 to supplement the charging capacity of the data line 20 with insufficient charging capacity in the display panel 100. Specifically, at least one data input terminal 61 receives the data signal outputted by at least one first pin 301 and at least one second pin 302. Please refer to Figure 7 The present invention provides an optional embodiment in which the first pin 301 and the second pin 302 transmit data signals to the same data input terminal 61 through different connection lines; please refer to Figure 8 The present invention provides another optional embodiment in which, after the first pin 301 and the second pin 302 are electrically connected via the first connection line 71, the first pin 301 or the second pin 302 transmits the data signal outputted by both the first pin 301 and the second pin 302 to the data output terminal 62 via the second connection line 72. This configuration utilizes the unused second pin 302 to supplement areas within the display panel 100 with insufficient charging capacity, thereby improving the charging rate of the pixels 101 within the display panel 100 and enhancing the display effect.

[0061] It should be noted that when the first pin 301 and the second pin 302 are electrically connected through the first connection line 71, if there is a crossing of the wires, the crossing of the wires can be avoided by crossing the wires through different metal layers. Figure 7 and Figure 8 In the embodiment shown, the charging capability is supplemented by the second pin 302. Figure 3 and Figure 4 The illustrated embodiment supplements the charging capability by providing a switch unit, which may be implemented separately or in combination, and the present invention does not impose any specific limitation thereto.

[0062] Please refer to Figure 1 In an optional embodiment of the present invention, the pixel columns 10 include edge pixel columns 11 and middle pixel columns 12, and the edge pixel columns 11 and the middle pixel columns 12 include at least one pixel column 10. Along the arrangement direction of the pixel columns 10, the edge pixel columns 11 are located on both sides of the middle pixel columns 12, and the edge pixel columns 11 are located in the edge region of the display panel 100. Optionally, the first driving output terminal 31 provides a data signal to the data line 20 of the edge pixel column 11, and the second driving output terminal 32 provides a data signal to the data line 20 of the middle pixel column 12; or, the first driving output terminal 31 provides a data signal to the data line 20 of the middle pixel column 12, and the second driving output terminal 32 provides a data signal to the data line 20 of the edge pixel column 11.

[0063] Specifically, the pixel columns 10 include a middle pixel column 12 located in the middle area of the display panel 100, and edge pixel columns 11 located in the edge areas on both sides of the display panel 100. The present invention can achieve mutual complementation of the charging capabilities between the middle pixel column 12 and the edge pixel column 11. For example, when the middle pixel column 12 needs to display a high-brightness image, the first drive output terminal 31 and the second drive output terminal 32 can jointly provide a data signal to the middle pixel column 12; when the edge pixel column 11 needs to display a high-brightness image, the first drive output terminal 31 and the second drive output terminal 32 can jointly provide a data signal to the edge pixel column 11. Such an arrangement is conducive to meeting various display requirements. Different drive output terminals are allocated to output data signals according to the display requirements to enhance the charging capabilities of different areas of the display panel 100 and improve the display effect.

[0064] Based on the same inventive concept, the present invention provides a method for driving a display panel, please refer to Figure 1 The display panel 100 includes: a plurality of data lines 20 and a driving chip unit 30; the driving chip unit 30 includes a first driving output terminal 31 and a second driving output terminal 32, and the first driving output terminal 31 and the second driving output terminal 32 are used to provide data signals to the data lines 20.

[0065] The driving method includes: in at least one frame of working time, the first driving output terminal 31 and the second driving output terminal 32 jointly provide a data signal to the same data line 20 .

[0066] Specifically, the present invention also provides a method for driving a display panel. When a part of the display panel 100 needs to display a highlighted image, the first driving output terminal 31 and the second driving output terminal 32 are deployed to provide a data signal to the same data line 20, and coordinate the surplus charging capacity within the surface to meet the display requirements of different areas. This is beneficial to improving the problem of insufficient charging rate of some areas or pixels in the display panel 100, balancing the charging capacity of different areas, and thus helping to improve the display effect.

[0067] Please continue to refer to Figure 1 The present invention provides another optional embodiment, in which the driving method further includes: during at least another frame of operation, the first driving output terminal 31 and the second driving output terminal 32 respectively provide data signals to different data lines 20. In this embodiment, the display panel 100 performs a normal display, and the first driving output terminal 31 and the second driving output terminal 32 respectively provide data signals to their corresponding data lines 20.

[0068] It should be noted that the driving method of the display panel 100 provided by the present invention can allocate different driving output terminals according to the display requirements of the display panel 100. When the charging capacity of a certain area needs to be supplemented, the first driving output terminal 31 and the second driving output terminal 32 jointly provide a data signal to the same data line 20. During normal display, the first driving output terminal 31 and the second driving output terminal 32 each provide a data signal to their corresponding data line 20. This helps to balance the charging capacity of different areas within the display panel 100, improve the pixel charging rate, and thus improve the display effect.

[0069] Based on the same inventive concept, the present invention also provides a display device, Figure 9 The figure shows a schematic plan view of a display device provided by the present invention. Figure 9 The display device 200 includes a display panel 100 , and the display panel 100 is any display panel 100 provided by the embodiments of the present invention.

[0070] It should be noted that the embodiments of the display device 200 provided by the present invention can refer to the embodiments of the display panel 100 described above, and the repeated parts are not repeated here. The display device 200 provided by the present invention can be embodied as: a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigation system, or any other product or component with a display function.

[0071] It can be seen from the above embodiments that the display panel, driving method thereof, and display device provided by the present invention achieve at least the following beneficial effects:

[0072] The present invention provides a display panel, a driving method thereof, and a display device. The display panel includes multiple pixel columns, multiple data lines, and a driver chip unit. The driver chip unit includes a first driver output terminal and a second driver output terminal. The second driver output terminal is used to provide a data signal to at least one data line. The first driver output terminal can be used together with the second driver output terminal to provide a data signal to at least one data line. When some areas within the display panel have insufficient charging capacity for pixels, the present invention coordinates the excess charging capacity within the surface by allocating the first driver output terminal and the second driver output terminal to meet the display requirements of different areas. This helps to improve the problem of insufficient charging rate of some areas or pixels in the display panel, balances the charging capacity of different areas, and thus helps to improve the display effect.

[0073] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises", "includes" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device that includes a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprises a..." do not exclude the presence of other identical elements in the process, method, article or device that includes the above elements.

[0074] The foregoing description is intended only to provide specific embodiments of the present invention, intended to enable those skilled in the art to understand and implement the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not intended to be limited to the foregoing embodiments, but is intended to be embodied in the widest possible manner consistent with the principles and novel features disclosed herein.

Claims

1. A display panel, characterized in that: include: a plurality of pixel columns, each of the pixel columns comprising a plurality of pixels; a plurality of data lines, the data lines being configured to provide data signals to pixels in the pixel columns; The driving chip unit includes a first driving output end and a second driving output end, wherein the second driving output end is used to provide a data signal to at least one of the data lines, and the first driving output end can be used together with the second driving output end to provide a data signal to at least one of the data lines.

2. The display panel according to claim 1, wherein: The plurality of data lines include at least one first data line and at least one second data line. The first driving output end is used to provide a data signal to the first data line or the second data line. The second driving output end is used to provide a data signal to the second data line.

3. The display panel according to claim 2, wherein: The first switch unit includes a first module and a second module, wherein the first drive output terminal is connected to the first data line through the first module, and the first drive output terminal is connected to the second data line through the second module; When the first module is turned on, the first driving output end is used to provide a data signal to the first data line. When the second module is turned on, the first driving output end is used to provide a data signal to the second data line.

4. The display panel according to claim 3, wherein: The first module includes a first transistor, a gate of the first transistor is connected to the first switch control signal terminal, a first electrode of the first transistor is connected to the first drive output terminal, and a second electrode of the first transistor is connected to the first data line; The second module includes a second transistor, a gate of the second transistor is connected to the first switch control signal terminal, a first electrode of the second transistor is connected to the first drive output terminal, and a second electrode of the second transistor is connected to the second data line.

5. The display panel according to claim 3, wherein: Also included is a second switch unit, the second switch unit includes a first unit and a second unit, the second drive output end is connected to the second data line through the first unit, and the second drive output end is connected to the first data line through the second unit; When the first unit is turned on, the second driving output end is used to provide a data signal to the second data line; when the second unit is turned on, the second driving output end is used to provide a data signal to the first data line.

6. The display panel according to claim 5, wherein: The first unit includes a third transistor, a gate of the third transistor is connected to the second switch control signal terminal, a first electrode of the third transistor is connected to the second drive output terminal, and a second electrode of the third transistor is connected to the second data line; The second unit includes a fourth transistor, a gate of the fourth transistor is connected to the second switch control signal terminal, a first electrode of the fourth transistor is connected to the first electrode of the third transistor, and a second electrode of the fourth transistor is connected to the first drive output terminal.

7. The display panel according to claim 6, wherein: The display panel further includes a fan-out area, a first area, and a second area, wherein the fan-out area includes a plurality of fan-out lines; along a first direction, the first area is located on both sides of the fan-out area, and the first direction is the arrangement direction of the fan-out lines; the orthographic projection of the second area on the display panel overlaps with the orthographic projection of the fan-out area on the display panel; The driving chip unit includes a plurality of connecting pins; a first end of the fan-out line is coupled to the connecting pin, and a second end is coupled to the data line; The first switch unit is located in the first area, and the second switch unit is located in the second area.

8. The display panel according to claim 1, wherein: The device further comprises a multiplexing unit, wherein the multiplexing unit comprises N data input terminals and M data output terminals, where M>N, and both M and N are positive integers; One of the data input terminals is used to provide a data signal to at least two of the data output terminals, and the data output terminals are connected to the data lines one-to-one; The second driving output terminal of the chip driving unit is used to provide a data signal to one of the data input terminals, and the first driving output terminal can be used together with the second driving output terminal to provide a data signal to one of the data input terminals.

9. The display panel according to claim 8, wherein: The driving chip unit includes a plurality of connecting pins, wherein the connecting pins include a first pin and a second pin arranged along a first direction, the first direction is parallel to the plane where the driving chip unit is located, and the first pin is connected to the first driving output end and the second driving output end; Along the first direction, the second pins are arranged at the edge areas on both sides of the driving chip unit; At least one of the first pins and at least one of the second pins are connected to the same data input terminal; or, At least one first pin and at least one second pin are electrically connected to the same data input terminal.

10. The display panel according to claim 1, wherein The pixel columns include edge pixel columns and middle pixel columns, and the edge pixel columns and the middle pixel columns include at least one pixel column; along the arrangement direction of the pixel columns, the edge pixel columns are located on both sides of the middle pixel columns, and the edge pixel columns are located in the edge area of the display panel; The first driving output terminal provides a data signal to the data line of the edge pixel column, and the second driving output terminal provides a data signal to the data line of the middle pixel column; or, The first driving output terminal provides a data signal to the data line of the middle pixel column, and the second driving output terminal provides a data signal to the data line of the edge pixel column.

11. A method for driving a display panel, characterized in that: The display panel includes: a plurality of data lines and a driving chip unit; the driving chip unit includes a first driving output terminal and a second driving output terminal, and the first driving output terminal and the second driving output terminal are used to provide data signals to the data lines; The driving method includes: During at least one frame of operation time, the first driving output terminal and the second driving output terminal jointly provide a data signal to the same data line.

12. The driving method according to claim 11, wherein: Also includes: During at least another frame of operation time, the first driving output end and the second driving output end respectively provide data signals to different data lines.

13. A display device, characterized in that: The display panel comprises the display panel according to any one of claims 1 to 10.

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