Dynamic frequency reduction protection method and device for set-top box chip overheating

Abstract

The present invention relates to the technical field of chip overheating protection, and discloses a dynamic frequency reduction protection method and device for a set-top box chip when it is overheated. The method comprises: collecting the operating temperature of the set-top box chip and current decoding task parameters in real time to obtain chip temperature data and a decoding task feature vector; inputting the chip temperature data and the decoding task feature vector into a ternary autoregressive prediction model to perform temperature prediction to obtain a temperature prediction value; performing decoding scene recognition based on the decoding task feature vector to obtain a target mode parameter set; performing constraint evaluation on the decoding frame deadline according to the temperature prediction value and the target mode parameter set to obtain a temperature frequency reduction safety margin value; performing hierarchical frequency reduction based on the temperature frequency reduction safety margin value to generate a dynamic frequency reduction control instruction. The present invention achieves accurate matching of the frequency reduction amplitude with the actual thermal load, thereby improving the refinement of temperature control and the stability of the set-top box chip.

Description

Technical Field

[0001] The present invention relates to the technical field of chip overheat protection, and in particular to a method and device for dynamic frequency reduction protection of a set-top box chip when it is overheated. Background Art

[0002] Set-top boxes (STBs) face serious chip overheating issues when processing high-bitrate, high-resolution video. Traditional chip thermal protection solutions primarily use a general temperature threshold to trigger a frequency reduction strategy. This approach makes control decisions based solely on the chip temperature parameter, completely ignoring the uniqueness and complexity of the STB's audio and video decoding tasks. This results in a disconnect between frequency reduction control and the actual decoding load requirements.

[0003] Existing general-purpose frequency reduction protection methods fail to distinguish between thermal load differences across different decoding standards, resolutions, frame rates, and bitrate combinations. Instead, they employ a fixed temperature prediction model and a uniform frequency reduction range. This one-size-fits-all control strategy exhibits insufficient prediction accuracy and delayed response when faced with the typical set-top box operating mode of "cold start, rapid temperature rise, and sudden load change." More seriously, traditional methods completely disregard the real-time constraints of audio and video decoding when making frequency reduction decisions. Consequently, excessive frequency reduction often leads to insufficient decoding performance, causing user experience issues such as video playback stuttering and screen distortion. Summary of the Invention

[0004] The present invention provides a method and device for dynamic frequency reduction protection when a set-top box chip is overheated. The present invention achieves accurate matching of the frequency reduction amplitude with the actual heat load, thereby improving the refinement of temperature control and the stability of the set-top box chip.

[0005] In a first aspect, the present invention provides a method for dynamically reducing the frequency of a set-top box chip when it is overheated. The method comprises:

[0006] The operating temperature of the set-top box chip and the current decoding task parameters are collected in real time to obtain the chip temperature data and decoding task feature vector;

[0007] Inputting the chip temperature data and the decoding task feature vector into a ternary autoregressive prediction model to perform temperature prediction to obtain a temperature prediction value;

[0008] Performing decoding scene recognition based on the decoding task feature vector to obtain a target mode parameter set;

[0009] Performing constraint evaluation on the decoding frame deadline according to the temperature prediction value and the target mode parameter set to obtain a temperature frequency reduction safety margin value;

[0010] Frequency reduction is performed in stages based on the temperature frequency reduction safety margin value, and a dynamic frequency reduction control instruction is generated.

[0011] In conjunction with the first aspect, in a first implementation of the first aspect of the present invention, the real-time acquisition of the operating temperature of the set-top box chip and the current decoding task parameters to obtain the chip temperature data and the decoding task feature vector includes:

[0012] Sampling the temperature of the set-top box chip to obtain chip temperature data;

[0013] Parse the header information of the current audio and video stream to obtain the decoding standard type, video resolution, frame rate and bit rate parameters;

[0014] Monitor the load status of the decoding buffer and obtain decoding buffer load rate data;

[0015] The decoding standard type, the video resolution, the frame rate, the bit rate parameter and the decoding buffer load rate data are vector-mapped to obtain a decoding task feature vector.

[0016] In combination with the first aspect, in a second implementation of the first aspect of the present invention, inputting the chip temperature data and the decoding task feature vector into a ternary autoregressive prediction model to perform temperature prediction to obtain a temperature prediction value includes:

[0017] Performing weighted calculation on the decoding task feature vector to obtain a decoding complexity index;

[0018] Constructing a ternary state vector using the chip temperature data, the chip operating frequency data, and the decoding complexity index to obtain a ternary state vector sequence at the current moment and the historical moment;

[0019] Inputting the ternary state vector sequence into a ternary autoregressive prediction model for recursive calculation to obtain a ternary state prediction vector at the next moment;

[0020] The temperature component in the ternary state prediction vector is extracted to obtain a temperature prediction value.

[0021] In combination with the first aspect, in a third implementation of the first aspect of the present invention, inputting the ternary state vector sequence into a ternary autoregressive prediction model for recursive calculation to obtain a ternary state prediction vector at the next moment includes:

[0022] Inputting the ternary state vector sequence into the third-order autoregressive calculation layer of the ternary autoregressive prediction model for linear combination to obtain an autoregressive prediction component;

[0023] Inputting the decoding task feature vector into the exogenous variable processing layer of the ternary autoregressive prediction model for coefficient matching to obtain an exogenous variable component including a decoding standard coefficient, a resolution coefficient, a frame rate coefficient, and a bit rate coefficient;

[0024] A weighted sum is performed on the autoregressive prediction component and the exogenous variable component to obtain a ternary state prediction vector at the next moment.

[0025] In combination with the first aspect, in a fourth implementation of the first aspect of the present invention, inputting the ternary state vector sequence into a third-order autoregressive calculation layer of a ternary autoregressive prediction model for linear combination to obtain an autoregressive prediction component includes:

[0026] Extracting temperature history values, frequency history values, and decoding complexity history values ​​at current and historical moments based on the ternary state vector sequence;

[0027] Inputting the temperature history values ​​into the third-order temperature autoregressive unit of the third-order autoregressive calculation layer for weighted summation to obtain a temperature autoregressive component;

[0028] Inputting the frequency history value into the second-order frequency autoregressive unit of the third-order autoregressive calculation layer for weighted summation to obtain a frequency autoregressive component;

[0029] The temperature autoregressive component, the frequency autoregressive component and the decoding complexity history value are linearly combined to obtain an autoregressive prediction component.

[0030] In combination with the first aspect, in a fifth implementation of the first aspect of the present invention, inputting the decoding task feature vector into the exogenous variable processing layer of the ternary autoregressive prediction model for coefficient matching to obtain an exogenous variable component including a decoding standard coefficient, a resolution coefficient, a frame rate coefficient, and a bit rate coefficient includes:

[0031] Inputting the decoding task feature vector into the exogenous variable processing layer of the ternary autoregressive prediction model, performing dimension separation on the decoding task feature vector in the exogenous variable processing layer to obtain a decoding standard type value, a video resolution value, a frame rate value, a bit rate value, and a decoding buffer load rate value;

[0032] Input the decoding standard type value, the video resolution value, the frame rate value and the bit rate value into the corresponding weight mapping table for table lookup to obtain the decoding standard weight, resolution weight, frame rate weight and bit rate weight;

[0033] Performing coefficient conversion on the decoding standard weight, the resolution weight, the frame rate weight, the bit rate weight, and the decoding buffer load rate value to obtain a decoding standard coefficient, a resolution coefficient, a frame rate coefficient, and a bit rate coefficient;

[0034] The decoding standard coefficient, the resolution coefficient, the frame rate coefficient and the bit rate coefficient are vector-combined to obtain an exogenous variable component.

[0035] In combination with the first aspect, in a sixth implementation of the first aspect of the present invention, performing decoding scene recognition based on the decoding task feature vector to obtain a target mode parameter set includes:

[0036] Performing weighted calculation on the decoding standard type, video resolution, frame rate, bit rate parameter and decoding buffer load rate data in the decoding task feature vector to obtain a decoding complexity index;

[0037] Comparing the decoding complexity index with a preset standby mode threshold and a high-load mode threshold to obtain a decoding scene discrimination result;

[0038] The pre-stored standby mode parameter set, menu interaction mode parameter set and high-load decoding mode parameter set are selected according to the decoding scenario discrimination result to obtain a target mode parameter set.

[0039] In combination with the first aspect, in a seventh implementation of the first aspect of the present invention, performing constraint evaluation on the decoding frame deadline according to the temperature prediction value and the target mode parameter set to obtain a temperature frequency reduction safety margin value includes:

[0040] Calculate the deadline for the current decoding frame and the remaining decoding time based on the frame rate parameters of the current audio and video stream;

[0041] Predicting decoding time based on the decoding complexity index and chip operating frequency data to obtain a predicted decoding time;

[0042] Inputting the decoding scenario type in the target mode parameter set into the safety factor selector for coefficient matching to obtain a decoding safety factor corresponding to the current decoding load;

[0043] A margin calculation is performed on the temperature prediction value, the remaining decoding time, the predicted decoding time, and the decoding safety factor to obtain a temperature frequency reduction safety margin value.

[0044] In combination with the first aspect, in an eighth implementation of the first aspect of the present invention, performing hierarchical frequency reduction based on the temperature frequency reduction safety margin value and generating a dynamic frequency reduction control instruction includes:

[0045] Comparing the temperature frequency reduction safety margin value with the preset first-level frequency reduction threshold, second-level frequency reduction threshold, third-level frequency reduction threshold, and fourth-level frequency reduction threshold to obtain a frequency reduction level determination result;

[0046] Selecting a pre-stored frequency reduction amplitude parameter set according to the frequency reduction level determination result to obtain frequency reduction strategy parameters including a target frequency reduction amplitude and an adjustment timing;

[0047] Performing progressive frequency adjustment based on the frequency reduction strategy parameters to obtain a step-by-step frequency reduction sequence and frequency reduction amplitude data for each step;

[0048] The step-by-step frequency reduction sequence and the frequency reduction amplitude data of each step are packaged into instructions to generate a dynamic frequency reduction control instruction.

[0049] In a second aspect, the present invention provides a dynamic frequency reduction protection device for a set-top box chip when it is overheated, the dynamic frequency reduction protection device for a set-top box chip when it is overheated comprising:

[0050] The real-time acquisition module is used to collect the operating temperature of the set-top box chip and the current decoding task parameters in real time to obtain the chip temperature data and the decoding task feature vector;

[0051] a temperature prediction module, configured to input the chip temperature data and the decoding task feature vector into a ternary autoregressive prediction model to perform temperature prediction and obtain a temperature prediction value;

[0052] A decoding scene recognition module, configured to perform decoding scene recognition based on the decoding task feature vector to obtain a target mode parameter set;

[0053] A constraint evaluation module, configured to perform constraint evaluation on a decoding frame deadline according to the temperature prediction value and the target mode parameter set, to obtain a temperature frequency reduction safety margin value;

[0054] The hierarchical frequency reduction module is used to perform hierarchical frequency reduction based on the temperature frequency reduction safety margin value and generate a dynamic frequency reduction control instruction.

[0055] The technical solution provided by the present invention accurately identifies the specific impact of different decoding tasks on chip thermal load by constructing a multidimensional feature vector containing decoding standard type, video resolution, frame rate, bit rate, and decoding buffer load ratio. Compared with traditional prediction methods based solely on historical temperature data, the present invention significantly improves the accuracy and pertinence of temperature change trend prediction. A temperature-frequency-decoding complexity ternary autoregressive prediction model is used to jointly model chip temperature, operating frequency, and decoding complexity as interrelated state variables. This overcomes the systematic errors caused by the independent processing of each parameter in the existing technology and achieves a holistic and accurate description of the thermal characteristics of the set-top box chip. A scene-adaptive parameter identifier is used to automatically switch parameter sets between standby mode, menu interaction mode, and high-load decoding mode, accurately adapting to the thermal characteristics differences of different set-top box operating scenarios and avoiding the control deviation of traditional fixed parameter models in complex operating modes. The decoding frame deadline is used as a pre-constraint for the frequency reduction decision. By predicting the remaining decoding time and calculating the safety margin, it ensures that temperature control measures will not undermine the real-time requirements of audio and video decoding, effectively avoiding the decoding timeout problem caused by excessive frequency reduction in traditional methods. A multi-level frequency reduction strategy based on the degree of temperature overshoot and decoding constraints is established to achieve precise matching of the frequency reduction amplitude with the actual thermal load. Compared with the traditional extensive control method with a fixed frequency reduction amplitude, this significantly improves the refinement of temperature control and system stability. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0057] Figure 1 Schematic diagram of the steps of a dynamic frequency reduction protection method when a set-top box chip is overheated according to an embodiment of the present invention;

[0058] Figure 2 Schematic diagram of the structure of a dynamic frequency reduction protection device for set-top box chip overheating according to an embodiment of the present invention. DETAILED DESCRIPTION

[0059] An embodiment of the present invention provides a method and device for dynamic frequency reduction protection when a set-top box chip overheats. The terms "first," "second," "third," "fourth," and so on (if any) in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate so that the embodiments described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "including" or "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products, or devices.

[0060] For ease of understanding, the specific process of the embodiment of the present invention is described below. Figure 1 In one embodiment of the present invention, a method for dynamically reducing the frequency of a set-top box chip when it is overheated includes:

[0061] Step S1: collect the operating temperature of the set-top box chip and the current decoding task parameters in real time to obtain chip temperature data and decoding task feature vectors;

[0062] It is understandable that the execution subject of the present invention can be a dynamic frequency reduction protection device when the set-top box chip is overheated, or a terminal or a server, which is not limited here. The embodiment of the present invention is described by taking the server as the execution subject as an example.

[0063] Specifically, a high-precision temperature sensor embedded in the core area of ​​the set-top box's audio and video decoder chip continuously samples the chip temperature at a fixed frequency of 100Hz, generating a raw temperature data stream reflecting the chip's current thermal state. Simultaneously, during the streaming media access phase of the decoding chain, the audio and video stream header information is parsed. This information includes key decoding metrics such as the video encoding format identifier, target resolution parameters, frames per second, and target bitrate. During this parsing process, the encoding format is mapped to a corresponding standard type value (e.g., H.264 is mapped to 1, H.265 to 2, and AV1 to 3). The resolution parameter is extracted as a numeric value (e.g., 1920×1080 represents 1080p, 3840×2160 represents 4K). The frame rate is extracted as an integer value (e.g., 24, 30, 60, 120) according to the standard format, and the bitrate is directly extracted as a floating-point value in Mbps. At the same time, in order to characterize the resource pressure status of the system during the actual decoding execution process, the load changes of the decoding buffer are monitored synchronously, the current storage occupancy ratio of the decoding buffer is counted, and the ratio is converted into a percentage value as a dynamic reference for measuring the current task processing intensity. The above five information, namely the decoding standard type, video resolution, frame rate, bit rate and buffer load rate, respectively represent the encoding complexity, image spatial density, time processing requirements, data throughput intensity and real-time execution pressure of the decoding task. After these five types of parameters are numerically converted according to a unified standard, they are combined into a five-dimensional real-valued vector, and are normalized and standardized through a preset vector mapping mechanism to form a decoding task feature vector that meets the input requirements of the downstream model.

[0064] Step S2: Input the chip temperature data and the decoding task feature vector into a ternary autoregressive prediction model to perform temperature prediction to obtain a temperature prediction value;

[0065] Specifically, a weighted calculation is used to map the decoding task feature vector into a single metric that comprehensively reflects the task load intensity, namely the decoding complexity index. This index is generated by assigning differentiated weights to the impact of five dimensions on chip load during actual decoding: coding standard, resolution, frame rate, bit rate, and buffer load ratio. These weights are derived by analyzing the correlation between historical decoding tasks and temperature rise data. This ensures that the decoding complexity value has practical physical meaning and predictive sensitivity, thereby reflecting the driving force of task complexity on temperature changes. A ternary state vector is constructed using the current chip temperature value, chip operating frequency value, and the decoding complexity value calculated above. To introduce temporal correlation, a historical sequence of ternary state vectors is simultaneously constructed, consisting of state snapshots within the past two cycles, forming a sliding window state trajectory. This time-series ternary state vector sequence is input into a ternary autoregressive prediction model. This model combines the historical inertia of temperature changes (i.e., the autoregressive structure) with the linear gain structure of current external driving variables (i.e., frequency and complexity). A recursive calculation process is used to generate a ternary state prediction vector for the next moment. The recursive core of the model is based on a state equation. This state equation continuously adapts to environmental fluctuations and load nonlinearities that occur during chip operation through a priori modeling and an online parameter update mechanism, dynamically approximating complex temperature rise trends. After the recursion is complete, the corresponding temperature component is extracted from the generated prediction vector and used as the temperature prediction value for the next moment.

[0066] The ternary state vector sequence—chip temperature data at the current moment and the two previous moments, chip operating frequency data, and a decoding complexity index—is sequentially fed into the third-order autoregressive computation layer of the ternary autoregressive prediction model. This computation layer performs a linear combination of the current moment and its two previous states based on preset autoregressive coefficient weights to generate an autoregressive prediction component. This component formally represents the model's intrinsic response to regular changes within the time series and effectively captures the trends and inertial structures exhibited by temperature and frequency over time. Simultaneously, the standardized decoding task feature vector is fed into the exogenous variable processing layer for analysis. This layer performs coefficient matching with the model's internally trained parameter set to extract sensitive response factors corresponding to each task feature: the decoding standard coefficient, resolution coefficient, frame rate coefficient, and bitrate coefficient. These coefficients reflect the driving effect of the decoding task parameters on the temperature evolution process. Their values ​​are derived from the statistically significant relationships between various decoding tasks and temperature rise curves in historical training samples, thereby quantifying the degree to which a specific task type excites the current thermal state. This structure allows the model to adaptively capture differences in video characteristics, effectively avoiding the error amplification problem caused by using the same prediction parameters when processing different types of content (such as low-bitrate video and 8K high-frame-rate sources). The autoregressive prediction component and the exogenous variable component are weighted and summed to form a ternary state prediction vector for the next moment.

[0067] The temperature values, chip operating frequency values, and decoding complexity values ​​at the current moment and the two previous moments are extracted from the ternary state vector sequence, forming three-dimensional historical value sequences. The temperature history values ​​are composed of T(k), T(k-1), and T(k-2), while the frequency history values ​​are F(k) and F(k-1). Decoding complexity is assumed to be stable at the task level, so its historical evolution is primarily represented by DC(k) at the current moment or by a weighted average within a window. After obtaining these three-dimensional historical sequences, the temperature history values ​​are input into the temperature autoregressive unit within the third-order autoregressive computation layer. This unit performs a weighted summation of the temperature values ​​at the three moments based on three sets of pre-set regression weights. This process models the temporal inertia of the temperature itself, capturing characteristics such as growth trends, fallback delays, and periodic fluctuations along the time axis. The resulting temperature autoregressive component represents the natural evolution of temperature independent of external intervention. Historical frequency values ​​are fed into a second-order frequency autoregressive unit within the same computational layer. Since frequency is a controlled variable with a relatively fast adjustment cycle, a second-order structure is sufficient to account for its primary influence on temperature fluctuations. The frequency values ​​at two historical moments are linearly weighted with the corresponding frequency response weights to generate a frequency autoregressive component. This component reflects the inertia of the temperature control effect caused by frequency fluctuations, such as the delayed cooling caused by frequency reduction. To construct a complete prediction state, the temperature and frequency autoregressive components are linearly combined with the decoding complexity value. Decoding complexity, as a structural representation of the external video task load, modulates chip power consumption and heat accumulation. Therefore, an independent weighted term is required in the prediction logic to reflect its driving force. Three weighting coefficients—the temperature autoregressive weight, the frequency autoregressive weight, and the complexity influence factor—are uniformly weighted and superimposed to form a single, integrated autoregressive prediction component.

[0068] The decoding task feature vector is input into the exogenous variable processing layer of the ternary autoregressive prediction model. Within this processing layer, the input vector undergoes dimensionality separation, extracting five key numerical variables: the decoding standard type (e.g., H.264 is mapped to 1, H.265 to 2, and AV1 to 3), the video resolution (e.g., 1920×1080 for 1080P and 3840×2160 for 4K), the frame rate (e.g., 30fps, 60fps), the bitrate (in Mbps), and the decoding buffer load ratio (expressed as a percentage). This dimensionality separation ensures that each parameter can be independently mapped to the subsequent weight mapping system, thereby improving the flexibility and generalizability of parameter calculation. After dimensionality separation, the four structural parameters (decoding standard, resolution, frame rate, and bitrate) are entered into their respective weight mapping tables. This mapping table, pre-built by the system based on historical task data and temperature rise response analysis, lists the thermal load weights corresponding to different decoding types and parameter levels. For example, H.265 has a higher computational complexity than H.264 at the same bitrate, so it carries a greater weight. 4K resolution also carries a higher resolution weight because the total number of pixels is much higher than 1080P. These mapping tables transform the task load-aware weights of each input parameter, obtaining the decoding standard weight, resolution weight, frame rate weight, and bitrate weight, respectively. These weights are then adjusted based on the current decoder buffer load rate data. To enhance the numerical participation of exogenous variables, these four weights are combined with the decoder buffer load rate value and converted into coefficients using a set of empirical or trained conversion factors, ultimately forming standard coefficients for exogenous variables that can be identified by the temperature control model. The weight values, which originally had only statistical significance, are converted into parameter quantities with physical predictive capabilities, thus forming the final decoding standard coefficient, resolution coefficient, frame rate coefficient, and bitrate coefficient. During this process, the buffer load factor intervenes as a regulatory factor. When the decoding task itself is complex but the buffer is still underloaded, the exogenous variable coefficient can be appropriately adjusted downward to reduce the probability of misjudgment by the temperature control model. Conversely, the coefficient can be adjusted upward to improve the prediction response sensitivity. The four coefficients are combined into a vector of exogenous variable components, which serves as input to the autoregressive model's state update to construct the next state prediction output.

[0069] Step S3: performing decoding scene recognition based on the decoding task feature vector to obtain a target mode parameter set;

[0070] Specifically, a structured analysis is performed on the decoding task feature vector, which encompasses five key dimensions: decoding standard type, video resolution, frame rate, bit rate, and decode buffer load ratio. Each dimension has a direct impact on chip load intensity and thermal response speed. By assigning a set of task sensitivity weights, a weighted summation operation is performed on these five dimensions to generate a normalized decoding complexity index. This decoding complexity index is then compared with two pre-set scenario thresholds, corresponding to the demarcation points between "standby mode" and "high-load decoding mode." If the decoding complexity index is below the first threshold (e.g., 0.2), the current task has extremely low computational intensity, typically static images, menu interaction, or idle playback. The system is therefore considered to be in the standby scenario. If the complexity index is between the two thresholds (e.g., 0.2 to 0.6), the system is not under high load but is still in active operation. Based on this, the system is considered to be in the menu interaction scenario. When the complexity index is above the second threshold (e.g., 0.6), the system is processing high-bitrate, high-resolution, and high-frame-rate video data, indicating a high-load decoding scenario. The system introduces a judgment delay mechanism during this comparison process. This requires that the complexity indicator must remain above a threshold for a certain period of time (e.g., 500ms) before confirming a scene change. This prevents parameter switching oscillations caused by rapid user operations or data fluctuations. After determining the decoding scene, the system selects the most appropriate parameter set from multiple pre-stored internal parameter sets based on the current scene state. This set serves as the input weights and structural constraints for the subsequent temperature prediction model. These parameter sets include a standby mode parameter set, a menu interaction mode parameter set, and a high-load decoding mode parameter set. Each set contains the optimal temperature inertia factor, autoregressive coefficient, and decoding complexity gain term for the corresponding scenario. For example, the standby parameter set prioritizes temperature inertia and a low frequency gain coefficient, emphasizing low energy consumption and temperature stability. The high-load decoding mode parameter set, on the other hand, increases the sensitivity of frequency to temperature prediction and overweights the decoding complexity input, enabling rapid response to temperature changes. The selected parameter set serves as the model configuration input for the current cycle.

[0071] Step S4: performing constraint evaluation on the decoding frame deadline according to the temperature prediction value and the target mode parameter set to obtain a temperature frequency reduction safety margin value;

[0072] Specifically, based on the frame rate parameters of the currently playing audio and video stream, the time distribution characteristics of the stream are used to calculate the deadline for decoding the current frame. For example, in a 60-frame-per-second playback environment, the theoretical decoding deadline for each frame is 16.67 milliseconds, while in a 30-fps environment, it is 33.33 milliseconds. The final deadline for decoding the frame is derived based on the playback timestamp and frame rate of the current frame. This is further compared with the current system clock to derive the remaining decoding time for the current frame, that is, the available time window from the current moment to the frame deadline. Combining the decoding complexity index and chip operating frequency data within the current cycle, a built-in computational model is used to predict decoding time. This model estimates decoding time based on the inverse relationship between task computational load and main frequency, i.e., the time required for decoding is proportional to task complexity and inversely proportional to main frequency. A small memory access delay compensation factor is introduced to more closely match the actual decoding time behavior, resulting in a predicted decoding time. To enhance the model's scenario adaptability, the decoding scenario type information in the current target mode parameter set is input into the safety factor selector. This module uses a preset mapping table to match different decoding modes (such as standby, menu interaction, and high-load decoding) to corresponding decoding safety factors. For example, γ = 1.2 is used for 1080P video playback, γ = 1.5 for 4K HDR high-frame-rate video playback, and γ = 1.0 is reduced to γ ​​in standby or menu mode. This factor reflects the decoding scenario's tolerance for the system's margin strategy, ensuring performance while preventing overly conservative or aggressive thermal control strategies. Margin calculations are performed on the aforementioned parameters. The product of the remaining decoding time and the predicted decoding time is scaled and compared using the safety factor. A formula is used to calculate the thermal throttling safety margin: γ times the predicted decoding time is subtracted from the remaining available time for the current frame. The resulting difference represents the timing buffer space allowed for system throttling at the current scheduling frequency.

[0073] Step S5: Perform frequency reduction in stages based on the temperature frequency reduction safety margin value, and generate a dynamic frequency reduction control instruction.

[0074] Specifically, the thermal frequency reduction safety margin is used as a key input and compared against multiple internally preset frequency reduction thresholds. These thresholds are set based on experimental statistics and system design experience. For example, level 1 represents the minimum acceptable margin, allowing only a small frequency reduction. Levels 2 through 4 indicate increased thermal control requirements and greater frequency reduction headroom. Level 4 indicates that the chip temperature is approaching the upper safety limit, requiring maximum frequency suppression to prevent thermal runaway. A segmented comparison method is used to determine the frequency reduction level, clarifying the appropriate frequency adjustment intensity. Based on the determination, the corresponding control parameters are retrieved from a pre-stored frequency reduction parameter set. Each level parameter set includes not only the target frequency reduction value (e.g., level 1 corresponds to a 10% frequency reduction, level 2 to 20%, level 3 to 30%, and level 4 to 40%), but also the corresponding frequency adjustment timing scheme, including the frequency reduction execution period, step size, and interval time, to ensure smooth adjustment and control system stability. The selected target frequency reduction magnitude and adjustment timing are analyzed, and a progressive frequency adjustment path is generated based on this, breaking the overall frequency reduction into several smaller steps. This process is confined to a control window—for example, 10 steps within 200 milliseconds, with each step reducing one-tenth of the total target frequency reduction. This effectively avoids transient performance fluctuations and the risk of decoding workload shifting caused by sudden, large frequency reductions. Based on this frequency reduction path, a clear step-by-step frequency reduction sequence and precise frequency settings are generated for each step. Each frequency setting must be within the system's supported frequency adjustment granularity, and the adjustment process is dynamically assessed based on the current load status to determine whether premature termination or suspension is necessary. During each step, the decode buffer load rate and the current frame decoding margin are simultaneously monitored. If the buffer load exceeds 80% or the decoding margin falls below the safe lower limit, the frequency reduction is immediately terminated and the frequency is reversed to the previous level, establishing a dynamic adjustment mechanism with self-recovery capabilities. The above-mentioned step-by-step frequency reduction sequence and the frequency data for each step are encapsulated into dynamic frequency reduction control instructions in a standard instruction format. These instructions are sent by the scheduling module to the chip's main frequency control unit to execute the actual frequency reduction. These instructions contain the frequency reduction amplitude, step frequency, execution timing, and possible abort conditions. This ensures that the chip has clear control boundaries and operational procedures when executing this strategy, and also facilitates closed-loop control with the subsequent temperature feedback adjustment mechanism.

[0075] In the embodiment of the present invention, by constructing a multi-dimensional feature vector including decoding standard type, video resolution, frame rate, code rate and decoding buffer load rate, the present invention can accurately identify the specific impact of different decoding tasks on the chip thermal load. Compared with the traditional prediction method based only on historical temperature data, the accuracy and pertinence of temperature change trend prediction are significantly improved. Using the temperature-frequency-decoding complexity ternary autoregressive prediction model, the chip temperature, operating frequency and decoding complexity are jointly modeled as interrelated state variables, overcoming the systematic errors caused by independent processing of each parameter in the existing technology, and achieving an overall and accurate description of the thermal characteristics of the set-top box chip. The scene adaptive parameter identifier realizes automatic switching of parameter sets in standby mode, menu interaction mode and high-load decoding mode, and accurately adapts to the differences in thermal characteristics of different working scenarios of the set-top box, avoiding the control deviation of the traditional fixed parameter model in complex working modes. The decoding frame cut-off time is used as a pre-constraint for the frequency reduction decision. By predicting the remaining decoding time and safety margin calculation, it is ensured that the temperature control measures will not destroy the real-time requirements of audio and video decoding, effectively avoiding the decoding timeout problem caused by excessive frequency reduction in traditional methods. A multi-level frequency reduction strategy based on the degree of temperature overshoot and decoding constraints is established to achieve precise matching of the frequency reduction amplitude with the actual thermal load. Compared with the traditional extensive control method with a fixed frequency reduction amplitude, this significantly improves the refinement of temperature control and system stability.

[0076] In a specific embodiment, the process of executing step S1 may specifically include the following steps:

[0077] Sampling the temperature of the set-top box chip to obtain chip temperature data;

[0078] Parse the header information of the current audio and video stream to obtain the decoding standard type, video resolution, frame rate and bit rate parameters;

[0079] Monitor the load status of the decoding buffer and obtain decoding buffer load rate data;

[0080] The decoding standard type, the video resolution, the frame rate, the bit rate parameter and the decoding buffer load rate data are vector-mapped to obtain a decoding task feature vector.

[0081] Specifically, during temperature sampling of the set-top box chip, one or more high-precision temperature sensors are placed in key heat source areas within the chip, particularly in high-heat density units such as the audio and video decoder core, image rendering processing unit, main memory interface, or central computing module. This allows for rapid detection of localized micro-hotspot changes. These sensors utilize semiconductor thermistor arrays or integrated digital temperature sensors, achieving sampling accuracy within ±0.5°C, response time within tens of milliseconds, and a stable sampling frequency of 100Hz or higher. The system periodically polls these sensors via a chip control interface (such as I2C or SPI), caching each sampled temperature value in a temperature data acquisition buffer with a sampling timestamp to facilitate time alignment and sliding window construction of the prediction model. The audio and video stream data headers during decoding are parsed to extract key parameters for task complexity assessment. Header parsing involves performing syntax-level analysis on standard coding formats such as H.264, H.265, and AV1. It then structuredly interprets the SPS (Sequence Parameter Set), PPS (Picture Parameter Set), or media description information contained therein to extract information about the video standard type, resolution, frame rate, and bitrate being decoded. The decoding standard type is one of the foundations for constructing complexity features. Different coding algorithms vary significantly in the frequency and timing of their call to the computational units. For example, H.265 / HEVC has a more complex block segmentation structure and entropy coding mechanism than H.264, significantly increasing the chip's thermal load. While AV1 offers higher encoding efficiency, it also increases decoding time. Therefore, by mapping different standard types to numerical identifiers (e.g., 1 for H.264, 2 for H.265, 3 for AV1, and so on), a numerical representation of the coding type-based task is established. Resolution, a key parameter measuring image spatial density, directly determines the level of pixel processing per unit time during the decoding process. For example, 1080P corresponds to 1920×1080, 4K corresponds to 3840×2160, and 8K corresponds to 7680×4320. These values ​​are uniformly normalized to the total number of pixels during mapping to ensure a linear response to their quantitative contribution to decoding complexity. The frame rate parameter reflects the temporal resolution of the image, i.e., the number of frames per second to be processed. Common values ​​include 24fps, 30fps, 60fps, and 120fps. The system processes this parameter as an integer and converts it into a complexity growth factor using a preset weight when constructing the feature vector. The bitrate is read in Mbps and directly used as the basis for bandwidth utilization and data throughput calculations, reflecting the system's decoding load per unit time. After parsing the streaming media structure data, the decoder buffer's operational status is collected to determine the relationship between the current task execution progress and the system's processing headroom. As an intermediate storage unit in the processing chain, the decoder buffer's load rate effectively reflects the latency risk and resource pressure of the current system when processing streaming media data.The system reads the decoder module's buffer's write and read pointers, as well as its total buffer capacity, to calculate the current buffer occupancy in real time. This percentage reflects the decoding task's latency sensitivity or processing urgency. When the decoder buffer load rate approaches full capacity (e.g., above 80%), it indicates a rapid accumulation of frame data, and the system must maintain high performance to avoid data overflow or playback lag. The five parameters obtained from the above analysis—decoding standard type, resolution, frame rate, bit rate, and buffer load rate—are input into the vector mapping module as state descriptors for the decoding task. Within this module, mapping weights are assigned based on the impact of each parameter on decoding complexity. For example, the coding standard type is mapped to a structural complexity weight, resolution to an image processing weight, frame rate to a timing frequency weight, and bit rate to a data throughput weight. The buffer load rate serves as a modulating factor to dynamically adjust the contribution ratios of the first four parameters. During the mapping process, each parameter is uniformly converted to a normalized value, constructing a standard five-dimensional decoding task feature vector, which is then cached in the current state register.

[0082] In a specific embodiment, the process of executing step S2 may specifically include the following steps:

[0083] Performing weighted calculation on the decoding task feature vector to obtain a decoding complexity index;

[0084] Constructing a ternary state vector using the chip temperature data, the chip operating frequency data, and the decoding complexity index to obtain a ternary state vector sequence at the current moment and the historical moment;

[0085] Inputting the ternary state vector sequence into a ternary autoregressive prediction model for recursive calculation to obtain a ternary state prediction vector at the next moment;

[0086] The temperature component in the ternary state prediction vector is extracted to obtain a temperature prediction value.

[0087] Specifically, based on the decoding task feature vector, a weighted calculation is performed on five key dimensions within it: decoding standard type, video resolution, video frame rate, video bitrate, and decoding buffer load ratio. This creates a unified decoding complexity metric. Data with different dimensions and physical meanings is converted into a common complexity reference space, allowing them to serve as independent variables in the prediction model. The weights for each dimension are pre-trained based on the relationship between historical decoding tasks and corresponding chip temperature rise data, combined with statistical learning methods. For example, the decoding standard type has a higher complexity weight because differences in coding structure directly determine the decoding algorithm's operational intensity. Video resolution affects the total number of pixel calculations per unit time and is the primary contributor to the spatial load. Frame rate is related to the temporal processing rate, bitrate reflects data bandwidth and compression density, and buffer load ratio provides real-time feedback on system resource pressure. Therefore, by multiplying these five variables by their corresponding trained weights and summing them, a floating-point value is obtained as the complexity metric for the current decoding task. This metric reflects the overall trend in the task's consumption of chip computing resources during the current cycle. Chip temperature data, chip operating frequency data, and decoding complexity metrics are combined to construct a ternary state vector. This ternary state vector consists of three elements: current temperature T(k), current main frequency F(k), and current decoding complexity DC(k). To implement time-series modeling for temperature prediction, the states at nearly three time points are retained, forming a sliding time window of ternary states. This state vector sequence is a union of three sets of historical states: T(k), T(k-1), T(k-2), F(k), F(k-1), F(k-2), DC(k), DC(k-1), and DC(k-2). This state vector sequence is then input into a ternary autoregressive prediction model, which utilizes a multi-order linear recursive structure and is capable of modeling time series data trends and predicting future states. The core computational process of the ternary autoregressive model consists of two main parts: one is a third-order autoregressive modeling of historical temperature values, which linearly weights the temperature variables T(k), T(k-1), and T(k-2) with preset weights to capture the inertia and trend characteristics of temperature changes. The other part treats frequency and decoding complexity as exogenous input variables, and linearly influences variables such as F(k), F(k-1), and DC(k) through the set regression coefficients b1, b2, and c1, thereby establishing a direct relationship between temperature, operating frequency, and load intensity. These coefficients are trained offline using historical datasets or updated online using recursive least squares during system operation to adapt to the gradual changes in mission modes and thermal environments in long-term operating environments.By combining these two components, the model derives a three-element prediction vector for the next moment: T(k+1), F(k+1), and DC(k+1). T(k+1) represents the predicted chip temperature without frequency reduction. After the prediction vector is generated, the temperature component, T(k+1), is extracted as the temperature prediction for the current cycle.

[0088] In a specific embodiment, the step of inputting the ternary state vector sequence into a ternary autoregressive prediction model for recursive calculation to obtain the ternary state prediction vector at the next moment may specifically include the following steps:

[0089] Inputting the ternary state vector sequence into the third-order autoregressive calculation layer of the ternary autoregressive prediction model for linear combination to obtain an autoregressive prediction component;

[0090] Inputting the decoding task feature vector into the exogenous variable processing layer of the ternary autoregressive prediction model for coefficient matching to obtain an exogenous variable component including a decoding standard coefficient, a resolution coefficient, a frame rate coefficient, and a bit rate coefficient;

[0091] A weighted sum is performed on the autoregressive prediction component and the exogenous variable component to obtain a ternary state prediction vector at the next moment.

[0092] Specifically, the ternary state vector sequence is input into the third-order autoregressive calculation layer of the ternary autoregressive prediction model. The temperature term is processed by a third-order linear combination, that is, multiplying the three sets of temperature regression weights by T(k), T(k-1), and T(k-2), respectively. The frequency term is subjected to second-order processing, that is, weighting F(k) and F(k-1) according to the frequency regression weights. At the same time, the current complexity DC(k) is used as the first-order state input and a fixed weight coefficient is applied to it, thereby obtaining an autoregressive prediction component contributed proportionally by multiple historical states. At the same time, the decoding task feature vector of the current cycle is input into the exogenous variable processing layer of the ternary autoregressive model, and its five component dimensions are decomposed item by item, including decoding standard type, resolution, frame rate, bit rate, and buffer load rate. At the processing layer, the decoding standard type is converted to a standard number (e.g., 1 for H.264, 2 for H.265, and 3 for AV1). The resolution is converted to a numerical value of total pixels (e.g., 2073600 for 1080p). The frame rate is retained as an integer (e.g., 60fps), the bit rate is retained as a real number in Mbps, and the buffer load ratio is expressed as a floating-point percentage. These parameters are extracted and mapped to their respective coefficient lookup tables for coefficient matching. During the system design phase, a mapping between task type and thermal response was established using historical training data. As a result, each parameter has a corresponding empirical thermal weight. For example, AV1 has a higher decoding standard coefficient due to its complex decoding path. High resolution and high frame rate also have significant coefficient gains due to their large processing volume. The bit rate corresponds to the bandwidth pressure coefficient, and the buffer load ratio is used as a modulating factor to appropriately amplify or compress these coefficients. Finally, the system combines the four coefficients derived from these matching operations—the decoding standard coefficient, the resolution coefficient, the frame rate coefficient, and the bit rate coefficient—as exogenous variable components into an exogenous factor vector. A weighted summation is performed on the autoregressive prediction component and the exogenous variable component. By defining a set of fusion weights, weighting factors α and β are applied to the autoregressive and exogenous variables, respectively, reflecting the inertial effect of historical states on future temperature trends and the external driving force of current mission parameters on temperature rise trends. The final calculation process is completed through vector weighted summation, which uniformly superimposes the temperature autoregressive term, frequency influence term, complexity contribution term, and mission parameter mapping term to generate a ternary state prediction vector for the next moment.

[0093] In a specific embodiment, the step of inputting the ternary state vector sequence into the third-order autoregressive calculation layer of the ternary autoregressive prediction model for linear combination to obtain the autoregressive prediction component may specifically include the following steps:

[0094] Extracting temperature history values, frequency history values, and decoding complexity history values ​​at current and historical moments based on the ternary state vector sequence;

[0095] Inputting the temperature history values ​​into the third-order temperature autoregressive unit of the third-order autoregressive calculation layer for weighted summation to obtain a temperature autoregressive component;

[0096] Inputting the frequency history value into the second-order frequency autoregressive unit of the third-order autoregressive calculation layer for weighted summation to obtain a frequency autoregressive component;

[0097] The temperature autoregressive component, the frequency autoregressive component and the decoding complexity history value are linearly combined to obtain an autoregressive prediction component.

[0098] Specifically, a ternary state vector is constructed during each decoding cycle. This vector consists of three key variables: the current chip temperature value T(k), the chip operating frequency value F(k), and the decoding complexity index DC(k). The decoding complexity index is calculated by weighting the five dimensions of the decoding task feature vector and reflects the degree of computing resource pressure imposed by the decoding task itself, including factors such as encoding format, resolution, frame rate, bit rate, and decoding buffer load. This ternary state data is not only generated at the current moment but also continuously accumulated and updated within a sliding time window. Therefore, during model prediction, the current moment T(k), F(k), and DC(k); the previous moment T(k-1), F(k-1), and DC(k-1); and the previous moment T(k-2), F(k-2), and DC(k-2) are sequentially retrieved from the cache, forming a third-order time series state trajectory, or a ternary state vector sequence. This data is grouped by variable type to generate a temperature history value sequence, a frequency history value sequence, and a complexity history value sequence, respectively. The temperature history values ​​T(k), T(k-1), and T(k-2) are fed into a third-order temperature autoregressive unit. This unit embeds three sets of temperature regression weights, corresponding to the linear impact weights of the current moment, the first-order historical moment, and the second-order historical moment on future temperatures. These weights are obtained through minimum error fitting during the model training phase and reflect the degree of thermal inertia retention and changing trends of the chip over time. A weighted sum is then taken of these three temperature values: T(k), T(k-1), and T(k-2) are multiplied by their corresponding temperature regression coefficients a1, a2, and a3, respectively. The products are then added together to produce a floating-point value, the temperature autoregressive component. This component physically represents the temperature rise trend that will naturally occur at the next moment due to the continuation of the system's internal thermal inertia. The same extraction and processing of frequency history values ​​reveals that frequency factors change more rapidly, and their impact on temperature is more sudden and short-term than the continuous nature of temperature itself. Therefore, the system employs a two-order structure: the current time F(k) and the previous time F(k-1) are taken as frequency history inputs. These are multiplied by the frequency regression coefficients b1 and b2, respectively, and the results are summed to produce the frequency autoregressive component. This component reflects the short-term excitation effect of the chip's operating frequency on the temperature rise at the next time point and is the computational path in the prediction model that primarily reflects the feedback effect of regulatory interventions. When processing the decoding complexity metric, since it varies relatively little within a video segment and exhibits a certain degree of stability, the current complexity DC(k) or a weighted average within a window is used as the current complexity representation and is directly multiplied by a decoding complexity weight coefficient c1 to represent the direct driving force of the task's computational load on temperature. This driving force is long-term and stable. In high-complexity tasks, the temperature rise trend gradually accumulates, so this component is incorporated into the entire model as a single linear term.The three aforementioned components—temperature autoregressive component, frequency autoregressive component, and complexity-driven component—are linearly weighted and superimposed to obtain the autoregressive prediction component, which represents the natural evolution value that the chip temperature may reach at the next moment under the current state and task structure without considering other exogenous factors.

[0099] In a specific embodiment, the step of inputting the decoding task feature vector into the exogenous variable processing layer of the ternary autoregressive prediction model for coefficient matching to obtain the exogenous variable components including the decoding standard coefficient, the resolution coefficient, the frame rate coefficient, and the bit rate coefficient may specifically include the following steps:

[0100] Inputting the decoding task feature vector into the exogenous variable processing layer of the ternary autoregressive prediction model, performing dimension separation on the decoding task feature vector in the exogenous variable processing layer to obtain a decoding standard type value, a video resolution value, a frame rate value, a bit rate value, and a decoding buffer load rate value;

[0101] Input the decoding standard type value, the video resolution value, the frame rate value and the bit rate value into the corresponding weight mapping table for table lookup to obtain the decoding standard weight, resolution weight, frame rate weight and bit rate weight;

[0102] Performing coefficient conversion on the decoding standard weight, the resolution weight, the frame rate weight, the bit rate weight, and the decoding buffer load rate value to obtain a decoding standard coefficient, a resolution coefficient, a frame rate coefficient, and a bit rate coefficient;

[0103] The decoding standard coefficient, the resolution coefficient, the frame rate coefficient and the bit rate coefficient are vector-combined to obtain an exogenous variable component.

[0104] Specifically, during the decoding task initialization phase or at the audio / video stream switching node, the key feature parameters of the current task are analyzed in real time and encapsulated into a unified decoding task feature vector. This feature vector contains five dimensions: decoding standard type (e.g., H.264, H.265, AV1), video resolution (e.g., 1920×1080, 3840×2160), frame rate (e.g., 24fps, 60fps), bit rate (e.g., 10Mbps), and the real-time load ratio of the decoding buffer (expressed as a percentage). The decoding task feature vector is input into the exogenous variable processing layer of the ternary autoregressive model, where a dimension separation operation is performed. This operation involves extracting each dimension of the feature vector into five numerical variables according to a pre-set structured protocol: decoding standard type, video resolution, frame rate, bit rate, and decoding buffer load ratio. The decoding standard type is mapped to an enumeration code, for example, H.264 is set to 1, H.265 is 2, and AV1 is 3. Resolution is converted to an integer based on the total number of pixels, such as 2,073,600 pixels for 1080p and 8,294,400 pixels for 4K. Frame rate is input directly as an integer, bitrate is expressed in real Mbps, and buffer load ratio is expressed as a decimal or percentage between 0 and 1, indicating the current level of buffer utilization. The four parameters, except for the buffer load ratio, are each entered into a corresponding weight mapping table for lookup. These mapping tables are constructed based on historical experimental data or offline statistical regression training results. Essentially, they map the parameter level to the contribution to temperature increase per unit of computational complexity. For example, AV1, due to its complex decoding path and high compression density, consumes more decoding chip resources, resulting in a higher value in the decoding standard weight table than H.264 or H.265. Similarly, high-resolution video, such as 8K, has a much higher weight in the resolution weight table than 1080p due to the large number of pixels it processes. Frame rate affects the number of decodes per unit time, so the weights for high frame rates like 60fps or 120fps will increase significantly. Bitrate, as a direct indicator of data input throughput, exhibits a relatively linearly increasing trend in the bitrate weight table. After this process is complete, the system obtains four results: decoding standard weight, resolution weight, frame rate weight, and bitrate weight. These represent the theoretical contribution of decoding task parameters to chip thermal load under static conditions. To enhance the model's flexibility and accuracy under dynamic operating conditions, these four weights are combined with the current decode buffer load rate to convert weights into coefficients.This process is called coefficient conversion. Its design logic is as follows: if a task parameter inherently has high complexity (i.e., a high lookup weight) but the current buffer is underloaded (indicating a relatively idle scheduling window for the decoding process), the weight should be appropriately weakened to prevent the thermal control model from prematurely responding and misjudging the temperature rise trend. Conversely, if the buffer load rate is near saturation (e.g., exceeding 80%), even if the weight of a parameter is moderately low, it should be appropriately increased to reflect the actual thermal risk increase posed by the parameter in the current execution environment. In implementation, by setting the coefficient adjustment factor γ and the load function μ, the weight value and the buffer load rate are combined to form a joint function to output the coefficient value. This process ultimately yields the four specific values ​​for the decoding standard coefficient, resolution coefficient, frame rate coefficient, and bitrate coefficient. These four coefficients are encapsulated into a one-dimensional vector of length four and transmitted as the exogenous variable component to the state fusion layer of the ternary autoregressive prediction model. There, they are weighted and fused with the autoregressive prediction components formed by temperature, frequency, and complexity to form the final state prediction output for the next moment.

[0105] In a specific embodiment, the process of executing step S3 may specifically include the following steps:

[0106] Performing weighted calculation on the decoding standard type, video resolution, frame rate, bit rate parameter and decoding buffer load rate data in the decoding task feature vector to obtain a decoding complexity index;

[0107] Comparing the decoding complexity index with a preset standby mode threshold and a high-load mode threshold to obtain a decoding scene discrimination result;

[0108] The pre-stored standby mode parameter set, menu interaction mode parameter set and high-load decoding mode parameter set are selected according to the decoding scenario discrimination result to obtain a target mode parameter set.

[0109] Specifically, the decoding task feature vector is input into the complexity calculation module for weighted calculation. Within this module, weight coefficients are assigned based on the actual impact of each dimension on the chip's thermal load. For example, the decoding standard type has a fundamental impact on the decoding algorithm path length and data processing flow, so its weight coefficient is higher than other parameters. Video resolution and frame rate correspond to processing density in the spatial and temporal dimensions, respectively, and their weights reflect the coupling effect between the number of pixels within a decoded frame and the number of frames processed per unit time. While the bitrate parameter doesn't directly participate in pixel processing, it represents the throughput of incoming data per unit time, impacting system I / O and buffer pressure. The decoding buffer load ratio parameter is introduced as a dynamic adjustment factor to amplify or compress the contributions of the above four structural parameters under the current system processing state, thereby enhancing the system's responsiveness to critical load bursts. After processing these five parameters according to a normalized proportional standard, the system multiplies them by their corresponding weights and performs a weighted summation to form a real-number decoding complexity metric, typically a continuous value between 0 and 1. This metric has a clear numerical meaning: higher values ​​indicate a higher chip resource usage and a higher projected thermal load, requiring greater precision and sensitivity in predictive control and thermal protection. Lower values ​​indicate a lighter task and a low-heat or standby state, requiring the control system to adopt a more relaxed strategy to reduce power consumption and prediction overhead. The decoding complexity metric is fed into the scenario discrimination module and continuously compared against two preset key thresholds. These two thresholds, designated "standby mode threshold" and "high-load mode threshold," are determined based on experimental data analysis and scenario-specific statistical patterns. If the decoding complexity index is less than the first threshold (e.g., 0.2), this indicates that the system is in low-load scenarios, such as menu pauses, static images, or low-frame-rate and low-bitrate video, and switches to standby mode. If the decoding complexity index is greater than the second threshold (e.g., 0.6), the system is processing complex tasks, such as 4K, 8K, or high-frame-rate video, and is in high-load decoding. If the value is between the two thresholds (i.e., 0.2 ≤ DC < 0.6), the system is in medium load, typically in scenarios such as menu animations, multi-window browsing, and low-resolution video playback, and is therefore in menu interaction mode. This determination is not based solely on the current single index value, but rather on whether the index consistently crosses the threshold for a sustained period (e.g., more than 500ms) as a valid trigger. This prevents frequent mode switching caused by data fluctuations or short-term jumps, which could compromise system stability.After scene identification, the corresponding parameter set is automatically selected from the parameter storage unit based on the current recognition result. These parameters include three types: standby mode parameter set, menu interaction mode parameter set, and high-load decoding mode parameter set. Each parameter set encapsulates the temperature prediction model parameters for that mode (such as the a1, b1, and c1 coefficients of the TARX model), as well as key control variables such as the adjustment sensitivity parameter, the frequency reduction response threshold, and the decoding delay margin weight. These parameter sets are specifically tailored to the thermal response characteristics and resource fluctuations of each mode. For example, in standby mode, a larger a1 value is used to extend thermal inertia retention, while a smaller b1 value is used to weaken the response to frequency disturbances. In high-load mode, a1 is reduced, while b1 and c1 are increased to increase the model's sensitivity to changes in frequency and task complexity, allowing for faster response to temperature increases. The menu interaction mode parameter set serves as an intermediate state, balancing response speed and stability, supporting a moderate rate of adjustment. The selected target mode parameter set serves as the control core input to the temperature prediction model, frequency reduction decision logic, and dynamic frequency scheduling module, driving the entire temperature control system to implement the optimal strategy based on the currently determined task characteristics.

[0110] In a specific embodiment, the process of executing step S4 may specifically include the following steps:

[0111] Calculate the deadline for the current decoding frame and the remaining decoding time based on the frame rate parameters of the current audio and video stream;

[0112] Predicting decoding time based on the decoding complexity index and chip operating frequency data to obtain a predicted decoding time;

[0113] Inputting the decoding scenario type in the target mode parameter set into the safety factor selector for coefficient matching to obtain a decoding safety factor corresponding to the current decoding load;

[0114] A margin calculation is performed on the temperature prediction value, the remaining decoding time, the predicted decoding time, and the decoding safety factor to obtain a temperature frequency reduction safety margin value.

[0115] Specifically, during the initialization phase of each video decoding cycle, the system obtains the frame rate parameters of the current audio and video stream. This parameter is provided by a standard format field in the streaming media header information, with typical values ​​such as 24fps, 30fps, 60fps, or 120fps. Based on the frame rate, the system directly calculates the theoretical decoding deadline for the current frame, that is, the maximum permissible decoding time window for each frame. For example, for 60fps video, the maximum decoding time per frame is 16.67 milliseconds, while for 30fps it is 33.33 milliseconds. This value represents the upper limit of the time within which the current frame must be decoded before playback. It is a critical timing boundary for ensuring continuous playback and avoiding lag and artifacts. After obtaining the current system clock, the system calculates the difference between the current time and the end of the frame cycle to determine the remaining decoding time for the current frame, that is, the time window available for decoding. This time value changes dynamically and is updated in real time based on factors such as system scheduling, buffer accumulation, and processing delays. Dynamic decoding time estimation is performed based on the decoding complexity index and the current chip operating frequency. The decoding time prediction model is constructed based on the principle of using complexity as the positive driver and the main frequency as the negative factor, with microstructural delays incorporated for adjustment. The physical implication of this model is that, given a certain level of complexity, higher frequencies result in shorter decoding times; however, higher complexity increases decoding time, even with a constant frequency. This prediction model provides real-time predictions of decoding time, which, along with the aforementioned remaining time, form two key inputs for the next stage of judgment. The decoding scenario type in the target mode parameter set is input into the safety factor selector for coefficient matching. This selector is a mapping mechanism whose core function is to convert the categorical variable "scenario" into a continuous coefficient, "margin redundancy strength," to control the tolerance for frequency reduction risk in different mission scenarios. For example, in standby mode, the system uses a smaller safety factor, such as γ = 1.0, because the workload is extremely light, and even occasional delays are imperceptible to the user. When processing 1080P mainstream video, γ = 1.2 is used to ensure moderate conservatism under normal loads. When the system is in high-load decoding mode, such as playing complex videos like 4K HDR and 8K 60fps, γ should be set to 1.5 or even higher to ensure sufficient time margin during decoding to mitigate fluctuations caused by unexpected delays, cache jitter, or frequency downshifts. The remaining time available for the current frame, the predicted decoding time, and the current safety factor are combined to determine whether frequency downshifting is permitted. By comparing the remaining time with the predicted time after safety calibration, a time margin value is determined to indicate whether a "downshift window" exists. If this margin is positive, the system still has sufficient time to complete decoding and ensure playback continuity even with a certain degree of frequency reduction. Conversely, if the margin is zero or negative, the system must maintain the current frequency or perform a frequency increase to ensure that the task completes within the time limit.

[0116] In a specific embodiment, the process of executing step S5 may specifically include the following steps:

[0117] Comparing the temperature frequency reduction safety margin value with the preset first-level frequency reduction threshold, second-level frequency reduction threshold, third-level frequency reduction threshold, and fourth-level frequency reduction threshold to obtain a frequency reduction level determination result;

[0118] Selecting a pre-stored frequency reduction amplitude parameter set according to the frequency reduction level determination result to obtain frequency reduction strategy parameters including a target frequency reduction amplitude and an adjustment timing;

[0119] Performing progressive frequency adjustment based on the frequency reduction strategy parameters to obtain a step-by-step frequency reduction sequence and frequency reduction amplitude data for each step;

[0120] The step-by-step frequency reduction sequence and the frequency reduction amplitude data of each step are packaged into instructions to generate a dynamic frequency reduction control instruction.

[0121] Specifically, the thermal frequency reduction safety margin value is sequentially compared with four preset frequency reduction thresholds to determine the frequency reduction level. These thresholds serve as internal policy demarcation criteria, corresponding to different degrees of decoding time redundancy and thermal control adjustment headroom. A temperature frequency reduction safety margin value >10ms corresponds to level 1 frequency reduction, a temperature frequency reduction safety margin value >7ms corresponds to level 2 frequency reduction, a temperature frequency reduction safety margin value >4ms corresponds to level 3 frequency reduction, and a temperature frequency reduction safety margin value >2ms corresponds to level 4 frequency reduction. If the temperature frequency reduction safety margin value is ≤2ms, it indicates that the task is within the time limit and frequency reduction is not allowed. During the comparison process, a step-by-step determination is performed to determine which threshold range the margin value falls within. The frequency reduction level determination result is output. This level is represented as an integer value from 1 to 4, corresponding to four different frequency modulation response strengths. An internal flag indicating whether pre-frequency reduction is allowed or aborted is included for reference by the subsequent controller. The frequency reduction strategy is selected based on this frequency reduction level determination. During this phase, the strategy subset matching the current level is read from the internal frequency reduction parameter table. Each frequency reduction level parameter set contains two core elements: a target frequency reduction value, representing the total percentage by which the chip frequency should be reduced under the current conditions. For example, a level 1 frequency reduction corresponds to a 10% frequency reduction, while a level 4 frequency reduction corresponds to a 40% frequency reduction. The second is the frequency adjustment timing structure, including the adjustment cycle length, number of steps, and step cadence, which guide the system's frequency adjustment process. These parameters are key control points for achieving smooth frequency transitions and preventing control oscillations. They balance thermal control cadence with system stability. After selecting the target frequency reduction value and the corresponding adjustment cadence, a gradual frequency adjustment path is generated based on the strategy. To avoid sudden frequency reductions that may cause decoding frame drops, buffer jitter, or image freeze, a multi-step frequency reduction scheme is constructed using a linear or exponential approach. For example, a 40% frequency reduction can be broken down into 10 steps of 4% each, with each step executed every 20ms, for a total adjustment period of 200ms. This approach constructs a time-distributed, step-by-step frequency reduction sequence. Each frequency reduction step specifies not only the target frequency value but also the triggering timing and execution cadence. The step-by-step frequency reduction sequence and the frequency reduction amplitude data for each step are then packaged into instructions, formatting the frequency reduction control steps into a dynamic frequency reduction control instruction set that can be parsed by the chip control module. This instruction set consists of an instruction header, a step list, execution flags, and safety constraints.The instruction header contains the level identifier, frequency modulation target, timing number, and safety flag of this control command; the step list is a data structure for each frequency change step, recording the target frequency value that should be set at each moment; the execution flag includes the termination conditions during the frequency modulation process. If the temperature prediction trend reverses or the decoding buffer load exceeds the threshold during the frequency modulation process, the frequency reduction rollback mechanism can be triggered; the safety constraint section is used to record key constraints such as the maximum tolerable temperature rise rate, the minimum acceptable inter-frame decoding margin, and whether frequency reduction interruption is allowed to ensure that the execution of the instruction will not have an uncontrollable impact on system functions and user experience. The packaged frequency reduction instruction is sent to the chip frequency control unit through the scheduling module. The underlying hardware performs the actual frequency adjustment and provides real-time feedback on the adjustment effect and task status update to the control system to form a closed-loop regulation.

[0122] The above describes the dynamic frequency reduction protection method when the set-top box chip is overheated in the embodiment of the present invention. The following describes the dynamic frequency reduction protection device when the set-top box chip is overheated in the embodiment of the present invention. Figure 2 In one embodiment of the present invention, a device for dynamically reducing the frequency of a set-top box chip when it is overheated includes:

[0123] The real-time acquisition module is used to collect the operating temperature of the set-top box chip and the current decoding task parameters in real time to obtain the chip temperature data and the decoding task feature vector;

[0124] a temperature prediction module, configured to input the chip temperature data and the decoding task feature vector into a ternary autoregressive prediction model to perform temperature prediction and obtain a temperature prediction value;

[0125] A decoding scene recognition module, configured to perform decoding scene recognition based on the decoding task feature vector to obtain a target mode parameter set;

[0126] A constraint evaluation module, configured to perform constraint evaluation on a decoding frame deadline according to the temperature prediction value and the target mode parameter set, to obtain a temperature frequency reduction safety margin value;

[0127] The hierarchical frequency reduction module is used to perform hierarchical frequency reduction based on the temperature frequency reduction safety margin value and generate a dynamic frequency reduction control instruction.

[0128] By integrating these components and constructing a multidimensional feature vector encompassing decoding standard type, video resolution, frame rate, bit rate, and decoding buffer load ratio, the present invention accurately identifies the specific impact of different decoding tasks on chip thermal load. This significantly improves the accuracy and pertinence of temperature trend predictions compared to traditional prediction methods based solely on historical temperature data. A temperature-frequency-decoding complexity ternary autoregressive prediction model is employed to jointly model chip temperature, operating frequency, and decoding complexity as interrelated state variables. This overcomes the systematic errors caused by the independent treatment of each parameter in existing techniques and achieves a holistic and accurate description of the thermal characteristics of the set-top box chip. A scenario-adaptive parameter identifier automatically switches between parameter sets for standby mode, menu interaction mode, and high-load decoding mode, precisely adapting to the thermal characteristics of different set-top box operating scenarios and avoiding the control bias of traditional fixed-parameter models in complex operating modes. The decoding frame deadline is used as a pre-constraint for frequency reduction decisions. By predicting the remaining decoding time and calculating a safety margin, this ensures that temperature control measures do not undermine the real-time requirements of audio and video decoding, effectively avoiding the decoding timeout problem caused by excessive frequency reduction in traditional methods. A multi-level frequency reduction strategy based on the degree of temperature overshoot and decoding constraints is established to achieve precise matching of the frequency reduction amplitude with the actual thermal load. Compared with the traditional extensive control method with a fixed frequency reduction amplitude, this significantly improves the refinement of temperature control and system stability.

[0129] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described systems, systems and units can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0130] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the portion that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes various media that can store program code, such as a USB flash drive, a mobile hard drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0131] As described above, the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that the technical solutions described in the above embodiments can still be modified, or some of the technical features thereof can be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A dynamic frequency reduction protection method for set-top box chip overheating, characterized in that: include: The operating temperature of the set-top box chip and the current decoding task parameters are collected in real time to obtain the chip temperature data and decoding task feature vector; Inputting the chip temperature data and the decoding task feature vector into a ternary autoregressive prediction model to perform temperature prediction to obtain a temperature prediction value; Performing decoding scene recognition based on the decoding task feature vector to obtain a target mode parameter set; Performing constraint evaluation on the decoding frame deadline according to the temperature prediction value and the target mode parameter set to obtain a temperature frequency reduction safety margin value; Frequency reduction is performed in stages based on the temperature frequency reduction safety margin value, and a dynamic frequency reduction control instruction is generated.

2. The method for dynamic frequency reduction protection when a set-top box chip is overheated according to claim 1, characterized in that: The real-time acquisition of the operating temperature of the set-top box chip and the current decoding task parameters to obtain chip temperature data and a decoding task feature vector includes: Sampling the temperature of the set-top box chip to obtain chip temperature data; Parse the header information of the current audio and video stream to obtain the decoding standard type, video resolution, frame rate and bit rate parameters; Monitor the load status of the decoding buffer and obtain decoding buffer load rate data; The decoding standard type, the video resolution, the frame rate, the bit rate parameter and the decoding buffer load rate data are vector-mapped to obtain a decoding task feature vector.

3. The method for dynamic frequency reduction protection when a set-top box chip is overheated according to claim 1, characterized in that: The step of inputting the chip temperature data and the decoding task feature vector into a ternary autoregressive prediction model to perform temperature prediction to obtain a temperature prediction value includes: Performing weighted calculation on the decoding task feature vector to obtain a decoding complexity index; Constructing a ternary state vector using the chip temperature data, the chip operating frequency data, and the decoding complexity index to obtain a ternary state vector sequence at the current moment and the historical moment; Inputting the ternary state vector sequence into a ternary autoregressive prediction model for recursive calculation to obtain a ternary state prediction vector at the next moment; The temperature component in the ternary state prediction vector is extracted to obtain a temperature prediction value.

4. The method for dynamic frequency reduction protection when a set-top box chip is overheated according to claim 3, characterized in that: The step of inputting the ternary state vector sequence into a ternary autoregressive prediction model for recursive calculation to obtain a ternary state prediction vector at the next moment includes: Inputting the ternary state vector sequence into the third-order autoregressive calculation layer of the ternary autoregressive prediction model for linear combination to obtain an autoregressive prediction component; Inputting the decoding task feature vector into the exogenous variable processing layer of the ternary autoregressive prediction model for coefficient matching to obtain an exogenous variable component including a decoding standard coefficient, a resolution coefficient, a frame rate coefficient, and a bit rate coefficient; A weighted sum is performed on the autoregressive prediction component and the exogenous variable component to obtain a ternary state prediction vector at the next moment.

5. The method for dynamic frequency reduction protection when a set-top box chip is overheated according to claim 4, characterized in that: The step of inputting the ternary state vector sequence into the third-order autoregressive calculation layer of the ternary autoregressive prediction model for linear combination to obtain the autoregressive prediction component includes: Extracting temperature history values, frequency history values, and decoding complexity history values ​​at current and historical moments based on the ternary state vector sequence; Inputting the temperature history values ​​into the third-order temperature autoregressive unit of the third-order autoregressive calculation layer for weighted summation to obtain a temperature autoregressive component; Inputting the frequency history value into the second-order frequency autoregressive unit of the third-order autoregressive calculation layer for weighted summation to obtain a frequency autoregressive component; The temperature autoregressive component, the frequency autoregressive component and the decoding complexity history value are linearly combined to obtain an autoregressive prediction component.

6. The method for dynamic frequency reduction protection when a set-top box chip is overheated according to claim 4, characterized in that: The step of inputting the decoding task feature vector into the exogenous variable processing layer of the ternary autoregressive prediction model for coefficient matching to obtain an exogenous variable component including a decoding standard coefficient, a resolution coefficient, a frame rate coefficient, and a bit rate coefficient includes: Inputting the decoding task feature vector into the exogenous variable processing layer of the ternary autoregressive prediction model, performing dimension separation on the decoding task feature vector in the exogenous variable processing layer to obtain a decoding standard type value, a video resolution value, a frame rate value, a bit rate value, and a decoding buffer load rate value; Input the decoding standard type value, the video resolution value, the frame rate value and the bit rate value into the corresponding weight mapping table for table lookup to obtain the decoding standard weight, resolution weight, frame rate weight and bit rate weight; Performing coefficient conversion on the decoding standard weight, the resolution weight, the frame rate weight, the bit rate weight, and the decoding buffer load rate value to obtain a decoding standard coefficient, a resolution coefficient, a frame rate coefficient, and a bit rate coefficient; The decoding standard coefficient, the resolution coefficient, the frame rate coefficient and the bit rate coefficient are vector-combined to obtain an exogenous variable component.

7. The method for dynamic frequency reduction protection when a set-top box chip is overheated according to claim 1, characterized in that: The decoding scene recognition is performed based on the decoding task feature vector to obtain a target mode parameter set, including: Performing weighted calculation on the decoding standard type, video resolution, frame rate, bit rate parameter and decoding buffer load rate data in the decoding task feature vector to obtain a decoding complexity index; Comparing the decoding complexity index with a preset standby mode threshold and a high-load mode threshold to obtain a decoding scene discrimination result; The pre-stored standby mode parameter set, menu interaction mode parameter set and high-load decoding mode parameter set are selected according to the decoding scenario discrimination result to obtain a target mode parameter set.

8. The method for dynamic frequency reduction protection when a set-top box chip is overheated according to claim 7, characterized in that: The performing constraint evaluation on the decoding frame deadline according to the temperature prediction value and the target mode parameter set to obtain a temperature frequency reduction safety margin value includes: Calculate the deadline for the current decoding frame and the remaining decoding time based on the frame rate parameters of the current audio and video stream; Predicting decoding time based on the decoding complexity index and chip operating frequency data to obtain a predicted decoding time; Inputting the decoding scenario type in the target mode parameter set into the safety factor selector for coefficient matching to obtain a decoding safety factor corresponding to the current decoding load; A margin calculation is performed on the temperature prediction value, the remaining decoding time, the predicted decoding time, and the decoding safety factor to obtain a temperature frequency reduction safety margin value.

9. The method for dynamic frequency reduction protection when a set-top box chip is overheated according to claim 1, characterized in that: The step of performing hierarchical frequency reduction based on the temperature frequency reduction safety margin value and generating a dynamic frequency reduction control instruction includes: Comparing the temperature frequency reduction safety margin value with the preset first-level frequency reduction threshold, second-level frequency reduction threshold, third-level frequency reduction threshold, and fourth-level frequency reduction threshold to obtain a frequency reduction level determination result; Selecting a pre-stored frequency reduction amplitude parameter set according to the frequency reduction level determination result to obtain frequency reduction strategy parameters including a target frequency reduction amplitude and an adjustment timing; Performing progressive frequency adjustment based on the frequency reduction strategy parameters to obtain a step-by-step frequency reduction sequence and frequency reduction amplitude data for each step; The step-by-step frequency reduction sequence and the frequency reduction amplitude data of each step are packaged into instructions to generate a dynamic frequency reduction control instruction.

10. A dynamic frequency reduction protection device for set-top box chip overheating, characterized in that: The method for dynamically reducing the frequency of a set-top box chip when it is overheated is used to execute any one of claims 1 to 9, wherein the device for dynamically reducing the frequency of a set-top box chip when it is overheated comprises: The real-time acquisition module is used to collect the operating temperature of the set-top box chip and the current decoding task parameters in real time to obtain the chip temperature data and the decoding task feature vector; a temperature prediction module, configured to input the chip temperature data and the decoding task feature vector into a ternary autoregressive prediction model to perform temperature prediction and obtain a temperature prediction value; A decoding scene recognition module, configured to perform decoding scene recognition based on the decoding task feature vector to obtain a target mode parameter set; A constraint evaluation module, configured to perform constraint evaluation on a decoding frame deadline according to the temperature prediction value and the target mode parameter set, to obtain a temperature frequency reduction safety margin value; The hierarchical frequency reduction module is used to perform hierarchical frequency reduction based on the temperature frequency reduction safety margin value and generate a dynamic frequency reduction control instruction.

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