Back contact photovoltaic cell, manufacturing method thereof, photovoltaic module and photovoltaic power station

Abstract

The invention relates to the field of photovoltaic technology, and discloses a back contact photovoltaic cell and a manufacturing method thereof, a photovoltaic module and a photovoltaic power station. According to the manufacturing method, preparation of multiple layers of films (such as an intrinsic layer, a doping source layer and a mask layer) can be continuously completed by using a single deposition process, and P-type doping and N-type doping of a selective region can be realized at a time by matching with a patterning process of a local region before and after thermal diffusion and matching with a single thermal diffusion process only through one-time mask; therefore, according to the manufacturing method, the patterning area is reduced, the manufacturing process is greatly simplified, the equipment investment cost and the battery manufacturing cost are reduced, the manufacturing efficiency of the battery is improved, the etching damage to the doped polycrystalline silicon layer is small, the short circuit problem is avoided, the process of patterning the existing P-type doped polycrystalline silicon which is difficult to etch is avoided, and the manufacturing efficiency of the battery is improved. The isolation region is formed, the doping concentration of polycrystalline silicon can be improved, the passivation effect and the metal contact characteristic can be improved, and the performance and the product yield of the battery can be improved.

Description

Technical Field

[0001] The present invention relates to the field of photovoltaic technology, and in particular to a back-contact photovoltaic cell and a manufacturing method thereof, a photovoltaic module and a photovoltaic power station. Background Art

[0002] At present, as a high-efficiency photovoltaic cell technology, back-contact photovoltaic cell technology is in a rapid development stage. Compared with TopCon (tunneling oxide passivation contact) cells, back-contact photovoltaic cells have higher photoelectric conversion efficiency (referred to as efficiency), so they are regarded as a new generation of technology and have attracted much attention. Despite its efficiency advantage, back-contact photovoltaic cells are constrained by complex process flows. Because complex processes lead to increased manufacturing costs and huge equipment investment amounts, these factors will cause the product to lose its price advantage. In particular, the P and N doped areas in the preparation process need to be selectively doped and prepared on the same side (such as the back side), so back-contact photovoltaic cells require multiple precise patterning processes.

[0003] For example, the back-contact cell manufacturing method disclosed in publication number EP4391084A1 involves performing masked deposition after forming a doped polysilicon layer, followed by the following patterning process: removing a portion of the mask, and then further removing the doped polysilicon layer (e.g., P-type doped polysilicon layer) in the unmasked area; then depositing a polysilicon layer doped with a dopant of another polarity, depositing a mask layer, and then performing a similar patterning process to form doped polysilicon layers with N and P regions on the same side (e.g., the back side); then removing the mask layer, performing passivation and metallization, and obtaining the back-contact cell. This manufacturing method, which selectively forms doped regions of opposite conductivity types (or polarities) on the back side through multiple masked patterning and step-by-step heat treatment doping of the P and N regions, significantly increases manufacturing costs. The complex process and large-area patterning lead to increased equipment requirements, rising costs, and low manufacturing efficiency. Furthermore, this manufacturing method also presents the difficulty of removing the highly doped P-type doped polysilicon layer in the unmasked area during the first patterning process.

[0004] The manufacturing method mentioned in publication number US20160027951A1 is to implant P-type dopants in some areas after depositing intrinsic polysilicon, forming a mask (such as a diffusion barrier layer) on the entire back side, then etching the mask above the undoped area, and then completing N-type doping through thermal diffusion. This manufacturing method requires the investment of precision equipment to implant P-type dopants, which is expensive. Moreover, this manufacturing method does not etch to form an isolation region that isolates the N region from the P region, which will have a negative impact on the short-circuit current, open-circuit voltage, and fill factor of the battery, thereby affecting the photoelectric conversion efficiency of the battery. In addition, the patterned etching area of this manufacturing method is large. In the subsequent etch-back process, N-type doped polysilicon is prone to etching damage, which can easily lead to metal ions penetrating into the polysilicon layer during the formation of the metal electrode, thereby causing a short circuit.

[0005] In addition, the preparation method of the back-contact solar cell of publication number CN117374169B requires two diffusion processes to form N-type doping and P-type doping respectively, and also involves laser modification treatment, etc. The process is relatively complicated, and the patterning process of this preparation method also has problems such as the difficulty in removing the P-type doped polysilicon layer with a high doping concentration in the unmasked area. Summary of the Invention

[0006] The purpose of the present invention is to overcome the deficiencies of the prior art and provide a back-contact photovoltaic cell and its manufacturing method, a photovoltaic module and a photovoltaic power station, so as to achieve low-cost and efficient manufacturing of back-contact photovoltaic cells and improve cell performance and product yield.

[0007] Based on this, the present invention discloses a method for manufacturing a back-contact photovoltaic cell, including the following manufacturing method:

[0008] Step S1, forming a multilayer film including an intrinsic layer, a doping source layer and a mask layer in sequence on a surface of a silicon wafer;

[0009] Step S2: performing a first patterning process to remove the mask layer and the doping source layer in a local area to expose the surface of the intrinsic layer in the patterned area;

[0010] Step S3: thermal diffusion, doping the intrinsic layer in the patterned area, and causing the doping source layer to dope the intrinsic layer in the non-patterned area, and converting the amorphous silicon into polycrystalline silicon, so as to form, after thermal diffusion, a second doped layer in the patterned area, an oxide film formed on the surface of the second doped layer, a first doped layer in the non-patterned area, and a third doped layer on the surface of the first doped layer; wherein the first doped layer and the third doped layer have the same doping polarity, i.e., N-type doping or P-type doping; and the first doped layer and the second doped layer have opposite doping polarities;

[0011] Step S4: performing a second patterning process to form an isolation region that isolates the N-type doping from the P-type doping and exposes the silicon wafer surface;

[0012] Step S5: prepare a passivation layer and an anti-reflection passivation layer on one surface (such as the back surface, i.e., the backlight surface) and the other surface (such as the front surface, i.e., the light-receiving surface) of the silicon wafer, respectively, and then metallize to form metal electrodes.

[0013] Preferably, before step S1, the method further includes the following step: making the surface of the silicon wafer flat by etching.

[0014] Preferably, in step S1, the multilayer film further comprises a tunneling oxide film; and step S1 further comprises: before forming the intrinsic layer, first forming the tunneling oxide film on a surface of the silicon wafer;

[0015] The intrinsic layer is intrinsic polysilicon and / or intrinsic amorphous silicon; the first doped layer, the second doped layer and the third doped layer are doped polysilicon;

[0016] The thermal diffusion in step S3 is boron diffusion, and the doping source layer is phosphorus-doped amorphous silicon; or the thermal diffusion in step S3 is phosphorus diffusion, and the doping source layer is boron-doped amorphous silicon.

[0017] Further preferably, in the step S1, the multilayer film is deposited sequentially using the same deposition equipment.

[0018] Preferably, in step S2, a laser and / or etching solution is used to complete the first patterning process; the laser is an ultraviolet laser or a green laser, and the laser pulse width ranges from femtoseconds to nanoseconds; and the etching solution is an alkaline etching solution.

[0019] Preferably, in step S4, the second patterning width is 50 to 150 microns, and the second patterning process is completed using laser and / or etching liquid; the laser is an ultraviolet laser or a green laser, and the laser pulse width range is from femtoseconds to nanoseconds; the etching liquid includes alkaline etching liquid and acidic etching liquid.

[0020] Further preferably, the step S4 specifically includes: first selectively removing the mask layer and / or oxide film in the contact area between the N-type doping and the P-type doping by laser, then using an alkaline etching solution to remove the exposed N-type doping layer and / or P-type doping layer, and then using an acidic etching solution to remove the remaining mask layer and / or oxide film.

[0021] The present invention further discloses a back-contact photovoltaic cell, which is manufactured using the manufacturing method of the back-contact photovoltaic cell described above in the present invention.

[0022] The present invention also discloses a photovoltaic module, which includes the back-contact photovoltaic cell described above in the present invention.

[0023] The present invention also discloses a photovoltaic power station, which includes the photovoltaic module described above in the present invention.

[0024] Compared with the prior art, the present invention has at least the following beneficial effects:

[0025] The manufacturing method of the back-contact photovoltaic cell of the present invention can continuously complete the preparation of multi-layer films (such as intrinsic layer, doping source layer and mask layer) by using a single deposition process (such as the same deposition equipment), and only requires one mask, combined with the patterning process of the local area before and after thermal diffusion, and combined with a single thermal diffusion treatment process, it can achieve P-type doping and N-type doping in selective areas at one time. Thus, (1) the manufacturing method greatly simplifies the manufacturing process (including the simplification of the patterning process, the multilayer film deposition process and the doping process, etc.), reduces the equipment investment cost and the battery manufacturing cost, improves the battery manufacturing efficiency, and realizes the low-cost and high-efficiency manufacturing of the back-contact photovoltaic cell; (2) the manufacturing method can reduce the patterning area to a minimum, which reduces the material cost and the number of required equipment, and the etching damage to the doped polysilicon layer is small, and the short circuit problem is not easy to occur, thereby improving the product yield of the back-contact photovoltaic cell; (3) the manufacturing method of the present invention, especially its step S2, also avoids the process of patterning the existing P-type doped polysilicon that is difficult to etch, and also forms an isolation area, and can increase the doping concentration of the polysilicon, and can also improve the passivation effect and the metal contact characteristics, which helps to improve the short-circuit current, open-circuit voltage, fill factor and photoelectric conversion efficiency of the battery. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 This is a schematic diagram of the cross-sectional structure of a back-contact photovoltaic cell manufacturing method of the present invention after processing in step 2.

[0027] Figure 2 This is a schematic diagram of the cross-sectional structure of a back-contact photovoltaic cell manufacturing method of the present invention after processing in step 3.

[0028] Figure 3 This is a schematic diagram of the cross-sectional structure of a back-contact photovoltaic cell manufacturing method of the present invention after processing in step 4.

[0029] Figure 4 This is a schematic diagram of the cross-sectional structure of a back-contact photovoltaic cell manufacturing method of the present invention after processing in step 5.

[0030] Figure 5 This is a schematic diagram of the cross-sectional structure of a back-contact photovoltaic cell manufacturing method of the present invention after processing in step 6.

[0031] Figure 6 This is a schematic diagram of the cross-sectional structure of a back-contact photovoltaic cell of the present invention.

[0032] Figure 7 This is a schematic diagram of the cross-sectional structure of a back-contact photovoltaic cell manufacturing method after processing in step 2 of Example 2 of the present invention.

[0033] Figure 8 This is a doping concentration distribution curve of the N-type doping region of the back-contact photovoltaic cell according to Example 2 of the present invention.

[0034] Figure 9 This is a doping concentration distribution curve of the P-type doping region of the back-contact photovoltaic cell according to Example 2 of the present invention.

[0035] Explanation of the accompanying drawings: silicon wafer 11; tunneling oxide film 21; intrinsic polysilicon (or intrinsic amorphous silicon) 31; doping source layer 41; mask layer 51; patterned area 61; P-type doped polysilicon 81; oxide film 91; first N-type doped polysilicon 101; second N-type doped polysilicon 111; isolation region 121; anti-reflection passivation layer 131; passivation layer 141; metal electrode 151; oxide layer 161. DETAILED DESCRIPTION

[0036] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0037] The present invention is a method for manufacturing a back contact photovoltaic cell with a passivation contact structure, see Figure 1-6 , which includes the following manufacturing steps:

[0038] Step 1: Make the surface of the silicon wafer 11 flat by etching.

[0039] Step 2: First, a tunnel oxide film 21 is formed on one surface (such as the back side) of the silicon wafer 11, and then intrinsic polysilicon or intrinsic amorphous silicon 31 is deposited on the back side of the tunnel oxide film 21, and then a doping source layer 41 and a mask layer 51 are formed in sequence on the back side of the intrinsic polysilicon or intrinsic amorphous silicon 31.

[0040] In practice, the layer structure of intrinsic polysilicon or intrinsic amorphous silicon 31 may not be pure intrinsic polysilicon or intrinsic amorphous silicon, but may be a layer structure containing both intrinsic polysilicon and intrinsic amorphous silicon.

[0041] In step 2, the tunnel oxide film 21 is prepared by using LPCVD (low pressure chemical vapor deposition) equipment, controlling the temperature in the range of 550-620°C, and using O2 to oxidize the surface of the silicon wafer 11, thereby preparing a tunnel oxide film 21 with a thickness of 1-2nm (such as 1.5nm). Of course, in addition to being formed by oxidizing the surface of the silicon wafer 11, the tunnel oxide film 21 can also be formed by directly depositing a thin layer of silicon oxide on the surface of the silicon wafer 11. In addition, the method of oxidizing the surface of the silicon wafer 11 can also be achieved by chemical methods such as HNO3, H2O2 or ozone; or by plasma cleaning or high-temperature heat treatment using oxidizing gases such as O2 and N2O.

[0042] The following takes LPCVD equipment as an example to describe in detail the deposition process of the tunnel oxide film 21 , the intrinsic polysilicon or intrinsic amorphous silicon 31 , the doping source layer 41 and the mask layer 51 .

[0043] In step 2, intrinsic polysilicon or intrinsic amorphous silicon 31 is deposited using LPCVD equipment at a temperature of 550° C. to 650° C.

[0044] In step 2, dopant source layer 41 is formed by depositing SiH4 and N-type dopant source PH3 gases within the same LPCVD equipment, with the SiH4:PH3 flow ratio ranging from 10:1 to 20:1. After the deposition of intrinsic amorphous silicon 31, a phosphorus-doped amorphous silicon layer (i.e., dopant source layer 41) is simultaneously deposited within the same LPCVD equipment. The following describes the subsequent steps in detail, using the phosphorus-doped amorphous silicon layer as the dopant source layer 41 as an example.

[0045] Of course, the doping source layer 41 in step 2 can also be changed to a boron-doped amorphous silicon layer. In this case, SiH and P-type doping source BCl3 (or B2H6) are introduced to form a boron-doped amorphous silicon layer, and the gas flow ratio of SiH3:BCl3 is controlled at 10:1 to 20:1.

[0046] In step 2, the mask layer 51 is prepared by depositing SiO2 using LPCVD equipment, and the deposition thickness of the mask layer 51 is 40 to 90 nm.

[0047] It should be noted that, in the present invention, the same LPCVD equipment can be used to continuously deposit multilayer films (such as tunneling oxide film 21, intrinsic amorphous silicon 31, doping source layer 41, mask layer 51). But in fact, each layer of film above step 2 can also be made using other vacuum deposition equipment, such as PECVD (plasma enhanced chemical vapor deposition) or PVD (physical vapor deposition). Regardless of which deposition equipment is used, the present invention preferably uses the same deposition equipment to synchronously form the multilayer films above step 2, which can greatly reduce the preparation cost of the battery, save equipment investment costs, shorten the preparation time, and improve the preparation efficiency of the battery. The structure after processing in step 2 is as follows Figure 1 shown.

[0048] Step 3: Perform a first patterning process to remove the mask layer 51 in a portion (ie, the patterned area 61 ) and the doping source layer 41 below the mask layer 51 in the patterned area 61 to expose the surface of the intrinsic amorphous silicon 31 in the patterned area 61 .

[0049] At this time, the mask layer 51 of the patterned area 61 or the mask layer 51 of the patterned area 61 and part of the doping source layer 41 can be removed by etching solution and / or laser; and the laser can use UV (ultraviolet) or green laser, and the laser pulse width range is femtoseconds to nanoseconds.

[0050] In step 3, the mask layer 51 in the patterned area 61 is removed using a picosecond UV laser with an energy density of 0.5 to 1.2 J / cm 2 .

[0051] In step 3, the chemical etching solution used to remove the doping source layer 41 in the patterned area 61 is an alkaline etching solution. The structure after step 3 is as follows Figure 2 shown.

[0052] Step 4: Use thermal diffusion to perform P-type doping on the intrinsic amorphous silicon 31 in the patterned area 61, and at the same time, use the doping source layer 41 to perform N-type doping on the intrinsic amorphous silicon 31 in the non-patterned area, and convert the amorphous silicon into polycrystalline silicon; therefore, after thermal diffusion, the P-type doped polycrystalline silicon 81 in the patterned area 61, the oxide film 91 located on the surface of the P-type doped polycrystalline silicon 81, and the first N-type doped polycrystalline silicon 101 and the second N-type doped polycrystalline silicon 111 located in the non-patterned area can be formed simultaneously.

[0053] In step 4, the thermal diffusion process is carried out in a diffusion furnace. By supplying BCl3 or BBr3 (P-type doping source) and O2 gas, the intrinsic polysilicon or intrinsic amorphous silicon 31 (such as intrinsic amorphous silicon) exposed in the patterned area 61 is subjected to P-type doping and crystallization to form P-type doped polysilicon 81; and the intrinsic amorphous silicon 31 in the non-patterned area is N-type doped through the doping source layer 41 above it, and forms the first N-type doped polysilicon 101 after crystallization; at the same time, oxygen is introduced to form an oxide film 91 on the surface of the P-type doped polysilicon 81 in the patterned area 61. The thermal diffusion process is carried out at a temperature of 850 to 1000°C. The thickness of the oxide film 91 is in the range of 30nm to 100nm. The structure after processing in step 4 is as follows. Figure 3 shown.

[0054] When the doping source layer 41 prepared in step 2 is changed to a boron-doped amorphous silicon layer, the doping source introduced during the thermal diffusion process in step 4 needs to be changed to POCl3 and O2, and the thermal diffusion temperature condition is controlled at 860-950°C.

[0055] Step 5: Perform a second patterning process to form an isolation region 121 that isolates the N-type doping and the P-type doping and partially exposes the surface of the silicon wafer 11 .

[0056] In step 5, the patterned area is limited to the contact region 121 between the N-type doped polysilicon (e.g., first N-type doped polysilicon 101 and second N-type doped polysilicon 111) and the P-type doped polysilicon 81. Laser or an etching solution is used to remove the mask layer 51 and / or oxide film 91 from a portion of the area (corresponding to the isolation region 121). If a laser is used, the process conditions are the same as those in step 3, and the patterning width is 50 to 150 microns.

[0057] Then, an alkaline solution of NaOH or KOH is used to remove the exposed N-type doped polysilicon and / or P-type doped polysilicon 81. The etching temperature of the alkaline solution is controlled at 45-85°C.

[0058] Finally, the remaining mask layer 51 and oxide film 91 are completely removed with hydrofluoric acid, and the tunnel oxide film 21 in this area is removed to form an isolation region 121 partially exposing the surface of the silicon wafer 11. The structure after step 5 is as follows: Figure 4 shown.

[0059] Step 6: Deposit an anti-reflection passivation layer 131 on the front of the silicon wafer 11, and deposit a passivation layer 141 on the back of the silicon wafer 11 (including the back of the second N-type doped polysilicon 111, the back of the P-type doped polysilicon 81, and the back of the silicon wafer 11 in the isolation area 121).

[0060] The above deposited layers in step 6 can be single-layer films of Al2O3, SiNx, SiO2 or transition metal oxides, or multi-layer films composed of these materials; these deposited layers can be prepared by vacuum deposition methods such as PECVD, PVD or APCVD (atmospheric pressure chemical vapor deposition); the specific details are referred to the existing technology, so they are not described in detail here. The structure after step 6 is as follows Figure 5 shown.

[0061] Step 7: After printing the metal paste, sintering is performed to form the metal electrode 151 (the preparation process of the metal electrode 151 is called metallization). The sintering temperature is controlled within the range of 600-1000°C. The structure after step 7 is as follows: Figure 6 shown.

[0062] After step 7, Figure 6 As shown, a back-contact photovoltaic cell with a passivated contact structure according to the present invention is obtained, comprising: a silicon wafer 11, a tunneling oxide film 21, a first doped layer, and a third doped layer sequentially disposed on a first region on the same surface (e.g., the back surface) of the silicon wafer 11, and a tunneling oxide film 21 and a second doped layer sequentially disposed on a second region on the same surface of the silicon wafer 11. The third region on the same surface of the silicon wafer 11 is an isolation region 121 (e.g., a gap region that exposes the surface of the silicon wafer 11) that physically and / or electrically isolates the first region from the second region. A passivation layer 141 is disposed on the surface (e.g., the back surface) of the third doped layer, the isolation region 121, and the second doped layer, while an anti-reflection passivation layer 131 is disposed on the other surface (e.g., the front surface) of the silicon wafer 11. Metal electrodes 151 are disposed on both the first and second regions, wherein the metal electrode 151 in the first region is in ohmic contact with the third doped layer, and the metal electrode 151 in the second region is in ohmic contact with the second doped layer.

[0063] The passivation contact structure of the first region includes a tunneling oxide film 21 , a first doping layer, and a third doping layer; and the passivation contact structure of the second region includes a tunneling oxide film 21 and a second doping layer.

[0064] In practice, the first doping layer and the third doping layer have the same doping polarity, while the first doping layer and the second doping layer have different doping polarities. For example, when the first doping layer and the third doping layer are N-type doped, the second doping layer is P-type doped, and these isolation regions 121 are all silicon wafer regions without additional doping. In this case, the first region is an N region, the first doping layer is the first N-type doped polysilicon 101, the third doping layer is the second N-type doped polysilicon 111, and the second region is a P region, and the second doping layer is the P-type doped polysilicon 81. For another example, when the first doping layer and the third doping layer are P-type doped, the second doping layer is N-type doped.

[0065] These doped layers (e.g., the first doped layer, the second doped layer, and the third doped layer) are composed of amorphous silicon or polycrystalline silicon, and may also be composed of polycrystalline silicon or amorphous SiC. The total thickness of these doped layers, that is, the total thickness of the first doped layer and the third doped layer having the same polarity, is always greater than the thickness of the second doped layer, while the thickness of the second doped layer may be the same as or thinner than that of the first doped layer.

[0066] In practice, the passivation layer 141 not only protects the underlying doped layers but also electrically isolates the first doped layer (and the third doped layer) from the second doped layer. The passivation layer primarily comprises a single-layer structure of Al2O3, SiNx, or SiO2, or a double-layer or triple-layer structure composed of these materials, and may be stacked with other transition metal oxides or nitrides.

[0067] A photovoltaic module of the present invention includes a back-contact photovoltaic cell prepared according to steps 1 to 7 of the above specific embodiment of the present invention.

[0068] A photovoltaic power station of the present invention includes a photovoltaic module described in the above specific embodiment of the present invention.

[0069] A back-contact photovoltaic cell and a manufacturing method thereof, a photovoltaic module, and a photovoltaic power station according to Examples 1-3 are given below.

[0070] Example 1

[0071] A method for manufacturing a back-contact photovoltaic cell according to this embodiment is described in detail in Figure 1-6 , which includes the following manufacturing steps:

[0072] Step 1: Make the surface of the silicon wafer 11 flat by etching.

[0073] In step 1, a mixed solution of 1.5% NaOH and 500 L of deionized water is used as an etching solution, and the surface of the silicon wafer 11 is etched at 60° C. for 3 minutes.

[0074] Step 2: First, a tunnel oxide film 21 is formed on one surface (such as the back side) of the silicon wafer 11, and then intrinsic polysilicon or intrinsic amorphous silicon 31 is deposited on the back side of the tunnel oxide film 21, and then a doping source layer 41 and a mask layer 51 are formed in sequence on the back side of the intrinsic polysilicon or intrinsic amorphous silicon 31.

[0075] In step 2, the tunnel oxide film 21 is prepared by using LPCVD (low pressure chemical vapor deposition) equipment, preferably at a temperature of 580°C, and oxidizing the surface of the silicon wafer 11 with O2, thereby preparing a tunnel oxide film 21 with a thickness of 1-2nm (such as 1.5nm).

[0076] In step 2, an LPCVD device is used to deposit intrinsic amorphous silicon 31 with a thickness of 200 nm at a temperature of 580° C.; at this time, the SiH 4 gas flow rate is 500 sccm and the deposition pressure is 24 mbar.

[0077] In step 2, the doping source layer 41 is formed by supplying SiH4 and N-type doping source PH3 gas deposition in the same LPCVD equipment, where the flow ratio of SiH4:PH3 is 15:1; the pressure condition is 40mbar, and the temperature is uniformly 580℃.

[0078] In step 2, the mask layer 51 is prepared by depositing SiO2 using LPCVD equipment. The deposition thickness of the mask layer 51 is 70nm, the pressure is 0.5mbar, and the flow ratio of SiH4:O2 is 1:2. The structure after step 2 is as follows Figure 1 shown.

[0079] Step 3: Perform a first patterning process to remove the mask layer 51 in a portion (ie, the patterned area 61 ) and the doping source layer 41 below the mask layer 51 in the patterned area 61 to expose the surface of the intrinsic amorphous silicon 31 in the patterned area 61 .

[0080] In step 3, the mask layer 51 in the patterned area 61 is removed using a picosecond UV laser with an energy density of 0.8 J / cm 2 .

[0081] In step 3, the chemical etching solution used to remove the doping source layer 41 in the patterned area 61 is an alkaline solution of 1.5% NaOH mixed with 500L deionized water, and the etching is performed at a temperature of 60°C. The structure after step 3 is as follows Figure 2 shown.

[0082] Step 4: Use thermal diffusion to perform P-type doping on the intrinsic amorphous silicon 31 in the patterned area 61, and at the same time, use the doping source layer 41 to perform N-type doping on the intrinsic amorphous silicon 31 in the non-patterned area, and convert the amorphous silicon into polycrystalline silicon; therefore, after thermal diffusion, the P-type doped polycrystalline silicon 81 in the patterned area 61 (formed after the intrinsic amorphous silicon 31 in the patterned area 61 is P-type doped and crystallized), the oxide film 91 located on the surface of the P-type doped polycrystalline silicon 81, and the first N-type doped polycrystalline silicon 101 in the non-patterned area (formed after the intrinsic amorphous silicon 31 in the non-patterned area is crystallized by phosphorus doping of the doping source layer 41) and the second N-type doped polycrystalline silicon 111 (formed after the phosphorus in the doping source layer 41 is activated and crystallized) can be simultaneously formed.

[0083] In step 4 of the present invention, the thermal diffusion process is carried out in a diffusion furnace at a pressure of 140 mbar and a temperature of 860°C, wherein the gas flow rate of BCl3 is 500 sccm and the gas flow rate of O2 is 130 sccm. The thickness of the oxide film 91 is 70 nm. The structure after step 4 is as follows Figure 3 shown.

[0084] Step 5: Perform a second patterning process to form an isolation region 121 that isolates the N-type doping and the P-type doping and exposes the surface of the silicon wafer 11 .

[0085] In step 5, a laser is used to remove the mask layer 51 in a portion of the area (corresponding to the isolation area 121). The laser process conditions can refer to the laser process conditions in step 3. The second patterning width is 100 microns. This embodiment uses a picosecond ultraviolet (psec UV) laser with an energy density of 1.06 mJ / cm 2 , the frequency is 1MHz. Then, the N-type doped polysilicon is exposed with NaOH solution; at this time, the etching temperature of the alkaline solution is controlled at 80℃, and the mass ratio of NaOH to deionized water is 1:100. Finally, hydrofluoric acid is used to completely remove the remaining mask layer 51 and oxide film 91, and the tunnel oxide film 21 in this part of the area is removed to form an isolation region 121 that exposes the surface of the silicon wafer 11. The structure after step 5 is as follows Figure 4 shown.

[0086] Step 6: Deposit an anti-reflection passivation layer 131 on the front of the silicon wafer 11, and deposit a passivation layer 141 on the back of the silicon wafer 11 (including the back of the second N-type doped polysilicon 111, the back of the P-type doped polysilicon 81, and the back of the silicon wafer 11 in the isolation region 121). The structure after step 6 is as follows: Figure 5 shown.

[0087] Step 7: After printing the metal paste, sintering is performed to form the metal electrode 151. The sintering peak temperature is 730°C. After step 7, the following can be obtained: Figure 6 A back-contact photovoltaic cell of this embodiment is shown.

[0088] A photovoltaic module of this embodiment includes a back-contact photovoltaic cell prepared according to steps 1 to 7 of this embodiment.

[0089] A photovoltaic power station of this embodiment includes the photovoltaic module described above in this embodiment.

[0090] Example 2

[0091] The back-contact photovoltaic cell and its manufacturing method, photovoltaic module, and photovoltaic power station of this embodiment are all based on Example 1. The difference between this embodiment and Example 1 is that:

[0092] In step 2, after depositing the intrinsic amorphous silicon 31 and before depositing the doping source layer 41, a 5-10 nm (5 nm is recommended) thick oxide layer 161 (such as Figure 7 In practice, the oxide layer 161 can be prepared by vacuum deposition processes such as LPCVD, PVD or PECVD, and can be continuously deposited in the same deposition process as the intrinsic amorphous silicon 31.

[0093] Specifically, in this embodiment, LPCVD equipment is used to introduce SiH4 gas at 580°C to deposit 200nm thick intrinsic amorphous silicon 31, and then SiH4 and O2 are introduced simultaneously to deposit SiO2 oxide layer 161. The gas flow ratio of O2 to SiH4 is controlled at 1:1 to 1:3 (such as 1:2), and the deposition temperature is maintained unchanged.

[0094] The oxide layer 161 is formed to protect the intrinsic amorphous silicon 31 from being damaged by the alkaline solution during the first patterning process.

[0095] Example 3

[0096] The back-contact photovoltaic cell and its manufacturing method, photovoltaic module, and photovoltaic power station of this embodiment are all based on Example 1. The difference between this embodiment and Example 1 is that:

[0097] During step 2 of depositing the doping source layer 41 , SiH 4 and a P-type doping source BCl 3 are introduced to form a boron-doped amorphous silicon layer as the doping source layer 41 of this embodiment, and the gas flow ratio of SiH 4 :BCl 3 is 20:1.

[0098] In step 4, the doping sources introduced during the thermal diffusion process are changed to POCl3 and O2, and the thermal diffusion temperature is 900°C.

[0099] Performance Testing

[0100] The doping characteristics of the sample of Example 2 were analyzed using ECV (an electrochemical analysis tester). Example 2 deposits phosphorus-doped amorphous silicon as an N-type doping source layer to achieve N-type doping of the underlying intrinsic polycrystalline silicon or intrinsic amorphous silicon (such as intrinsic amorphous silicon). The mask layer and the doping source layer in some areas are then removed through a patterning process in order to expose the intrinsic amorphous silicon in the non-patterned area so that the non-patterned area can be doped with P-type by subsequent thermal diffusion. Then, in a single thermal diffusion process, in order to perform P-type doping on the intrinsic amorphous silicon in the non-patterned area, BCl3 and O2 are used, and the process temperature is 860-950°C (such as 860°C); high-temperature heat treatment is used to efficiently diffuse the phosphorus in the N-type doping source layer into the underlying intrinsic amorphous silicon, and at the same time, the crystallization of the amorphous silicon is achieved to form an N-type doping layer with a high doping concentration (such as Figure 8At the same time, the intrinsic amorphous silicon in the patterned area is also successfully P-type doped and crystallized to form a high-doping concentration P-type doped polysilicon 81 (as shown in the first N-type doped polysilicon 101 and the second N-type doped polysilicon 111). Figure 9 shown).

[0101] In summary, the manufacturing method of a back-contact photovoltaic cell of embodiments 1-3 of the present invention can continuously deposit multiple layers of films (such as a tunneling oxide film 21, an intrinsic amorphous silicon 31, a doping source layer 41, and a mask layer 51) by using the same deposition equipment (such as an LPCVD equipment), and only requires one mask, and cooperates with the patterning process of the local area before and after thermal diffusion, and cooperates with a single thermal diffusion treatment to simultaneously achieve P-type doping and N-type doping in the selective area; (1) This greatly simplifies the manufacturing process, reduces the equipment investment cost and the battery manufacturing cost, and improves the manufacturing efficiency of the battery; (2) The patterning area is reduced, the etching damage to the doped polysilicon layer is small, and there will be no short circuit and other problems, and the product yield is high; (3) The manufacturing method of the present invention, especially its step 3, also avoids the process of patterning the existing P-type doped polysilicon that is difficult to etch, and also forms an isolation area, which can increase the doping concentration of the polysilicon, and improve the passivation effect and metal contact characteristics, which helps to improve the short-circuit current, open-circuit voltage, fill factor and photoelectric conversion efficiency of the battery.

[0102] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they become aware of the basic creative concepts. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0103] The technical solution provided by the present invention is introduced in detail above. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of the present invention, there may be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A method for manufacturing a back-contact photovoltaic cell, characterized in that: The invention comprises the following manufacturing methods: Step S1, forming a multilayer film including an intrinsic layer, a doping source layer and a mask layer in sequence on a surface of a silicon wafer; Step S2: performing a first patterning process to remove the mask layer and the doping source layer in a local area to expose the surface of the intrinsic layer in the patterned area; Step S3: thermal diffusion, doping the intrinsic layer in the patterned area, and causing the doping source layer to dope the intrinsic layer in the non-patterned area, and converting the amorphous silicon into polycrystalline silicon, so as to form, after thermal diffusion, a second doped layer in the patterned area, an oxide film formed on the surface of the second doped layer, a first doped layer in the non-patterned area, and a third doped layer on the surface of the first doped layer; wherein the first doped layer and the third doped layer have the same doping polarity, i.e., N-type doping or P-type doping; and the first doped layer and the second doped layer have opposite doping polarities; Step S4: performing a second patterning process to form an isolation region that isolates the N-type doping from the P-type doping and exposes the silicon wafer surface; Step S5: preparing a passivation layer or an anti-reflection passivation layer on the surface of the silicon wafer, and metallizing it to form a metal electrode.

2. The method for manufacturing a back-contact photovoltaic cell according to claim 1, wherein: Before step S1, the following step is also included: etching to make the surface of the silicon wafer flat.

3. The method for manufacturing a back-contact photovoltaic cell according to claim 1, wherein: In the step S1, the multilayer film further includes a tunneling oxide film; the step S1 further includes: before forming the intrinsic layer, first forming the tunneling oxide film on a surface of the silicon wafer; The intrinsic layer is intrinsic polysilicon and / or intrinsic amorphous silicon; the first doped layer, the second doped layer and the third doped layer are doped polysilicon; The thermal diffusion in step S3 is boron diffusion, and the doping source layer is phosphorus-doped amorphous silicon; or the thermal diffusion in step S3 is phosphorus diffusion, and the doping source layer is boron-doped amorphous silicon.

4. A method for manufacturing a back-contact photovoltaic cell according to claim 1 or 3, characterized in that: In the step S1, the multilayer film is deposited sequentially using the same deposition equipment.

5. The method for manufacturing a back-contact photovoltaic cell according to claim 1, wherein: In step S2, a first patterning process is completed using a laser and / or an etching solution; the laser is an ultraviolet laser or a green laser, and the laser pulse width ranges from femtoseconds to nanoseconds; and the etching solution is an alkaline etching solution.

6. The method for manufacturing a back-contact photovoltaic cell according to claim 1, wherein: In step S4, the second patterning width is 50 to 150 microns, and the second patterning process is completed using laser and / or etching liquid; the laser is an ultraviolet laser or a green laser, and the laser pulse width ranges from femtoseconds to nanoseconds; the etching liquid includes alkaline etching liquid and acidic etching liquid.

7. The method for manufacturing a back-contact photovoltaic cell according to claim 6, characterized in that: The step S4 specifically includes: firstly selectively removing the mask layer and / or oxide film in the contact area between the N-type doping and the P-type doping by laser, then using an alkaline etching solution to remove the exposed N-type doping layer and / or P-type doping layer, and then using an acidic etching solution to remove the remaining mask layer and / or oxide film.

8. A back contact photovoltaic cell, characterized in that: It is manufactured by the method for manufacturing a back-contact photovoltaic cell according to any one of claims 1 to 7.

9. A photovoltaic module, characterized in that: It includes a back-contact photovoltaic cell as described in claim 8.

10. A photovoltaic power station, characterized in that: It includes the photovoltaic module described in claim 9.

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