Test equipment and system

Abstract

The embodiment of the invention provides test equipment and system, and the test equipment comprises a database module which is configured to store expected data; the comparison module is configured to compare the expected data with the test data to obtain a comparison result, and the expected data corresponds to the comparison result; the data selection module is configured to determine the matching relation of the comparison results according to the expected data and the corresponding relation between the expected data and the comparison results; and the plurality of counting storage modules are configured to count the matched comparison results according to the matching relationship so as to obtain failure bit counting results and store the failure bit counting results. According to the test equipment and system provided by the invention, the test efficiency can be improved.

Description

Technical Field

[0001] The present application relates to the field of chip testing technology, and in particular to a testing device and system. Background Art

[0002] Random Data Testing comprehensively evaluates the unit durability and crosstalk characteristics of the memory under dynamic stress conditions by simulating random read and write operations in real user scenarios. Fixed pattern testing is a method of statistically analyzing the corresponding failure bit ratios for different fixed data patterns to evaluate the reliability of the memory under different data write / read conditions. Since the requirements of fixed pattern testing conflict with those of random data testing, the two fixed data of all 0 or all 1 need to be tested separately during the test process, and then the reliability of the random test is indirectly evaluated by statistically obtaining the FBC (Fail Bit Count) information in the all-0 state and the all-1 state, which increases the test time. Summary of the Invention

[0003] The embodiments of the present application provide a testing device and system that can shorten the testing time and improve the testing efficiency.

[0004] In a first aspect, this embodiment provides a testing device, including:

[0005] a database module configured to store desired data;

[0006] a comparison module configured to compare the expected data with the test data to obtain a comparison result, the expected data corresponding to the comparison result;

[0007] a data selection module configured to determine a matching relationship of the comparison results based on the expected data and the corresponding relationship between the expected data and the comparison results;

[0008] The plurality of counting and storing modules are configured to count the matching comparison results according to the matching relationship to obtain and store the failure bit counting results.

[0009] In some embodiments, the expected data includes an N-digit first value, the comparison result includes an N-digit second value, and the first value and the second value at the same digit have a first digit correspondence relationship;

[0010] The data selection module is configured to select a target counting storage module from multiple counting storage modules according to the first value, and match the target counting storage module with the second value according to the first digit correspondence to obtain a matching relationship between the target counting storage module and the second value.

[0011] In some embodiments, the data selection module includes a selection unit and N connection units, each connection unit is used to obtain a first value and a second value;

[0012] The selection unit is configured to select a corresponding target counting storage module for the connection unit from a plurality of counting storage modules according to the first value.

[0013] The connection unit is configured to be coupled to the target counting storage module and transmit the second value corresponding to the connection unit to the target counting storage module to obtain a matching relationship.

[0014] In some embodiments, when the expected data is binary data, the first value includes a first digit and a second digit, and the counting storage module includes a first counting storage module and a second counting storage module;

[0015] The first counting storage module is configured to count the second value corresponding to the first code to obtain and store a first failure bit counting result;

[0016] The second counting storage module is configured to count a second value corresponding to the second code to obtain a second failure bit counting result.

[0017] In some embodiments, the counting storage module includes a counting unit and a storage unit correspondingly connected to the counting unit;

[0018] The counting unit is configured to count the matched second values to obtain a failure bit counting result corresponding to the first value;

[0019] The storage unit is configured to store a fail bit counting result.

[0020] In some embodiments, the test data includes an N-digit third value, the first value and the third value at the same digit have a second digit correspondence relationship, and the second value includes a first comparison state and a second comparison state;

[0021] The comparison module is configured to perform a failed bit comparison on the third value and the first value on each digit according to the second digit correspondence; when the third value is the same as the first value, a first comparison state is obtained; when the third value is different from the first value, a second comparison state is obtained.

[0022] In some embodiments, the test device further includes a command generation and transmission module, the command generation and transmission module being configured to generate a data read command according to the first configuration parameter and transmit the command to the memory under test, wherein the test data is data read by the memory under test in response to the data read command;

[0023] Alternatively, a data write command is generated according to the second configuration parameter and transmitted to the memory to be tested, wherein the data write command includes expected data;

[0024] Wherein, the first configuration parameter and the second configuration parameter are both obtained from the test controller.

[0025] In some embodiments, the expected data is a random number.

[0026] On the other hand, an embodiment of the present application further provides a test system, comprising the test device as described above and a memory to be tested, wherein the test device is coupled to the memory to be tested;

[0027] The memory under test is configured to send test data obtained by reading to the test equipment in response to a data read instruction, where the data read instruction is generated by the test equipment.

[0028] In some embodiments, the test system further includes a test controller coupled to the test device, the test controller being configured to output the first configuration file and the second configuration file;

[0029] The test device is configured to generate a data read command according to the first configuration file, or to generate a data write command according to the second configuration file, wherein the data write command includes expected data.

[0030] The test device and system provided in this embodiment match the comparison result with the counting storage module through the data selection module. The counting storage module counts each of the matched comparison results according to the matching relationship, thereby obtaining the failure bit count results under different numerical values. In other words, when the expected data is a random number, the test device provided by this application can simultaneously record the failure bit count information corresponding to "0" and the failure bit count information corresponding to "1", meeting the needs of fixed pattern testing and random data testing. There is no need to help the test device distinguish between "0" and "1" data streams through separate tests of all "0" and all "1". This not only simulates real user scenario testing, but also greatly saves test time and improves test efficiency. In addition, the failure bit count corresponding to "0" and the failure bit count corresponding to "1" are completed by the test device alone, without the help of the test controller, saving communication overhead and time between the test controller and the test device. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0032] Figure 1 This is one of the structural diagrams of the testing equipment provided in some embodiments of the present application;

[0033] Figure 2 This is the second structural diagram of the testing device provided in some embodiments of the present application;

[0034] Figure 3 This is the third structural diagram of the testing device provided in some embodiments of the present application;

[0035] Figure 4 It is a structural diagram of the test system provided in some embodiments of the present application.

[0036] Description of reference numerals:

[0037] 1. Test equipment; 10. Database module; 20. Comparison module; 30. Data selection module; 40. Counting storage module; 301. Selection unit; 302. Connection unit; 401. First counting storage module; 402. Second counting storage module; 4011. First counting unit; 4012. First storage unit; 4021. Second counting unit; 4022. Second storage unit; 2. Memory to be tested; 3. Test controller. DETAILED DESCRIPTION

[0038] Fixed-pattern testing requires analyzing failure sensitivity under specific data patterns, for example, by recording FBC information for all-0 or all-1 states. Random data testing, on the other hand, evaluates the overall reliability of random data by recording overall FBC information, without distinguishing between FBC for "0" and "1" states. Therefore, these two requirements conflict. Currently, the underlying hardware of test equipment cannot distinguish between data streams of "0" and "1" and instead records overall FBC information. While this meets the requirements of random data testing, it requires separate fixed-pattern testing for all-0 and all-1 states, significantly increasing test time. To address this issue, some test equipment transmits the expected data and test data to be compared to a test controller connected to the test equipment. The upper-layer software in the test controller compares the expected and test data and records the FBC information for "0" and "1." However, in the process of recording the FBC information of "0" and "1" with the help of the test controller, since the test data and the expected data will include a large amount of invalid information, this will put pressure on the communication between the test equipment and the test controller, and increase the communication time cost, which in turn increases the test time and leads to low test efficiency.

[0039] In view of this, an embodiment of the present application provides a test device and system, wherein the test device matches the comparison result with the counting storage module through the data selection module, and the counting storage module counts the matched comparison results according to the matching relationship, thereby obtaining the failure bit counting results under different numerical values. That is to say, when the expected data is a random number, the test device provided by the present application can simultaneously record the failure bit counting information corresponding to "0" and the failure bit counting information corresponding to "1", meeting the needs of fixed pattern testing and random data testing. There is no need to help the test device distinguish between the data streams of "0" or "1" through separate testing of all "0" and all "1". It can not only simulate real user scenario testing, but also greatly save test time and improve test efficiency. In addition, the failure bit counting corresponding to "0" and the failure bit counting corresponding to "1" are completed by the test device alone, without the need to rely on the test controller, saving the communication overhead and time between the test controller and the test device.

[0040] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without making creative efforts are within the scope of protection of this application.

[0041] In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more features. In the description of the present application, "multiple" means two or more, unless otherwise clearly and specifically defined.

[0042] “A and / or B” includes the following three combinations: A only, B only, and a combination of A and B.

[0043] The use of "suitable for" or "configured to" in this application is intended to be open and inclusive language, and does not exclude devices that are adapted or configured to perform additional tasks or steps. In addition, the use of "based on" is intended to be open and inclusive, as a process, step, calculation, or other action that is "based on" one or more conditions or values may, in practice, be based on additional conditions or values beyond these.

[0044] In this application, the word "exemplary" is used to mean "serving as an example, illustration, or illustration." Any embodiment described in this application as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments. The following description is given to enable any person skilled in the art to implement and use the present application. In the following description, details are listed for the purpose of explanation. It should be understood that one of ordinary skill in the art can recognize that the present application can be implemented without using these specific details. In other instances, well-known structures and processes are not elaborated in detail to avoid obscuring the description of the present application with unnecessary details. Therefore, the present application is not intended to be limited to the embodiments shown, but is consistent with the widest scope consistent with the principles and features disclosed in this application.

[0045] On the one hand, this embodiment provides a testing device 1, such as Figure 1 As shown, the test device 1 includes a database module 10, a comparison module 20, a data selection module 30, and a plurality of count storage modules 40. The database module 10 is connected to the comparison module 20 and the data selection module 30, respectively. The comparison module 20 is connected to the data selection module 30, and the data selection module 30 is further connected to the plurality of count storage modules 40.

[0046] Among them, the database module 10 (Data Base Management, DBM) is configured to store expected data; the comparison module 20 is configured to compare the expected data with the test data to obtain a comparison result, and the expected data corresponds to the comparison result; the data selection module 30 is configured to obtain a matching relationship between the comparison result and the counting storage module 40 based on the expected data and the corresponding relationship between the expected data and the comparison result; multiple counting storage modules 40 are configured to count the matching comparison results according to the matching relationship to obtain and store the failure bit counting result.

[0047] The expected data can be a random data stream generated in a random mode or preset data in a fixed mode. The test data is the data read from the memory under test 2. The test data is pre-written into the memory under test 2 by the test device 1 based on the expected data. Therefore, under ideal conditions, the test data completely corresponds to the expected data. However, in actual testing, due to factors such as the physical characteristics of the memory under test 2, process deviations, aging effects, and external environmental interference, differences may occur between the test data and the expected data. By analyzing these differences, the performance evaluation of the memory under test 2 is completed.

[0048] The comparison module 20 is used to compare the differences between the test data and the expected data and output the comparison result. The comparison result includes two comparison states: the test data matches the expected data and the test data does not match. The correspondence between the comparison result and the expected data means that the digits of the comparison result correspond one-to-one with the digits of the expected data. Schematically, if the expected data is 100, the test data is 101, and the comparison result is 001, then the 0th bit "0" in the expected data corresponds to the 0th bit "1" in the comparison result. Similarly, the "0" at the 1st bit corresponds to "0", and the "1" at the 2nd bit corresponds to "0". It can be understood that "0" in the comparison result means that the expected data matches the test data, and "1" means that the two data do not match.

[0049] The data selection module 30 matches different counting storage modules 40 to the values at different digits of the comparison result according to the expected data and the first digit correspondence between the expected data and the comparison result, thereby outputting the matching relationship between the comparison result and the counting storage module 40 .

[0050] Each counting storage module 40 is used to count and store comparison results for a specific value. The specific value here is determined based on the value range of the expected data. For example, when the expected data is binary data, since the value of each digit of the expected data is either "0" or "1", the specific value is also "0" and "1". Based on this, there are two counting storage modules 40: one for counting and storing matching results for the expected data value of "0", and the other for counting and storing matching results for the expected data value of "1". It can be understood that each counting storage module 40 stores a failure bit count result, and each failure bit count result corresponds to a specific value. Based on the above example, in the "0" and "1" states, the failure bit count results are "0" and "1".

[0051] The test device 1 provided in the embodiment of the present application matches the comparison result with the counting storage module 40 through the data selection module 30. The counting storage module 40 counts the matched comparison results according to the matching relationship, thereby obtaining the failure bit count results under different numerical values. That is, when the expected data is a random number, the test device 1 provided in the present application can simultaneously record the failure bit count information corresponding to "0" and the failure bit count information corresponding to "1", meeting the needs of fixed pattern testing and random data testing. There is no need to help the test device 1 distinguish between "0" and "1" data streams through separate tests of all "0" and all "1". It can not only simulate real user scenario testing, but also greatly save test time and improve test efficiency. In addition, the failure bit count corresponding to "0" and the failure bit count corresponding to "1" are completed by the test device 1 alone, without the need for the test controller 3 to complete, saving the communication overhead and time between the test controller 3 and the test device 1. In addition, the test device 1 provided in the embodiment of the present application is also applicable to fixed mode.

[0052] In some embodiments, the expected data includes an N-bit first value, and the comparison result includes an N-bit second value. There is a digit-by-digit correspondence between the first value and the second value at the same digit. It is understood that the range of the first value depends on the data encoding format of the expected data. In binary, the first value is "0" or "1." In decimal, the first value ranges from 0 to 9, for a total of 10 possible states. The following embodiments use binary as an example for illustration. The second value has only two states: one in which the expected data matches the test data, and one in which they do not match. The second values in the matching and non-matching states can be set, for example, the second value can be 0 in the matching state and 1 in the non-matching state; or the second value can be 0 in the matching state and 2 in the non-matching state, and so on. The following embodiments use the second value being 0 in the matching state and 1 in the non-matching state as an example. The N-bit first values in the expected data can be the same or different in magnitude, and the N-bit second values in the comparison result can be the same or different in magnitude.

[0053] The data selection module 30 is configured to select a target counting storage module from multiple counting storage modules 40 according to the first value, and match the target counting storage module with the second value according to the first digit correspondence to obtain a matching relationship between the target counting storage module and the second value.

[0054] That is, the data selection module 30 selects a counting storage module 40 for each digit based on the magnitude of the first numerical value, thereby establishing a correspondence between the first numerical value and the target counting storage module. Illustratively, when the expected data is binary data, there are two counting storage modules 40: one for counting failed bits of "0" and the other for counting failed bits of "1." When the first numerical value is "0," the digit corresponding to the first numerical value corresponds to the target counting storage module for counting failed bits of "0." When the first numerical value is "0," the digit corresponding to the first numerical value corresponds to the target counting storage module for counting failed bits of "1." Taking the data shown in Table 1 as an example, the expected data, test data, and comparison result all have 8 bits. Bits 0, 3, 6, and 7 of the expected data, which have a value of 1, correspond to counting storage module "1," while bits 1, 2, 4, and 5 of the expected data, which have a value of 0, correspond to counting storage module "0." Data selection module 30 matches the second value of the same digit with the target counting module based on the first digit correspondence to obtain a matching relationship between the second value and the target counting storage module. Taking Table 1 as an example, the second values of digits 0, 3, 6, and 7 in the comparison result match the counting storage module "1", and the second values of digits 1, 2, 4, and 5 in the comparison result match the counting storage module "0". The target counting storage module counts the matched second values. The counting storage module "0" obtains a count of 1 for the failed bit "0", and the counting storage module "1" obtains a count of 1 for the failed bit "1".

[0055] Table 1 Data corresponding schematic table

[0056]

[0057]

[0058] The test device 1 provided in the embodiment of the present application realizes the diversion of failure bit data of different values through the data selection module 30, so that the counting storage module 40 can perform failure bit counting separately, and finally obtain failure bit counting results of different values at the same time, without the need for separate testing and without the need for the test controller 3, thereby greatly improving the test efficiency.

[0059] In some embodiments, as Figure 2 as well as Figure 3 As shown, the data selection module 30 includes a selection unit 301 and N connection units 302 . Each connection unit 302 is used to obtain a first value and a second value. That is, each connection unit 302 obtains a first value and a second value of the same digit.

[0060] The selection unit 301 is configured to select a corresponding target counting storage module for the connection unit 302 from the plurality of counting storage modules 40 according to the first value.

[0061] The connection unit 302 is configured to be coupled to the target count storage module and transmit the second value corresponding to the connection unit 302 to the target count storage module to obtain a matching relationship.

[0062] That is, the connection between the connection unit 302 and the corresponding counting storage module 40 is achieved according to the first value, and then the second value corresponding to the connection unit 302 is separately transmitted to the corresponding counting storage module 40, thereby achieving failure bit counting of different values. Figure 3 As shown, the expected data has an 8-bit first value DBM[7:0], and the comparison result has an 8-bit second value D[7:0]. There are also 8 corresponding connection units 302, and each connection unit 302 obtains the first value and second value under the same digit. Taking the data in Table 1 as an example, the connection units 302 at the 1st, 2nd, 4th, and 5th bits are coupled to the counting storage module "0", and the connection units 302 at the 0th, 3rd, 6th, and 7th bits are coupled to the counting storage module "1". Through the above coupling, a matching relationship between the target counting storage module and the second value is obtained. It can be understood that the coupling relationship between the connection unit 302 and the counting storage module 40 changes in real time as the expected data changes. The number of connection units 302 is the same as the number of first values in the expected number.

[0063] The test device 1 provided in the embodiment of the present application realizes the coupling of the connection unit 302 and the target count storage module through the selection unit 301, thereby realizing the diversion of the comparison results. This not only improves the test efficiency, but also only requires adding a data selection module 30 including the selection unit 301 and the connection unit 302 to the test device 1 to realize data flow differentiation, thereby reducing the cost and difficulty caused by the modification of the test device 1.

[0064] In some embodiments, when the expected data is binary data, the first value includes a first digital number "0" and a second digital number "1", and the counting storage module 40 includes a first counting storage module 401 and a second counting storage module 402. In other words, the counting storage module 40 is determined based on the value range of the first value. If the first value is "0" or "1", the counting storage module 40 has two counting storage modules; if the first value is between 0 and 9, the counting storage module 40 has ten counting storage modules.

[0065] The first counting storage module 401 is configured to count the second value corresponding to the first code to obtain a first failure bit count result; the second counting storage module 402 is configured to count the second value corresponding to the second code to obtain a second failure bit count result. In other words, the first counting storage module 401 is used to count the failure bits of "0", and the second counting storage module 402 is used to count the failure bits of "1".

[0066] The test device 1 provided in the embodiment of the present application uses a first counting storage module 401 to count "0" failure bits and a second counting storage module 402 to count "1" failure bits. This allows the impact of "0" on the memory under test 2 to be evaluated based on the "0" failure bit information, and the impact of "1" on the memory under test 2 to be evaluated based on the "1" failure bit information. Simultaneously, the cell endurance and crosstalk characteristics of the memory under test 2 under dynamic stress conditions can be analyzed based on the total failure bit information of "0" and "1." Therefore, the test device 1 provided in the embodiment of the present application can simultaneously meet the requirements of fixed pattern testing and random data testing. Furthermore, when the expected data is a random number, the test device 1 provided in the embodiment of the present application can complete the threshold voltage (VT) acquisition for both the Set and Reset operations, eliminating the need to separately collect VT data sets after testing for both operations. This reduces the VT data set acquisition time by half, significantly improving efficiency. The Set operation switches a memory cell in the memory under test 2 from a high-resistance state to a low-resistance state, which corresponds to a lower threshold voltage VT, corresponding to a binary "1." In contrast, a reset operation switches the memory cell from a low-resistance state to a high-resistance state (HRS), which increases the threshold voltage (VT) corresponding to a binary "0." VT data is used to evaluate the electrical characteristics and reliability of the memory cell.

[0067] In some embodiments, the counting storage module 40 includes a counting unit and a storage unit connected to the counting unit. That is, each counting storage module 40 includes a counting unit and a storage unit, and the counting unit is connected to the storage unit. Figure 3 As shown in the example, the first counting storage module 401 includes a first counting unit 4011 and a first storage unit 4012 ; the second counting storage module 402 includes a second counting unit 4021 and a second storage unit 4022 .

[0068] The counting unit is configured to count the matched second values to obtain a failure bit counting result corresponding to the first value. The storage unit is configured to store the failure bit counting result.

[0069] In some embodiments, the test data includes an N-bit third value, and the first value and the third value at the same digit have a second digit correspondence relationship. The second value includes a first comparison state and a second comparison state, where the first comparison state can be represented by "0" and the second comparison state can be represented by "1". In other embodiments of the present application, other values or forms can also be used.

[0070] The comparison module 20 is configured to perform a failed bit comparison on the third value and the first value on each digit according to the second digit correspondence; when the third value is the same as the first value, a first comparison state is obtained; when the third value is different from the first value, a second comparison state is obtained.

[0071] In some embodiments, the test device 1 also includes a command generation and transmission module, which is configured to generate a data read command according to a first configuration parameter and transmit it to the memory to be tested 2, where the test data is the data read by the memory to be tested 2 in response to the data read command; or, generate a data write command according to a second configuration parameter and transmit it to the memory to be tested 2, where the data write command includes expected data.

[0072] The first configuration parameters and the second configuration parameters are both obtained from the test controller 3. The first configuration parameters include initialization parameters such as the communication protocol, clock frequency, and power supply voltage of the initialization test device 1. The second configuration parameters include parameters of the data mode and the write address.

[0073] In some examples, the command generation and transmission module includes an ALPG (Algorithmic Pattern Generator) unit, a TG (Timing Generator) unit, and a WF (Waveform Formatter) unit. Taking data reading as an example, after obtaining the first configuration parameter, the ALPG unit generates a target physical address and an operation code according to the preconfigured address mode. The TG unit inserts the necessary delay after the target physical address is valid in combination with the timing specification of the memory protocol, and generates a command scheduling table accurate to the clock cycle. The WF unit converts the digital read command into a physical layer signal according to the interface protocol and the scheduling command timing output by the TG unit, and adds a check bit or pre-emphasis compensation to finally form a data read command. Similarly, the data write command is generated based on the ALPG unit, the TG unit, and the WF unit, which will not be repeated here.

[0074] On the other hand, this embodiment also provides a testing system, such as Figure 4As shown, the test system includes a test device 1 , a memory to be tested 2 , and a test controller 3 . The test controller 3 is coupled to the test device 1 , and the test device 1 is coupled to the memory to be tested 2 .

[0075] The test controller 3 is configured to output a first configuration file and a second configuration file.

[0076] The test device 1 is configured to generate a data read command according to the first configuration file, or to generate a data write command according to the second configuration file, wherein the data write command includes expected data.

[0077] The memory under test 2 is configured to send the test data obtained by reading to the test device 1 in response to a data read instruction sent by the test device 1. The memory under test 2 is also configured to write expected data in response to a data write command sent by the test device 1.

[0078] In addition, the test device 1 includes a database module 10, a comparison module 20, a data selection module 30, and multiple count storage modules 40. The multiple count storage modules 40 are connected to the test controller 3, and the count storage modules 40 send the recorded failed bit count results to the test controller 3. In addition, the comparison module 20 is also connected to the memory under test 2, and the comparison module 20 reads test data from the memory under test 2.

[0079] Among them, the database module 10 is configured to store expected data; the comparison module 20 is configured to compare the expected data with the test data to obtain a comparison result, and the expected data corresponds to the comparison result; the data selection module 30 is configured to obtain a matching relationship between the comparison result and the counting storage module 40 based on the expected data and the correspondence between the expected data and the comparison result; multiple counting storage modules 40 are configured to count the matching comparison results according to the matching relationship to obtain and store the failure bit counting result.

[0080] The test system provided in the embodiment of the present application implements "0" failure bit counting and "1" failure bit counting through the test device 1, without the need for separate testing and without the need for the test controller 3, thereby improving test efficiency.

[0081] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0082] The above is a detailed introduction to a test device 1 and system provided in the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for technical personnel in this field, based on the ideas of the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A testing device, characterized in that: include: a database module configured to store desired data; a comparison module configured to compare the expected data with the test data to obtain a comparison result, the expected data corresponding to the comparison result; a data selection module configured to determine a matching relationship of the comparison result according to the expected data and a corresponding relationship between the expected data and the comparison result; A plurality of counting and storing modules are configured to count the matching comparison results according to the matching relationship to obtain and store the failure bit counting results.

2. The testing device according to claim 1, characterized in that The expected data includes an N-digit first value, the comparison result includes an N-digit second value, and the first value and the second value at the same digit have a first digit correspondence relationship; The data selection module is configured to select a target count storage module from the multiple count storage modules according to the first numerical value, and match the target count storage module with the second numerical value according to the first digit correspondence to obtain a matching relationship between the target count storage module and the second numerical value.

3. The testing device according to claim 2, characterized in that The data selection module includes a selection unit and N connection units, each of the connection units is used to obtain a first value and a second value; The selection unit is configured to select a corresponding target counting storage module for the connection unit from the plurality of counting storage modules according to the first value; The connection unit is configured to be coupled to the target counting storage module and transmit the second value corresponding to the connection unit to the target counting storage module to obtain the matching relationship.

4. The testing device according to claim 2, characterized in that In the case where the expected data is binary data, the first value includes a first digital number and a second digital number, and the counting storage module includes a first counting storage module and a second counting storage module; The first counting storage module is configured to count a second value corresponding to the first digital number to obtain and store a first failure bit counting result; The second counting storage module is configured to count a second value corresponding to the second digital number to obtain a second failure bit counting result.

5. The testing device according to claim 2, characterized in that The counting storage module includes a counting unit and a storage unit correspondingly connected to the counting unit; The counting unit is configured to count the matched second values to obtain a failure bit counting result corresponding to the first value; The storage unit is configured to store the fail bit counting result.

6. The testing device according to claim 2, characterized in that The test data includes an N-digit third value, the first value and the third value at the same digit have a second digit correspondence relationship, and the second value includes a first comparison state and a second comparison state; The comparison module is configured to perform a failed bit comparison on the third value of each digit with the first value according to the second digit correspondence; and obtain the first comparison state when the third value is the same as the first value; In case the third value is different from the first value, the second comparison state is obtained.

7. The testing device according to claim 1, characterized in that The test device further includes a command generation and transmission module, wherein the command generation and transmission module is configured to generate a data read command according to a first configuration parameter and transmit the command to the memory under test, wherein the test data is data read by the memory under test in response to the data read command; Alternatively, a data write command is generated according to the second configuration parameter and transmitted to the memory to be tested, wherein the data write command includes the expected data; The first configuration parameter and the second configuration parameter are both obtained from a test controller.

8. The testing device according to any one of claims 1 to 7, characterized in that: The expected data is a random number.

9. A testing system, characterized in that: The device comprises the test device according to any one of claims 1 to 8 and a memory to be tested, wherein the test device is coupled to the memory to be tested; The memory under test is configured to send test data obtained by reading to the test device in response to a data read instruction, where the data read instruction is generated by the test device.

10. The test system according to claim 9, wherein: The test system further includes a test controller coupled to the test device, the test controller being configured to output a first configuration file and a second configuration file; The test device is configured to generate a data read command according to the first configuration file, or to generate a data write command according to the second configuration file, wherein the data write command includes expected data.

Images